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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [m32r/] [sth-d.cgs] - Blame information for rev 842

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# m32r testcase for sth $src1,@($slo16,$src2)
# mach(): m32r m32rx
 
        .include "testutils.inc"
 
        start
 
        .global sth_d
sth_d:
        mvaddr_h_gr r4, data_loc
        mvi_h_gr    r5, 0x123456
 
        sth r5, @(#8,r4)
 
        mvaddr_h_gr r4, data_loc2
        ld r4, @r4
        test_h_gr r4, 0x34560000 ; big endian processor
 
        pass
 
data_loc:
        .word 0
        .word 0
data_loc2:
        .word 0

Line No.	Rev	Author	Line
1	227	jeremybenn	`# m32r testcase for sth $src1,@($slo16,$src2)`
2			`# mach(): m32r m32rx`
3
4			`.include "testutils.inc"`
5
6			`start`
7
8			`.global sth_d`
9			`sth_d:`
10			`mvaddr_h_gr r4, data_loc`
11			`mvi_h_gr r5, 0x123456`
12
13			`sth r5, @(#8,r4)`
14
15			`mvaddr_h_gr r4, data_loc2`
16			`ld r4, @r4`
17			`test_h_gr r4, 0x34560000 ; big endian processor`
18
19			`pass`
20
21			`data_loc:`
22			`.word 0`
23			`.word 0`
24			`data_loc2:`
25			`.word 0`

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[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [m32r/] [sth-d.cgs] - Blame information for rev 842