OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [sh/] [allinsn.exp] - Blame information for rev 834

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
# sh tests
2
 
3
set all "sh shdsp"
4
 
5
set global_as_options ""
6
set global_ld_options ""
7
 
8
foreach opt $board_variant_list {
9
    switch "x$opt" {
10
        x-ml { set global_as_options "-little --defsym LITTLE=1"
11
               set global_ld_options "-EL" }
12
    }
13
}
14
 
15
if [istarget sh-*elf] {
16
    run_sim_test add.s    $all
17
    run_sim_test and.s    $all
18
    run_sim_test bandor.s sh
19
    run_sim_test bandornot.s sh
20
    run_sim_test bclr.s   sh
21
    run_sim_test bld.s    sh
22
    run_sim_test bldnot.s sh
23
    run_sim_test bset.s   sh
24
    run_sim_test bst.s    sh
25
    run_sim_test bxor.s   sh
26
    run_sim_test clip.s   sh
27
    run_sim_test div.s    sh
28
    run_sim_test dmxy.s   shdsp
29
    run_sim_test fabs.s   sh
30
    run_sim_test fadd.s   sh
31
    run_sim_test fcmpeq.s sh
32
    run_sim_test fcmpgt.s sh
33
    run_sim_test fcnvds.s sh
34
    run_sim_test fcnvsd.s sh
35
    run_sim_test fdiv.s   sh
36
    run_sim_test fipr.s   sh
37
    run_sim_test fldi0.s  sh
38
    run_sim_test fldi1.s  sh
39
    run_sim_test flds.s   sh
40
    run_sim_test float.s  sh
41
    run_sim_test fmac.s   sh
42
    run_sim_test fmov.s   sh
43
    run_sim_test fmul.s   sh
44
    run_sim_test fneg.s   sh
45
    run_sim_test fpchg.s  sh
46
    run_sim_test frchg.s  sh
47
    run_sim_test fschg.s  sh
48
    run_sim_test fsqrt.s  sh
49
    run_sim_test fsub.s   sh
50
    run_sim_test ftrc.s   sh
51
    run_sim_test ldrc.s   shdsp
52
    run_sim_test loop.s   shdsp
53
    run_sim_test macl.s   sh
54
    run_sim_test macw.s   sh
55
    run_sim_test mov.s    $all
56
    run_sim_test movi.s   $all
57
    run_sim_test movli.s  $all
58
    run_sim_test movua.s  $all
59
    run_sim_test movxy.s  shdsp
60
    run_sim_test mulr.s   sh
61
    run_sim_test pabs.s   shdsp
62
    run_sim_test paddc.s  shdsp
63
    run_sim_test padd.s   shdsp
64
    run_sim_test pand.s   shdsp
65
    run_sim_test pclr.s   shdsp
66
    run_sim_test pdec.s   shdsp
67
    run_sim_test pdmsb.s  shdsp
68
    run_sim_test pinc.s   shdsp
69
    run_sim_test pmuls.s  shdsp
70
    run_sim_test prnd.s   shdsp
71
    run_sim_test pshai.s  shdsp
72
    run_sim_test pshar.s  shdsp
73
    run_sim_test pshli.s  shdsp
74
    run_sim_test pshlr.s  shdsp
75
    run_sim_test psub.s   shdsp
76
    run_sim_test pswap.s  shdsp
77
    run_sim_test pushpop.s sh
78
    run_sim_test resbank.s sh
79
    run_sim_test sett.s   sh
80
    run_sim_test shll.s   $all
81
    run_sim_test shll2.s  $all
82
    run_sim_test shll8.s  $all
83
    run_sim_test shll16.s $all
84
    run_sim_test shlr.s   $all
85
    run_sim_test shlr2.s  $all
86
    run_sim_test shlr8.s  $all
87
    run_sim_test shlr16.s $all
88
    run_sim_test swap.s   $all
89
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.