OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [sh/] [shlr16.s] - Blame information for rev 227

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 227 jeremybenn
# sh testcase for shlr16
2
# mach: all
3
# as(sh):       -defsym sim_cpu=0
4
# as(shdsp):    -defsym sim_cpu=1 -dsp
5
 
6
        .include "testutils.inc"
7
 
8
        start
9
 
10
shrl16:
11
        set_grs_a5a5
12
        shlr16 r0
13
        assertreg0 0xa5a5
14
        shlr16 r0
15
        assertreg0 0
16
 
17
        set_greg 0xa5a5a5a5, r0
18
        test_grs_a5a5
19
        pass
20
        exit 0

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.