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[/] [openrisc/] [trunk/] [gnu-old/] [newlib-1.17.0/] [libgloss/] [bfin/] [include/] [cdefBF561.h] - Blame information for rev 862

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Line No. Rev Author Line
1 148 jeremybenn 
/*
2 
 * The authors hereby grant permission to use, copy, modify, distribute,
3 
 * and license this software and its documentation for any purpose, provided
4 
 * that existing copyright notices are retained in all copies and that this
5 
 * notice is included verbatim in any distributions. No written agreement,
6 
 * license, or royalty fee is required for any of the authorized uses.
7 
 * Modifications to this software may be copyrighted by their authors
8 
 * and need not follow the licensing terms described here, provided that
9 
 * the new terms are clearly indicated on the first page of each file where
10 
 * they apply.
11 
 */
12 
 
13 
/************************************************************************
14 
 *
15 
 * cdefBF561.h
16 
 *
17 
 * Copyright (C) 2008 Analog Devices, Inc.
18 
 *
19 
 ************************************************************************/
20 
 
21 
/* C POINTERS TO SYSTEM MMR REGISTER AND MEMORY MAP FOR ADSP-BF561 */
22 
 
23 
#ifndef _CDEF_BF561_H
24 
#define _CDEF_BF561_H
25 
 
26 
#if !defined(__ADSPBF561__)
27 
#warning cdefBF561.h should only be included for BF561 chip.
28 
#endif
29 
/* include all Core registers and bit definitions */
30 
#include <defBF561.h>
31 
#include <cdef_LPBlackfin.h>
32 
 
33 
/*********************************************************************************** */
34 
/* System MMR Register Map */
35 
/*********************************************************************************** */
36 
 
37 
#ifndef _PTR_TO_VOL_VOID_PTR
38 
#ifndef _USE_LEGACY_CDEF_BEHAVIOUR
39 
#define _PTR_TO_VOL_VOID_PTR (void * volatile *)
40 
#else
41 
#define _PTR_TO_VOL_VOID_PTR (volatile void **)
42 
#endif
43 
#endif
44 
 
45 
 
46 
/* Clock and System Control (0xFFC00000 - 0xFFC000FF) */
47 
#define pPLL_CTL        (volatile unsigned short *)PLL_CTL
48 
#define pPLL_DIV        (volatile unsigned short *)PLL_DIV
49 
#define pVR_CTL         (volatile unsigned short *)VR_CTL
50 
#define pPLL_STAT       (volatile unsigned short *)PLL_STAT
51 
#define pPLL_LOCKCNT    (volatile unsigned short *)PLL_LOCKCNT
52 
#define pCHIPID ((volatile unsigned long*)CHIPID)
53 
 
54 
/* System Reset and Interrupt Controller registers for core A (0xFFC0 0100-0xFFC0 01FF) */
55 
#define pSICA_SWRST     (volatile unsigned short *)SICA_SWRST
56 
#define pSICA_SYSCR     (volatile unsigned short *)SICA_SYSCR
57 
#define pSICA_RVECT     (volatile unsigned short *)SICA_RVECT
58 
#define pSICA_IMASK     (volatile unsigned long *)SICA_IMASK
59 
#define pSICA_IMASK0    (volatile unsigned long *)SICA_IMASK0
60 
#define pSICA_IMASK1    (volatile unsigned long *)SICA_IMASK1
61 
#define pSICA_IAR0      (volatile unsigned long *)SICA_IAR0
62 
#define pSICA_IAR1      (volatile unsigned long *)SICA_IAR1
63 
#define pSICA_IAR2      (volatile unsigned long *)SICA_IAR2
64 
#define pSICA_IAR3      (volatile unsigned long *)SICA_IAR3
65 
#define pSICA_IAR4      (volatile unsigned long *)SICA_IAR4
66 
#define pSICA_IAR5      (volatile unsigned long *)SICA_IAR5
67 
#define pSICA_IAR6      (volatile unsigned long *)SICA_IAR6
68 
#define pSICA_IAR7      (volatile unsigned long *)SICA_IAR7
69 
#define pSICA_ISR0      (volatile unsigned long *)SICA_ISR0
70 
#define pSICA_ISR1      (volatile unsigned long *)SICA_ISR1
71 
#define pSICA_IWR0      (volatile unsigned long *)SICA_IWR0
72 
#define pSICA_IWR1      (volatile unsigned long *)SICA_IWR1
73 
 
74 
/* System Reset and Interrupt Controller registers for Core B (0xFFC0 1100-0xFFC0 11FF) */
75 
#define pSICB_SWRST     (volatile unsigned short *)SICB_SWRST
76 
#define pSICB_SYSCR     (volatile unsigned short *)SICB_SYSCR
77 
#define pSICB_RVECT     (volatile unsigned short *)SICB_RVECT
78 
#define pSICB_IMASK0    (volatile unsigned long *)SICB_IMASK0
79 
#define pSICB_IMASK1    (volatile unsigned long *)SICB_IMASK1
80 
#define pSICB_IAR0      (volatile unsigned long *)SICB_IAR0
81 
#define pSICB_IAR1      (volatile unsigned long *)SICB_IAR1
82 
#define pSICB_IAR2      (volatile unsigned long *)SICB_IAR2
83 
#define pSICB_IAR3      (volatile unsigned long *)SICB_IAR3
84 
#define pSICB_IAR4      (volatile unsigned long *)SICB_IAR4
85 
#define pSICB_IAR5      (volatile unsigned long *)SICB_IAR5
86 
#define pSICB_IAR6      (volatile unsigned long *)SICB_IAR6
87 
#define pSICB_IAR7      (volatile unsigned long *)SICB_IAR7
88 
#define pSICB_ISR0      (volatile unsigned long *)SICB_ISR0
89 
#define pSICB_ISR1      (volatile unsigned long *)SICB_ISR1
90 
#define pSICB_IWR0      (volatile unsigned long *)SICB_IWR0
91 
#define pSICB_IWR1      (volatile unsigned long *)SICB_IWR1
92 
/* Watchdog Timer registers for Core A (0xFFC0 0200-0xFFC0 02FF) */
93 
#define pWDOGA_CTL      (volatile unsigned short *)WDOGA_CTL
94 
#define pWDOGA_CNT      (volatile unsigned long *)WDOGA_CNT
95 
#define pWDOGA_STAT     (volatile unsigned long *)WDOGA_STAT
96 
 
97 
/* Watchdog Timer registers for Core B (0xFFC0 1200-0xFFC0 12FF) */
98 
#define pWDOGB_CTL      (volatile unsigned short *)WDOGB_CTL
99 
#define pWDOGB_CNT      (volatile unsigned long *)WDOGB_CNT
100 
#define pWDOGB_STAT     (volatile unsigned long *)WDOGB_STAT
101 
 
102 
/* UART Controller (0xFFC00400 - 0xFFC004FF) */
103 
#define pUART_THR       (volatile unsigned short *)UART_THR
104 
#define pUART_RBR       (volatile unsigned short *)UART_RBR
105 
#define pUART_DLL       (volatile unsigned short *)UART_DLL
106 
#define pUART_IER       (volatile unsigned short *)UART_IER
107 
#define pUART_DLH       (volatile unsigned short *)UART_DLH
108 
#define pUART_IIR       (volatile unsigned short *)UART_IIR
109 
#define pUART_LCR       (volatile unsigned short *)UART_LCR
110 
#define pUART_MCR       (volatile unsigned short *)UART_MCR
111 
#define pUART_LSR       (volatile unsigned short *)UART_LSR
112 
#define pUART_MSR       (volatile unsigned short *)UART_MSR
113 
#define pUART_SCR       (volatile unsigned short *)UART_SCR
114 
#define pUART_GCTL      (volatile unsigned short *)UART_GCTL
115 
 
116 
/* SPI Controller (0xFFC00500 - 0xFFC005FF) */
117 
#define pSPI_CTL        (volatile unsigned short *)SPI_CTL
118 
#define pSPI_FLG        (volatile unsigned short *)SPI_FLG
119 
#define pSPI_STAT       (volatile unsigned short *)SPI_STAT
120 
#define pSPI_TDBR       (volatile unsigned short *)SPI_TDBR
121 
#define pSPI_RDBR       (volatile unsigned short *)SPI_RDBR
122 
#define pSPI_BAUD       (volatile unsigned short *)SPI_BAUD
123 
#define pSPI_SHADOW     (volatile unsigned short *)SPI_SHADOW
124 
 
125 
/* Timer 0-7 registers (0xFFC0 0600-0xFFC0 06FF) */
126 
#define pTIMER0_CONFIG  (volatile unsigned short *)TIMER0_CONFIG
127 
#define pTIMER0_COUNTER (volatile unsigned long *)TIMER0_COUNTER
128 
#define pTIMER0_PERIOD  (volatile unsigned long *)TIMER0_PERIOD
129 
#define pTIMER0_WIDTH   (volatile unsigned long *)TIMER0_WIDTH
130 
#define pTIMER1_CONFIG  (volatile unsigned short *)TIMER1_CONFIG
131 
#define pTIMER1_COUNTER (volatile unsigned long *)TIMER1_COUNTER
132 
#define pTIMER1_PERIOD  (volatile unsigned long *)TIMER1_PERIOD
133 
#define pTIMER1_WIDTH   (volatile unsigned long *)TIMER1_WIDTH
134 
#define pTIMER2_CONFIG  (volatile unsigned short *)TIMER2_CONFIG
135 
#define pTIMER2_COUNTER (volatile unsigned long *)TIMER2_COUNTER
136 
#define pTIMER2_PERIOD  (volatile unsigned long *)TIMER2_PERIOD
137 
#define pTIMER2_WIDTH   (volatile unsigned long *)TIMER2_WIDTH
138 
#define pTIMER3_CONFIG  (volatile unsigned short *)TIMER3_CONFIG
139 
#define pTIMER3_COUNTER (volatile unsigned long *)TIMER3_COUNTER
140 
#define pTIMER3_PERIOD  (volatile unsigned long *)TIMER3_PERIOD
141 
#define pTIMER3_WIDTH   (volatile unsigned long *)TIMER3_WIDTH
142 
#define pTIMER4_CONFIG  (volatile unsigned short *)TIMER4_CONFIG
143 
#define pTIMER4_COUNTER (volatile unsigned long *)TIMER4_COUNTER
144 
#define pTIMER4_PERIOD  (volatile unsigned long *)TIMER4_PERIOD
145 
#define pTIMER4_WIDTH   (volatile unsigned long *)TIMER4_WIDTH
146 
#define pTIMER5_CONFIG  (volatile unsigned short *)TIMER5_CONFIG
147 
#define pTIMER5_COUNTER (volatile unsigned long *)TIMER5_COUNTER
148 
#define pTIMER5_PERIOD  (volatile unsigned long *)TIMER5_PERIOD
149 
#define pTIMER5_WIDTH   (volatile unsigned long *)TIMER5_WIDTH
150 
#define pTIMER6_CONFIG  (volatile unsigned short *)TIMER6_CONFIG
151 
#define pTIMER6_COUNTER (volatile unsigned long *)TIMER6_COUNTER
152 
#define pTIMER6_PERIOD  (volatile unsigned long *)TIMER6_PERIOD
153 
#define pTIMER6_WIDTH   (volatile unsigned long *)TIMER6_WIDTH
154 
#define pTIMER7_CONFIG  (volatile unsigned short *)TIMER7_CONFIG
155 
#define pTIMER7_COUNTER (volatile unsigned long *)TIMER7_COUNTER
156 
#define pTIMER7_PERIOD  (volatile unsigned long *)TIMER7_PERIOD
157 
#define pTIMER7_WIDTH   (volatile unsigned long *)TIMER7_WIDTH
158 
 
159 
/* Timer registers 8-11 (0xFFC0 1600-0xFFC0 16FF) */
160 
#define pTMRS8_ENABLE   (volatile unsigned short *)TMRS8_ENABLE
161 
#define pTMRS8_DISABLE  (volatile unsigned short *)TMRS8_DISABLE
162 
#define pTMRS8_STATUS   (volatile unsigned long *)TMRS8_STATUS
163 
#define pTIMER8_CONFIG  (volatile unsigned short *)TIMER8_CONFIG
164 
#define pTIMER8_COUNTER (volatile unsigned long *)TIMER8_COUNTER
165 
#define pTIMER8_PERIOD  (volatile unsigned long *)TIMER8_PERIOD
166 
#define pTIMER8_WIDTH   (volatile unsigned long *)TIMER8_WIDTH
167 
#define pTIMER9_CONFIG  (volatile unsigned short *)TIMER9_CONFIG
168 
#define pTIMER9_COUNTER (volatile unsigned long *)TIMER9_COUNTER
169 
#define pTIMER9_PERIOD  (volatile unsigned long *)TIMER9_PERIOD
170 
#define pTIMER9_WIDTH   (volatile unsigned long *)TIMER9_WIDTH
171 
#define pTIMER10_CONFIG (volatile unsigned short *)TIMER10_CONFIG
172 
#define pTIMER10_COUNTER (volatile unsigned long *)TIMER10_COUNTER
173 
#define pTIMER10_PERIOD (volatile unsigned long *)TIMER10_PERIOD
174 
#define pTIMER10_WIDTH  (volatile unsigned long *)TIMER10_WIDTH
175 
#define pTIMER11_CONFIG (volatile unsigned short *)TIMER11_CONFIG
176 
#define pTIMER11_COUNTER (volatile unsigned long *)TIMER11_COUNTER
177 
#define pTIMER11_PERIOD (volatile unsigned long *)TIMER11_PERIOD
178 
#define pTIMER11_WIDTH  (volatile unsigned long *)TIMER11_WIDTH
179 
#define pTMRS4_ENABLE   (volatile unsigned short *)TMRS4_ENABLE
180 
#define pTMRS4_DISABLE  (volatile unsigned short *)TMRS4_DISABLE
181 
#define pTMRS4_STATUS   (volatile unsigned long *)TMRS4_STATUS
182 
 
183 
/* Programmable Flag 0 registers (0xFFC0 0700-0xFFC0 07FF) */
184 
#define pFIO0_FLAG_D    (volatile unsigned short *)FIO0_FLAG_D
185 
#define pFIO0_FLAG_C    (volatile unsigned short *)FIO0_FLAG_C
186 
#define pFIO0_FLAG_S    (volatile unsigned short *)FIO0_FLAG_S
187 
#define pFIO0_FLAG_T    (volatile unsigned short *)FIO0_FLAG_T
188 
#define pFIO0_MASKA_D   (volatile unsigned short *)FIO0_MASKA_D
189 
#define pFIO0_MASKA_C   (volatile unsigned short *)FIO0_MASKA_C
190 
#define pFIO0_MASKA_S   (volatile unsigned short *)FIO0_MASKA_S
191 
#define pFIO0_MASKA_T   (volatile unsigned short *)FIO0_MASKA_T
192 
#define pFIO0_MASKB_D   (volatile unsigned short *)FIO0_MASKB_D
193 
#define pFIO0_MASKB_C   (volatile unsigned short *)FIO0_MASKB_C
194 
#define pFIO0_MASKB_S   (volatile unsigned short *)FIO0_MASKB_S
195 
#define pFIO0_MASKB_T   (volatile unsigned short *)FIO0_MASKB_T
196 
#define pFIO0_DIR       (volatile unsigned short *)FIO0_DIR
197 
#define pFIO0_POLAR     (volatile unsigned short *)FIO0_POLAR
198 
#define pFIO0_EDGE      (volatile unsigned short *)FIO0_EDGE
199 
#define pFIO0_BOTH      (volatile unsigned short *)FIO0_BOTH
200 
#define pFIO0_INEN      (volatile unsigned short *)FIO0_INEN
201 
/* Programmable Flag 1 registers (0xFFC0 1500-0xFFC0 15FF) */
202 
#define pFIO1_FLAG_D    (volatile unsigned short *)FIO1_FLAG_D
203 
#define pFIO1_FLAG_C    (volatile unsigned short *)FIO1_FLAG_C
204 
#define pFIO1_FLAG_S    (volatile unsigned short *)FIO1_FLAG_S
205 
#define pFIO1_FLAG_T    (volatile unsigned short *)FIO1_FLAG_T
206 
#define pFIO1_MASKA_D   (volatile unsigned short *)FIO1_MASKA_D
207 
#define pFIO1_MASKA_C   (volatile unsigned short *)FIO1_MASKA_C
208 
#define pFIO1_MASKA_S   (volatile unsigned short *)FIO1_MASKA_S
209 
#define pFIO1_MASKA_T   (volatile unsigned short *)FIO1_MASKA_T
210 
#define pFIO1_MASKB_D   (volatile unsigned short *)FIO1_MASKB_D
211 
#define pFIO1_MASKB_C   (volatile unsigned short *)FIO1_MASKB_C
212 
#define pFIO1_MASKB_S   (volatile unsigned short *)FIO1_MASKB_S
213 
#define pFIO1_MASKB_T   (volatile unsigned short *)FIO1_MASKB_T
214 
#define pFIO1_DIR       (volatile unsigned short *)FIO1_DIR
215 
#define pFIO1_POLAR     (volatile unsigned short *)FIO1_POLAR
216 
#define pFIO1_EDGE      (volatile unsigned short *)FIO1_EDGE
217 
#define pFIO1_BOTH      (volatile unsigned short *)FIO1_BOTH
218 
#define pFIO1_INEN      (volatile unsigned short *)FIO1_INEN
219 
/* Programmable Flag registers (0xFFC0 1700-0xFFC0 17FF) */
220 
#define pFIO2_FLAG_D    (volatile unsigned short *)FIO2_FLAG_D
221 
#define pFIO2_FLAG_C    (volatile unsigned short *)FIO2_FLAG_C
222 
#define pFIO2_FLAG_S    (volatile unsigned short *)FIO2_FLAG_S
223 
#define pFIO2_FLAG_T    (volatile unsigned short *)FIO2_FLAG_T
224 
#define pFIO2_MASKA_D   (volatile unsigned short *)FIO2_MASKA_D
225 
#define pFIO2_MASKA_C   (volatile unsigned short *)FIO2_MASKA_C
226 
#define pFIO2_MASKA_S   (volatile unsigned short *)FIO2_MASKA_S
227 
#define pFIO2_MASKA_T   (volatile unsigned short *)FIO2_MASKA_T
228 
#define pFIO2_MASKB_D   (volatile unsigned short *)FIO2_MASKB_D
229 
#define pFIO2_MASKB_C   (volatile unsigned short *)FIO2_MASKB_C
230 
#define pFIO2_MASKB_S   (volatile unsigned short *)FIO2_MASKB_S
231 
#define pFIO2_MASKB_T   (volatile unsigned short *)FIO2_MASKB_T
232 
#define pFIO2_DIR       (volatile unsigned short *)FIO2_DIR
233 
#define pFIO2_POLAR     (volatile unsigned short *)FIO2_POLAR
234 
#define pFIO2_EDGE      (volatile unsigned short *)FIO2_EDGE
235 
#define pFIO2_BOTH      (volatile unsigned short *)FIO2_BOTH
236 
#define pFIO2_INEN      (volatile unsigned short *)FIO2_INEN
237 
/* SPORT0 Controller (0xFFC00800 - 0xFFC008FF) */
238 
#define pSPORT0_TCR1    (volatile unsigned short *)SPORT0_TCR1
239 
#define pSPORT0_TCR2    (volatile unsigned short *)SPORT0_TCR2
240 
#define pSPORT0_TCLKDIV (volatile unsigned short *)SPORT0_TCLKDIV
241 
#define pSPORT0_TFSDIV  (volatile unsigned short *)SPORT0_TFSDIV
242 
#define pSPORT0_TX      (volatile unsigned long *)SPORT0_TX
243 
#define pSPORT0_RX      (volatile unsigned long *)SPORT0_RX
244 
#define pSPORT0_TX32    ((volatile long *)SPORT0_TX)
245 
#define pSPORT0_RX32    ((volatile long *)SPORT0_RX)
246 
#define pSPORT0_TX16    ((volatile unsigned short *)SPORT0_TX)
247 
#define pSPORT0_RX16    ((volatile unsigned short *)SPORT0_RX)
248 
#define pSPORT0_RCR1    (volatile unsigned short *)SPORT0_RCR1
249 
#define pSPORT0_RCR2    (volatile unsigned short *)SPORT0_RCR2
250 
#define pSPORT0_RCLKDIV (volatile unsigned short *)SPORT0_RCLKDIV
251 
#define pSPORT0_RFSDIV  (volatile unsigned short *)SPORT0_RFSDIV
252 
#define pSPORT0_STAT    (volatile unsigned short *)SPORT0_STAT
253 
#define pSPORT0_CHNL    (volatile unsigned short *)SPORT0_CHNL
254 
#define pSPORT0_MCMC1   (volatile unsigned short *)SPORT0_MCMC1
255 
#define pSPORT0_MCMC2   (volatile unsigned short *)SPORT0_MCMC2
256 
#define pSPORT0_MTCS0   (volatile unsigned long *)SPORT0_MTCS0
257 
#define pSPORT0_MTCS1   (volatile unsigned long *)SPORT0_MTCS1
258 
#define pSPORT0_MTCS2   (volatile unsigned long *)SPORT0_MTCS2
259 
#define pSPORT0_MTCS3   (volatile unsigned long *)SPORT0_MTCS3
260 
#define pSPORT0_MRCS0   (volatile unsigned long *)SPORT0_MRCS0
261 
#define pSPORT0_MRCS1   (volatile unsigned long *)SPORT0_MRCS1
262 
#define pSPORT0_MRCS2   (volatile unsigned long *)SPORT0_MRCS2
263 
#define pSPORT0_MRCS3   (volatile unsigned long *)SPORT0_MRCS3
264 
/* SPORT1 Controller (0xFFC00900 - 0xFFC009FF) */
265 
#define pSPORT1_TCR1    (volatile unsigned short *)SPORT1_TCR1
266 
#define pSPORT1_TCR2    (volatile unsigned short *)SPORT1_TCR2
267 
#define pSPORT1_TCLKDIV (volatile unsigned short *)SPORT1_TCLKDIV
268 
#define pSPORT1_TFSDIV  (volatile unsigned short *)SPORT1_TFSDIV
269 
#define pSPORT1_TX      (volatile unsigned long *)SPORT1_TX
270 
#define pSPORT1_RX      (volatile unsigned long *)SPORT1_RX
271 
#define pSPORT1_TX32    ((volatile long *)SPORT1_TX)
272 
#define pSPORT1_RX32    ((volatile long *)SPORT1_RX)
273 
#define pSPORT1_TX16    ((volatile unsigned short *)SPORT1_TX)
274 
#define pSPORT1_RX16    ((volatile unsigned short *)SPORT1_RX)
275 
#define pSPORT1_RCR1    (volatile unsigned short *)SPORT1_RCR1
276 
#define pSPORT1_RCR2    (volatile unsigned short *)SPORT1_RCR2
277 
#define pSPORT1_RCLKDIV (volatile unsigned short *)SPORT1_RCLKDIV
278 
#define pSPORT1_RFSDIV  (volatile unsigned short *)SPORT1_RFSDIV
279 
#define pSPORT1_STAT    (volatile unsigned short *)SPORT1_STAT
280 
#define pSPORT1_CHNL    (volatile unsigned short *)SPORT1_CHNL
281 
#define pSPORT1_MCMC1   (volatile unsigned short *)SPORT1_MCMC1
282 
#define pSPORT1_MCMC2   (volatile unsigned short *)SPORT1_MCMC2
283 
#define pSPORT1_MTCS0   (volatile unsigned long *)SPORT1_MTCS0
284 
#define pSPORT1_MTCS1   (volatile unsigned long *)SPORT1_MTCS1
285 
#define pSPORT1_MTCS2   (volatile unsigned long *)SPORT1_MTCS2
286 
#define pSPORT1_MTCS3   (volatile unsigned long *)SPORT1_MTCS3
287 
#define pSPORT1_MRCS0   (volatile unsigned long *)SPORT1_MRCS0
288 
#define pSPORT1_MRCS1   (volatile unsigned long *)SPORT1_MRCS1
289 
#define pSPORT1_MRCS2   (volatile unsigned long *)SPORT1_MRCS2
290 
#define pSPORT1_MRCS3   (volatile unsigned long *)SPORT1_MRCS3
291 
/* Asynchronous Memory Controller - External Bus Interface Unit */
292 
#define pEBIU_AMGCTL    (volatile unsigned short *)EBIU_AMGCTL
293 
#define pEBIU_AMBCTL0   (volatile unsigned long *)EBIU_AMBCTL0
294 
#define pEBIU_AMBCTL1   (volatile unsigned long *)EBIU_AMBCTL1
295 
/* SDRAM Controller External Bus Interface Unit (0xFFC00A00 - 0xFFC00AFF) */
296 
#define pEBIU_SDGCTL    (volatile unsigned long *)EBIU_SDGCTL
297 
#define pEBIU_SDBCTL    (volatile unsigned long *)EBIU_SDBCTL
298 
#define pEBIU_SDRRC     (volatile unsigned short *)EBIU_SDRRC
299 
#define pEBIU_SDSTAT    (volatile unsigned short *)EBIU_SDSTAT
300 
/* Parallel Peripheral Interface (PPI) 0 registers (0xFFC0 1000-0xFFC0 10FF) */
301 
#define pPPI0_CONTROL   (volatile unsigned short *)PPI0_CONTROL
302 
#define pPPI0_STATUS    (volatile unsigned short *)PPI0_STATUS
303 
#define pPPI0_COUNT     (volatile unsigned short *)PPI0_COUNT
304 
#define pPPI0_DELAY     (volatile unsigned short *)PPI0_DELAY
305 
#define pPPI0_FRAME     (volatile unsigned short *)PPI0_FRAME
306 
/* Parallel Peripheral Interface (PPI) 1 registers (0xFFC0 1300-0xFFC0 13FF) */
307 
#define pPPI1_CONTROL   (volatile unsigned short *)PPI1_CONTROL
308 
#define pPPI1_STATUS    (volatile unsigned short *)PPI1_STATUS
309 
#define pPPI1_COUNT     (volatile unsigned short *)PPI1_COUNT
310 
#define pPPI1_DELAY     (volatile unsigned short *)PPI1_DELAY
311 
#define pPPI1_FRAME     (volatile unsigned short *)PPI1_FRAME
312 
/*DMA traffic control registers */
313 
#define pDMA1_TC_PER    (volatile unsigned short *)DMA1_TC_PER
314 
#define pDMA1_TC_CNT    (volatile unsigned short *)DMA1_TC_CNT
315 
#define pDMA2_TC_PER    (volatile unsigned short *)DMA2_TC_PER
316 
#define pDMA2_TC_CNT    (volatile unsigned short *)DMA2_TC_CNT
317 
/* DMA1 Controller registers (0xFFC0 1C00-0xFFC0 1FFF) */
318 
#define pDMA1_0_CONFIG          (volatile unsigned short *)DMA1_0_CONFIG
319 
#define pDMA1_0_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_0_NEXT_DESC_PTR
320 
#define pDMA1_0_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA1_0_START_ADDR
321 
#define pDMA1_0_X_COUNT         (volatile unsigned short *)DMA1_0_X_COUNT
322 
#define pDMA1_0_Y_COUNT         (volatile unsigned short *)DMA1_0_Y_COUNT
323 
#define pDMA1_0_X_MODIFY        (volatile signed short *)DMA1_0_X_MODIFY
324 
#define pDMA1_0_Y_MODIFY        (volatile signed short *)DMA1_0_Y_MODIFY
325 
#define pDMA1_0_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_0_CURR_DESC_PTR
326 
#define pDMA1_0_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA1_0_CURR_ADDR
327 
#define pDMA1_0_CURR_X_COUNT    (volatile unsigned short *)DMA1_0_CURR_X_COUNT
328 
#define pDMA1_0_CURR_Y_COUNT    (volatile unsigned short *)DMA1_0_CURR_Y_COUNT
329 
#define pDMA1_0_IRQ_STATUS      (volatile unsigned short *)DMA1_0_IRQ_STATUS
330 
#define pDMA1_0_PERIPHERAL_MAP  (volatile unsigned short *)DMA1_0_PERIPHERAL_MAP
331 
#define pDMA1_1_CONFIG          (volatile unsigned short *)DMA1_1_CONFIG
332 
#define pDMA1_1_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_1_NEXT_DESC_PTR
333 
#define pDMA1_1_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA1_1_START_ADDR
334 
#define pDMA1_1_X_COUNT         (volatile unsigned short *)DMA1_1_X_COUNT
335 
#define pDMA1_1_Y_COUNT         (volatile unsigned short *)DMA1_1_Y_COUNT
336 
#define pDMA1_1_X_MODIFY        (volatile signed short *)DMA1_1_X_MODIFY
337 
#define pDMA1_1_Y_MODIFY        (volatile signed short *)DMA1_1_Y_MODIFY
338 
#define pDMA1_1_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_1_CURR_DESC_PTR
339 
#define pDMA1_1_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA1_1_CURR_ADDR
340 
#define pDMA1_1_CURR_X_COUNT    (volatile unsigned short *)DMA1_1_CURR_X_COUNT
341 
#define pDMA1_1_CURR_Y_COUNT    (volatile unsigned short *)DMA1_1_CURR_Y_COUNT
342 
#define pDMA1_1_IRQ_STATUS      (volatile unsigned short *)DMA1_1_IRQ_STATUS
343 
#define pDMA1_1_PERIPHERAL_MAP  (volatile unsigned short *)DMA1_1_PERIPHERAL_MAP
344 
#define pDMA1_2_CONFIG          (volatile unsigned short *)DMA1_2_CONFIG
345 
#define pDMA1_2_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_2_NEXT_DESC_PTR
346 
#define pDMA1_2_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA1_2_START_ADDR
347 
#define pDMA1_2_X_COUNT         (volatile unsigned short *)DMA1_2_X_COUNT
348 
#define pDMA1_2_Y_COUNT         (volatile unsigned short *)DMA1_2_Y_COUNT
349 
#define pDMA1_2_X_MODIFY        (volatile signed short *)DMA1_2_X_MODIFY
350 
#define pDMA1_2_Y_MODIFY        (volatile signed short *)DMA1_2_Y_MODIFY
351 
#define pDMA1_2_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_2_CURR_DESC_PTR
352 
#define pDMA1_2_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA1_2_CURR_ADDR
353 
#define pDMA1_2_CURR_X_COUNT    (volatile unsigned short *)DMA1_2_CURR_X_COUNT
354 
#define pDMA1_2_CURR_Y_COUNT    (volatile unsigned short *)DMA1_2_CURR_Y_COUNT
355 
#define pDMA1_2_IRQ_STATUS      (volatile unsigned short *)DMA1_2_IRQ_STATUS
356 
#define pDMA1_2_PERIPHERAL_MAP  (volatile unsigned short *)DMA1_2_PERIPHERAL_MAP
357 
#define pDMA1_3_CONFIG          (volatile unsigned short *)DMA1_3_CONFIG
358 
#define pDMA1_3_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_3_NEXT_DESC_PTR
359 
#define pDMA1_3_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA1_3_START_ADDR
360 
#define pDMA1_3_X_COUNT         (volatile unsigned short *)DMA1_3_X_COUNT
361 
#define pDMA1_3_Y_COUNT         (volatile unsigned short *)DMA1_3_Y_COUNT
362 
#define pDMA1_3_X_MODIFY        (volatile signed short *)DMA1_3_X_MODIFY
363 
#define pDMA1_3_Y_MODIFY        (volatile signed short *)DMA1_3_Y_MODIFY
364 
#define pDMA1_3_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_3_CURR_DESC_PTR
365 
#define pDMA1_3_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA1_3_CURR_ADDR
366 
#define pDMA1_3_CURR_X_COUNT    (volatile unsigned short *)DMA1_3_CURR_X_COUNT
367 
#define pDMA1_3_CURR_Y_COUNT    (volatile unsigned short *)DMA1_3_CURR_Y_COUNT
368 
#define pDMA1_3_IRQ_STATUS      (volatile unsigned short *)DMA1_3_IRQ_STATUS
369 
#define pDMA1_3_PERIPHERAL_MAP  (volatile unsigned short *)DMA1_3_PERIPHERAL_MAP
370 
#define pDMA1_4_CONFIG          (volatile unsigned short *)DMA1_4_CONFIG
371 
#define pDMA1_4_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_4_NEXT_DESC_PTR
372 
#define pDMA1_4_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA1_4_START_ADDR
373 
#define pDMA1_4_X_COUNT         (volatile unsigned short *)DMA1_4_X_COUNT
374 
#define pDMA1_4_Y_COUNT         (volatile unsigned short *)DMA1_4_Y_COUNT
375 
#define pDMA1_4_X_MODIFY        (volatile signed short *)DMA1_4_X_MODIFY
376 
#define pDMA1_4_Y_MODIFY        (volatile signed short *)DMA1_4_Y_MODIFY
377 
#define pDMA1_4_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_4_CURR_DESC_PTR
378 
#define pDMA1_4_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA1_4_CURR_ADDR
379 
#define pDMA1_4_CURR_X_COUNT    (volatile unsigned short *)DMA1_4_CURR_X_COUNT
380 
#define pDMA1_4_CURR_Y_COUNT    (volatile unsigned short *)DMA1_4_CURR_Y_COUNT
381 
#define pDMA1_4_IRQ_STATUS      (volatile unsigned short *)DMA1_4_IRQ_STATUS
382 
#define pDMA1_4_PERIPHERAL_MAP  (volatile unsigned short *)DMA1_4_PERIPHERAL_MAP
383 
#define pDMA1_5_CONFIG          (volatile unsigned short *)DMA1_5_CONFIG
384 
#define pDMA1_5_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_5_NEXT_DESC_PTR
385 
#define pDMA1_5_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA1_5_START_ADDR
386 
#define pDMA1_5_X_COUNT         (volatile unsigned short *)DMA1_5_X_COUNT
387 
#define pDMA1_5_Y_COUNT         (volatile unsigned short *)DMA1_5_Y_COUNT
388 
#define pDMA1_5_X_MODIFY        (volatile signed short *)DMA1_5_X_MODIFY
389 
#define pDMA1_5_Y_MODIFY        (volatile signed short *)DMA1_5_Y_MODIFY
390 
#define pDMA1_5_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_5_CURR_DESC_PTR
391 
#define pDMA1_5_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA1_5_CURR_ADDR
392 
#define pDMA1_5_CURR_X_COUNT    (volatile unsigned short *)DMA1_5_CURR_X_COUNT
393 
#define pDMA1_5_CURR_Y_COUNT    (volatile unsigned short *)DMA1_5_CURR_Y_COUNT
394 
#define pDMA1_5_IRQ_STATUS      (volatile unsigned short *)DMA1_5_IRQ_STATUS
395 
#define pDMA1_5_PERIPHERAL_MAP  (volatile unsigned short *)DMA1_5_PERIPHERAL_MAP
396 
#define pDMA1_6_CONFIG          (volatile unsigned short *)DMA1_6_CONFIG
397 
#define pDMA1_6_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_6_NEXT_DESC_PTR
398 
#define pDMA1_6_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA1_6_START_ADDR
399 
#define pDMA1_6_X_COUNT         (volatile unsigned short *)DMA1_6_X_COUNT
400 
#define pDMA1_6_Y_COUNT         (volatile unsigned short *)DMA1_6_Y_COUNT
401 
#define pDMA1_6_X_MODIFY        (volatile signed short *)DMA1_6_X_MODIFY
402 
#define pDMA1_6_Y_MODIFY        (volatile signed short *)DMA1_6_Y_MODIFY
403 
#define pDMA1_6_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_6_CURR_DESC_PTR
404 
#define pDMA1_6_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA1_6_CURR_ADDR
405 
#define pDMA1_6_CURR_X_COUNT    (volatile unsigned short *)DMA1_6_CURR_X_COUNT
406 
#define pDMA1_6_CURR_Y_COUNT    (volatile unsigned short *)DMA1_6_CURR_Y_COUNT
407 
#define pDMA1_6_IRQ_STATUS      (volatile unsigned short *)DMA1_6_IRQ_STATUS
408 
#define pDMA1_6_PERIPHERAL_MAP  (volatile unsigned short *)DMA1_6_PERIPHERAL_MAP
409 
#define pDMA1_7_CONFIG          (volatile unsigned short *)DMA1_7_CONFIG
410 
#define pDMA1_7_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_7_NEXT_DESC_PTR
411 
#define pDMA1_7_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA1_7_START_ADDR
412 
#define pDMA1_7_X_COUNT         (volatile unsigned short *)DMA1_7_X_COUNT
413 
#define pDMA1_7_Y_COUNT         (volatile unsigned short *)DMA1_7_Y_COUNT
414 
#define pDMA1_7_X_MODIFY        (volatile signed short *)DMA1_7_X_MODIFY
415 
#define pDMA1_7_Y_MODIFY        (volatile signed short *)DMA1_7_Y_MODIFY
416 
#define pDMA1_7_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_7_CURR_DESC_PTR
417 
#define pDMA1_7_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA1_7_CURR_ADDR
418 
#define pDMA1_7_CURR_X_COUNT    (volatile unsigned short *)DMA1_7_CURR_X_COUNT
419 
#define pDMA1_7_CURR_Y_COUNT    (volatile unsigned short *)DMA1_7_CURR_Y_COUNT
420 
#define pDMA1_7_IRQ_STATUS      (volatile unsigned short *)DMA1_7_IRQ_STATUS
421 
#define pDMA1_7_PERIPHERAL_MAP  (volatile unsigned short *)DMA1_7_PERIPHERAL_MAP
422 
#define pDMA1_8_CONFIG          (volatile unsigned short *)DMA1_8_CONFIG
423 
#define pDMA1_8_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_8_NEXT_DESC_PTR
424 
#define pDMA1_8_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA1_8_START_ADDR
425 
#define pDMA1_8_X_COUNT         (volatile unsigned short *)DMA1_8_X_COUNT
426 
#define pDMA1_8_Y_COUNT         (volatile unsigned short *)DMA1_8_Y_COUNT
427 
#define pDMA1_8_X_MODIFY        (volatile signed short *)DMA1_8_X_MODIFY
428 
#define pDMA1_8_Y_MODIFY        (volatile signed short *)DMA1_8_Y_MODIFY
429 
#define pDMA1_8_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_8_CURR_DESC_PTR
430 
#define pDMA1_8_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA1_8_CURR_ADDR
431 
#define pDMA1_8_CURR_X_COUNT    (volatile unsigned short *)DMA1_8_CURR_X_COUNT
432 
#define pDMA1_8_CURR_Y_COUNT    (volatile unsigned short *)DMA1_8_CURR_Y_COUNT
433 
#define pDMA1_8_IRQ_STATUS      (volatile unsigned short *)DMA1_8_IRQ_STATUS
434 
#define pDMA1_8_PERIPHERAL_MAP  (volatile unsigned short *)DMA1_8_PERIPHERAL_MAP
435 
#define pDMA1_9_CONFIG          (volatile unsigned short *)DMA1_9_CONFIG
436 
#define pDMA1_9_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_9_NEXT_DESC_PTR
437 
#define pDMA1_9_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA1_9_START_ADDR
438 
#define pDMA1_9_X_COUNT         (volatile unsigned short *)DMA1_9_X_COUNT
439 
#define pDMA1_9_Y_COUNT         (volatile unsigned short *)DMA1_9_Y_COUNT
440 
#define pDMA1_9_X_MODIFY        (volatile signed short *)DMA1_9_X_MODIFY
441 
#define pDMA1_9_Y_MODIFY        (volatile signed short *)DMA1_9_Y_MODIFY
442 
#define pDMA1_9_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA1_9_CURR_DESC_PTR
443 
#define pDMA1_9_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA1_9_CURR_ADDR
444 
#define pDMA1_9_CURR_X_COUNT    (volatile unsigned short *)DMA1_9_CURR_X_COUNT
445 
#define pDMA1_9_CURR_Y_COUNT    (volatile unsigned short *)DMA1_9_CURR_Y_COUNT
446 
#define pDMA1_9_IRQ_STATUS      (volatile unsigned short *)DMA1_9_IRQ_STATUS
447 
#define pDMA1_9_PERIPHERAL_MAP  (volatile unsigned short *)DMA1_9_PERIPHERAL_MAP
448 
#define pDMA1_10_CONFIG         (volatile unsigned short *)DMA1_10_CONFIG
449 
#define pDMA1_10_NEXT_DESC_PTR  _PTR_TO_VOL_VOID_PTR DMA1_10_NEXT_DESC_PTR
450 
#define pDMA1_10_START_ADDR     _PTR_TO_VOL_VOID_PTR DMA1_10_START_ADDR
451 
#define pDMA1_10_X_COUNT        (volatile unsigned short *)DMA1_10_X_COUNT
452 
#define pDMA1_10_Y_COUNT        (volatile unsigned short *)DMA1_10_Y_COUNT
453 
#define pDMA1_10_X_MODIFY       (volatile signed short *)DMA1_10_X_MODIFY
454 
#define pDMA1_10_Y_MODIFY       (volatile signed short *)DMA1_10_Y_MODIFY
455 
#define pDMA1_10_CURR_DESC_PTR  _PTR_TO_VOL_VOID_PTR DMA1_10_CURR_DESC_PTR
456 
#define pDMA1_10_CURR_ADDR      _PTR_TO_VOL_VOID_PTR DMA1_10_CURR_ADDR
457 
#define pDMA1_10_CURR_X_COUNT   (volatile unsigned short *)DMA1_10_CURR_X_COUNT
458 
#define pDMA1_10_CURR_Y_COUNT   (volatile unsigned short *)DMA1_10_CURR_Y_COUNT
459 
#define pDMA1_10_IRQ_STATUS     (volatile unsigned short *)DMA1_10_IRQ_STATUS
460 
#define pDMA1_10_PERIPHERAL_MAP (volatile unsigned short *)DMA1_10_PERIPHERAL_MAP
461 
#define pDMA1_11_CONFIG         (volatile unsigned short *)DMA1_11_CONFIG
462 
#define pDMA1_11_NEXT_DESC_PTR  _PTR_TO_VOL_VOID_PTR DMA1_11_NEXT_DESC_PTR
463 
#define pDMA1_11_START_ADDR     _PTR_TO_VOL_VOID_PTR DMA1_11_START_ADDR
464 
#define pDMA1_11_X_COUNT        (volatile unsigned short *)DMA1_11_X_COUNT
465 
#define pDMA1_11_Y_COUNT        (volatile unsigned short *)DMA1_11_Y_COUNT
466 
#define pDMA1_11_X_MODIFY       (volatile signed short *)DMA1_11_X_MODIFY
467 
#define pDMA1_11_Y_MODIFY       (volatile signed short *)DMA1_11_Y_MODIFY
468 
#define pDMA1_11_CURR_DESC_PTR  _PTR_TO_VOL_VOID_PTR DMA1_11_CURR_DESC_PTR
469 
#define pDMA1_11_CURR_ADDR      _PTR_TO_VOL_VOID_PTR DMA1_11_CURR_ADDR
470 
#define pDMA1_11_CURR_X_COUNT   (volatile unsigned short *)DMA1_11_CURR_X_COUNT
471 
#define pDMA1_11_CURR_Y_COUNT   (volatile unsigned short *)DMA1_11_CURR_Y_COUNT
472 
#define pDMA1_11_IRQ_STATUS     (volatile unsigned short *)DMA1_11_IRQ_STATUS
473 
#define pDMA1_11_PERIPHERAL_MAP (volatile unsigned short *)DMA1_11_PERIPHERAL_MAP
474 
/* Memory DMA1 Controller registers (0xFFC0 1E80-0xFFC0 1FFF) */
475 
#define pMDMA1_D0_CONFIG        (volatile unsigned short *)MDMA1_D0_CONFIG
476 
#define pMDMA1_D0_NEXT_DESC_PTR _PTR_TO_VOL_VOID_PTR MDMA1_D0_NEXT_DESC_PTR
477 
#define pMDMA1_D0_START_ADDR    _PTR_TO_VOL_VOID_PTR MDMA1_D0_START_ADDR
478 
#define pMDMA1_D0_X_COUNT       (volatile unsigned short *)MDMA1_D0_X_COUNT
479 
#define pMDMA1_D0_Y_COUNT       (volatile unsigned short *)MDMA1_D0_Y_COUNT
480 
#define pMDMA1_D0_X_MODIFY      (volatile signed short *)MDMA1_D0_X_MODIFY
481 
#define pMDMA1_D0_Y_MODIFY      (volatile signed short *)MDMA1_D0_Y_MODIFY
482 
#define pMDMA1_D0_CURR_DESC_PTR _PTR_TO_VOL_VOID_PTR MDMA1_D0_CURR_DESC_PTR
483 
#define pMDMA1_D0_CURR_ADDR     _PTR_TO_VOL_VOID_PTR MDMA1_D0_CURR_ADDR
484 
#define pMDMA1_D0_CURR_X_COUNT  (volatile unsigned short *)MDMA1_D0_CURR_X_COUNT
485 
#define pMDMA1_D0_CURR_Y_COUNT  (volatile unsigned short *)MDMA1_D0_CURR_Y_COUNT
486 
#define pMDMA1_D0_IRQ_STATUS    (volatile unsigned short *)MDMA1_D0_IRQ_STATUS
487 
#define pMDMA1_D0_PERIPHERAL_MAP (volatile unsigned short *)MDMA1_D0_PERIPHERAL_MAP
488 
#define pMDMA1_S0_CONFIG        (volatile unsigned short *)MDMA1_S0_CONFIG
489 
#define pMDMA1_S0_NEXT_DESC_PTR _PTR_TO_VOL_VOID_PTR MDMA1_S0_NEXT_DESC_PTR
490 
#define pMDMA1_S0_START_ADDR    _PTR_TO_VOL_VOID_PTR MDMA1_S0_START_ADDR
491 
#define pMDMA1_S0_X_COUNT       (volatile unsigned short *)MDMA1_S0_X_COUNT
492 
#define pMDMA1_S0_Y_COUNT       (volatile unsigned short *)MDMA1_S0_Y_COUNT
493 
#define pMDMA1_S0_X_MODIFY      (volatile signed short *)MDMA1_S0_X_MODIFY
494 
#define pMDMA1_S0_Y_MODIFY      (volatile signed short *)MDMA1_S0_Y_MODIFY
495 
#define pMDMA1_S0_CURR_DESC_PTR _PTR_TO_VOL_VOID_PTR MDMA1_S0_CURR_DESC_PTR
496 
#define pMDMA1_S0_CURR_ADDR     _PTR_TO_VOL_VOID_PTR MDMA1_S0_CURR_ADDR
497 
#define pMDMA1_S0_CURR_X_COUNT  (volatile unsigned short *)MDMA1_S0_CURR_X_COUNT
498 
#define pMDMA1_S0_CURR_Y_COUNT  (volatile unsigned short *)MDMA1_S0_CURR_Y_COUNT
499 
#define pMDMA1_S0_IRQ_STATUS    (volatile unsigned short *)MDMA1_S0_IRQ_STATUS
500 
#define pMDMA1_S0_PERIPHERAL_MAP (volatile unsigned short *)MDMA1_S0_PERIPHERAL_MAP
501 
#define pMDMA1_D1_CONFIG        (volatile unsigned short *)MDMA1_D1_CONFIG
502 
#define pMDMA1_D1_NEXT_DESC_PTR _PTR_TO_VOL_VOID_PTR MDMA1_D1_NEXT_DESC_PTR
503 
#define pMDMA1_D1_START_ADDR    _PTR_TO_VOL_VOID_PTR MDMA1_D1_START_ADDR
504 
#define pMDMA1_D1_X_COUNT       (volatile unsigned short *)MDMA1_D1_X_COUNT
505 
#define pMDMA1_D1_Y_COUNT       (volatile unsigned short *)MDMA1_D1_Y_COUNT
506 
#define pMDMA1_D1_X_MODIFY      (volatile signed short *)MDMA1_D1_X_MODIFY
507 
#define pMDMA1_D1_Y_MODIFY      (volatile signed short *)MDMA1_D1_Y_MODIFY
508 
#define pMDMA1_D1_CURR_DESC_PTR _PTR_TO_VOL_VOID_PTR MDMA1_D1_CURR_DESC_PTR
509 
#define pMDMA1_D1_CURR_ADDR     _PTR_TO_VOL_VOID_PTR MDMA1_D1_CURR_ADDR
510 
#define pMDMA1_D1_CURR_X_COUNT  (volatile unsigned short *)MDMA1_D1_CURR_X_COUNT
511 
#define pMDMA1_D1_CURR_Y_COUNT  (volatile unsigned short *)MDMA1_D1_CURR_Y_COUNT
512 
#define pMDMA1_D1_IRQ_STATUS    (volatile unsigned short *)MDMA1_D1_IRQ_STATUS
513 
#define pMDMA1_D1_PERIPHERAL_MAP (volatile unsigned short *)MDMA1_D1_PERIPHERAL_MAP
514 
#define pMDMA1_S1_CONFIG        (volatile unsigned short *)MDMA1_S1_CONFIG
515 
#define pMDMA1_S1_NEXT_DESC_PTR _PTR_TO_VOL_VOID_PTR MDMA1_S1_NEXT_DESC_PTR
516 
#define pMDMA1_S1_START_ADDR    _PTR_TO_VOL_VOID_PTR MDMA1_S1_START_ADDR
517 
#define pMDMA1_S1_X_COUNT       (volatile unsigned short *)MDMA1_S1_X_COUNT
518 
#define pMDMA1_S1_Y_COUNT       (volatile unsigned short *)MDMA1_S1_Y_COUNT
519 
#define pMDMA1_S1_X_MODIFY      (volatile signed short *)MDMA1_S1_X_MODIFY
520 
#define pMDMA1_S1_Y_MODIFY      (volatile signed short *)MDMA1_S1_Y_MODIFY
521 
#define pMDMA1_S1_CURR_DESC_PTR _PTR_TO_VOL_VOID_PTR MDMA1_S1_CURR_DESC_PTR
522 
#define pMDMA1_S1_CURR_ADDR     _PTR_TO_VOL_VOID_PTR MDMA1_S1_CURR_ADDR
523 
#define pMDMA1_S1_CURR_X_COUNT  (volatile unsigned short *)MDMA1_S1_CURR_X_COUNT
524 
#define pMDMA1_S1_CURR_Y_COUNT  (volatile unsigned short *)MDMA1_S1_CURR_Y_COUNT
525 
#define pMDMA1_S1_IRQ_STATUS    (volatile unsigned short *)MDMA1_S1_IRQ_STATUS
526 
#define pMDMA1_S1_PERIPHERAL_MAP (volatile unsigned short *)MDMA1_S1_PERIPHERAL_MAP
527 
/* DMA2 Controller registers (0xFFC0 0C00-0xFFC0 0DFF) */
528 
#define pDMA2_0_CONFIG          (volatile unsigned short *)DMA2_0_CONFIG
529 
#define pDMA2_0_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_0_NEXT_DESC_PTR
530 
#define pDMA2_0_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA2_0_START_ADDR
531 
#define pDMA2_0_X_COUNT         (volatile unsigned short *)DMA2_0_X_COUNT
532 
#define pDMA2_0_Y_COUNT         (volatile unsigned short *)DMA2_0_Y_COUNT
533 
#define pDMA2_0_X_MODIFY        (volatile signed short *)DMA2_0_X_MODIFY
534 
#define pDMA2_0_Y_MODIFY        (volatile signed short *)DMA2_0_Y_MODIFY
535 
#define pDMA2_0_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_0_CURR_DESC_PTR
536 
#define pDMA2_0_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA2_0_CURR_ADDR
537 
#define pDMA2_0_CURR_X_COUNT    (volatile unsigned short *)DMA2_0_CURR_X_COUNT
538 
#define pDMA2_0_CURR_Y_COUNT    (volatile unsigned short *)DMA2_0_CURR_Y_COUNT
539 
#define pDMA2_0_IRQ_STATUS      (volatile unsigned short *)DMA2_0_IRQ_STATUS
540 
#define pDMA2_0_PERIPHERAL_MAP  (volatile unsigned short *)DMA2_0_PERIPHERAL_MAP
541 
#define pDMA2_1_CONFIG          (volatile unsigned short *)DMA2_1_CONFIG
542 
#define pDMA2_1_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_1_NEXT_DESC_PTR
543 
#define pDMA2_1_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA2_1_START_ADDR
544 
#define pDMA2_1_X_COUNT         (volatile unsigned short *)DMA2_1_X_COUNT
545 
#define pDMA2_1_Y_COUNT         (volatile unsigned short *)DMA2_1_Y_COUNT
546 
#define pDMA2_1_X_MODIFY        (volatile signed short *)DMA2_1_X_MODIFY
547 
#define pDMA2_1_Y_MODIFY        (volatile signed short *)DMA2_1_Y_MODIFY
548 
#define pDMA2_1_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_1_CURR_DESC_PTR
549 
#define pDMA2_1_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA2_1_CURR_ADDR
550 
#define pDMA2_1_CURR_X_COUNT    (volatile unsigned short *)DMA2_1_CURR_X_COUNT
551 
#define pDMA2_1_CURR_Y_COUNT    (volatile unsigned short *)DMA2_1_CURR_Y_COUNT
552 
#define pDMA2_1_IRQ_STATUS      (volatile unsigned short *)DMA2_1_IRQ_STATUS
553 
#define pDMA2_1_PERIPHERAL_MAP  (volatile unsigned short *)DMA2_1_PERIPHERAL_MAP
554 
#define pDMA2_2_CONFIG          (volatile unsigned short *)DMA2_2_CONFIG
555 
#define pDMA2_2_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_2_NEXT_DESC_PTR
556 
#define pDMA2_2_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA2_2_START_ADDR
557 
#define pDMA2_2_X_COUNT         (volatile unsigned short *)DMA2_2_X_COUNT
558 
#define pDMA2_2_Y_COUNT         (volatile unsigned short *)DMA2_2_Y_COUNT
559 
#define pDMA2_2_X_MODIFY        (volatile signed short *)DMA2_2_X_MODIFY
560 
#define pDMA2_2_Y_MODIFY        (volatile signed short *)DMA2_2_Y_MODIFY
561 
#define pDMA2_2_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_2_CURR_DESC_PTR
562 
#define pDMA2_2_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA2_2_CURR_ADDR
563 
#define pDMA2_2_CURR_X_COUNT    (volatile unsigned short *)DMA2_2_CURR_X_COUNT
564 
#define pDMA2_2_CURR_Y_COUNT    (volatile unsigned short *)DMA2_2_CURR_Y_COUNT
565 
#define pDMA2_2_IRQ_STATUS      (volatile unsigned short *)DMA2_2_IRQ_STATUS
566 
#define pDMA2_2_PERIPHERAL_MAP  (volatile unsigned short *)DMA2_2_PERIPHERAL_MAP
567 
#define pDMA2_3_CONFIG          (volatile unsigned short *)DMA2_3_CONFIG
568 
#define pDMA2_3_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_3_NEXT_DESC_PTR
569 
#define pDMA2_3_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA2_3_START_ADDR
570 
#define pDMA2_3_X_COUNT         (volatile unsigned short *)DMA2_3_X_COUNT
571 
#define pDMA2_3_Y_COUNT         (volatile unsigned short *)DMA2_3_Y_COUNT
572 
#define pDMA2_3_X_MODIFY        (volatile signed short *)DMA2_3_X_MODIFY
573 
#define pDMA2_3_Y_MODIFY        (volatile signed short *)DMA2_3_Y_MODIFY
574 
#define pDMA2_3_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_3_CURR_DESC_PTR
575 
#define pDMA2_3_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA2_3_CURR_ADDR
576 
#define pDMA2_3_CURR_X_COUNT    (volatile unsigned short *)DMA2_3_CURR_X_COUNT
577 
#define pDMA2_3_CURR_Y_COUNT    (volatile unsigned short *)DMA2_3_CURR_Y_COUNT
578 
#define pDMA2_3_IRQ_STATUS      (volatile unsigned short *)DMA2_3_IRQ_STATUS
579 
#define pDMA2_3_PERIPHERAL_MAP  (volatile unsigned short *)DMA2_3_PERIPHERAL_MAP
580 
#define pDMA2_4_CONFIG          (volatile unsigned short *)DMA2_4_CONFIG
581 
#define pDMA2_4_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_4_NEXT_DESC_PTR
582 
#define pDMA2_4_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA2_4_START_ADDR
583 
#define pDMA2_4_X_COUNT         (volatile unsigned short *)DMA2_4_X_COUNT
584 
#define pDMA2_4_Y_COUNT         (volatile unsigned short *)DMA2_4_Y_COUNT
585 
#define pDMA2_4_X_MODIFY        (volatile signed short *)DMA2_4_X_MODIFY
586 
#define pDMA2_4_Y_MODIFY        (volatile signed short *)DMA2_4_Y_MODIFY
587 
#define pDMA2_4_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_4_CURR_DESC_PTR
588 
#define pDMA2_4_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA2_4_CURR_ADDR
589 
#define pDMA2_4_CURR_X_COUNT    (volatile unsigned short *)DMA2_4_CURR_X_COUNT
590 
#define pDMA2_4_CURR_Y_COUNT    (volatile unsigned short *)DMA2_4_CURR_Y_COUNT
591 
#define pDMA2_4_IRQ_STATUS      (volatile unsigned short *)DMA2_4_IRQ_STATUS
592 
#define pDMA2_4_PERIPHERAL_MAP  (volatile unsigned short *)DMA2_4_PERIPHERAL_MAP
593 
#define pDMA2_5_CONFIG          (volatile unsigned short *)DMA2_5_CONFIG
594 
#define pDMA2_5_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_5_NEXT_DESC_PTR
595 
#define pDMA2_5_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA2_5_START_ADDR
596 
#define pDMA2_5_X_COUNT         (volatile unsigned short *)DMA2_5_X_COUNT
597 
#define pDMA2_5_Y_COUNT         (volatile unsigned short *)DMA2_5_Y_COUNT
598 
#define pDMA2_5_X_MODIFY        (volatile signed short *)DMA2_5_X_MODIFY
599 
#define pDMA2_5_Y_MODIFY        (volatile signed short *)DMA2_5_Y_MODIFY
600 
#define pDMA2_5_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_5_CURR_DESC_PTR
601 
#define pDMA2_5_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA2_5_CURR_ADDR
602 
#define pDMA2_5_CURR_X_COUNT    (volatile unsigned short *)DMA2_5_CURR_X_COUNT
603 
#define pDMA2_5_CURR_Y_COUNT    (volatile unsigned short *)DMA2_5_CURR_Y_COUNT
604 
#define pDMA2_5_IRQ_STATUS      (volatile unsigned short *)DMA2_5_IRQ_STATUS
605 
#define pDMA2_5_PERIPHERAL_MAP  (volatile unsigned short *)DMA2_5_PERIPHERAL_MAP
606 
#define pDMA2_6_CONFIG          (volatile unsigned short *)DMA2_6_CONFIG
607 
#define pDMA2_6_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_6_NEXT_DESC_PTR
608 
#define pDMA2_6_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA2_6_START_ADDR
609 
#define pDMA2_6_X_COUNT         (volatile unsigned short *)DMA2_6_X_COUNT
610 
#define pDMA2_6_Y_COUNT         (volatile unsigned short *)DMA2_6_Y_COUNT
611 
#define pDMA2_6_X_MODIFY        (volatile signed short *)DMA2_6_X_MODIFY
612 
#define pDMA2_6_Y_MODIFY        (volatile signed short *)DMA2_6_Y_MODIFY
613 
#define pDMA2_6_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_6_CURR_DESC_PTR
614 
#define pDMA2_6_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA2_6_CURR_ADDR
615 
#define pDMA2_6_CURR_X_COUNT    (volatile unsigned short *)DMA2_6_CURR_X_COUNT
616 
#define pDMA2_6_CURR_Y_COUNT    (volatile unsigned short *)DMA2_6_CURR_Y_COUNT
617 
#define pDMA2_6_IRQ_STATUS      (volatile unsigned short *)DMA2_6_IRQ_STATUS
618 
#define pDMA2_6_PERIPHERAL_MAP  (volatile unsigned short *)DMA2_6_PERIPHERAL_MAP
619 
#define pDMA2_7_CONFIG          (volatile unsigned short *)DMA2_7_CONFIG
620 
#define pDMA2_7_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_7_NEXT_DESC_PTR
621 
#define pDMA2_7_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA2_7_START_ADDR
622 
#define pDMA2_7_X_COUNT         (volatile unsigned short *)DMA2_7_X_COUNT
623 
#define pDMA2_7_Y_COUNT         (volatile unsigned short *)DMA2_7_Y_COUNT
624 
#define pDMA2_7_X_MODIFY        (volatile signed short *)DMA2_7_X_MODIFY
625 
#define pDMA2_7_Y_MODIFY        (volatile signed short *)DMA2_7_Y_MODIFY
626 
#define pDMA2_7_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_7_CURR_DESC_PTR
627 
#define pDMA2_7_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA2_7_CURR_ADDR
628 
#define pDMA2_7_CURR_X_COUNT    (volatile unsigned short *)DMA2_7_CURR_X_COUNT
629 
#define pDMA2_7_CURR_Y_COUNT    (volatile unsigned short *)DMA2_7_CURR_Y_COUNT
630 
#define pDMA2_7_IRQ_STATUS      (volatile unsigned short *)DMA2_7_IRQ_STATUS
631 
#define pDMA2_7_PERIPHERAL_MAP  (volatile unsigned short *)DMA2_7_PERIPHERAL_MAP
632 
#define pDMA2_8_CONFIG          (volatile unsigned short *)DMA2_8_CONFIG
633 
#define pDMA2_8_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_8_NEXT_DESC_PTR
634 
#define pDMA2_8_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA2_8_START_ADDR
635 
#define pDMA2_8_X_COUNT         (volatile unsigned short *)DMA2_8_X_COUNT
636 
#define pDMA2_8_Y_COUNT         (volatile unsigned short *)DMA2_8_Y_COUNT
637 
#define pDMA2_8_X_MODIFY        (volatile signed short *)DMA2_8_X_MODIFY
638 
#define pDMA2_8_Y_MODIFY        (volatile signed short *)DMA2_8_Y_MODIFY
639 
#define pDMA2_8_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_8_CURR_DESC_PTR
640 
#define pDMA2_8_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA2_8_CURR_ADDR
641 
#define pDMA2_8_CURR_X_COUNT    (volatile unsigned short *)DMA2_8_CURR_X_COUNT
642 
#define pDMA2_8_CURR_Y_COUNT    (volatile unsigned short *)DMA2_8_CURR_Y_COUNT
643 
#define pDMA2_8_IRQ_STATUS      (volatile unsigned short *)DMA2_8_IRQ_STATUS
644 
#define pDMA2_8_PERIPHERAL_MAP  (volatile unsigned short *)DMA2_8_PERIPHERAL_MAP
645 
#define pDMA2_9_CONFIG          (volatile unsigned short *)DMA2_9_CONFIG
646 
#define pDMA2_9_NEXT_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_9_NEXT_DESC_PTR
647 
#define pDMA2_9_START_ADDR      _PTR_TO_VOL_VOID_PTR DMA2_9_START_ADDR
648 
#define pDMA2_9_X_COUNT         (volatile unsigned short *)DMA2_9_X_COUNT
649 
#define pDMA2_9_Y_COUNT         (volatile unsigned short *)DMA2_9_Y_COUNT
650 
#define pDMA2_9_X_MODIFY        (volatile signed short *)DMA2_9_X_MODIFY
651 
#define pDMA2_9_Y_MODIFY        (volatile signed short *)DMA2_9_Y_MODIFY
652 
#define pDMA2_9_CURR_DESC_PTR   _PTR_TO_VOL_VOID_PTR DMA2_9_CURR_DESC_PTR
653 
#define pDMA2_9_CURR_ADDR       _PTR_TO_VOL_VOID_PTR DMA2_9_CURR_ADDR
654 
#define pDMA2_9_CURR_X_COUNT    (volatile unsigned short *)DMA2_9_CURR_X_COUNT
655 
#define pDMA2_9_CURR_Y_COUNT    (volatile unsigned short *)DMA2_9_CURR_Y_COUNT
656 
#define pDMA2_9_IRQ_STATUS      (volatile unsigned short *)DMA2_9_IRQ_STATUS
657 
#define pDMA2_9_PERIPHERAL_MAP  (volatile unsigned short *)DMA2_9_PERIPHERAL_MAP
658 
#define pDMA2_10_CONFIG         (volatile unsigned short *)DMA2_10_CONFIG
659 
#define pDMA2_10_NEXT_DESC_PTR  _PTR_TO_VOL_VOID_PTR DMA2_10_NEXT_DESC_PTR
660 
#define pDMA2_10_START_ADDR     _PTR_TO_VOL_VOID_PTR DMA2_10_START_ADDR
661 
#define pDMA2_10_X_COUNT        (volatile unsigned short *)DMA2_10_X_COUNT
662 
#define pDMA2_10_Y_COUNT        (volatile unsigned short *)DMA2_10_Y_COUNT
663 
#define pDMA2_10_X_MODIFY       (volatile signed short *)DMA2_10_X_MODIFY
664 
#define pDMA2_10_Y_MODIFY       (volatile signed short *)DMA2_10_Y_MODIFY
665 
#define pDMA2_10_CURR_DESC_PTR  _PTR_TO_VOL_VOID_PTR DMA2_10_CURR_DESC_PTR
666 
#define pDMA2_10_CURR_ADDR      _PTR_TO_VOL_VOID_PTR DMA2_10_CURR_ADDR
667 
#define pDMA2_10_CURR_X_COUNT   (volatile unsigned short *)DMA2_10_CURR_X_COUNT
668 
#define pDMA2_10_CURR_Y_COUNT   (volatile unsigned short *)DMA2_10_CURR_Y_COUNT
669 
#define pDMA2_10_IRQ_STATUS     (volatile unsigned short *)DMA2_10_IRQ_STATUS
670 
#define pDMA2_10_PERIPHERAL_MAP (volatile unsigned short *)DMA2_10_PERIPHERAL_MAP
671 
#define pDMA2_11_CONFIG         (volatile unsigned short *)DMA2_11_CONFIG
672 
#define pDMA2_11_NEXT_DESC_PTR  _PTR_TO_VOL_VOID_PTR DMA2_11_NEXT_DESC_PTR
673 
#define pDMA2_11_START_ADDR     _PTR_TO_VOL_VOID_PTR DMA2_11_START_ADDR
674 
#define pDMA2_11_X_COUNT        (volatile unsigned short *)DMA2_11_X_COUNT
675 
#define pDMA2_11_Y_COUNT        (volatile unsigned short *)DMA2_11_Y_COUNT
676 
#define pDMA2_11_X_MODIFY       (volatile signed short *)DMA2_11_X_MODIFY
677 
#define pDMA2_11_Y_MODIFY       (volatile signed short *)DMA2_11_Y_MODIFY
678 
#define pDMA2_11_CURR_DESC_PTR  _PTR_TO_VOL_VOID_PTR DMA2_11_CURR_DESC_PTR
679 
#define pDMA2_11_CURR_ADDR      _PTR_TO_VOL_VOID_PTR DMA2_11_CURR_ADDR
680 
#define pDMA2_11_CURR_X_COUNT   (volatile unsigned short *)DMA2_11_CURR_X_COUNT
681 
#define pDMA2_11_CURR_Y_COUNT   (volatile unsigned short *)DMA2_11_CURR_Y_COUNT
682 
#define pDMA2_11_IRQ_STATUS     (volatile unsigned short *)DMA2_11_IRQ_STATUS
683 
#define pDMA2_11_PERIPHERAL_MAP (volatile unsigned short *)DMA2_11_PERIPHERAL_MAP
684 
/* Memory DMA2 Controller registers (0xFFC0 0E80-0xFFC0 0FFF) */
685 
#define pMDMA2_D0_CONFIG        (volatile unsigned short *)MDMA2_D0_CONFIG
686 
#define pMDMA2_D0_NEXT_DESC_PTR _PTR_TO_VOL_VOID_PTR MDMA2_D0_NEXT_DESC_PTR
687 
#define pMDMA2_D0_START_ADDR    _PTR_TO_VOL_VOID_PTR MDMA2_D0_START_ADDR
688 
#define pMDMA2_D0_X_COUNT       (volatile unsigned short *)MDMA2_D0_X_COUNT
689 
#define pMDMA2_D0_Y_COUNT       (volatile unsigned short *)MDMA2_D0_Y_COUNT
690 
#define pMDMA2_D0_X_MODIFY      (volatile signed short *)MDMA2_D0_X_MODIFY
691 
#define pMDMA2_D0_Y_MODIFY      (volatile signed short *)MDMA2_D0_Y_MODIFY
692 
#define pMDMA2_D0_CURR_DESC_PTR _PTR_TO_VOL_VOID_PTR MDMA2_D0_CURR_DESC_PTR
693 
#define pMDMA2_D0_CURR_ADDR     _PTR_TO_VOL_VOID_PTR MDMA2_D0_CURR_ADDR
694 
#define pMDMA2_D0_CURR_X_COUNT  (volatile unsigned short *)MDMA2_D0_CURR_X_COUNT
695 
#define pMDMA2_D0_CURR_Y_COUNT  (volatile unsigned short *)MDMA2_D0_CURR_Y_COUNT
696 
#define pMDMA2_D0_IRQ_STATUS    (volatile unsigned short *)MDMA2_D0_IRQ_STATUS
697 
#define pMDMA2_D0_PERIPHERAL_MAP (volatile unsigned short *)MDMA2_D0_PERIPHERAL_MAP
698 
#define pMDMA2_S0_CONFIG        (volatile unsigned short *)MDMA2_S0_CONFIG
699 
#define pMDMA2_S0_NEXT_DESC_PTR _PTR_TO_VOL_VOID_PTR MDMA2_S0_NEXT_DESC_PTR
700 
#define pMDMA2_S0_START_ADDR    _PTR_TO_VOL_VOID_PTR MDMA2_S0_START_ADDR
701 
#define pMDMA2_S0_X_COUNT       (volatile unsigned short *)MDMA2_S0_X_COUNT
702 
#define pMDMA2_S0_Y_COUNT       (volatile unsigned short *)MDMA2_S0_Y_COUNT
703 
#define pMDMA2_S0_X_MODIFY      (volatile signed short *)MDMA2_S0_X_MODIFY
704 
#define pMDMA2_S0_Y_MODIFY      (volatile signed short *)MDMA2_S0_Y_MODIFY
705 
#define pMDMA2_S0_CURR_DESC_PTR _PTR_TO_VOL_VOID_PTR MDMA2_S0_CURR_DESC_PTR
706 
#define pMDMA2_S0_CURR_ADDR     _PTR_TO_VOL_VOID_PTR MDMA2_S0_CURR_ADDR
707 
#define pMDMA2_S0_CURR_X_COUNT  (volatile unsigned short *)MDMA2_S0_CURR_X_COUNT
708 
#define pMDMA2_S0_CURR_Y_COUNT  (volatile unsigned short *)MDMA2_S0_CURR_Y_COUNT
709 
#define pMDMA2_S0_IRQ_STATUS    (volatile unsigned short *)MDMA2_S0_IRQ_STATUS
710 
#define pMDMA2_S0_PERIPHERAL_MAP (volatile unsigned short *)MDMA2_S0_PERIPHERAL_MAP
711 
#define pMDMA2_D1_CONFIG        (volatile unsigned short *)MDMA2_D1_CONFIG
712 
#define pMDMA2_D1_NEXT_DESC_PTR _PTR_TO_VOL_VOID_PTR MDMA2_D1_NEXT_DESC_PTR
713 
#define pMDMA2_D1_START_ADDR    _PTR_TO_VOL_VOID_PTR MDMA2_D1_START_ADDR
714 
#define pMDMA2_D1_X_COUNT       (volatile unsigned short *)MDMA2_D1_X_COUNT
715 
#define pMDMA2_D1_Y_COUNT       (volatile unsigned short *)MDMA2_D1_Y_COUNT
716 
#define pMDMA2_D1_X_MODIFY      (volatile signed short *)MDMA2_D1_X_MODIFY
717 
#define pMDMA2_D1_Y_MODIFY      (volatile signed short *)MDMA2_D1_Y_MODIFY
718 
#define pMDMA2_D1_CURR_DESC_PTR _PTR_TO_VOL_VOID_PTR MDMA2_D1_CURR_DESC_PTR
719 
#define pMDMA2_D1_CURR_ADDR     _PTR_TO_VOL_VOID_PTR MDMA2_D1_CURR_ADDR
720 
#define pMDMA2_D1_CURR_X_COUNT  (volatile unsigned short *)MDMA2_D1_CURR_X_COUNT
721 
#define pMDMA2_D1_CURR_Y_COUNT  (volatile unsigned short *)MDMA2_D1_CURR_Y_COUNT
722 
#define pMDMA2_D1_IRQ_STATUS    (volatile unsigned short *)MDMA2_D1_IRQ_STATUS
723 
#define pMDMA2_D1_PERIPHERAL_MAP (volatile unsigned short *)MDMA2_D1_PERIPHERAL_MAP
724 
#define pMDMA2_S1_CONFIG        (volatile unsigned short *)MDMA2_S1_CONFIG
725 
#define pMDMA2_S1_NEXT_DESC_PTR _PTR_TO_VOL_VOID_PTR MDMA2_S1_NEXT_DESC_PTR
726 
#define pMDMA2_S1_START_ADDR    _PTR_TO_VOL_VOID_PTR MDMA2_S1_START_ADDR
727 
#define pMDMA2_S1_X_COUNT       (volatile unsigned short *)MDMA2_S1_X_COUNT
728 
#define pMDMA2_S1_Y_COUNT       (volatile unsigned short *)MDMA2_S1_Y_COUNT
729 
#define pMDMA2_S1_X_MODIFY      (volatile signed short *)MDMA2_S1_X_MODIFY
730 
#define pMDMA2_S1_Y_MODIFY      (volatile signed short *)MDMA2_S1_Y_MODIFY
731 
#define pMDMA2_S1_CURR_DESC_PTR _PTR_TO_VOL_VOID_PTR MDMA2_S1_CURR_DESC_PTR
732 
#define pMDMA2_S1_CURR_ADDR     _PTR_TO_VOL_VOID_PTR MDMA2_S1_CURR_ADDR
733 
#define pMDMA2_S1_CURR_X_COUNT  (volatile unsigned short *)MDMA2_S1_CURR_X_COUNT
734 
#define pMDMA2_S1_CURR_Y_COUNT  (volatile unsigned short *)MDMA2_S1_CURR_Y_COUNT
735 
#define pMDMA2_S1_IRQ_STATUS    (volatile unsigned short *)MDMA2_S1_IRQ_STATUS
736 
#define pMDMA2_S1_PERIPHERAL_MAP (volatile unsigned short *)MDMA2_S1_PERIPHERAL_MAP
737 
/* Internal Memory DMA Registers (0xFFC0_1800 - 0xFFC0_19FF) */
738 
#define pIMDMA_D0_CONFIG        (volatile unsigned short *)IMDMA_D0_CONFIG
739 
#define pIMDMA_D0_NEXT_DESC_PTR _PTR_TO_VOL_VOID_PTR IMDMA_D0_NEXT_DESC_PTR
740 
#define pIMDMA_D0_START_ADDR    _PTR_TO_VOL_VOID_PTR IMDMA_D0_START_ADDR
741 
#define pIMDMA_D0_X_COUNT       (volatile unsigned short *)IMDMA_D0_X_COUNT
742 
#define pIMDMA_D0_Y_COUNT       (volatile unsigned short *)IMDMA_D0_Y_COUNT
743 
#define pIMDMA_D0_X_MODIFY      (volatile signed short *)IMDMA_D0_X_MODIFY
744 
#define pIMDMA_D0_Y_MODIFY      (volatile signed short *)IMDMA_D0_Y_MODIFY
745 
#define pIMDMA_D0_CURR_DESC_PTR _PTR_TO_VOL_VOID_PTR IMDMA_D0_CURR_DESC_PTR
746 
#define pIMDMA_D0_CURR_ADDR     _PTR_TO_VOL_VOID_PTR IMDMA_D0_CURR_ADDR
747 
#define pIMDMA_D0_CURR_X_COUNT  (volatile unsigned short *)IMDMA_D0_CURR_X_COUNT
748 
#define pIMDMA_D0_CURR_Y_COUNT  (volatile unsigned short *)IMDMA_D0_CURR_Y_COUNT
749 
#define pIMDMA_D0_IRQ_STATUS    (volatile unsigned short *)IMDMA_D0_IRQ_STATUS
750 
#define pIMDMA_S0_CONFIG        (volatile unsigned short *)IMDMA_S0_CONFIG
751 
#define pIMDMA_S0_NEXT_DESC_PTR _PTR_TO_VOL_VOID_PTR IMDMA_S0_NEXT_DESC_PTR
752 
#define pIMDMA_S0_START_ADDR    _PTR_TO_VOL_VOID_PTR IMDMA_S0_START_ADDR
753 
#define pIMDMA_S0_X_COUNT       (volatile unsigned short *)IMDMA_S0_X_COUNT
754 
#define pIMDMA_S0_Y_COUNT       (volatile unsigned short *)IMDMA_S0_Y_COUNT
755 
#define pIMDMA_S0_X_MODIFY      (volatile signed short *)IMDMA_S0_X_MODIFY
756 
#define pIMDMA_S0_Y_MODIFY      (volatile signed short *)IMDMA_S0_Y_MODIFY
757 
#define pIMDMA_S0_CURR_DESC_PTR _PTR_TO_VOL_VOID_PTR IMDMA_S0_CURR_DESC_PTR
758 
#define pIMDMA_S0_CURR_ADDR     _PTR_TO_VOL_VOID_PTR IMDMA_S0_CURR_ADDR
759 
#define pIMDMA_S0_CURR_X_COUNT  (volatile unsigned short *)IMDMA_S0_CURR_X_COUNT
760 
#define pIMDMA_S0_CURR_Y_COUNT  (volatile unsigned short *)IMDMA_S0_CURR_Y_COUNT
761 
#define pIMDMA_S0_IRQ_STATUS    (volatile unsigned short *)IMDMA_S0_IRQ_STATUS
762 
#define pIMDMA_D1_CONFIG        (volatile unsigned short *)IMDMA_D1_CONFIG
763 
#define pIMDMA_D1_NEXT_DESC_PTR _PTR_TO_VOL_VOID_PTR IMDMA_D1_NEXT_DESC_PTR
764 
#define pIMDMA_D1_START_ADDR    _PTR_TO_VOL_VOID_PTR IMDMA_D1_START_ADDR
765 
#define pIMDMA_D1_X_COUNT       (volatile unsigned short *)IMDMA_D1_X_COUNT
766 
#define pIMDMA_D1_Y_COUNT       (volatile unsigned short *)IMDMA_D1_Y_COUNT
767 
#define pIMDMA_D1_X_MODIFY      (volatile signed short *)IMDMA_D1_X_MODIFY
768 
#define pIMDMA_D1_Y_MODIFY      (volatile signed short *)IMDMA_D1_Y_MODIFY
769 
#define pIMDMA_D1_CURR_DESC_PTR _PTR_TO_VOL_VOID_PTR IMDMA_D1_CURR_DESC_PTR
770 
#define pIMDMA_D1_CURR_ADDR     _PTR_TO_VOL_VOID_PTR IMDMA_D1_CURR_ADDR
771 
#define pIMDMA_D1_CURR_X_COUNT  (volatile unsigned short *)IMDMA_D1_CURR_X_COUNT
772 
#define pIMDMA_D1_CURR_Y_COUNT  (volatile unsigned short *)IMDMA_D1_CURR_Y_COUNT
773 
#define pIMDMA_D1_IRQ_STATUS    (volatile unsigned short *)IMDMA_D1_IRQ_STATUS
774 
#define pIMDMA_S1_CONFIG        (volatile unsigned short *)IMDMA_S1_CONFIG
775 
#define pIMDMA_S1_NEXT_DESC_PTR _PTR_TO_VOL_VOID_PTR IMDMA_S1_NEXT_DESC_PTR
776 
#define pIMDMA_S1_START_ADDR    _PTR_TO_VOL_VOID_PTR IMDMA_S1_START_ADDR
777 
#define pIMDMA_S1_X_COUNT       (volatile unsigned short *)IMDMA_S1_X_COUNT
778 
#define pIMDMA_S1_Y_COUNT       (volatile unsigned short *)IMDMA_S1_Y_COUNT
779 
#define pIMDMA_S1_X_MODIFY      (volatile signed short *)IMDMA_S1_X_MODIFY
780 
#define pIMDMA_S1_Y_MODIFY      (volatile signed short *)IMDMA_S1_Y_MODIFY
781 
#define pIMDMA_S1_CURR_DESC_PTR _PTR_TO_VOL_VOID_PTR IMDMA_S1_CURR_DESC_PTR
782 
#define pIMDMA_S1_CURR_ADDR     _PTR_TO_VOL_VOID_PTR IMDMA_S1_CURR_ADDR
783 
#define pIMDMA_S1_CURR_X_COUNT  (volatile unsigned short *)IMDMA_S1_CURR_X_COUNT
784 
#define pIMDMA_S1_CURR_Y_COUNT  (volatile unsigned short *)IMDMA_S1_CURR_Y_COUNT
785 
#define pIMDMA_S1_IRQ_STATUS    (volatile unsigned short *)IMDMA_S1_IRQ_STATUS
786 
 
787 
#endif /* _CDEF_BF561_H */

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