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jeremybenn |
/*
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* PDC support
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*/
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#define OPT_PDC_CACHE 5
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#define OPT_PDC_ADD_VALID 12
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#define OPT_PDC_CHASSIS 2 /* LED's */
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#define OPT_PDC_IODC 8 /* console I/O */
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#define IODC_CONSOLE_OUT 3 /* bytes out serial port */
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#define IODC_CONSOLE_IN 2 /* bytes in serial port */
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#define PGZ_MEM_PDC 0x0388 /* location of PDC_ENTRY in memory */
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#define PGZ_CONSOLE_STRUCT 0x3A0 /* console config info */
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#define CALL_PDC (*(int (*)())((int *)(*((int *)PGZ_MEM_PDC))))
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#define putDebugChar outbyte
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#define getDebugChar inbyte
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/*
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* IODC support
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*/
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#define MAX_BUS_CONVERTERS 6
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#define MAX_LAYERS 6
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#define IO_CONSOLE_INPUT 2
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#define IO_CONSOLE_OUTPUT 3
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struct _dev {
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unsigned char flags; /* auto-search and auto-boot */
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unsigned char bus_convert[MAX_BUS_CONVERTERS];
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unsigned char pm; /* fixed field of HPA */
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unsigned int layer[MAX_LAYERS]; /* device dependent layers */
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unsigned int hpa; /* device HPA */
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unsigned int spa; /* device SPA */
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unsigned int *iodc_io; /* address of ENTRY_IO in mem */
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unsigned int class; /* device class */
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};
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/*
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* Register defintions
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*/
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#define gr0 %r0 /* always ZERO */
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#define gr1 %r1 /* ADDIL results only */
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#define gr2 %r2 /* return address */
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#define gr3 %r3 /* scratch registers */
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#define gr4 %r4
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#define gr5 %r5
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#define gr6 %r6
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#define gr7 %r7
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#define gr8 %r8
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#define gr9 %r9
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#define gr10 %r10
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#define gr11 %r11
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#define gr12 %r12
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#define gr13 %r13
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#define gr14 %r14
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#define gr15 %r15
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#define gr16 %r16
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#define gr17 %r17
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#define gr18 %r18
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#define gr19 %r19 /* 4th temp register */
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#define gr20 %r20 /* 3rd temp register */
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#define gr21 %r21 /* 2rd temp register */
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#define gr22 %r22 /* 1rd temp register */
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#define gr23 %r23 /* argument 3 */
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#define gr24 %r24 /* argument 2 */
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#define gr25 %r25 /* argument 1 */
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#define gr26 %r26 /* argument 0 */
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#define gr27 %r27 /* global data pointer */
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#define gr28 %r28 /* return value */
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#define gr29 %r29 /* return value, static link */
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#define gr30 %r30 /* stack pointer */
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#define gr31 %r31 /* millicode return pointer */
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/*
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* extra definitions, calling conventions
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*/
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#define rp gr2 /* return address */
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#define sp gr30 /* stack pointer */
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#define dp gr27 /* global data area pointer */
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/*
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* extra definitions, argument passing
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*/
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#define Arg0 gr26 /* pdc function to perform */
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#define Arg1 gr25 /* args to the pdc function */
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#define Arg2 gr24
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#define Arg3 gr23
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/*
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* Special Processor Registers
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*/
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#define SAR %cr11 /* shift amount register */
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#define IVA %cr14 /* Interruption Vector Address */
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#define EIEM %cr15 /* EIEM reg */
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#define EIR %cr23 /* EIR reg */
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#define TIMER %cr16 /* interval timer */
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#define CCR %cr10 /* coprocessor control reg. */
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/*
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* ASCII escape code
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*/
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#define NULL 0x00 /* <break> soft-reset (input only) */
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#define DELP 0x03 /* <ctrl>C del-collapse (input only, non-std) */
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#define DELE 0x04 /* <ctrl>D del-to_eol (input only, non-std) */
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#define BELL 0x07 /* <ctrl>G bell - audio */
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#define BS 0x08 /* <ctrl>H back space (left arrow) */
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#define HT 0x09 /* <ctrl>I horizontal tab */
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#define LF 0x0a /* <ctrl>J line feed (down arrow) */
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#define VT 0x0b /* <ctrl>K vertical tab (up arrow) */
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#define FF 0x0c /* <ctrl>L form feed (right arrow) */
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#define RTN 0x0d /* <ctrl>M carrage return */
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#define CR 0x0d /* <ctrl>M carrage return */
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#define INSC 0x0e /* <ctrl>N insert char (input only, non-std) */
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#define XON 0x11 /* <ctrl>Q DC1 - continue */
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#define BT 0x12 /* <ctrl>R reverse tab (input only, non-std) */
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#define XOFF 0x13 /* <ctrl>S DC3 - wait */
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#define INSE 0x16 /* <ctrl>V insert-expand (input only, non-std) */
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#define DELC 0x18 /* <ctrl>X delete char (input only, non-std) */
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#define CLRH 0x1a /* <ctrl>Z clear/home (input only) */
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#define ESC 0x1b /* <ctrl>[ escape (must call key again) */
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#define ENDL 0x1c /* <ctrl>\ cursor-to-eol (input only, non-std) */
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#define HOME 0x1e /* <ctrl>^ cursor home (input only) */
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#define DEL 0x7f /* <shift>BS destructive backspace */
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