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[/] [openrisc/] [trunk/] [gnu-old/] [newlib-1.17.0/] [libgloss/] [m68k/] [cf-isrs.c] - Blame information for rev 866

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Line No. Rev Author Line
1 148 jeremybenn
/*
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 * cf-isv.c --
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 *
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 * Copyright (c) 2006 CodeSourcery Inc
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 *
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 * The authors hereby grant permission to use, copy, modify, distribute,
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 * and license this software and its documentation for any purpose, provided
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 * that existing copyright notices are retained in all copies and that this
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 * notice is included verbatim in any distributions. No written agreement,
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 * license, or royalty fee is required for any of the authorized uses.
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 * Modifications to this software may be copyrighted by their authors
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 * and need not follow the licensing terms described here, provided that
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 * the new terms are clearly indicated on the first page of each file where
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 * they apply.
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 */
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/* This file contains default interrupt handlers code for the
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   interrupt vector.  All but one of the interrupts are user
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   replaceable.
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   These interrupt handlers are entered whenever the associated
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   interrupt occurs.  All they do is stop the debugger to give the user
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   the opportunity to determine where the problem was.  */
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/* Each ISR is a loop containing a halt instruction  */
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#define ISR_DEFINE(NAME)                                        \
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void __attribute__((interrupt_handler)) NAME (void)             \
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{                                                               \
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  while (1)                                                     \
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    __asm__ __volatile__ ("halt" ::: "memory");                 \
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}                                                               \
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struct eat_trailing_semicolon
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#if defined (L_other_interrupt)
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static ISR_DEFINE (__other_interrupt);
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#define ALIAS __other_interrupt
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#define PREFIX interrupt
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#define ALIASES A(6) A(7) \
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        A(15) A(16) A(17) A(18) A(19) A(20) A(21) A(22) A(23) \
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        A(25) A(26) A(27) A(28) A(29) A(30) A(31) \
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        A(56) A(57) A(58) A(59) A(60) A(62) A(63) \
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        A(64) A(65) A(66) A(67) A(68) A(69) A(70) A(71) \
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        A(72) A(73) A(74) A(75) A(76) A(77) A(78) A(79) \
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        A(80) A(81) A(82) A(83) A(84) A(85) A(86) A(87) \
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        A(88) A(89) A(90) A(91) A(92) A(93) A(94) A(95) \
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        A(96) A(97) A(98) A(99) A(100) A(101) A(102) A(103) \
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        A(104) A(105) A(106) A(107) A(108) A(109) A(110) A(111) \
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        A(112) A(113) A(114) A(115) A(116) A(117) A(118) A(119) \
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        A(120) A(121) A(122) A(123) A(124) A(125) A(126) A(127) \
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        A(128) A(129) A(130) A(131) A(132) A(133) A(134) A(135) \
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        A(136) A(137) A(138) A(139) A(140) A(141) A(142) A(143) \
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        A(144) A(145) A(146) A(147) A(148) A(149) A(150) A(151) \
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        A(152) A(153) A(154) A(155) A(156) A(157) A(158) A(159) \
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        A(160) A(161) A(162) A(163) A(164) A(165) A(166) A(167) \
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        A(168) A(169) A(170) A(171) A(172) A(173) A(174) A(175) \
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        A(176) A(177) A(178) A(179) A(180) A(181) A(182) A(183) \
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        A(184) A(185) A(186) A(187) A(188) A(189) A(190) A(191) \
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        A(192) A(193) A(194) A(195) A(196) A(197) A(198) A(199) \
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        A(200) A(201) A(202) A(203) A(204) A(205) A(206) A(207) \
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        A(208) A(209) A(210) A(211) A(212) A(213) A(214) A(215) \
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        A(216) A(217) A(218) A(219) A(220) A(221) A(222) A(223) \
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        A(224) A(225) A(226) A(227) A(228) A(229) A(230) A(231) \
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        A(232) A(233) A(234) A(235) A(236) A(237) A(238) A(239) \
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        A(240) A(241) A(242) A(243) A(244) A(245) A(246) A(247) \
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        A(248) A(249) A(250) A(251) A(252) A(253) A(254) A(255)
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#endif
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#if defined (L_access_error)
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ISR_DEFINE (__access_error);
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#define DEFINED __access_error
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#endif
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#if defined (L_address_error)
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ISR_DEFINE (__address_error);
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#define DEFINED __address_error
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#endif
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#if defined (L_illegal_instruction)
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ISR_DEFINE (__illegal_instruction);
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#define DEFINED __illegal_instruction
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#endif
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#if defined (L_divide_by_zero)
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ISR_DEFINE (__divide_by_zero);
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#define DEFINED __divide_by_zero
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#endif
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#if defined (L_privilege_violation)
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ISR_DEFINE (__privilege_violation);
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#define DEFINED __privilege_violation
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#endif
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#if defined (L_trace)
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ISR_DEFINE (__trace);
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#define DEFINED __trace
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#endif
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#if defined (L_unimplemented_opcode)
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static ISR_DEFINE (__unimplemented_opcode);
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#define ALIAS __unimplemented_opcode
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#define PREFIX unimplemented_
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#define SUFFIX _opcode
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#define ALIASES A(line_a) A(line_f)
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#endif
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#if defined (L_breakpoint_debug_interrupt)
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static ISR_DEFINE (__breakpoint_debug_interrupt);
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#define ALIAS __breakpoint_debug_interrupt
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#define SUFFIX _breakpoint_debug_interrupt
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#define ALIASES A(non_pc) A(pc)
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#endif
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#if defined (L_format_error)
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ISR_DEFINE (__format_error);
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#define DEFINED __format_error
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#endif
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#if defined (L_spurious_interrupt)
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ISR_DEFINE (__spurious_interrupt);
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#define DEFINED __spurious_interrupt
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#endif
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#if defined (L_trap_interrupt)
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static ISR_DEFINE (__trap_interrupt);
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#define ALIAS __trap_interrupt
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#define PREFIX trap
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#define ALIASES A(0) A(1) A(2) A(3) A(4) A(5) A(6) A(7) \
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        A(8) A(9) A(10) A(11) A(12) A(13) A(14) A(15)
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#endif
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#if defined (L_fp_interrupt)
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static ISR_DEFINE (__fp_interrupt);
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#define ALIAS __fp_interrupt
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#define PREFIX fp_
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#define ALIASES A(branch_unordered) A(inexact_result) A(divide_by_zero) \
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        A(underflow) A(operand_error) A(overflow) A(input_not_a_number) \
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        A(input_denormalized_number)
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#endif
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#if defined (L_unsupported_instruction)
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ISR_DEFINE (__unsupported_instruction);
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#define DEFINED __unsupported_instruction
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#endif
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#if defined(ALIAS)
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#ifndef PREFIX
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#define PREFIX
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#endif
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#ifndef SUFFIX
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#define SUFFIX
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#endif
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#define STRING_(a) #a
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#define STRING(a) STRING_(a)
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#define PASTE4_(a,b,c,d) a##b##c##d
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#define PASTE4(a,b,c,d) PASTE4_(a,b,c,d)
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#define A(N) \
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  void __attribute__((weak, alias(STRING(ALIAS)))) PASTE4(__,PREFIX,N,SUFFIX) (void);
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ALIASES
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#elif !defined(DEFINED)
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#error "No interrupt routine requested"
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#endif
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