OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-old/] [newlib-1.17.0/] [newlib/] [libc/] [machine/] [h8300/] [setjmp.S] - Blame information for rev 855

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 148 jeremybenn 
#include "setarch.h"
2 
 
3 
        .file "setjmp.S"
4 
 
5 
        .section .text
6 
        .align  2
7 
        .global _setjmp
8 
_setjmp:
9 
#if defined(__H8300SX__)
10 
        mov.l   er7,@er0+
11 
        mov.l   er6,@er0+
12 
        mov.l   er5,@er0+
13 
        mov.l   er4,@er0+
14 
        mov.l   @sp,@er0
15 
        sub.l   er0,er0
16 
#elif defined(__H8300H__) || defined(__H8300S__)
17 
        mov.l   er7,@er0
18 
        mov.l   er6,@(4,er0)
19 
        mov.l   er5,@(8,er0)
20 
        mov.l   er4,@(12,er0)
21 
        mov.l   @sp,er1
22 
        mov.l   er1,@(16,er0)
23 
        sub.l   er0,er0
24 
#else
25 
        mov.w   r7,@r0
26 
        mov.w   r6,@(2,r0)
27 
        mov.w   r5,@(4,r0)
28 
        mov.w   r4,@(6,r0)
29 
        mov.w   @sp,r1
30 
        mov.w   r1,@(8,r0)
31 
        sub.w   r0,r0
32 
#endif
33 
        rts
34 
 
35 
        .global _longjmp
36 
_longjmp:
37 
#if defined(__H8300H__) || defined (__H8300S__) || defined (__H8300SX__)
38 
        mov.l   @er0+,er7
39 
        mov.l   @er0+,er6
40 
        mov.l   @er0+,er5
41 
        mov.l   @er0+,er4
42 
#if defined(__H8300SX__)
43 
        mov.l   @er0,@sp
44 
#else
45 
        mov.l   @er0,er2
46 
        mov.l   er2,@sp
47 
#endif
48 
#if (__INT_MAX__ <= 32767)
49 
        mov.w   r1,r0
50 
#else
51 
        mov.l   er1,er0
52 
#endif
53 
        bne     .L1
54 
        sub     er0,er0
55 
        adds    #1,er0
56 
#else
57 
        mov.w   @r0+,r7
58 
        mov.w   @r0+,r6
59 
        mov.w   @r0+,r5
60 
        mov.w   @r0+,r4
61 
        mov.w   @r0,r2
62 
        mov.w   r2,@sp
63 
        mov.w   r1,r0
64 
        bne     .L1
65 
        mov.w   #1,r0
66 
#endif
67 
.L1:
68 
        rts

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.