1 |
38 |
julius |
2008-01-29 Alan Modra
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2 |
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3 |
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* mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
|
4 |
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to source.
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5 |
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6 |
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2007-10-22 Hans-Peter Nilsson
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7 |
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8 |
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* cris.cpu (movs, movu): Use result of extension operation when
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9 |
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updating flags.
|
10 |
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11 |
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2007-07-04 Nick Clifton
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12 |
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13 |
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* cris.cpu: Update copyright notice to refer to GPLv3.
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14 |
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* frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
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15 |
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m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
|
16 |
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sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
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17 |
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xc16x.opc: Likewise.
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18 |
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* iq2000.cpu: Fix copyright notice to refer to FSF.
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19 |
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20 |
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2007-04-30 Mark Salter
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21 |
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22 |
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* frv.cpu (spr-names): Support new coprocessor SPR registers.
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23 |
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24 |
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2007-04-20 Nick Clifton
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25 |
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26 |
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* xc16x.cpu: Restore after accidentally overwriting this file with
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27 |
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xc16x.opc.
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28 |
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29 |
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2007-03-29 DJ Delorie
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30 |
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31 |
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* m32c.cpu (Imm-8-s4n): Fix print hook.
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32 |
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(Lab-24-8, Lab-32-8, Lab-40-8): Fix.
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33 |
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(arith-jnz-imm4-dst-defn): Make relaxable.
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34 |
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(arith-jnz16-imm4-dst-defn): Fix encodings.
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35 |
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36 |
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2007-03-20 DJ Delorie
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37 |
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38 |
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* m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
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39 |
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mem20): New.
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40 |
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(src16-16-20-An-relative-*): New.
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41 |
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(dst16-*-20-An-relative-*): New.
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42 |
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(dst16-16-16sa-*): New
|
43 |
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(dst16-16-16ar-*): New
|
44 |
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(dst32-16-16sa-Unprefixed-*): New
|
45 |
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(jsri): Fix operands.
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46 |
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(setzx): Fix encoding.
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47 |
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48 |
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2007-03-08 Alan Modra
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49 |
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50 |
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* m32r.opc: Formatting.
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51 |
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52 |
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2006-05-22 Nick Clifton
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53 |
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54 |
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* iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
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55 |
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56 |
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2006-04-10 DJ Delorie
|
57 |
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58 |
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* m32c.opc (parse_unsigned_bitbase): Take a new parameter which
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59 |
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decides if this function accepts symbolic constants or not.
|
60 |
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(parse_signed_bitbase): Likewise.
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61 |
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(parse_unsigned_bitbase8): Pass the new parameter.
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62 |
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(parse_unsigned_bitbase11): Likewise.
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63 |
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(parse_unsigned_bitbase16): Likewise.
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64 |
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(parse_unsigned_bitbase19): Likewise.
|
65 |
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(parse_unsigned_bitbase27): Likewise.
|
66 |
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(parse_signed_bitbase8): Likewise.
|
67 |
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(parse_signed_bitbase11): Likewise.
|
68 |
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(parse_signed_bitbase19): Likewise.
|
69 |
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70 |
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2006-03-13 DJ Delorie
|
71 |
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72 |
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* m32c.cpu (Bit3-S): New.
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73 |
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(btst:s): New.
|
74 |
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* m32c.opc (parse_bit3_S): New.
|
75 |
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76 |
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* m32c.cpu (decimal-subtraction16-insn): Add second operand.
|
77 |
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(btst): Add optional :G suffix for MACH32.
|
78 |
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(or.b:S): New.
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79 |
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(pop.w:G): Add optional :G suffix for MACH16.
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80 |
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(push.b.imm): Fix syntax.
|
81 |
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82 |
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2006-03-10 DJ Delorie
|
83 |
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84 |
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* m32c.cpu (mul.l): New.
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85 |
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(mulu.l): New.
|
86 |
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87 |
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2006-03-03 Shrirang Khisti
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88 |
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89 |
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* xc16x.opc (parse_hash): Return NULL if the input was parsed or
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90 |
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an error message otherwise.
|
91 |
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(parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
|
92 |
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Fix up comments to correctly describe the functions.
|
93 |
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94 |
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2006-02-24 DJ Delorie
|
95 |
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96 |
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* m32c.cpu (RL_TYPE): New attribute, with macros.
|
97 |
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(Lab-8-24): Add RELAX.
|
98 |
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(unary-insn-defn-g, binary-arith-imm-dst-defn,
|
99 |
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binary-arith-imm4-dst-defn): Add 1ADDR attribute.
|
100 |
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(binary-arith-src-dst-defn): Add 2ADDR attribute.
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101 |
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(jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
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102 |
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jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
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103 |
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attribute.
|
104 |
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(jsri16, jsri32): Add 1ADDR attribute.
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105 |
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(jsr32.w, jsr32.a): Add JUMP attribute.
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106 |
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107 |
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2006-02-17 Shrirang Khisti
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108 |
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Anil Paranjape
|
109 |
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Shilin Shakti
|
110 |
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111 |
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* xc16x.cpu: New file containing complete CGEN specific XC16X CPU
|
112 |
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description.
|
113 |
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* xc16x.opc: New file containing supporting XC16C routines.
|
114 |
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115 |
|
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2006-02-10 Nick Clifton
|
116 |
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117 |
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* iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
|
118 |
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|
119 |
|
|
2006-01-06 DJ Delorie
|
120 |
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121 |
|
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* m32c.cpu (mov.w:q): Fix mode.
|
122 |
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(push32.b.imm): Likewise, for the comment.
|
123 |
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124 |
|
|
2005-12-16 Nathan Sidwell
|
125 |
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126 |
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Second part of ms1 to mt renaming.
|
127 |
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* mt.cpu (define-arch, define-isa): Set name to mt.
|
128 |
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(define-mach): Adjust.
|
129 |
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|
* mt.opc (CGEN_ASM_HASH): Update.
|
130 |
|
|
(mt_asm_hash, mt_cgen_insn_supported): Renamed.
|
131 |
|
|
(parse_loopsize, parse_imm16): Adjust.
|
132 |
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|
133 |
|
|
2005-12-13 DJ Delorie
|
134 |
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|
135 |
|
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* m32c.cpu (jsri): Fix order so register names aren't treated as
|
136 |
|
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symbols.
|
137 |
|
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(indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
|
138 |
|
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indexwd, indexws): Fix encodings.
|
139 |
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|
140 |
|
|
2005-12-12 Nathan Sidwell
|
141 |
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|
142 |
|
|
* mt.cpu: Rename from ms1.cpu.
|
143 |
|
|
* mt.opc: Rename from ms1.opc.
|
144 |
|
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|
145 |
|
|
2005-12-06 Hans-Peter Nilsson
|
146 |
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|
147 |
|
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* cris.cpu (simplecris-common-writable-specregs)
|
148 |
|
|
(simplecris-common-readable-specregs): Split from
|
149 |
|
|
simplecris-common-specregs. All users changed.
|
150 |
|
|
(cris-implemented-writable-specregs-v0)
|
151 |
|
|
(cris-implemented-readable-specregs-v0): Similar from
|
152 |
|
|
cris-implemented-specregs-v0.
|
153 |
|
|
(cris-implemented-writable-specregs-v3)
|
154 |
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|
(cris-implemented-readable-specregs-v3)
|
155 |
|
|
(cris-implemented-writable-specregs-v8)
|
156 |
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|
(cris-implemented-readable-specregs-v8)
|
157 |
|
|
(cris-implemented-writable-specregs-v10)
|
158 |
|
|
(cris-implemented-readable-specregs-v10)
|
159 |
|
|
(cris-implemented-writable-specregs-v32)
|
160 |
|
|
(cris-implemented-readable-specregs-v32): Similar.
|
161 |
|
|
(bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
|
162 |
|
|
insns and specializations.
|
163 |
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|
164 |
|
|
2005-11-08 Nathan Sidwell
|
165 |
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|
166 |
|
|
Add ms2
|
167 |
|
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* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
|
168 |
|
|
model.
|
169 |
|
|
(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
|
170 |
|
|
f-cb2incr, f-rc3): New fields.
|
171 |
|
|
(LOOP): New instruction.
|
172 |
|
|
(JAL-HAZARD): New hazard.
|
173 |
|
|
(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
|
174 |
|
|
New operands.
|
175 |
|
|
(mul, muli, dbnz, iflush): Enable for ms2
|
176 |
|
|
(jal, reti): Has JAL-HAZARD.
|
177 |
|
|
(ldctxt, ldfb, stfb): Only ms1.
|
178 |
|
|
(fbcb): Only ms1,ms1-003.
|
179 |
|
|
(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
|
180 |
|
|
fbcbincrs, mfbcbincrs): Enable for ms2.
|
181 |
|
|
(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
|
182 |
|
|
* ms1.opc (parse_loopsize): New.
|
183 |
|
|
(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
|
184 |
|
|
(print_pcrel): New.
|
185 |
|
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|
186 |
|
|
2005-10-28 Dave Brolley
|
187 |
|
|
|
188 |
|
|
Contribute the following change:
|
189 |
|
|
2003-09-24 Dave Brolley
|
190 |
|
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|
191 |
|
|
* frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
|
192 |
|
|
CGEN_ATTR_VALUE_TYPE.
|
193 |
|
|
* m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
|
194 |
|
|
Use cgen_bitset_intersect_p.
|
195 |
|
|
|
196 |
|
|
2005-10-27 DJ Delorie
|
197 |
|
|
|
198 |
|
|
* m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
|
199 |
|
|
(arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
|
200 |
|
|
arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
|
201 |
|
|
imm operand is needed.
|
202 |
|
|
(adjnz, sbjnz): Pass the right operands.
|
203 |
|
|
(unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
|
204 |
|
|
unary-insn): Add -g variants for opcodes that need to support :G.
|
205 |
|
|
(not.BW:G, push.BW:G): Call it.
|
206 |
|
|
(stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
|
207 |
|
|
stzx16-imm8-imm8-abs16): Fix operand typos.
|
208 |
|
|
* m32c.opc (m32c_asm_hash): Support bnCND.
|
209 |
|
|
(parse_signed4n, print_signed4n): New.
|
210 |
|
|
|
211 |
|
|
2005-10-26 DJ Delorie
|
212 |
|
|
|
213 |
|
|
* m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
|
214 |
|
|
(mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
|
215 |
|
|
mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
|
216 |
|
|
dsp8[sp] is signed.
|
217 |
|
|
(mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
|
218 |
|
|
(mov.BW:S r0,r1): Fix typo r1l->r1.
|
219 |
|
|
(tst): Allow :G suffix.
|
220 |
|
|
* m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
|
221 |
|
|
|
222 |
|
|
2005-10-26 Kazuhiro Inaoka
|
223 |
|
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|
224 |
|
|
* m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
|
225 |
|
|
|
226 |
|
|
2005-10-25 DJ Delorie
|
227 |
|
|
|
228 |
|
|
* m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
|
229 |
|
|
making one a macro of the other.
|
230 |
|
|
|
231 |
|
|
2005-10-21 DJ Delorie
|
232 |
|
|
|
233 |
|
|
* m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
|
234 |
|
|
(indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
|
235 |
|
|
indexld, indexls): .w variants have `1' bit.
|
236 |
|
|
(rot32.b): QI, not SI.
|
237 |
|
|
(rot32.w): HI, not SI.
|
238 |
|
|
(xchg16): HI for .w variant.
|
239 |
|
|
|
240 |
|
|
2005-10-19 Nick Clifton
|
241 |
|
|
|
242 |
|
|
* m32r.opc (parse_slo16): Fix bad application of previous patch.
|
243 |
|
|
|
244 |
|
|
2005-10-18 Andreas Schwab
|
245 |
|
|
|
246 |
|
|
* m32r.opc (parse_slo16): Better version of previous patch.
|
247 |
|
|
|
248 |
|
|
2005-10-14 Kazuhiro Inaoka
|
249 |
|
|
|
250 |
|
|
* cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
|
251 |
|
|
size.
|
252 |
|
|
|
253 |
|
|
2005-07-25 DJ Delorie
|
254 |
|
|
|
255 |
|
|
* m32c.opc (parse_unsigned8): Add %dsp8().
|
256 |
|
|
(parse_signed8): Add %hi8().
|
257 |
|
|
(parse_unsigned16): Add %dsp16().
|
258 |
|
|
(parse_signed16): Add %lo16() and %hi16().
|
259 |
|
|
(parse_lab_5_3): Make valuep a bfd_vma *.
|
260 |
|
|
|
261 |
|
|
2005-07-18 Nick Clifton
|
262 |
|
|
|
263 |
|
|
* m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
|
264 |
|
|
components.
|
265 |
|
|
(f-lab32-jmp-s): Fix insertion sequence.
|
266 |
|
|
(Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
|
267 |
|
|
(Dsp-40-s8): Make parameter be signed.
|
268 |
|
|
(Dsp-40-s16): Likewise.
|
269 |
|
|
(Dsp-48-s8): Likewise.
|
270 |
|
|
(Dsp-48-s16): Likewise.
|
271 |
|
|
(Imm-13-u3): Likewise. (Despite its name!)
|
272 |
|
|
(BitBase16-16-s8): Make the parameter be unsigned.
|
273 |
|
|
(BitBase16-8-u11-S): Likewise.
|
274 |
|
|
(Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
|
275 |
|
|
jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
|
276 |
|
|
relaxation.
|
277 |
|
|
|
278 |
|
|
* m32c.opc: Fix formatting.
|
279 |
|
|
Use safe-ctype.h instead of ctype.h
|
280 |
|
|
Move duplicated code sequences into a macro.
|
281 |
|
|
Fix compile time warnings about signedness mismatches.
|
282 |
|
|
Remove dead code.
|
283 |
|
|
(parse_lab_5_3): New parser function.
|
284 |
|
|
|
285 |
|
|
2005-07-16 Jim Blandy
|
286 |
|
|
|
287 |
|
|
* m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
|
288 |
|
|
to represent isa sets.
|
289 |
|
|
|
290 |
|
|
2005-07-15 Jim Blandy
|
291 |
|
|
|
292 |
|
|
* m32c.cpu, m32c.opc: Fix copyright.
|
293 |
|
|
|
294 |
|
|
2005-07-14 Jim Blandy
|
295 |
|
|
|
296 |
|
|
* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
|
297 |
|
|
|
298 |
|
|
2005-07-14 Alan Modra
|
299 |
|
|
|
300 |
|
|
* ms1.opc (print_dollarhex): Correct format string.
|
301 |
|
|
|
302 |
|
|
2005-07-06 Alan Modra
|
303 |
|
|
|
304 |
|
|
* iq2000.cpu: Include from binutils cpu dir.
|
305 |
|
|
|
306 |
|
|
2005-07-05 Nick Clifton
|
307 |
|
|
|
308 |
|
|
* iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
|
309 |
|
|
unsigned in order to avoid compile time warnings about sign
|
310 |
|
|
conflicts.
|
311 |
|
|
|
312 |
|
|
* ms1.opc (parse_*): Likewise.
|
313 |
|
|
(parse_imm16): Use a "void *" as it is passed both signed and
|
314 |
|
|
unsigned arguments.
|
315 |
|
|
|
316 |
|
|
2005-07-01 Nick Clifton
|
317 |
|
|
|
318 |
|
|
* frv.opc: Update to ISO C90 function declaration style.
|
319 |
|
|
* iq2000.opc: Likewise.
|
320 |
|
|
* m32r.opc: Likewise.
|
321 |
|
|
* sh.opc: Likewise.
|
322 |
|
|
|
323 |
|
|
2005-06-15 Dave Brolley
|
324 |
|
|
|
325 |
|
|
Contributed by Red Hat.
|
326 |
|
|
* ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
|
327 |
|
|
* ms1.opc: New file. Written by Stan Cox.
|
328 |
|
|
|
329 |
|
|
2005-05-10 Nick Clifton
|
330 |
|
|
|
331 |
|
|
* Update the address and phone number of the FSF organization in
|
332 |
|
|
the GPL notices in the following files:
|
333 |
|
|
cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
|
334 |
|
|
m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
|
335 |
|
|
sh64-media.cpu, simplify.inc
|
336 |
|
|
|
337 |
|
|
2005-02-24 Alan Modra
|
338 |
|
|
|
339 |
|
|
* frv.opc (parse_A): Warning fix.
|
340 |
|
|
|
341 |
|
|
2005-02-23 Nick Clifton
|
342 |
|
|
|
343 |
|
|
* frv.opc: Fixed compile time warnings about differing signed'ness
|
344 |
|
|
of pointers passed to functions.
|
345 |
|
|
* m32r.opc: Likewise.
|
346 |
|
|
|
347 |
|
|
2005-02-11 Nick Clifton
|
348 |
|
|
|
349 |
|
|
* iq2000.opc (parse_jtargq10): Change type of valuep argument to
|
350 |
|
|
'bfd_vma *' in order avoid compile time warning message.
|
351 |
|
|
|
352 |
|
|
2005-01-28 Hans-Peter Nilsson
|
353 |
|
|
|
354 |
|
|
* cris.cpu (mstep): Add missing insn.
|
355 |
|
|
|
356 |
|
|
2005-01-25 Alexandre Oliva
|
357 |
|
|
|
358 |
|
|
2004-11-10 Alexandre Oliva
|
359 |
|
|
* frv.cpu: Add support for TLS annotations in loads and calll.
|
360 |
|
|
* frv.opc (parse_symbolic_address): New.
|
361 |
|
|
(parse_ldd_annotation): New.
|
362 |
|
|
(parse_call_annotation): New.
|
363 |
|
|
(parse_ld_annotation): New.
|
364 |
|
|
(parse_ulo16, parse_uslo16): Use parse_symbolic_address.
|
365 |
|
|
Introduce TLS relocations.
|
366 |
|
|
(parse_d12, parse_s12, parse_u12): Likewise.
|
367 |
|
|
(parse_uhi16): Likewise. Fix constant checking on 64-bit host.
|
368 |
|
|
(parse_call_label, print_at): New.
|
369 |
|
|
|
370 |
|
|
2004-12-21 Mikael Starvik
|
371 |
|
|
|
372 |
|
|
* cris.cpu (cris-set-mem): Correct integral write semantics.
|
373 |
|
|
|
374 |
|
|
2004-11-29 Hans-Peter Nilsson
|
375 |
|
|
|
376 |
|
|
* cris.cpu: New file.
|
377 |
|
|
|
378 |
|
|
2004-11-15 Michael K. Lechner
|
379 |
|
|
|
380 |
|
|
* iq2000.cpu: Added quotes around macro arguments so that they
|
381 |
|
|
will work with newer versions of guile.
|
382 |
|
|
|
383 |
|
|
2004-10-27 Nick Clifton
|
384 |
|
|
|
385 |
|
|
* iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
|
386 |
|
|
wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
|
387 |
|
|
operand.
|
388 |
|
|
* iq2000.cpu (dnop index): Rename to _index to avoid complications
|
389 |
|
|
with guile.
|
390 |
|
|
|
391 |
|
|
2004-08-27 Richard Sandiford
|
392 |
|
|
|
393 |
|
|
* frv.cpu (cfmovs): Change UNIT attribute to FMALL.
|
394 |
|
|
|
395 |
|
|
2004-05-15 Nick Clifton
|
396 |
|
|
|
397 |
|
|
* iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
|
398 |
|
|
|
399 |
|
|
2004-03-30 Kazuhiro Inaoka
|
400 |
|
|
|
401 |
|
|
* m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
|
402 |
|
|
|
403 |
|
|
2004-03-01 Richard Sandiford
|
404 |
|
|
|
405 |
|
|
* frv.cpu (define-arch frv): Add fr450 mach.
|
406 |
|
|
(define-mach fr450): New.
|
407 |
|
|
(define-model fr450): New. Add profile units to every fr450 insn.
|
408 |
|
|
(define-attr UNIT): Add MDCUTSSI.
|
409 |
|
|
(define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
|
410 |
|
|
(define-attr AUDIO): New boolean.
|
411 |
|
|
(f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
|
412 |
|
|
(f-LRA-null, f-TLBPR-null): New fields.
|
413 |
|
|
(scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
|
414 |
|
|
(tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
|
415 |
|
|
(LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
|
416 |
|
|
(LRA-null, TLBPR-null): New macros.
|
417 |
|
|
(iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
|
418 |
|
|
(load-real-address): New macro.
|
419 |
|
|
(lrai, lrad, tlbpr): New instructions.
|
420 |
|
|
(media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
|
421 |
|
|
(mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
|
422 |
|
|
(mdcutssi): Change UNIT attribute to MDCUTSSI.
|
423 |
|
|
(media-low-clear-semantics, media-scope-limit-semantics)
|
424 |
|
|
(media-quad-limit, media-quad-shift): New macros.
|
425 |
|
|
(mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
|
426 |
|
|
* frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
|
427 |
|
|
(frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
|
428 |
|
|
(frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
|
429 |
|
|
(fr450_unit_mapping): New array.
|
430 |
|
|
(fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
|
431 |
|
|
for new MDCUTSSI unit.
|
432 |
|
|
(fr450_check_insn_major_constraints): New function.
|
433 |
|
|
(check_insn_major_constraints): Use it.
|
434 |
|
|
|
435 |
|
|
2004-03-01 Richard Sandiford
|
436 |
|
|
|
437 |
|
|
* frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
|
438 |
|
|
(scutss): Change unit to I0.
|
439 |
|
|
(calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
|
440 |
|
|
(mqsaths): Fix FR400-MAJOR categorization.
|
441 |
|
|
(media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
|
442 |
|
|
(media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
|
443 |
|
|
* frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
|
444 |
|
|
combinations.
|
445 |
|
|
|
446 |
|
|
2004-03-01 Richard Sandiford
|
447 |
|
|
|
448 |
|
|
* frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
|
449 |
|
|
(rstb, rsth, rst, rstd, rstq): Delete.
|
450 |
|
|
(rstbf, rsthf, rstf, rstdf, rstqf): Delete.
|
451 |
|
|
|
452 |
|
|
2004-02-23 Nick Clifton
|
453 |
|
|
|
454 |
|
|
* Apply these patches from Renesas:
|
455 |
|
|
|
456 |
|
|
2004-02-10 Kazuhiro Inaoka
|
457 |
|
|
|
458 |
|
|
* cpu/m32r.opc (my_print_insn): Fixed incorrect output when
|
459 |
|
|
disassembling codes for 0x*2 addresses.
|
460 |
|
|
|
461 |
|
|
2003-12-15 Kazuhiro Inaoka
|
462 |
|
|
|
463 |
|
|
* cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
|
464 |
|
|
|
465 |
|
|
2003-12-03 Kazuhiro Inaoka
|
466 |
|
|
|
467 |
|
|
* cpu/m32r.cpu : Add new model m32r2.
|
468 |
|
|
Add new instructions.
|
469 |
|
|
Replace occurrances of 'Mitsubishi' with 'Renesas'.
|
470 |
|
|
Changed PIPE attr of push from O to OS.
|
471 |
|
|
Care for Little-endian of M32R.
|
472 |
|
|
* cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
|
473 |
|
|
Care for Little-endian of M32R.
|
474 |
|
|
(parse_slo16): signed extension for value.
|
475 |
|
|
|
476 |
|
|
2004-02-20 Andrew Cagney
|
477 |
|
|
|
478 |
|
|
* m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
|
479 |
|
|
Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
|
480 |
|
|
|
481 |
|
|
* sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
|
482 |
|
|
written by Ben Elliston.
|
483 |
|
|
|
484 |
|
|
2004-01-14 Richard Sandiford
|
485 |
|
|
|
486 |
|
|
* frv.cpu (UNIT): Add IACC.
|
487 |
|
|
(iacc-multiply-r-r): Use it.
|
488 |
|
|
* frv.opc (fr400_unit_mapping): Add entry for IACC.
|
489 |
|
|
(fr500_unit_mapping, fr550_unit_mapping): Likewise.
|
490 |
|
|
|
491 |
|
|
2004-01-06 Alexandre Oliva
|
492 |
|
|
|
493 |
|
|
2003-12-19 Alexandre Oliva
|
494 |
|
|
* frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
|
495 |
|
|
cut&paste errors in shifting/truncating numerical operands.
|
496 |
|
|
2003-08-08 Alexandre Oliva
|
497 |
|
|
* frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
|
498 |
|
|
(parse_uslo16): Likewise.
|
499 |
|
|
(parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
|
500 |
|
|
(parse_d12): Parse gotoff12 and gotofffuncdesc12.
|
501 |
|
|
(parse_s12): Likewise.
|
502 |
|
|
2003-08-04 Alexandre Oliva
|
503 |
|
|
* frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
|
504 |
|
|
(parse_uslo16): Likewise.
|
505 |
|
|
(parse_uhi16): Parse gothi and gotfuncdeschi.
|
506 |
|
|
(parse_d12): Parse got12 and gotfuncdesc12.
|
507 |
|
|
(parse_s12): Likewise.
|
508 |
|
|
|
509 |
|
|
2003-10-10 Dave Brolley
|
510 |
|
|
|
511 |
|
|
* frv.cpu (dnpmop): New p-macro.
|
512 |
|
|
(GRdoublek): Use dnpmop.
|
513 |
|
|
(CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
|
514 |
|
|
(store-double-r-r): Use (.sym regtype doublek).
|
515 |
|
|
(r-store-double): Ditto.
|
516 |
|
|
(store-double-r-r-u): Ditto.
|
517 |
|
|
(conditional-store-double): Ditto.
|
518 |
|
|
(conditional-store-double-u): Ditto.
|
519 |
|
|
(store-double-r-simm): Ditto.
|
520 |
|
|
(fmovs): Assign to UNIT FMALL.
|
521 |
|
|
|
522 |
|
|
2003-10-06 Dave Brolley
|
523 |
|
|
|
524 |
|
|
* frv.cpu, frv.opc: Add support for fr550.
|
525 |
|
|
|
526 |
|
|
2003-09-24 Dave Brolley
|
527 |
|
|
|
528 |
|
|
* frv.cpu (u-commit): New modelling unit for fr500.
|
529 |
|
|
(mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
|
530 |
|
|
(commit-r): Use u-commit model for fr500.
|
531 |
|
|
(commit): Ditto.
|
532 |
|
|
(conditional-float-binary-op): Take profiling data as an argument.
|
533 |
|
|
Update callers.
|
534 |
|
|
(ne-float-binary-op): Ditto.
|
535 |
|
|
|
536 |
|
|
2003-09-19 Michael Snyder
|
537 |
|
|
|
538 |
|
|
* frv.cpu (nldqi): Delete unimplemented instruction.
|
539 |
|
|
|
540 |
|
|
2003-09-12 Dave Brolley
|
541 |
|
|
|
542 |
|
|
* frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
|
543 |
|
|
(clear-ne-flag-r): Pass insn profiling in as an argument. Call
|
544 |
|
|
frv_ref_SI to get input register referenced for profiling.
|
545 |
|
|
(clear-ne-flag-all): Pass insn profiling in as an argument.
|
546 |
|
|
(clrgr,clrfr,clrga,clrfa): Add profiling information.
|
547 |
|
|
|
548 |
|
|
2003-09-11 Michael Snyder
|
549 |
|
|
|
550 |
|
|
* frv.cpu: Typographical corrections.
|
551 |
|
|
|
552 |
|
|
2003-09-09 Dave Brolley
|
553 |
|
|
|
554 |
|
|
* frv.cpu (media-dual-complex): Change UNIT to FMALL.
|
555 |
|
|
(conditional-media-dual-complex, media-quad-complex): Likewise.
|
556 |
|
|
|
557 |
|
|
2003-09-04 Dave Brolley
|
558 |
|
|
|
559 |
|
|
* frv.cpu (register-transfer): Pass in all attributes in on argument.
|
560 |
|
|
Update all callers.
|
561 |
|
|
(conditional-register-transfer): Ditto.
|
562 |
|
|
(cache-preload): Ditto.
|
563 |
|
|
(floating-point-conversion): Ditto.
|
564 |
|
|
(floating-point-neg): Ditto.
|
565 |
|
|
(float-abs): Ditto.
|
566 |
|
|
(float-binary-op-s): Ditto.
|
567 |
|
|
(conditional-float-binary-op): Ditto.
|
568 |
|
|
(ne-float-binary-op): Ditto.
|
569 |
|
|
(float-dual-arith): Ditto.
|
570 |
|
|
(ne-float-dual-arith): Ditto.
|
571 |
|
|
|
572 |
|
|
2003-09-03 Dave Brolley
|
573 |
|
|
|
574 |
|
|
* frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
|
575 |
|
|
* frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
|
576 |
|
|
MCLRACC-1.
|
577 |
|
|
(A): Removed operand.
|
578 |
|
|
(A0,A1): New operands replace operand A.
|
579 |
|
|
(mnop): Now a real insn
|
580 |
|
|
(mclracc): Removed insn.
|
581 |
|
|
(mclracc-0, mclracc-1): New insns replace mclracc.
|
582 |
|
|
(all insns): Use new UNIT attributes.
|
583 |
|
|
|
584 |
|
|
2003-08-21 Nick Clifton
|
585 |
|
|
|
586 |
|
|
* frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
|
587 |
|
|
and u-media-dual-btoh with output parameter.
|
588 |
|
|
(cmbtoh): Add profiling hack.
|
589 |
|
|
|
590 |
|
|
2003-08-19 Michael Snyder
|
591 |
|
|
|
592 |
|
|
* frv.cpu: Fix typo, Frintkeven -> FRintkeven
|
593 |
|
|
|
594 |
|
|
2003-06-10 Doug Evans
|
595 |
|
|
|
596 |
|
|
* frv.cpu: Add IDOC attribute.
|
597 |
|
|
|
598 |
|
|
2003-06-06 Andrew Cagney
|
599 |
|
|
|
600 |
|
|
Contributed by Red Hat.
|
601 |
|
|
* iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
|
602 |
|
|
Stan Cox, and Frank Ch. Eigler.
|
603 |
|
|
* iq2000.opc: New file. Written by Ben Elliston, Frank
|
604 |
|
|
Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
|
605 |
|
|
* iq2000m.cpu: New file. Written by Jeff Johnston.
|
606 |
|
|
* iq10.cpu: New file. Written by Jeff Johnston.
|
607 |
|
|
|
608 |
|
|
2003-06-05 Nick Clifton
|
609 |
|
|
|
610 |
|
|
* frv.cpu (FRintieven): New operand. An even-numbered only
|
611 |
|
|
version of the FRinti operand.
|
612 |
|
|
(FRintjeven): Likewise for FRintj.
|
613 |
|
|
(FRintkeven): Likewise for FRintk.
|
614 |
|
|
(mdcutssi, media-dual-word-rotate-r-r, mqsaths,
|
615 |
|
|
media-quad-arith-sat-semantics, media-quad-arith-sat,
|
616 |
|
|
conditional-media-quad-arith-sat, mdunpackh,
|
617 |
|
|
media-quad-multiply-semantics, media-quad-multiply,
|
618 |
|
|
conditional-media-quad-multiply, media-quad-complex-i,
|
619 |
|
|
media-quad-multiply-acc-semantics, media-quad-multiply-acc,
|
620 |
|
|
conditional-media-quad-multiply-acc, munpackh,
|
621 |
|
|
media-quad-multiply-cross-acc-semantics, mdpackh,
|
622 |
|
|
media-quad-multiply-cross-acc, mbtoh-semantics,
|
623 |
|
|
media-quad-cross-multiply-cross-acc-semantics,
|
624 |
|
|
media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
|
625 |
|
|
media-quad-cross-multiply-acc-semantics, cmbtoh,
|
626 |
|
|
media-quad-cross-multiply-acc, media-quad-complex, mhtob,
|
627 |
|
|
media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
|
628 |
|
|
cmhtob): Use new operands.
|
629 |
|
|
* frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
|
630 |
|
|
(parse_even_register): New function.
|
631 |
|
|
|
632 |
|
|
2003-06-03 Nick Clifton
|
633 |
|
|
|
634 |
|
|
* frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
|
635 |
|
|
immediate value not unsigned.
|
636 |
|
|
|
637 |
|
|
2003-06-03 Andrew Cagney
|
638 |
|
|
|
639 |
|
|
Contributed by Red Hat.
|
640 |
|
|
* frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
|
641 |
|
|
and Eric Christopher.
|
642 |
|
|
* frv.opc: New file. Written by Catherine Moore, and Dave
|
643 |
|
|
Brolley.
|
644 |
|
|
* simplify.inc: New file. Written by Doug Evans.
|
645 |
|
|
|
646 |
|
|
2003-05-02 Andrew Cagney
|
647 |
|
|
|
648 |
|
|
* New file.
|
649 |
|
|
|
650 |
|
|
|
651 |
|
|
Local Variables:
|
652 |
|
|
mode: change-log
|
653 |
|
|
left-margin: 8
|
654 |
|
|
fill-column: 74
|
655 |
|
|
version-control: never
|
656 |
|
|
End:
|