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[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.18.50/] [gas/] [config/] [tc-mn10300.c] - Blame information for rev 156

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/* tc-mn10300.c -- Assembler code for the Matsushita 10300
2
   Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
3
   2006, 2007 Free Software Foundation, Inc.
4
 
5
   This file is part of GAS, the GNU Assembler.
6
 
7
   GAS is free software; you can redistribute it and/or modify
8
   it under the terms of the GNU General Public License as published by
9
   the Free Software Foundation; either version 3, or (at your option)
10
   any later version.
11
 
12
   GAS is distributed in the hope that it will be useful,
13
   but WITHOUT ANY WARRANTY; without even the implied warranty of
14
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
   GNU General Public License for more details.
16
 
17
   You should have received a copy of the GNU General Public License
18
   along with GAS; see the file COPYING.  If not, write to
19
   the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20
   Boston, MA 02110-1301, USA.  */
21
 
22
#include "as.h"
23
#include "safe-ctype.h"
24
#include "subsegs.h"
25
#include "opcode/mn10300.h"
26
#include "dwarf2dbg.h"
27
#include "libiberty.h"
28
 
29
/* Structure to hold information about predefined registers.  */
30
struct reg_name
31
{
32
  const char *name;
33
  int value;
34
};
35
 
36
/* Generic assembler global variables which must be defined by all
37
   targets.  */
38
 
39
/* Characters which always start a comment.  */
40
const char comment_chars[] = "#";
41
 
42
/* Characters which start a comment at the beginning of a line.  */
43
const char line_comment_chars[] = ";#";
44
 
45
/* Characters which may be used to separate multiple commands on a
46
   single line.  */
47
const char line_separator_chars[] = ";";
48
 
49
/* Characters which are used to indicate an exponent in a floating
50
   point number.  */
51
const char EXP_CHARS[] = "eE";
52
 
53
/* Characters which mean that a number is a floating point constant,
54
   as in 0d1.0.  */
55
const char FLT_CHARS[] = "dD";
56
 
57
const relax_typeS md_relax_table[] =
58
{
59
  /* The plus values for the bCC and fBCC instructions in the table below
60
     are because the branch instruction is translated into a jump
61
     instruction that is now +2 or +3 bytes further on in memory, and the
62
     correct size of jump instruction must be selected.  */
63
  /* bCC relaxing.  */
64
  {0x7f, -0x80, 2, 1},
65
  {0x7fff + 2, -0x8000 + 2, 5, 2},
66
  {0x7fffffff, -0x80000000, 7, 0},
67
 
68
  /* bCC relaxing (uncommon cases for 3byte length instructions)  */
69
  {0x7f, -0x80, 3, 4},
70
  {0x7fff + 3, -0x8000 + 3, 6, 5},
71
  {0x7fffffff, -0x80000000, 8, 0},
72
 
73
  /* call relaxing.  */
74
  {0x7fff, -0x8000, 5, 7},
75
  {0x7fffffff, -0x80000000, 7, 0},
76
 
77
  /* calls relaxing.  */
78
  {0x7fff, -0x8000, 4, 9},
79
  {0x7fffffff, -0x80000000, 6, 0},
80
 
81
  /* jmp relaxing.  */
82
  {0x7f, -0x80, 2, 11},
83
  {0x7fff, -0x8000, 3, 12},
84
  {0x7fffffff, -0x80000000, 5, 0},
85
 
86
  /* fbCC relaxing.  */
87
  {0x7f, -0x80, 3, 14},
88
  {0x7fff + 3, -0x8000 + 3, 6, 15},
89
  {0x7fffffff, -0x80000000, 8, 0},
90
 
91
};
92
 
93
/*  Set linkrelax here to avoid fixups in most sections.  */
94
int linkrelax = 1;
95
 
96
static int current_machine;
97
 
98
/* Fixups.  */
99
#define MAX_INSN_FIXUPS 5
100
 
101
struct mn10300_fixup
102
{
103
  expressionS exp;
104
  int opindex;
105
  bfd_reloc_code_real_type reloc;
106
};
107
struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
108
static int fc;
109
 
110
/* We must store the value of each register operand so that we can
111
   verify that certain registers do not match.  */
112
int mn10300_reg_operands[MN10300_MAX_OPERANDS];
113
 
114
const char *md_shortopts = "";
115
 
116
struct option md_longopts[] =
117
{
118
  {NULL, no_argument, NULL, 0}
119
};
120
 
121
size_t md_longopts_size = sizeof (md_longopts);
122
 
123
#define HAVE_AM33_2 (current_machine == AM33_2)
124
#define HAVE_AM33   (current_machine == AM33 || HAVE_AM33_2)
125
#define HAVE_AM30   (current_machine == AM30)
126
 
127
/* Opcode hash table.  */
128
static struct hash_control *mn10300_hash;
129
 
130
/* This table is sorted. Suitable for searching by a binary search.  */
131
static const struct reg_name data_registers[] =
132
{
133
  { "d0", 0 },
134
  { "d1", 1 },
135
  { "d2", 2 },
136
  { "d3", 3 },
137
};
138
 
139
static const struct reg_name address_registers[] =
140
{
141
  { "a0", 0 },
142
  { "a1", 1 },
143
  { "a2", 2 },
144
  { "a3", 3 },
145
};
146
 
147
static const struct reg_name r_registers[] =
148
{
149
  { "a0", 8 },
150
  { "a1", 9 },
151
  { "a2", 10 },
152
  { "a3", 11 },
153
  { "d0", 12 },
154
  { "d1", 13 },
155
  { "d2", 14 },
156
  { "d3", 15 },
157
  { "e0", 0 },
158
  { "e1", 1 },
159
  { "e10", 10 },
160
  { "e11", 11 },
161
  { "e12", 12 },
162
  { "e13", 13 },
163
  { "e14", 14 },
164
  { "e15", 15 },
165
  { "e2", 2 },
166
  { "e3", 3 },
167
  { "e4", 4 },
168
  { "e5", 5 },
169
  { "e6", 6 },
170
  { "e7", 7 },
171
  { "e8", 8 },
172
  { "e9", 9 },
173
  { "r0", 0 },
174
  { "r1", 1 },
175
  { "r10", 10 },
176
  { "r11", 11 },
177
  { "r12", 12 },
178
  { "r13", 13 },
179
  { "r14", 14 },
180
  { "r15", 15 },
181
  { "r2", 2 },
182
  { "r3", 3 },
183
  { "r4", 4 },
184
  { "r5", 5 },
185
  { "r6", 6 },
186
  { "r7", 7 },
187
  { "r8", 8 },
188
  { "r9", 9 },
189
};
190
 
191
static const struct reg_name xr_registers[] =
192
{
193
  { "mcrh", 2 },
194
  { "mcrl", 3 },
195
  { "mcvf", 4 },
196
  { "mdrq", 1 },
197
  { "sp", 0 },
198
  { "xr0", 0 },
199
  { "xr1", 1 },
200
  { "xr10", 10 },
201
  { "xr11", 11 },
202
  { "xr12", 12 },
203
  { "xr13", 13 },
204
  { "xr14", 14 },
205
  { "xr15", 15 },
206
  { "xr2", 2 },
207
  { "xr3", 3 },
208
  { "xr4", 4 },
209
  { "xr5", 5 },
210
  { "xr6", 6 },
211
  { "xr7", 7 },
212
  { "xr8", 8 },
213
  { "xr9", 9 },
214
};
215
 
216
static const struct reg_name float_registers[] =
217
{
218
  { "fs0", 0 },
219
  { "fs1", 1 },
220
  { "fs10", 10 },
221
  { "fs11", 11 },
222
  { "fs12", 12 },
223
  { "fs13", 13 },
224
  { "fs14", 14 },
225
  { "fs15", 15 },
226
  { "fs16", 16 },
227
  { "fs17", 17 },
228
  { "fs18", 18 },
229
  { "fs19", 19 },
230
  { "fs2",   2 },
231
  { "fs20", 20 },
232
  { "fs21", 21 },
233
  { "fs22", 22 },
234
  { "fs23", 23 },
235
  { "fs24", 24 },
236
  { "fs25", 25 },
237
  { "fs26", 26 },
238
  { "fs27", 27 },
239
  { "fs28", 28 },
240
  { "fs29", 29 },
241
  { "fs3",   3 },
242
  { "fs30", 30 },
243
  { "fs31", 31 },
244
  { "fs4",   4 },
245
  { "fs5",   5 },
246
  { "fs6",   6 },
247
  { "fs7",   7 },
248
  { "fs8",   8 },
249
  { "fs9",   9 },
250
};
251
 
252
static const struct reg_name double_registers[] =
253
{
254
  { "fd0",   0 },
255
  { "fd10", 10 },
256
  { "fd12", 12 },
257
  { "fd14", 14 },
258
  { "fd16", 16 },
259
  { "fd18", 18 },
260
  { "fd2",   2 },
261
  { "fd20", 20 },
262
  { "fd22", 22 },
263
  { "fd24", 24 },
264
  { "fd26", 26 },
265
  { "fd28", 28 },
266
  { "fd30", 30 },
267
  { "fd4",   4 },
268
  { "fd6",   6 },
269
  { "fd8",   8 },
270
};
271
 
272
/* We abuse the `value' field, that would be otherwise unused, to
273
   encode the architecture on which (access to) the register was
274
   introduced.  FIXME: we should probably warn when we encounter a
275
   register name when assembling for an architecture that doesn't
276
   support it, before parsing it as a symbol name.  */
277
static const struct reg_name other_registers[] =
278
{
279
  { "epsw", AM33 },
280
  { "mdr", 0 },
281
  { "pc", AM33 },
282
  { "psw", 0 },
283
  { "sp", 0 },
284
};
285
 
286
#define OTHER_REG_NAME_CNT      ARRAY_SIZE (other_registers)
287
 
288
/* Perform a binary search of the given register table REGS to see
289
   if NAME is a valid regiter name.  Returns the register number from
290
   the array on success, or -1 on failure.  */
291
 
292
static int
293
reg_name_search (const struct reg_name *regs,
294
                 int regcount,
295
                 const char *name)
296
{
297
  int low, high;
298
 
299
  low = 0;
300
  high = regcount - 1;
301
 
302
  do
303
    {
304
      int cmp, middle;
305
 
306
      middle = (low + high) / 2;
307
      cmp = strcasecmp (name, regs[middle].name);
308
      if (cmp < 0)
309
        high = middle - 1;
310
      else if (cmp > 0)
311
        low = middle + 1;
312
      else
313
        return regs[middle].value;
314
    }
315
  while (low <= high);
316
 
317
  return -1;
318
}
319
 
320
/* Looks at the current position in the input line to see if it is
321
   the name of a register in TABLE.  If it is, then the name is
322
   converted into an expression returned in EXPRESSIONP (with X_op
323
   set to O_register and X_add_number set to the register number), the
324
   input pointer is left pointing at the first non-blank character after
325
   the name and the function returns TRUE.  Otherwise the input pointer
326
   is left alone and the function returns FALSE.  */
327
 
328
static bfd_boolean
329
get_register_name (expressionS *           expressionP,
330
                   const struct reg_name * table,
331
                   size_t                  table_length)
332
{
333
  int reg_number;
334
  char *name;
335
  char *start;
336
  char c;
337
 
338
  /* Find the spelling of the operand.  */
339
  start = name = input_line_pointer;
340
 
341
  c = get_symbol_end ();
342
  reg_number = reg_name_search (table, table_length, name);
343
 
344
  /* Put back the delimiting char.  */
345
  *input_line_pointer = c;
346
 
347
  /* Look to see if it's in the register table.  */
348
  if (reg_number >= 0)
349
    {
350
      expressionP->X_op = O_register;
351
      expressionP->X_add_number = reg_number;
352
 
353
      /* Make the rest nice.  */
354
      expressionP->X_add_symbol = NULL;
355
      expressionP->X_op_symbol = NULL;
356
 
357
      return TRUE;
358
    }
359
 
360
  /* Reset the line as if we had not done anything.  */
361
  input_line_pointer = start;
362
  return FALSE;
363
}
364
 
365
static bfd_boolean
366
r_register_name (expressionS *expressionP)
367
{
368
  return get_register_name (expressionP, r_registers, ARRAY_SIZE (r_registers));
369
}
370
 
371
 
372
static bfd_boolean
373
xr_register_name (expressionS *expressionP)
374
{
375
  return get_register_name (expressionP, xr_registers, ARRAY_SIZE (xr_registers));
376
}
377
 
378
static bfd_boolean
379
data_register_name (expressionS *expressionP)
380
{
381
  return get_register_name (expressionP, data_registers, ARRAY_SIZE (data_registers));
382
}
383
 
384
static bfd_boolean
385
address_register_name (expressionS *expressionP)
386
{
387
  return get_register_name (expressionP, address_registers, ARRAY_SIZE (address_registers));
388
}
389
 
390
static bfd_boolean
391
float_register_name (expressionS *expressionP)
392
{
393
  return get_register_name (expressionP, float_registers, ARRAY_SIZE (float_registers));
394
}
395
 
396
static bfd_boolean
397
double_register_name (expressionS *expressionP)
398
{
399
  return get_register_name (expressionP, double_registers, ARRAY_SIZE (double_registers));
400
}
401
 
402
static bfd_boolean
403
other_register_name (expressionS *expressionP)
404
{
405
  int reg_number;
406
  char *name;
407
  char *start;
408
  char c;
409
 
410
  /* Find the spelling of the operand.  */
411
  start = name = input_line_pointer;
412
 
413
  c = get_symbol_end ();
414
  reg_number = reg_name_search (other_registers, ARRAY_SIZE (other_registers), name);
415
 
416
  /* Put back the delimiting char.  */
417
  *input_line_pointer = c;
418
 
419
  /* Look to see if it's in the register table.  */
420
  if (reg_number == 0
421
      || (reg_number == AM33 && HAVE_AM33))
422
    {
423
      expressionP->X_op = O_register;
424
      expressionP->X_add_number = 0;
425
 
426
      /* Make the rest nice.  */
427
      expressionP->X_add_symbol = NULL;
428
      expressionP->X_op_symbol = NULL;
429
 
430
      return TRUE;
431
    }
432
 
433
  /* Reset the line as if we had not done anything.  */
434
  input_line_pointer = start;
435
  return FALSE;
436
}
437
 
438
void
439
md_show_usage (FILE *stream)
440
{
441
  fprintf (stream, _("MN10300 assembler options:\n\
442
none yet\n"));
443
}
444
 
445
int
446
md_parse_option (int c ATTRIBUTE_UNUSED, char *arg ATTRIBUTE_UNUSED)
447
{
448
  return 0;
449
}
450
 
451
symbolS *
452
md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
453
{
454
  return 0;
455
}
456
 
457
char *
458
md_atof (int type, char *litp, int *sizep)
459
{
460
  return ieee_md_atof (type, litp, sizep, FALSE);
461
}
462
 
463
void
464
md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
465
                 asection *sec,
466
                 fragS *fragP)
467
{
468
  static unsigned long label_count = 0;
469
  char buf[40];
470
 
471
  subseg_change (sec, 0);
472
  if (fragP->fr_subtype == 0)
473
    {
474
      fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
475
               fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
476
      fragP->fr_var = 0;
477
      fragP->fr_fix += 2;
478
    }
479
  else if (fragP->fr_subtype == 1)
480
    {
481
      /* Reverse the condition of the first branch.  */
482
      int offset = fragP->fr_fix;
483
      int opcode = fragP->fr_literal[offset] & 0xff;
484
 
485
      switch (opcode)
486
        {
487
        case 0xc8:
488
          opcode = 0xc9;
489
          break;
490
        case 0xc9:
491
          opcode = 0xc8;
492
          break;
493
        case 0xc0:
494
          opcode = 0xc2;
495
          break;
496
        case 0xc2:
497
          opcode = 0xc0;
498
          break;
499
        case 0xc3:
500
          opcode = 0xc1;
501
          break;
502
        case 0xc1:
503
          opcode = 0xc3;
504
          break;
505
        case 0xc4:
506
          opcode = 0xc6;
507
          break;
508
        case 0xc6:
509
          opcode = 0xc4;
510
          break;
511
        case 0xc7:
512
          opcode = 0xc5;
513
          break;
514
        case 0xc5:
515
          opcode = 0xc7;
516
          break;
517
        default:
518
          abort ();
519
        }
520
      fragP->fr_literal[offset] = opcode;
521
 
522
      /* Create a fixup for the reversed conditional branch.  */
523
      sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
524
      fix_new (fragP, fragP->fr_fix + 1, 1,
525
               symbol_new (buf, sec, 0, fragP->fr_next),
526
               fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
527
 
528
      /* Now create the unconditional branch + fixup to the
529
         final target.  */
530
      fragP->fr_literal[offset + 2] = 0xcc;
531
      fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
532
               fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
533
      fragP->fr_var = 0;
534
      fragP->fr_fix += 5;
535
    }
536
  else if (fragP->fr_subtype == 2)
537
    {
538
      /* Reverse the condition of the first branch.  */
539
      int offset = fragP->fr_fix;
540
      int opcode = fragP->fr_literal[offset] & 0xff;
541
 
542
      switch (opcode)
543
        {
544
        case 0xc8:
545
          opcode = 0xc9;
546
          break;
547
        case 0xc9:
548
          opcode = 0xc8;
549
          break;
550
        case 0xc0:
551
          opcode = 0xc2;
552
          break;
553
        case 0xc2:
554
          opcode = 0xc0;
555
          break;
556
        case 0xc3:
557
          opcode = 0xc1;
558
          break;
559
        case 0xc1:
560
          opcode = 0xc3;
561
          break;
562
        case 0xc4:
563
          opcode = 0xc6;
564
          break;
565
        case 0xc6:
566
          opcode = 0xc4;
567
          break;
568
        case 0xc7:
569
          opcode = 0xc5;
570
          break;
571
        case 0xc5:
572
          opcode = 0xc7;
573
          break;
574
        default:
575
          abort ();
576
        }
577
      fragP->fr_literal[offset] = opcode;
578
 
579
      /* Create a fixup for the reversed conditional branch.  */
580
      sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
581
      fix_new (fragP, fragP->fr_fix + 1, 1,
582
               symbol_new (buf, sec, 0, fragP->fr_next),
583
               fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
584
 
585
      /* Now create the unconditional branch + fixup to the
586
         final target.  */
587
      fragP->fr_literal[offset + 2] = 0xdc;
588
      fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
589
               fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
590
      fragP->fr_var = 0;
591
      fragP->fr_fix += 7;
592
    }
593
  else if (fragP->fr_subtype == 3)
594
    {
595
      fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
596
               fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
597
      fragP->fr_var = 0;
598
      fragP->fr_fix += 3;
599
    }
600
  else if (fragP->fr_subtype == 4)
601
    {
602
      /* Reverse the condition of the first branch.  */
603
      int offset = fragP->fr_fix;
604
      int opcode = fragP->fr_literal[offset + 1] & 0xff;
605
 
606
      switch (opcode)
607
        {
608
        case 0xe8:
609
          opcode = 0xe9;
610
          break;
611
        case 0xe9:
612
          opcode = 0xe8;
613
          break;
614
        case 0xea:
615
          opcode = 0xeb;
616
          break;
617
        case 0xeb:
618
          opcode = 0xea;
619
          break;
620
        default:
621
          abort ();
622
        }
623
      fragP->fr_literal[offset + 1] = opcode;
624
 
625
      /* Create a fixup for the reversed conditional branch.  */
626
      sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
627
      fix_new (fragP, fragP->fr_fix + 2, 1,
628
               symbol_new (buf, sec, 0, fragP->fr_next),
629
               fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
630
 
631
      /* Now create the unconditional branch + fixup to the
632
         final target.  */
633
      fragP->fr_literal[offset + 3] = 0xcc;
634
      fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
635
               fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
636
      fragP->fr_var = 0;
637
      fragP->fr_fix += 6;
638
    }
639
  else if (fragP->fr_subtype == 5)
640
    {
641
      /* Reverse the condition of the first branch.  */
642
      int offset = fragP->fr_fix;
643
      int opcode = fragP->fr_literal[offset + 1] & 0xff;
644
 
645
      switch (opcode)
646
        {
647
        case 0xe8:
648
          opcode = 0xe9;
649
          break;
650
        case 0xea:
651
          opcode = 0xeb;
652
          break;
653
        case 0xeb:
654
          opcode = 0xea;
655
          break;
656
        default:
657
          abort ();
658
        }
659
      fragP->fr_literal[offset + 1] = opcode;
660
 
661
      /* Create a fixup for the reversed conditional branch.  */
662
      sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
663
      fix_new (fragP, fragP->fr_fix + 2, 1,
664
               symbol_new (buf, sec, 0, fragP->fr_next),
665
               fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
666
 
667
      /* Now create the unconditional branch + fixup to the
668
         final target.  */
669
      fragP->fr_literal[offset + 3] = 0xdc;
670
      fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
671
               fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
672
      fragP->fr_var = 0;
673
      fragP->fr_fix += 8;
674
    }
675
  else if (fragP->fr_subtype == 6)
676
    {
677
      int offset = fragP->fr_fix;
678
 
679
      fragP->fr_literal[offset] = 0xcd;
680
      fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
681
               fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
682
      fragP->fr_var = 0;
683
      fragP->fr_fix += 5;
684
    }
685
  else if (fragP->fr_subtype == 7)
686
    {
687
      int offset = fragP->fr_fix;
688
 
689
      fragP->fr_literal[offset] = 0xdd;
690
      fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
691
      fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
692
 
693
      fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
694
               fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
695
      fragP->fr_var = 0;
696
      fragP->fr_fix += 7;
697
    }
698
  else if (fragP->fr_subtype == 8)
699
    {
700
      int offset = fragP->fr_fix;
701
 
702
      fragP->fr_literal[offset] = 0xfa;
703
      fragP->fr_literal[offset + 1] = 0xff;
704
      fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
705
               fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
706
      fragP->fr_var = 0;
707
      fragP->fr_fix += 4;
708
    }
709
  else if (fragP->fr_subtype == 9)
710
    {
711
      int offset = fragP->fr_fix;
712
 
713
      fragP->fr_literal[offset] = 0xfc;
714
      fragP->fr_literal[offset + 1] = 0xff;
715
 
716
      fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
717
               fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
718
      fragP->fr_var = 0;
719
      fragP->fr_fix += 6;
720
    }
721
  else if (fragP->fr_subtype == 10)
722
    {
723
      fragP->fr_literal[fragP->fr_fix] = 0xca;
724
      fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
725
               fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
726
      fragP->fr_var = 0;
727
      fragP->fr_fix += 2;
728
    }
729
  else if (fragP->fr_subtype == 11)
730
    {
731
      int offset = fragP->fr_fix;
732
 
733
      fragP->fr_literal[offset] = 0xcc;
734
 
735
      fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
736
               fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
737
      fragP->fr_var = 0;
738
      fragP->fr_fix += 3;
739
    }
740
  else if (fragP->fr_subtype == 12)
741
    {
742
      int offset = fragP->fr_fix;
743
 
744
      fragP->fr_literal[offset] = 0xdc;
745
 
746
      fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
747
               fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
748
      fragP->fr_var = 0;
749
      fragP->fr_fix += 5;
750
    }
751
  else if (fragP->fr_subtype == 13)
752
    {
753
      fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
754
               fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
755
      fragP->fr_var = 0;
756
      fragP->fr_fix += 3;
757
    }
758
  else if (fragP->fr_subtype == 14)
759
    {
760
      /* Reverse the condition of the first branch.  */
761
      int offset = fragP->fr_fix;
762
      int opcode = fragP->fr_literal[offset + 1] & 0xff;
763
 
764
      switch (opcode)
765
        {
766
        case 0xd0:
767
          opcode = 0xd1;
768
          break;
769
        case 0xd1:
770
          opcode = 0xd0;
771
          break;
772
        case 0xd2:
773
          opcode = 0xdc;
774
          break;
775
        case 0xd3:
776
          opcode = 0xdb;
777
          break;
778
        case 0xd4:
779
          opcode = 0xda;
780
          break;
781
        case 0xd5:
782
          opcode = 0xd9;
783
          break;
784
        case 0xd6:
785
          opcode = 0xd8;
786
          break;
787
        case 0xd7:
788
          opcode = 0xdd;
789
          break;
790
        case 0xd8:
791
          opcode = 0xd6;
792
          break;
793
        case 0xd9:
794
          opcode = 0xd5;
795
          break;
796
        case 0xda:
797
          opcode = 0xd4;
798
          break;
799
        case 0xdb:
800
          opcode = 0xd3;
801
          break;
802
        case 0xdc:
803
          opcode = 0xd2;
804
          break;
805
        case 0xdd:
806
          opcode = 0xd7;
807
          break;
808
        default:
809
          abort ();
810
        }
811
      fragP->fr_literal[offset + 1] = opcode;
812
 
813
      /* Create a fixup for the reversed conditional branch.  */
814
      sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
815
      fix_new (fragP, fragP->fr_fix + 2, 1,
816
               symbol_new (buf, sec, 0, fragP->fr_next),
817
               fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
818
 
819
      /* Now create the unconditional branch + fixup to the
820
         final target.  */
821
      fragP->fr_literal[offset + 3] = 0xcc;
822
      fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
823
               fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
824
      fragP->fr_var = 0;
825
      fragP->fr_fix += 6;
826
    }
827
  else if (fragP->fr_subtype == 15)
828
    {
829
      /* Reverse the condition of the first branch.  */
830
      int offset = fragP->fr_fix;
831
      int opcode = fragP->fr_literal[offset + 1] & 0xff;
832
 
833
      switch (opcode)
834
        {
835
        case 0xd0:
836
          opcode = 0xd1;
837
          break;
838
        case 0xd1:
839
          opcode = 0xd0;
840
          break;
841
        case 0xd2:
842
          opcode = 0xdc;
843
          break;
844
        case 0xd3:
845
          opcode = 0xdb;
846
          break;
847
        case 0xd4:
848
          opcode = 0xda;
849
          break;
850
        case 0xd5:
851
          opcode = 0xd9;
852
          break;
853
        case 0xd6:
854
          opcode = 0xd8;
855
          break;
856
        case 0xd7:
857
          opcode = 0xdd;
858
          break;
859
        case 0xd8:
860
          opcode = 0xd6;
861
          break;
862
        case 0xd9:
863
          opcode = 0xd5;
864
          break;
865
        case 0xda:
866
          opcode = 0xd4;
867
          break;
868
        case 0xdb:
869
          opcode = 0xd3;
870
          break;
871
        case 0xdc:
872
          opcode = 0xd2;
873
          break;
874
        case 0xdd:
875
          opcode = 0xd7;
876
          break;
877
        default:
878
          abort ();
879
        }
880
      fragP->fr_literal[offset + 1] = opcode;
881
 
882
      /* Create a fixup for the reversed conditional branch.  */
883
      sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
884
      fix_new (fragP, fragP->fr_fix + 2, 1,
885
               symbol_new (buf, sec, 0, fragP->fr_next),
886
               fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
887
 
888
      /* Now create the unconditional branch + fixup to the
889
         final target.  */
890
      fragP->fr_literal[offset + 3] = 0xdc;
891
      fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
892
               fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
893
      fragP->fr_var = 0;
894
      fragP->fr_fix += 8;
895
    }
896
  else
897
    abort ();
898
}
899
 
900
valueT
901
md_section_align (asection *seg, valueT addr)
902
{
903
  int align = bfd_get_section_alignment (stdoutput, seg);
904
 
905
  return ((addr + (1 << align) - 1) & (-1 << align));
906
}
907
 
908
void
909
md_begin (void)
910
{
911
  char *prev_name = "";
912
  const struct mn10300_opcode *op;
913
 
914
  mn10300_hash = hash_new ();
915
 
916
  /* Insert unique names into hash table.  The MN10300 instruction set
917
     has many identical opcode names that have different opcodes based
918
     on the operands.  This hash table then provides a quick index to
919
     the first opcode with a particular name in the opcode table.  */
920
 
921
  op = mn10300_opcodes;
922
  while (op->name)
923
    {
924
      if (strcmp (prev_name, op->name))
925
        {
926
          prev_name = (char *) op->name;
927
          hash_insert (mn10300_hash, op->name, (char *) op);
928
        }
929
      op++;
930
    }
931
 
932
  /* Set the default machine type.  */
933
#ifdef TE_LINUX
934
  if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, AM33_2))
935
    as_warn (_("could not set architecture and machine"));
936
 
937
  current_machine = AM33_2;
938
#else  
939
  if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
940
    as_warn (_("could not set architecture and machine"));
941
 
942
  current_machine = MN103;
943
#endif
944
}
945
 
946
static symbolS *GOT_symbol;
947
 
948
static inline int
949
mn10300_PIC_related_p (symbolS *sym)
950
{
951
  expressionS *exp;
952
 
953
  if (! sym)
954
    return 0;
955
 
956
  if (sym == GOT_symbol)
957
    return 1;
958
 
959
  exp = symbol_get_value_expression (sym);
960
 
961
  return (exp->X_op == O_PIC_reloc
962
          || mn10300_PIC_related_p (exp->X_add_symbol)
963
          || mn10300_PIC_related_p (exp->X_op_symbol));
964
}
965
 
966
static inline int
967
mn10300_check_fixup (struct mn10300_fixup *fixup)
968
{
969
  expressionS *exp = &fixup->exp;
970
 
971
 repeat:
972
  switch (exp->X_op)
973
    {
974
    case O_add:
975
    case O_subtract: /* If we're sufficiently unlucky that the label
976
                        and the expression that references it happen
977
                        to end up in different frags, the subtract
978
                        won't be simplified within expression().  */
979
      /* The PIC-related operand must be the first operand of a sum.  */
980
      if (exp != &fixup->exp || mn10300_PIC_related_p (exp->X_op_symbol))
981
        return 1;
982
 
983
      if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
984
        fixup->reloc = BFD_RELOC_32_GOT_PCREL;
985
 
986
      exp = symbol_get_value_expression (exp->X_add_symbol);
987
      goto repeat;
988
 
989
    case O_symbol:
990
      if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
991
        fixup->reloc = BFD_RELOC_32_GOT_PCREL;
992
      break;
993
 
994
    case O_PIC_reloc:
995
      fixup->reloc = exp->X_md;
996
      exp->X_op = O_symbol;
997
      if (fixup->reloc == BFD_RELOC_32_PLT_PCREL
998
          && fixup->opindex >= 0
999
          && (mn10300_operands[fixup->opindex].flags
1000
              & MN10300_OPERAND_RELAX))
1001
        return 1;
1002
      break;
1003
 
1004
    default:
1005
      return (mn10300_PIC_related_p (exp->X_add_symbol)
1006
              || mn10300_PIC_related_p (exp->X_op_symbol));
1007
    }
1008
 
1009
  return 0;
1010
}
1011
 
1012
void
1013
mn10300_cons_fix_new (fragS *frag, int off, int size, expressionS *exp)
1014
{
1015
  struct mn10300_fixup fixup;
1016
 
1017
  fixup.opindex = -1;
1018
  fixup.exp = *exp;
1019
  fixup.reloc = BFD_RELOC_UNUSED;
1020
 
1021
  mn10300_check_fixup (&fixup);
1022
 
1023
  if (fixup.reloc == BFD_RELOC_MN10300_GOT32)
1024
    switch (size)
1025
      {
1026
      case 2:
1027
        fixup.reloc = BFD_RELOC_MN10300_GOT16;
1028
        break;
1029
 
1030
      case 3:
1031
        fixup.reloc = BFD_RELOC_MN10300_GOT24;
1032
        break;
1033
 
1034
      case 4:
1035
        break;
1036
 
1037
      default:
1038
        goto error;
1039
      }
1040
  else if (fixup.reloc == BFD_RELOC_UNUSED)
1041
    switch (size)
1042
      {
1043
      case 1:
1044
        fixup.reloc = BFD_RELOC_8;
1045
        break;
1046
 
1047
      case 2:
1048
        fixup.reloc = BFD_RELOC_16;
1049
        break;
1050
 
1051
      case 3:
1052
        fixup.reloc = BFD_RELOC_24;
1053
        break;
1054
 
1055
      case 4:
1056
        fixup.reloc = BFD_RELOC_32;
1057
        break;
1058
 
1059
      default:
1060
        goto error;
1061
      }
1062
  else if (size != 4)
1063
    {
1064
    error:
1065
      as_bad (_("unsupported BFD relocation size %u"), size);
1066
      fixup.reloc = BFD_RELOC_UNUSED;
1067
    }
1068
 
1069
  fix_new_exp (frag, off, size, &fixup.exp, 0, fixup.reloc);
1070
}
1071
 
1072
static bfd_boolean
1073
check_operand (const struct mn10300_operand *operand,
1074
               offsetT val)
1075
{
1076
  /* No need to check 32bit operands for a bit.  Note that
1077
     MN10300_OPERAND_SPLIT is an implicit 32bit operand.  */
1078
  if (operand->bits != 32
1079
      && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1080
    {
1081
      long min, max;
1082
      offsetT test;
1083
      int bits;
1084
 
1085
      bits = operand->bits;
1086
      if (operand->flags & MN10300_OPERAND_24BIT)
1087
        bits = 24;
1088
 
1089
      if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1090
        {
1091
          max = (1 << (bits - 1)) - 1;
1092
          min = - (1 << (bits - 1));
1093
        }
1094
      else
1095
        {
1096
          max = (1 << bits) - 1;
1097
          min = 0;
1098
        }
1099
 
1100
      test = val;
1101
 
1102
      if (test < (offsetT) min || test > (offsetT) max)
1103
        return FALSE;
1104
    }
1105
  return TRUE;
1106
}
1107
 
1108
/* Insert an operand value into an instruction.  */
1109
 
1110
static void
1111
mn10300_insert_operand (unsigned long *insnp,
1112
                        unsigned long *extensionp,
1113
                        const struct mn10300_operand *operand,
1114
                        offsetT val,
1115
                        char *file,
1116
                        unsigned int line,
1117
                        unsigned int shift)
1118
{
1119
  /* No need to check 32bit operands for a bit.  Note that
1120
     MN10300_OPERAND_SPLIT is an implicit 32bit operand.  */
1121
  if (operand->bits != 32
1122
      && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1123
    {
1124
      long min, max;
1125
      offsetT test;
1126
      int bits;
1127
 
1128
      bits = operand->bits;
1129
      if (operand->flags & MN10300_OPERAND_24BIT)
1130
        bits = 24;
1131
 
1132
      if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1133
        {
1134
          max = (1 << (bits - 1)) - 1;
1135
          min = - (1 << (bits - 1));
1136
        }
1137
      else
1138
        {
1139
          max = (1 << bits) - 1;
1140
          min = 0;
1141
        }
1142
 
1143
      test = val;
1144
 
1145
      if (test < (offsetT) min || test > (offsetT) max)
1146
        as_warn_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
1147
    }
1148
 
1149
  if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1150
    {
1151
      *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
1152
      *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
1153
                      << operand->shift);
1154
    }
1155
  else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1156
    {
1157
      *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
1158
      *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
1159
                      << operand->shift);
1160
    }
1161
  else if ((operand->flags & (MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG)))
1162
    {
1163
      /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an
1164
         explanation of these variables.  Note that FMT-implied shifts
1165
        are not taken into account for FP registers.  */
1166
      unsigned long mask_low, mask_high;
1167
      int shl_low, shr_high, shl_high;
1168
 
1169
      switch (operand->bits)
1170
        {
1171
        case 5:
1172
          /* Handle regular FP registers.  */
1173
          if (operand->shift >= 0)
1174
            {
1175
              /* This is an `m' register.  */
1176
              shl_low = operand->shift;
1177
              shl_high = 8 + (8 & shl_low) + (shl_low & 4) / 4;
1178
            }
1179
          else
1180
            {
1181
              /* This is an `n' register.  */
1182
              shl_low = -operand->shift;
1183
              shl_high = shl_low / 4;
1184
            }
1185
 
1186
          mask_low = 0x0f;
1187
          mask_high = 0x10;
1188
          shr_high = 4;
1189
          break;
1190
 
1191
        case 3:
1192
          /* Handle accumulators.  */
1193
          shl_low = -operand->shift;
1194
          shl_high = 0;
1195
          mask_low = 0x03;
1196
          mask_high = 0x04;
1197
          shr_high = 2;
1198
          break;
1199
 
1200
        default:
1201
          abort ();
1202
        }
1203
      *insnp |= ((((val & mask_high) >> shr_high) << shl_high)
1204
                 | ((val & mask_low) << shl_low));
1205
    }
1206
  else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
1207
    {
1208
      *insnp |= (((long) val & ((1 << operand->bits) - 1))
1209
                 << (operand->shift + shift));
1210
 
1211
      if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1212
        *insnp |= (((long) val & ((1 << operand->bits) - 1))
1213
                   << (operand->shift + shift + operand->bits));
1214
    }
1215
  else
1216
    {
1217
      *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1218
                      << (operand->shift + shift));
1219
 
1220
      if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1221
        *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1222
                        << (operand->shift + shift + operand->bits));
1223
    }
1224
}
1225
 
1226
void
1227
md_assemble (char *str)
1228
{
1229
  char *s;
1230
  struct mn10300_opcode *opcode;
1231
  struct mn10300_opcode *next_opcode;
1232
  const unsigned char *opindex_ptr;
1233
  int next_opindex, relaxable;
1234
  unsigned long insn, extension, size = 0;
1235
  char *f;
1236
  int i;
1237
  int match;
1238
 
1239
  /* Get the opcode.  */
1240
  for (s = str; *s != '\0' && !ISSPACE (*s); s++)
1241
    ;
1242
  if (*s != '\0')
1243
    *s++ = '\0';
1244
 
1245
  /* Find the first opcode with the proper name.  */
1246
  opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str);
1247
  if (opcode == NULL)
1248
    {
1249
      as_bad (_("Unrecognized opcode: `%s'"), str);
1250
      return;
1251
    }
1252
 
1253
  str = s;
1254
  while (ISSPACE (*str))
1255
    ++str;
1256
 
1257
  input_line_pointer = str;
1258
 
1259
  for (;;)
1260
    {
1261
      const char *errmsg;
1262
      int op_idx;
1263
      char *hold;
1264
      int extra_shift = 0;
1265
 
1266
      errmsg = _("Invalid opcode/operands");
1267
 
1268
      /* Reset the array of register operands.  */
1269
      memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
1270
 
1271
      relaxable = 0;
1272
      fc = 0;
1273
      match = 0;
1274
      next_opindex = 0;
1275
      insn = opcode->opcode;
1276
      extension = 0;
1277
 
1278
      /* If the instruction is not available on the current machine
1279
         then it can not possibly match.  */
1280
      if (opcode->machine
1281
          && !(opcode->machine == AM33_2 && HAVE_AM33_2)
1282
          && !(opcode->machine == AM33 && HAVE_AM33)
1283
          && !(opcode->machine == AM30 && HAVE_AM30))
1284
        goto error;
1285
 
1286
      for (op_idx = 1, opindex_ptr = opcode->operands;
1287
           *opindex_ptr != 0;
1288
           opindex_ptr++, op_idx++)
1289
        {
1290
          const struct mn10300_operand *operand;
1291
          expressionS ex;
1292
 
1293
          if (next_opindex == 0)
1294
            {
1295
              operand = &mn10300_operands[*opindex_ptr];
1296
            }
1297
          else
1298
            {
1299
              operand = &mn10300_operands[next_opindex];
1300
              next_opindex = 0;
1301
            }
1302
 
1303
          while (*str == ' ' || *str == ',')
1304
            ++str;
1305
 
1306
          if (operand->flags & MN10300_OPERAND_RELAX)
1307
            relaxable = 1;
1308
 
1309
          /* Gather the operand.  */
1310
          hold = input_line_pointer;
1311
          input_line_pointer = str;
1312
 
1313
          if (operand->flags & MN10300_OPERAND_PAREN)
1314
            {
1315
              if (*input_line_pointer != ')' && *input_line_pointer != '(')
1316
                {
1317
                  input_line_pointer = hold;
1318
                  str = hold;
1319
                  goto error;
1320
                }
1321
              input_line_pointer++;
1322
              goto keep_going;
1323
            }
1324
          /* See if we can match the operands.  */
1325
          else if (operand->flags & MN10300_OPERAND_DREG)
1326
            {
1327
              if (!data_register_name (&ex))
1328
                {
1329
                  input_line_pointer = hold;
1330
                  str = hold;
1331
                  goto error;
1332
                }
1333
            }
1334
          else if (operand->flags & MN10300_OPERAND_AREG)
1335
            {
1336
              if (!address_register_name (&ex))
1337
                {
1338
                  input_line_pointer = hold;
1339
                  str = hold;
1340
                  goto error;
1341
                }
1342
            }
1343
          else if (operand->flags & MN10300_OPERAND_SP)
1344
            {
1345
              char *start = input_line_pointer;
1346
              char c = get_symbol_end ();
1347
 
1348
              if (strcasecmp (start, "sp") != 0)
1349
                {
1350
                  *input_line_pointer = c;
1351
                  input_line_pointer = hold;
1352
                  str = hold;
1353
                  goto error;
1354
                }
1355
              *input_line_pointer = c;
1356
              goto keep_going;
1357
            }
1358
          else if (operand->flags & MN10300_OPERAND_RREG)
1359
            {
1360
              if (!r_register_name (&ex))
1361
                {
1362
                  input_line_pointer = hold;
1363
                  str = hold;
1364
                  goto error;
1365
                }
1366
            }
1367
          else if (operand->flags & MN10300_OPERAND_XRREG)
1368
            {
1369
              if (!xr_register_name (&ex))
1370
                {
1371
                  input_line_pointer = hold;
1372
                  str = hold;
1373
                  goto error;
1374
                }
1375
            }
1376
          else if (operand->flags & MN10300_OPERAND_FSREG)
1377
            {
1378
              if (!float_register_name (&ex))
1379
                {
1380
                  input_line_pointer = hold;
1381
                  str = hold;
1382
                  goto error;
1383
                }
1384
            }
1385
          else if (operand->flags & MN10300_OPERAND_FDREG)
1386
            {
1387
              if (!double_register_name (&ex))
1388
                {
1389
                  input_line_pointer = hold;
1390
                  str = hold;
1391
                  goto error;
1392
                }
1393
            }
1394
          else if (operand->flags & MN10300_OPERAND_FPCR)
1395
            {
1396
              char *start = input_line_pointer;
1397
              char c = get_symbol_end ();
1398
 
1399
              if (strcasecmp (start, "fpcr") != 0)
1400
                {
1401
                  *input_line_pointer = c;
1402
                  input_line_pointer = hold;
1403
                  str = hold;
1404
                  goto error;
1405
                }
1406
              *input_line_pointer = c;
1407
              goto keep_going;
1408
            }
1409
          else if (operand->flags & MN10300_OPERAND_USP)
1410
            {
1411
              char *start = input_line_pointer;
1412
              char c = get_symbol_end ();
1413
 
1414
              if (strcasecmp (start, "usp") != 0)
1415
                {
1416
                  *input_line_pointer = c;
1417
                  input_line_pointer = hold;
1418
                  str = hold;
1419
                  goto error;
1420
                }
1421
              *input_line_pointer = c;
1422
              goto keep_going;
1423
            }
1424
          else if (operand->flags & MN10300_OPERAND_SSP)
1425
            {
1426
              char *start = input_line_pointer;
1427
              char c = get_symbol_end ();
1428
 
1429
              if (strcasecmp (start, "ssp") != 0)
1430
                {
1431
                  *input_line_pointer = c;
1432
                  input_line_pointer = hold;
1433
                  str = hold;
1434
                  goto error;
1435
                }
1436
              *input_line_pointer = c;
1437
              goto keep_going;
1438
            }
1439
          else if (operand->flags & MN10300_OPERAND_MSP)
1440
            {
1441
              char *start = input_line_pointer;
1442
              char c = get_symbol_end ();
1443
 
1444
              if (strcasecmp (start, "msp") != 0)
1445
                {
1446
                  *input_line_pointer = c;
1447
                  input_line_pointer = hold;
1448
                  str = hold;
1449
                  goto error;
1450
                }
1451
              *input_line_pointer = c;
1452
              goto keep_going;
1453
            }
1454
          else if (operand->flags & MN10300_OPERAND_PC)
1455
            {
1456
              char *start = input_line_pointer;
1457
              char c = get_symbol_end ();
1458
 
1459
              if (strcasecmp (start, "pc") != 0)
1460
                {
1461
                  *input_line_pointer = c;
1462
                  input_line_pointer = hold;
1463
                  str = hold;
1464
                  goto error;
1465
                }
1466
              *input_line_pointer = c;
1467
              goto keep_going;
1468
            }
1469
          else if (operand->flags & MN10300_OPERAND_EPSW)
1470
            {
1471
              char *start = input_line_pointer;
1472
              char c = get_symbol_end ();
1473
 
1474
              if (strcasecmp (start, "epsw") != 0)
1475
                {
1476
                  *input_line_pointer = c;
1477
                  input_line_pointer = hold;
1478
                  str = hold;
1479
                  goto error;
1480
                }
1481
              *input_line_pointer = c;
1482
              goto keep_going;
1483
            }
1484
          else if (operand->flags & MN10300_OPERAND_PLUS)
1485
            {
1486
              if (*input_line_pointer != '+')
1487
                {
1488
                  input_line_pointer = hold;
1489
                  str = hold;
1490
                  goto error;
1491
                }
1492
              input_line_pointer++;
1493
              goto keep_going;
1494
            }
1495
          else if (operand->flags & MN10300_OPERAND_PSW)
1496
            {
1497
              char *start = input_line_pointer;
1498
              char c = get_symbol_end ();
1499
 
1500
              if (strcasecmp (start, "psw") != 0)
1501
                {
1502
                  *input_line_pointer = c;
1503
                  input_line_pointer = hold;
1504
                  str = hold;
1505
                  goto error;
1506
                }
1507
              *input_line_pointer = c;
1508
              goto keep_going;
1509
            }
1510
          else if (operand->flags & MN10300_OPERAND_MDR)
1511
            {
1512
              char *start = input_line_pointer;
1513
              char c = get_symbol_end ();
1514
 
1515
              if (strcasecmp (start, "mdr") != 0)
1516
                {
1517
                  *input_line_pointer = c;
1518
                  input_line_pointer = hold;
1519
                  str = hold;
1520
                  goto error;
1521
                }
1522
              *input_line_pointer = c;
1523
              goto keep_going;
1524
            }
1525
          else if (operand->flags & MN10300_OPERAND_REG_LIST)
1526
            {
1527
              unsigned int value = 0;
1528
              if (*input_line_pointer != '[')
1529
                {
1530
                  input_line_pointer = hold;
1531
                  str = hold;
1532
                  goto error;
1533
                }
1534
 
1535
              /* Eat the '['.  */
1536
              input_line_pointer++;
1537
 
1538
              /* We used to reject a null register list here; however,
1539
                 we accept it now so the compiler can emit "call"
1540
                 instructions for all calls to named functions.
1541
 
1542
                 The linker can then fill in the appropriate bits for the
1543
                 register list and stack size or change the instruction
1544
                 into a "calls" if using "call" is not profitable.  */
1545
              while (*input_line_pointer != ']')
1546
                {
1547
                  char *start;
1548
                  char c;
1549
 
1550
                  if (*input_line_pointer == ',')
1551
                    input_line_pointer++;
1552
 
1553
                  start = input_line_pointer;
1554
                  c = get_symbol_end ();
1555
 
1556
                  if (strcasecmp (start, "d2") == 0)
1557
                    {
1558
                      value |= 0x80;
1559
                      *input_line_pointer = c;
1560
                    }
1561
                  else if (strcasecmp (start, "d3") == 0)
1562
                    {
1563
                      value |= 0x40;
1564
                      *input_line_pointer = c;
1565
                    }
1566
                  else if (strcasecmp (start, "a2") == 0)
1567
                    {
1568
                      value |= 0x20;
1569
                      *input_line_pointer = c;
1570
                    }
1571
                  else if (strcasecmp (start, "a3") == 0)
1572
                    {
1573
                      value |= 0x10;
1574
                      *input_line_pointer = c;
1575
                    }
1576
                  else if (strcasecmp (start, "other") == 0)
1577
                    {
1578
                      value |= 0x08;
1579
                      *input_line_pointer = c;
1580
                    }
1581
                  else if (HAVE_AM33
1582
                           && strcasecmp (start, "exreg0") == 0)
1583
                    {
1584
                      value |= 0x04;
1585
                      *input_line_pointer = c;
1586
                    }
1587
                  else if (HAVE_AM33
1588
                           && strcasecmp (start, "exreg1") == 0)
1589
                    {
1590
                      value |= 0x02;
1591
                      *input_line_pointer = c;
1592
                    }
1593
                  else if (HAVE_AM33
1594
                           && strcasecmp (start, "exother") == 0)
1595
                    {
1596
                      value |= 0x01;
1597
                      *input_line_pointer = c;
1598
                    }
1599
                  else if (HAVE_AM33
1600
                           && strcasecmp (start, "all") == 0)
1601
                    {
1602
                      value |= 0xff;
1603
                      *input_line_pointer = c;
1604
                    }
1605
                  else
1606
                    {
1607
                      input_line_pointer = hold;
1608
                      str = hold;
1609
                      goto error;
1610
                    }
1611
                }
1612
              input_line_pointer++;
1613
              mn10300_insert_operand (& insn, & extension, operand,
1614
                                      value, NULL, 0, 0);
1615
              goto keep_going;
1616
 
1617
            }
1618
          else if (data_register_name (&ex))
1619
            {
1620
              input_line_pointer = hold;
1621
              str = hold;
1622
              goto error;
1623
            }
1624
          else if (address_register_name (&ex))
1625
            {
1626
              input_line_pointer = hold;
1627
              str = hold;
1628
              goto error;
1629
            }
1630
          else if (other_register_name (&ex))
1631
            {
1632
              input_line_pointer = hold;
1633
              str = hold;
1634
              goto error;
1635
            }
1636
          else if (HAVE_AM33 && r_register_name (&ex))
1637
            {
1638
              input_line_pointer = hold;
1639
              str = hold;
1640
              goto error;
1641
            }
1642
          else if (HAVE_AM33 && xr_register_name (&ex))
1643
            {
1644
              input_line_pointer = hold;
1645
              str = hold;
1646
              goto error;
1647
            }
1648
          else if (HAVE_AM33_2 && float_register_name (&ex))
1649
            {
1650
              input_line_pointer = hold;
1651
              str = hold;
1652
              goto error;
1653
            }
1654
          else if (HAVE_AM33_2 && double_register_name (&ex))
1655
            {
1656
              input_line_pointer = hold;
1657
              str = hold;
1658
              goto error;
1659
            }
1660
          else if (*str == ')' || *str == '(')
1661
            {
1662
              input_line_pointer = hold;
1663
              str = hold;
1664
              goto error;
1665
            }
1666
          else
1667
            {
1668
              expression (&ex);
1669
            }
1670
 
1671
          switch (ex.X_op)
1672
            {
1673
            case O_illegal:
1674
              errmsg = _("illegal operand");
1675
              goto error;
1676
            case O_absent:
1677
              errmsg = _("missing operand");
1678
              goto error;
1679
            case O_register:
1680
              {
1681
                int mask;
1682
 
1683
                mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
1684
                if (HAVE_AM33)
1685
                  mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
1686
                if (HAVE_AM33_2)
1687
                  mask |= MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG;
1688
                if ((operand->flags & mask) == 0)
1689
                  {
1690
                    input_line_pointer = hold;
1691
                    str = hold;
1692
                    goto error;
1693
                  }
1694
 
1695
                if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1696
                  extra_shift = 8;
1697
                else if (opcode->format == FMT_D2
1698
                         || opcode->format == FMT_D4
1699
                         || opcode->format == FMT_S2
1700
                         || opcode->format == FMT_S4
1701
                         || opcode->format == FMT_S6
1702
                         || opcode->format == FMT_D5)
1703
                  extra_shift = 16;
1704
                else if (opcode->format == FMT_D7)
1705
                  extra_shift = 8;
1706
                else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1707
                  extra_shift = 8;
1708
                else
1709
                  extra_shift = 0;
1710
 
1711
                mn10300_insert_operand (& insn, & extension, operand,
1712
                                        ex.X_add_number, NULL,
1713
                                        0, extra_shift);
1714
 
1715
                /* And note the register number in the register array.  */
1716
                mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1717
                break;
1718
              }
1719
 
1720
            case O_constant:
1721
              /* If this operand can be promoted, and it doesn't
1722
                 fit into the allocated bitfield for this insn,
1723
                 then promote it (ie this opcode does not match).  */
1724
              if (operand->flags
1725
                  & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
1726
                  && !check_operand (operand, ex.X_add_number))
1727
                {
1728
                  input_line_pointer = hold;
1729
                  str = hold;
1730
                  goto error;
1731
                }
1732
 
1733
              mn10300_insert_operand (& insn, & extension, operand,
1734
                                      ex.X_add_number, NULL, 0, 0);
1735
              break;
1736
 
1737
            default:
1738
              /* If this operand can be promoted, then this opcode didn't
1739
                 match since we can't know if it needed promotion!  */
1740
              if (operand->flags & MN10300_OPERAND_PROMOTE)
1741
                {
1742
                  input_line_pointer = hold;
1743
                  str = hold;
1744
                  goto error;
1745
                }
1746
 
1747
              /* We need to generate a fixup for this expression.  */
1748
              if (fc >= MAX_INSN_FIXUPS)
1749
                as_fatal (_("too many fixups"));
1750
              fixups[fc].exp = ex;
1751
              fixups[fc].opindex = *opindex_ptr;
1752
              fixups[fc].reloc = BFD_RELOC_UNUSED;
1753
              if (mn10300_check_fixup (& fixups[fc]))
1754
                goto error;
1755
              ++fc;
1756
              break;
1757
            }
1758
 
1759
keep_going:
1760
          str = input_line_pointer;
1761
          input_line_pointer = hold;
1762
 
1763
          while (*str == ' ' || *str == ',')
1764
            ++str;
1765
        }
1766
 
1767
      /* Make sure we used all the operands!  */
1768
      if (*str != ',')
1769
        match = 1;
1770
 
1771
      /* If this instruction has registers that must not match, verify
1772
         that they do indeed not match.  */
1773
      if (opcode->no_match_operands)
1774
        {
1775
          int i;
1776
 
1777
          /* Look at each operand to see if it's marked.  */
1778
          for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1779
            {
1780
              if ((1 << i) & opcode->no_match_operands)
1781
                {
1782
                  int j;
1783
 
1784
                  /* operand I is marked.  Check that it does not match any
1785
                     operands > I which are marked.  */
1786
                  for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1787
                    {
1788
                      if (((1 << j) & opcode->no_match_operands)
1789
                          && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1790
                        {
1791
                          errmsg = _("Invalid register specification.");
1792
                          match = 0;
1793
                          goto error;
1794
                        }
1795
                    }
1796
                }
1797
            }
1798
        }
1799
 
1800
    error:
1801
      if (match == 0)
1802
        {
1803
          next_opcode = opcode + 1;
1804
          if (!strcmp (next_opcode->name, opcode->name))
1805
            {
1806
              opcode = next_opcode;
1807
              continue;
1808
            }
1809
 
1810
          as_bad ("%s", errmsg);
1811
          return;
1812
        }
1813
      break;
1814
    }
1815
 
1816
  while (ISSPACE (*str))
1817
    ++str;
1818
 
1819
  if (*str != '\0')
1820
    as_bad (_("junk at end of line: `%s'"), str);
1821
 
1822
  input_line_pointer = str;
1823
 
1824
  /* Determine the size of the instruction.  */
1825
  if (opcode->format == FMT_S0)
1826
    size = 1;
1827
 
1828
  if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1829
    size = 2;
1830
 
1831
  if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1832
    size = 3;
1833
 
1834
  if (opcode->format == FMT_D6)
1835
    size = 3;
1836
 
1837
  if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1838
    size = 4;
1839
 
1840
  if (opcode->format == FMT_D8)
1841
    size = 6;
1842
 
1843
  if (opcode->format == FMT_D9)
1844
    size = 7;
1845
 
1846
  if (opcode->format == FMT_S4)
1847
    size = 5;
1848
 
1849
  if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1850
    size = 7;
1851
 
1852
  if (opcode->format == FMT_D2)
1853
    size = 4;
1854
 
1855
  if (opcode->format == FMT_D3)
1856
    size = 5;
1857
 
1858
  if (opcode->format == FMT_D4)
1859
    size = 6;
1860
 
1861
  if (relaxable && fc > 0)
1862
    {
1863
      /* On a 64-bit host the size of an 'int' is not the same
1864
         as the size of a pointer, so we need a union to convert
1865
         the opindex field of the fr_cgen structure into a char *
1866
         so that it can be stored in the frag.  We do not have
1867
         to worry about loosing accuracy as we are not going to
1868
         be even close to the 32bit limit of the int.  */
1869
      union
1870
      {
1871
        int opindex;
1872
        char * ptr;
1873
      }
1874
      opindex_converter;
1875
      int type;
1876
 
1877
      /* We want to anchor the line info to the previous frag (if
1878
         there isn't one, create it), so that, when the insn is
1879
         resized, we still get the right address for the beginning of
1880
         the region.  */
1881
      f = frag_more (0);
1882
      dwarf2_emit_insn (0);
1883
 
1884
      /* bCC  */
1885
      if (size == 2)
1886
        {
1887
          /* Handle bra specially.  Basically treat it like jmp so
1888
             that we automatically handle 8, 16 and 32 bit offsets
1889
             correctly as well as jumps to an undefined address.
1890
 
1891
             It is also important to not treat it like other bCC
1892
             instructions since the long forms of bra is different
1893
             from other bCC instructions.  */
1894
          if (opcode->opcode == 0xca00)
1895
            type = 10;
1896
          else
1897
            type = 0;
1898
        }
1899
      /* call  */
1900
      else if (size == 5)
1901
        type = 6;
1902
      /* calls  */
1903
      else if (size == 4)
1904
        type = 8;
1905
      /* jmp  */
1906
      else if (size == 3 && opcode->opcode == 0xcc0000)
1907
        type = 10;
1908
      else if (size == 3 && (opcode->opcode & 0xfff000) == 0xf8d000)
1909
        type = 13;
1910
      /* bCC (uncommon cases)  */
1911
      else
1912
        type = 3;
1913
 
1914
      opindex_converter.opindex = fixups[0].opindex;
1915
      f = frag_var (rs_machine_dependent, 8, 8 - size, type,
1916
                    fixups[0].exp.X_add_symbol,
1917
                    fixups[0].exp.X_add_number,
1918
                    opindex_converter.ptr);
1919
 
1920
      /* This is pretty hokey.  We basically just care about the
1921
         opcode, so we have to write out the first word big endian.
1922
 
1923
         The exception is "call", which has two operands that we
1924
         care about.
1925
 
1926
         The first operand (the register list) happens to be in the
1927
         first instruction word, and will be in the right place if
1928
         we output the first word in big endian mode.
1929
 
1930
         The second operand (stack size) is in the extension word,
1931
         and we want it to appear as the first character in the extension
1932
         word (as it appears in memory).  Luckily, writing the extension
1933
         word in big endian format will do what we want.  */
1934
      number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
1935
      if (size > 8)
1936
        {
1937
          number_to_chars_bigendian (f + 4, extension, 4);
1938
          number_to_chars_bigendian (f + 8, 0, size - 8);
1939
        }
1940
      else if (size > 4)
1941
        number_to_chars_bigendian (f + 4, extension, size - 4);
1942
    }
1943
  else
1944
    {
1945
      /* Allocate space for the instruction.  */
1946
      f = frag_more (size);
1947
 
1948
      /* Fill in bytes for the instruction.  Note that opcode fields
1949
         are written big-endian, 16 & 32bit immediates are written
1950
         little endian.  Egad.  */
1951
      if (opcode->format == FMT_S0
1952
          || opcode->format == FMT_S1
1953
          || opcode->format == FMT_D0
1954
          || opcode->format == FMT_D6
1955
          || opcode->format == FMT_D7
1956
          || opcode->format == FMT_D10
1957
          || opcode->format == FMT_D1)
1958
        {
1959
          number_to_chars_bigendian (f, insn, size);
1960
        }
1961
      else if (opcode->format == FMT_S2
1962
               && opcode->opcode != 0xdf0000
1963
               && opcode->opcode != 0xde0000)
1964
        {
1965
          /* A format S2 instruction that is _not_ "ret" and "retf".  */
1966
          number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
1967
          number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
1968
        }
1969
      else if (opcode->format == FMT_S2)
1970
        {
1971
          /* This must be a ret or retf, which is written entirely in
1972
             big-endian format.  */
1973
          number_to_chars_bigendian (f, insn, 3);
1974
        }
1975
      else if (opcode->format == FMT_S4
1976
               && opcode->opcode != 0xdc000000)
1977
        {
1978
          /* This must be a format S4 "call" instruction.  What a pain.  */
1979
          unsigned long temp = (insn >> 8) & 0xffff;
1980
          number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1981
          number_to_chars_littleendian (f + 1, temp, 2);
1982
          number_to_chars_bigendian (f + 3, insn & 0xff, 1);
1983
          number_to_chars_bigendian (f + 4, extension & 0xff, 1);
1984
        }
1985
      else if (opcode->format == FMT_S4)
1986
        {
1987
          /* This must be a format S4 "jmp" instruction.  */
1988
          unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
1989
          number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1990
          number_to_chars_littleendian (f + 1, temp, 4);
1991
        }
1992
      else if (opcode->format == FMT_S6)
1993
        {
1994
          unsigned long temp = ((insn & 0xffffff) << 8)
1995
            | ((extension >> 16) & 0xff);
1996
          number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1997
          number_to_chars_littleendian (f + 1, temp, 4);
1998
          number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
1999
          number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2000
        }
2001
      else if (opcode->format == FMT_D2
2002
               && opcode->opcode != 0xfaf80000
2003
               && opcode->opcode != 0xfaf00000
2004
               && opcode->opcode != 0xfaf40000)
2005
        {
2006
          /* A format D2 instruction where the 16bit immediate is
2007
             really a single 16bit value, not two 8bit values.  */
2008
          number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2009
          number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2010
        }
2011
      else if (opcode->format == FMT_D2)
2012
        {
2013
          /* A format D2 instruction where the 16bit immediate
2014
             is really two 8bit immediates.  */
2015
          number_to_chars_bigendian (f, insn, 4);
2016
        }
2017
      else if (opcode->format == FMT_D3)
2018
        {
2019
          number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2020
          number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2021
          number_to_chars_bigendian (f + 4, extension & 0xff, 1);
2022
        }
2023
      else if (opcode->format == FMT_D4)
2024
        {
2025
          unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
2026
 
2027
          number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2028
          number_to_chars_littleendian (f + 2, temp, 4);
2029
        }
2030
      else if (opcode->format == FMT_D5)
2031
        {
2032
          unsigned long temp = (((insn & 0xffff) << 16)
2033
                                | ((extension >> 8) & 0xffff));
2034
 
2035
          number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2036
          number_to_chars_littleendian (f + 2, temp, 4);
2037
          number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2038
        }
2039
      else if (opcode->format == FMT_D8)
2040
        {
2041
          unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
2042
 
2043
          number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2044
          number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
2045
          number_to_chars_littleendian (f + 4, temp >> 8, 2);
2046
        }
2047
      else if (opcode->format == FMT_D9)
2048
        {
2049
          unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
2050
 
2051
          number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2052
          number_to_chars_littleendian (f + 3, temp, 4);
2053
        }
2054
 
2055
      /* Create any fixups.  */
2056
      for (i = 0; i < fc; i++)
2057
        {
2058
          const struct mn10300_operand *operand;
2059
 
2060
          operand = &mn10300_operands[fixups[i].opindex];
2061
          if (fixups[i].reloc != BFD_RELOC_UNUSED
2062
              && fixups[i].reloc != BFD_RELOC_32_GOT_PCREL
2063
              && fixups[i].reloc != BFD_RELOC_32_GOTOFF
2064
              && fixups[i].reloc != BFD_RELOC_32_PLT_PCREL
2065
              && fixups[i].reloc != BFD_RELOC_MN10300_GOT32)
2066
            {
2067
              reloc_howto_type *reloc_howto;
2068
              int size;
2069
              int offset;
2070
              fixS *fixP;
2071
 
2072
              reloc_howto = bfd_reloc_type_lookup (stdoutput,
2073
                                                   fixups[i].reloc);
2074
 
2075
              if (!reloc_howto)
2076
                abort ();
2077
 
2078
              size = bfd_get_reloc_size (reloc_howto);
2079
 
2080
              if (size < 1 || size > 4)
2081
                abort ();
2082
 
2083
              offset = 4 - size;
2084
              fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2085
                                  size, &fixups[i].exp,
2086
                                  reloc_howto->pc_relative,
2087
                                  fixups[i].reloc);
2088
            }
2089
          else
2090
            {
2091
              int reloc, pcrel, reloc_size, offset;
2092
              fixS *fixP;
2093
 
2094
              reloc = BFD_RELOC_NONE;
2095
              if (fixups[i].reloc != BFD_RELOC_UNUSED)
2096
                reloc = fixups[i].reloc;
2097
              /* How big is the reloc?  Remember SPLIT relocs are
2098
                 implicitly 32bits.  */
2099
              if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2100
                reloc_size = 32;
2101
              else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2102
                reloc_size = 24;
2103
              else
2104
                reloc_size = operand->bits;
2105
 
2106
              /* Is the reloc pc-relative?  */
2107
              pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
2108
              if (reloc != BFD_RELOC_NONE)
2109
                pcrel = bfd_reloc_type_lookup (stdoutput, reloc)->pc_relative;
2110
 
2111
              offset = size - (reloc_size + operand->shift) / 8;
2112
 
2113
              /* Choose a proper BFD relocation type.  */
2114
              if (reloc != BFD_RELOC_NONE)
2115
                ;
2116
              else if (pcrel)
2117
                {
2118
                  if (reloc_size == 32)
2119
                    reloc = BFD_RELOC_32_PCREL;
2120
                  else if (reloc_size == 16)
2121
                    reloc = BFD_RELOC_16_PCREL;
2122
                  else if (reloc_size == 8)
2123
                    reloc = BFD_RELOC_8_PCREL;
2124
                  else
2125
                    abort ();
2126
                }
2127
              else
2128
                {
2129
                  if (reloc_size == 32)
2130
                    reloc = BFD_RELOC_32;
2131
                  else if (reloc_size == 16)
2132
                    reloc = BFD_RELOC_16;
2133
                  else if (reloc_size == 8)
2134
                    reloc = BFD_RELOC_8;
2135
                  else
2136
                    abort ();
2137
                }
2138
 
2139
              fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2140
                                  reloc_size / 8, &fixups[i].exp, pcrel,
2141
                                  ((bfd_reloc_code_real_type) reloc));
2142
 
2143
              if (pcrel)
2144
                fixP->fx_offset += offset;
2145
            }
2146
        }
2147
 
2148
      dwarf2_emit_insn (size);
2149
    }
2150
 
2151
  /* Label this frag as one that contains instructions.  */
2152
  frag_now->tc_frag_data = TRUE;
2153
}
2154
 
2155
/* If while processing a fixup, a reloc really needs to be created
2156
   then it is done here.  */
2157
 
2158
arelent **
2159
tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
2160
{
2161
  static arelent * no_relocs = NULL;
2162
  static arelent * relocs[MAX_RELOC_EXPANSION + 1];
2163
  arelent *reloc;
2164
 
2165
  reloc = xmalloc (sizeof (arelent));
2166
 
2167
  reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2168
  if (reloc->howto == NULL)
2169
    {
2170
      as_bad_where (fixp->fx_file, fixp->fx_line,
2171
                    _("reloc %d not supported by object file format"),
2172
                    (int) fixp->fx_r_type);
2173
      free (reloc);
2174
      return & no_relocs;
2175
    }
2176
 
2177
  reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2178
  relocs[0] = reloc;
2179
  relocs[1] = NULL;
2180
 
2181
  if (fixp->fx_subsy
2182
      && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
2183
    {
2184
      fixp->fx_offset -= S_GET_VALUE (fixp->fx_subsy);
2185
      fixp->fx_subsy = NULL;
2186
    }
2187
 
2188
  if (fixp->fx_addsy && fixp->fx_subsy)
2189
    {
2190
      asection *asec, *ssec;
2191
 
2192
      asec = S_GET_SEGMENT (fixp->fx_addsy);
2193
      ssec = S_GET_SEGMENT (fixp->fx_subsy);
2194
 
2195
      reloc->sym_ptr_ptr = NULL;
2196
 
2197
      /* If we have a difference between two (non-absolute) symbols we must
2198
         generate two relocs (one for each symbol) and allow the linker to
2199
         resolve them - relaxation may change the distances between symbols,
2200
         even local symbols defined in the same section.  */
2201
      if (ssec != absolute_section || asec != absolute_section)
2202
        {
2203
          arelent * reloc2 = xmalloc (sizeof * reloc);
2204
 
2205
          relocs[0] = reloc2;
2206
          relocs[1] = reloc;
2207
 
2208
          reloc2->address = reloc->address;
2209
          reloc2->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_MN10300_SYM_DIFF);
2210
          reloc2->addend = - S_GET_VALUE (fixp->fx_subsy);
2211
          reloc2->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
2212
          *reloc2->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
2213
 
2214
          reloc->addend = fixp->fx_offset;
2215
          if (asec == absolute_section)
2216
            reloc->addend += S_GET_VALUE (fixp->fx_addsy);
2217
 
2218
          reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
2219
          *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2220
 
2221
          fixp->fx_pcrel = 0;
2222
          fixp->fx_done = 1;
2223
          return relocs;
2224
        }
2225
      else
2226
        {
2227
          char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal;
2228
 
2229
          reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
2230
                           - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
2231
 
2232
          switch (fixp->fx_r_type)
2233
            {
2234
            case BFD_RELOC_8:
2235
              md_number_to_chars (fixpos, reloc->addend, 1);
2236
              break;
2237
 
2238
            case BFD_RELOC_16:
2239
              md_number_to_chars (fixpos, reloc->addend, 2);
2240
              break;
2241
 
2242
            case BFD_RELOC_24:
2243
              md_number_to_chars (fixpos, reloc->addend, 3);
2244
              break;
2245
 
2246
            case BFD_RELOC_32:
2247
              md_number_to_chars (fixpos, reloc->addend, 4);
2248
              break;
2249
 
2250
            default:
2251
              reloc->sym_ptr_ptr
2252
                = (asymbol **) bfd_abs_section_ptr->symbol_ptr_ptr;
2253
              return relocs;
2254
            }
2255
 
2256
          if (reloc->sym_ptr_ptr)
2257
            free (reloc->sym_ptr_ptr);
2258
          free (reloc);
2259
          return & no_relocs;
2260
        }
2261
    }
2262
  else
2263
    {
2264
      reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
2265
      *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2266
      reloc->addend = fixp->fx_offset;
2267
    }
2268
  return relocs;
2269
}
2270
 
2271
/* Returns true iff the symbol attached to the frag is at a known location
2272
   in the given section, (and hence the relocation to it can be relaxed by
2273
   the assembler).  */
2274
static inline bfd_boolean
2275
has_known_symbol_location (fragS * fragp, asection * sec)
2276
{
2277
  symbolS * sym = fragp->fr_symbol;
2278
 
2279
  return sym != NULL
2280
    && S_IS_DEFINED (sym)
2281
    && ! S_IS_WEAK (sym)
2282
    && S_GET_SEGMENT (sym) == sec;
2283
}
2284
 
2285
int
2286
md_estimate_size_before_relax (fragS *fragp, asection *seg)
2287
{
2288
  if (fragp->fr_subtype == 6
2289
      && ! has_known_symbol_location (fragp, seg))
2290
    fragp->fr_subtype = 7;
2291
  else if (fragp->fr_subtype == 8
2292
           && ! has_known_symbol_location (fragp, seg))
2293
    fragp->fr_subtype = 9;
2294
  else if (fragp->fr_subtype == 10
2295
           && ! has_known_symbol_location (fragp, seg))
2296
    fragp->fr_subtype = 12;
2297
 
2298
  if (fragp->fr_subtype == 13)
2299
    return 3;
2300
 
2301
  if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2302
    abort ();
2303
 
2304
  return md_relax_table[fragp->fr_subtype].rlx_length;
2305
}
2306
 
2307
long
2308
md_pcrel_from (fixS *fixp)
2309
{
2310
  if (fixp->fx_addsy != (symbolS *) NULL
2311
      && (!S_IS_DEFINED (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)))
2312
    /* The symbol is undefined or weak.  Let the linker figure it out.  */
2313
    return 0;
2314
 
2315
  return fixp->fx_frag->fr_address + fixp->fx_where;
2316
}
2317
 
2318
void
2319
md_apply_fix (fixS * fixP, valueT * valP, segT seg)
2320
{
2321
  char * fixpos = fixP->fx_where + fixP->fx_frag->fr_literal;
2322
  int size = 0;
2323
  int value = (int) * valP;
2324
 
2325
  assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
2326
 
2327
  /* This should never happen.  */
2328
  if (seg->flags & SEC_ALLOC)
2329
    abort ();
2330
 
2331
  /* The value we are passed in *valuep includes the symbol values.
2332
     If we are doing this relocation the code in write.c is going to
2333
     call bfd_install_relocation, which is also going to use the symbol
2334
     value.  That means that if the reloc is fully resolved we want to
2335
     use *valuep since bfd_install_relocation is not being used.
2336
 
2337
     However, if the reloc is not fully resolved we do not want to use
2338
     *valuep, and must use fx_offset instead.  However, if the reloc
2339
     is PC relative, we do want to use *valuep since it includes the
2340
     result of md_pcrel_from.  */
2341
  if (fixP->fx_addsy != NULL && ! fixP->fx_pcrel)
2342
    value = fixP->fx_offset;
2343
 
2344
  /* If the fix is relative to a symbol which is not defined, or not
2345
     in the same segment as the fix, we cannot resolve it here.  */
2346
  if (fixP->fx_addsy != NULL
2347
      && (! S_IS_DEFINED (fixP->fx_addsy)
2348
          || (S_GET_SEGMENT (fixP->fx_addsy) != seg)))
2349
    {
2350
      fixP->fx_done = 0;
2351
      return;
2352
    }
2353
 
2354
  switch (fixP->fx_r_type)
2355
    {
2356
    case BFD_RELOC_8:
2357
    case BFD_RELOC_8_PCREL:
2358
      size = 1;
2359
      break;
2360
 
2361
    case BFD_RELOC_16:
2362
    case BFD_RELOC_16_PCREL:
2363
      size = 2;
2364
      break;
2365
 
2366
    case BFD_RELOC_32:
2367
    case BFD_RELOC_32_PCREL:
2368
      size = 4;
2369
      break;
2370
 
2371
    case BFD_RELOC_VTABLE_INHERIT:
2372
    case BFD_RELOC_VTABLE_ENTRY:
2373
      fixP->fx_done = 0;
2374
      return;
2375
 
2376
    case BFD_RELOC_MN10300_ALIGN:
2377
      fixP->fx_done = 1;
2378
      return;
2379
 
2380
    case BFD_RELOC_NONE:
2381
    default:
2382
      as_bad_where (fixP->fx_file, fixP->fx_line,
2383
                   _("Bad relocation fixup type (%d)"), fixP->fx_r_type);
2384
    }
2385
 
2386
  md_number_to_chars (fixpos, value, size);
2387
 
2388
  /* If a symbol remains, pass the fixup, as a reloc, onto the linker.  */
2389
  if (fixP->fx_addsy == NULL)
2390
    fixP->fx_done = 1;
2391
}
2392
 
2393
/* Return zero if the fixup in fixp should be left alone and not
2394
   adjusted.  */
2395
 
2396
bfd_boolean
2397
mn10300_fix_adjustable (struct fix *fixp)
2398
{
2399
  if (fixp->fx_pcrel)
2400
    {
2401
      if (TC_FORCE_RELOCATION_LOCAL (fixp))
2402
        return FALSE;
2403
    }
2404
  /* Non-relative relocs can (and must) be adjusted if they do
2405
     not meet the criteria below, or the generic criteria.  */
2406
  else if (TC_FORCE_RELOCATION (fixp))
2407
    return FALSE;
2408
 
2409
  /* Do not adjust relocations involving symbols in code sections,
2410
     because it breaks linker relaxations.  This could be fixed in the
2411
     linker, but this fix is simpler, and it pretty much only affects
2412
     object size a little bit.  */
2413
  if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE)
2414
    return FALSE;
2415
 
2416
  /* Likewise, do not adjust symbols that won't be merged, or debug
2417
     symbols, because they too break relaxation.  We do want to adjust
2418
     other mergable symbols, like .rodata, because code relaxations
2419
     need section-relative symbols to properly relax them.  */
2420
  if (! (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE))
2421
    return FALSE;
2422
 
2423
  if (strncmp (S_GET_SEGMENT (fixp->fx_addsy)->name, ".debug", 6) == 0)
2424
    return FALSE;
2425
 
2426
  return TRUE;
2427
}
2428
 
2429
static void
2430
set_arch_mach (int mach)
2431
{
2432
  if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
2433
    as_warn (_("could not set architecture and machine"));
2434
 
2435
  current_machine = mach;
2436
}
2437
 
2438
static inline char *
2439
mn10300_end_of_match (char *cont, char *what)
2440
{
2441
  int len = strlen (what);
2442
 
2443
  if (strncmp (cont, what, strlen (what)) == 0
2444
      && ! is_part_of_name (cont[len]))
2445
    return cont + len;
2446
 
2447
  return NULL;
2448
}
2449
 
2450
int
2451
mn10300_parse_name (char const *name,
2452
                    expressionS *exprP,
2453
                    enum expr_mode mode,
2454
                    char *nextcharP)
2455
{
2456
  char *next = input_line_pointer;
2457
  char *next_end;
2458
  int reloc_type;
2459
  segT segment;
2460
 
2461
  exprP->X_op_symbol = NULL;
2462
 
2463
  if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
2464
    {
2465
      if (! GOT_symbol)
2466
        GOT_symbol = symbol_find_or_make (name);
2467
 
2468
      exprP->X_add_symbol = GOT_symbol;
2469
    no_suffix:
2470
      /* If we have an absolute symbol or a reg,
2471
         then we know its value now.  */
2472
      segment = S_GET_SEGMENT (exprP->X_add_symbol);
2473
      if (mode != expr_defer && segment == absolute_section)
2474
        {
2475
          exprP->X_op = O_constant;
2476
          exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2477
          exprP->X_add_symbol = NULL;
2478
        }
2479
      else if (mode != expr_defer && segment == reg_section)
2480
        {
2481
          exprP->X_op = O_register;
2482
          exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2483
          exprP->X_add_symbol = NULL;
2484
        }
2485
      else
2486
        {
2487
          exprP->X_op = O_symbol;
2488
          exprP->X_add_number = 0;
2489
        }
2490
 
2491
      return 1;
2492
    }
2493
 
2494
  exprP->X_add_symbol = symbol_find_or_make (name);
2495
 
2496
  if (*nextcharP != '@')
2497
    goto no_suffix;
2498
  else if ((next_end = mn10300_end_of_match (next + 1, "GOTOFF")))
2499
    reloc_type = BFD_RELOC_32_GOTOFF;
2500
  else if ((next_end = mn10300_end_of_match (next + 1, "GOT")))
2501
    reloc_type = BFD_RELOC_MN10300_GOT32;
2502
  else if ((next_end = mn10300_end_of_match (next + 1, "PLT")))
2503
    reloc_type = BFD_RELOC_32_PLT_PCREL;
2504
  else
2505
    goto no_suffix;
2506
 
2507
  *input_line_pointer = *nextcharP;
2508
  input_line_pointer = next_end;
2509
  *nextcharP = *input_line_pointer;
2510
  *input_line_pointer = '\0';
2511
 
2512
  exprP->X_op = O_PIC_reloc;
2513
  exprP->X_add_number = 0;
2514
  exprP->X_md = reloc_type;
2515
 
2516
  return 1;
2517
}
2518
 
2519
/* The target specific pseudo-ops which we support.  */
2520
const pseudo_typeS md_pseudo_table[] =
2521
{
2522
  { "am30",     set_arch_mach,  AM30 },
2523
  { "am33",     set_arch_mach,  AM33 },
2524
  { "am33_2",   set_arch_mach,  AM33_2 },
2525
  { "mn10300",  set_arch_mach,  MN103 },
2526
  {NULL, 0, 0}
2527
};
2528
 
2529
/* Returns FALSE if there is some mn10300 specific reason why the
2530
   subtraction of two same-section symbols cannot be computed by
2531
   the assembler.  */
2532
 
2533
bfd_boolean
2534
mn10300_allow_local_subtract (expressionS * left, expressionS * right, segT section)
2535
{
2536
  bfd_boolean result;
2537
  fragS * left_frag;
2538
  fragS * right_frag;
2539
  fragS * frag;
2540
 
2541
  /* If we are not performing linker relaxation then we have nothing
2542
     to worry about.  */
2543
  if (linkrelax == 0)
2544
    return TRUE;
2545
 
2546
  /* If the symbols are not in a code section then they are OK.  */
2547
  if ((section->flags & SEC_CODE) == 0)
2548
    return TRUE;
2549
 
2550
  /* Otherwise we have to scan the fragments between the two symbols.
2551
     If any instructions are found then we have to assume that linker
2552
     relaxation may change their size and so we must delay resolving
2553
     the subtraction until the final link.  */
2554
  left_frag = symbol_get_frag (left->X_add_symbol);
2555
  right_frag = symbol_get_frag (right->X_add_symbol);
2556
 
2557
  if (left_frag == right_frag)
2558
    return ! left_frag->tc_frag_data;
2559
 
2560
  result = TRUE;
2561
  for (frag = left_frag; frag != NULL; frag = frag->fr_next)
2562
    {
2563
      if (frag->tc_frag_data)
2564
        result = FALSE;
2565
      if (frag == right_frag)
2566
        break;
2567
    }
2568
 
2569
  if (frag == NULL)
2570
    for (frag = right_frag; frag != NULL; frag = frag->fr_next)
2571
      {
2572
        if (frag->tc_frag_data)
2573
          result = FALSE;
2574
        if (frag == left_frag)
2575
          break;
2576
      }
2577
 
2578
  if (frag == NULL)
2579
    /* The two symbols are on disjoint fragment chains
2580
       - we cannot possibly compute their difference.  */
2581
    return FALSE;
2582
 
2583
  return result;
2584
}
2585
 
2586
/* When relaxing, we need to output a reloc for any .align directive
2587
   that requests alignment to a two byte boundary or larger.  */
2588
 
2589
void
2590
mn10300_handle_align (fragS *frag)
2591
{
2592
  if (linkrelax
2593
      && (frag->fr_type == rs_align
2594
          || frag->fr_type == rs_align_code)
2595
      && frag->fr_address + frag->fr_fix > 0
2596
      && frag->fr_offset > 1
2597
      && now_seg != bss_section
2598
      /* Do not create relocs for the merging sections - such
2599
         relocs will prevent the contents from being merged.  */
2600
      && (bfd_get_section_flags (now_seg->owner, now_seg) & SEC_MERGE) == 0)
2601
    /* Create a new fixup to record the alignment request.  The symbol is
2602
       irrelevent but must be present so we use the absolute section symbol.
2603
       The offset from the symbol is used to record the power-of-two alignment
2604
       value.  The size is set to 0 because the frag may already be aligned,
2605
       thus causing cvt_frag_to_fill to reduce the size of the frag to zero.  */
2606
    fix_new (frag, frag->fr_fix, 0, & abs_symbol, frag->fr_offset, FALSE,
2607
             BFD_RELOC_MN10300_ALIGN);
2608
}
2609
 
2610
bfd_boolean
2611
mn10300_force_relocation (struct fix * fixp)
2612
{
2613
  if (linkrelax
2614
      && (fixp->fx_pcrel
2615
          || fixp->fx_r_type == BFD_RELOC_MN10300_ALIGN))
2616
    return TRUE;
2617
 
2618
  return generic_force_reloc (fixp);
2619
}

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