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This is as.info, produced by makeinfo version 4.8 from as.texinfo.
2
 
3
START-INFO-DIR-ENTRY
4
* As: (as).                     The GNU assembler.
5
* Gas: (as).                    The GNU assembler.
6
END-INFO-DIR-ENTRY
7
 
8
   This file documents the GNU Assembler "as".
9
 
10
   Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
11
2006, 2007 Free Software Foundation, Inc.
12
 
13
   Permission is granted to copy, distribute and/or modify this document
14
under the terms of the GNU Free Documentation License, Version 1.1 or
15
any later version published by the Free Software Foundation; with no
16
Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
17
Texts.  A copy of the license is included in the section entitled "GNU
18
Free Documentation License".
19
 
20

21
File: as.info,  Node: Top,  Next: Overview,  Up: (dir)
22
 
23
Using as
24
********
25
 
26
This file is a user guide to the GNU assembler `as' (GNU Binutils)
27
version 2.18.50.
28
 
29
   This document is distributed under the terms of the GNU Free
30
Documentation License.  A copy of the license is included in the
31
section entitled "GNU Free Documentation License".
32
 
33
* Menu:
34
 
35
* Overview::                    Overview
36
* Invoking::                    Command-Line Options
37
* Syntax::                      Syntax
38
* Sections::                    Sections and Relocation
39
* Symbols::                     Symbols
40
* Expressions::                 Expressions
41
* Pseudo Ops::                  Assembler Directives
42
 
43
* Object Attributes::           Object Attributes
44
* Machine Dependencies::        Machine Dependent Features
45
* Reporting Bugs::              Reporting Bugs
46
* Acknowledgements::            Who Did What
47
* GNU Free Documentation License::  GNU Free Documentation License
48
* AS Index::                    AS Index
49
 
50

51
File: as.info,  Node: Overview,  Next: Invoking,  Prev: Top,  Up: Top
52
 
53
1 Overview
54
**********
55
 
56
Here is a brief summary of how to invoke `as'.  For details, see *Note
57
Command-Line Options: Invoking.
58
 
59
     as [-a[cdghlns][=FILE]] [-alternate] [-D]
60
      [-debug-prefix-map OLD=NEW]
61
      [-defsym SYM=VAL] [-f] [-g] [-gstabs]
62
      [-gstabs+] [-gdwarf-2] [-help] [-I DIR] [-J]
63
      [-K] [-L] [-listing-lhs-width=NUM]
64
      [-listing-lhs-width2=NUM] [-listing-rhs-width=NUM]
65
      [-listing-cont-lines=NUM] [-keep-locals] [-o
66
      OBJFILE] [-R] [-reduce-memory-overheads] [-statistics]
67
      [-v] [-version] [-version] [-W] [-warn]
68
      [-fatal-warnings] [-w] [-x] [-Z] [@FILE]
69
      [-target-help] [TARGET-OPTIONS]
70
      [-|FILES ...]
71
 
72
     _Target Alpha options:_
73
        [-mCPU]
74
        [-mdebug | -no-mdebug]
75
        [-relax] [-g] [-GSIZE]
76
        [-F] [-32addr]
77
 
78
     _Target ARC options:_
79
        [-marc[5|6|7|8]]
80
        [-EB|-EL]
81
 
82
     _Target ARM options:_
83
        [-mcpu=PROCESSOR[+EXTENSION...]]
84
        [-march=ARCHITECTURE[+EXTENSION...]]
85
        [-mfpu=FLOATING-POINT-FORMAT]
86
        [-mfloat-abi=ABI]
87
        [-meabi=VER]
88
        [-mthumb]
89
        [-EB|-EL]
90
        [-mapcs-32|-mapcs-26|-mapcs-float|
91
         -mapcs-reentrant]
92
        [-mthumb-interwork] [-k]
93
 
94
     _Target CRIS options:_
95
        [-underscore | -no-underscore]
96
        [-pic] [-N]
97
        [-emulation=criself | -emulation=crisaout]
98
        [-march=v0_v10 | -march=v10 | -march=v32 | -march=common_v10_v32]
99
 
100
     _Target D10V options:_
101
        [-O]
102
 
103
     _Target D30V options:_
104
        [-O|-n|-N]
105
 
106
     _Target i386 options:_
107
        [-32|-64] [-n]
108
        [-march=CPU[+EXTENSION...]] [-mtune=CPU]
109
 
110
     _Target i960 options:_
111
        [-ACA|-ACA_A|-ACB|-ACC|-AKA|-AKB|
112
         -AKC|-AMC]
113
        [-b] [-no-relax]
114
 
115
     _Target IA-64 options:_
116
        [-mconstant-gp|-mauto-pic]
117
        [-milp32|-milp64|-mlp64|-mp64]
118
        [-mle|mbe]
119
        [-mtune=itanium1|-mtune=itanium2]
120
        [-munwind-check=warning|-munwind-check=error]
121
        [-mhint.b=ok|-mhint.b=warning|-mhint.b=error]
122
        [-x|-xexplicit] [-xauto] [-xdebug]
123
 
124
     _Target IP2K options:_
125
        [-mip2022|-mip2022ext]
126
 
127
     _Target M32C options:_
128
        [-m32c|-m16c]
129
 
130
     _Target M32R options:_
131
        [-m32rx|-[no-]warn-explicit-parallel-conflicts|
132
        -W[n]p]
133
 
134
     _Target M680X0 options:_
135
        [-l] [-m68000|-m68010|-m68020|...]
136
 
137
     _Target M68HC11 options:_
138
        [-m68hc11|-m68hc12|-m68hcs12]
139
        [-mshort|-mlong]
140
        [-mshort-double|-mlong-double]
141
        [-force-long-branches] [-short-branches]
142
        [-strict-direct-mode] [-print-insn-syntax]
143
        [-print-opcodes] [-generate-example]
144
 
145
     _Target MCORE options:_
146
        [-jsri2bsr] [-sifilter] [-relax]
147
        [-mcpu=[210|340]]
148
 
149
     _Target MIPS options:_
150
        [-nocpp] [-EL] [-EB] [-O[OPTIMIZATION LEVEL]]
151
        [-g[DEBUG LEVEL]] [-G NUM] [-KPIC] [-call_shared]
152
        [-non_shared] [-xgot [-mvxworks-pic]
153
        [-mabi=ABI] [-32] [-n32] [-64] [-mfp32] [-mgp32]
154
        [-march=CPU] [-mtune=CPU] [-mips1] [-mips2]
155
        [-mips3] [-mips4] [-mips5] [-mips32] [-mips32r2]
156
        [-mips64] [-mips64r2]
157
        [-construct-floats] [-no-construct-floats]
158
        [-trap] [-no-break] [-break] [-no-trap]
159
        [-mfix7000] [-mno-fix7000]
160
        [-mips16] [-no-mips16]
161
        [-msmartmips] [-mno-smartmips]
162
        [-mips3d] [-no-mips3d]
163
        [-mdmx] [-no-mdmx]
164
        [-mdsp] [-mno-dsp]
165
        [-mdspr2] [-mno-dspr2]
166
        [-mmt] [-mno-mt]
167
        [-mdebug] [-no-mdebug]
168
        [-mpdr] [-mno-pdr]
169
 
170
     _Target MMIX options:_
171
        [-fixed-special-register-names] [-globalize-symbols]
172
        [-gnu-syntax] [-relax] [-no-predefined-symbols]
173
        [-no-expand] [-no-merge-gregs] [-x]
174
        [-linker-allocated-gregs]
175
 
176
     _Target PDP11 options:_
177
        [-mpic|-mno-pic] [-mall] [-mno-extensions]
178
        [-mEXTENSION|-mno-EXTENSION]
179
        [-mCPU] [-mMACHINE]
180
 
181
     _Target picoJava options:_
182
        [-mb|-me]
183
 
184
     _Target PowerPC options:_
185
        [-mpwrx|-mpwr2|-mpwr|-m601|-mppc|-mppc32|-m603|-m604|
186
         -m403|-m405|-mppc64|-m620|-mppc64bridge|-mbooke|
187
         -mbooke32|-mbooke64]
188
        [-mcom|-many|-maltivec] [-memb]
189
        [-mregnames|-mno-regnames]
190
        [-mrelocatable|-mrelocatable-lib]
191
        [-mlittle|-mlittle-endian|-mbig|-mbig-endian]
192
        [-msolaris|-mno-solaris]
193
 
194
     _Target SPARC options:_
195
        [-Av6|-Av7|-Av8|-Asparclet|-Asparclite
196
         -Av8plus|-Av8plusa|-Av9|-Av9a]
197
        [-xarch=v8plus|-xarch=v8plusa] [-bump]
198
        [-32|-64]
199
 
200
     _Target TIC54X options:_
201
      [-mcpu=54[123589]|-mcpu=54[56]lp] [-mfar-mode|-mf]
202
      [-merrors-to-file |-me ]
203
 
204
 
205
     _Target Z80 options:_
206
       [-z80] [-r800]
207
       [ -ignore-undocumented-instructions] [-Wnud]
208
       [ -ignore-unportable-instructions] [-Wnup]
209
       [ -warn-undocumented-instructions] [-Wud]
210
       [ -warn-unportable-instructions] [-Wup]
211
       [ -forbid-undocumented-instructions] [-Fud]
212
       [ -forbid-unportable-instructions] [-Fup]
213
 
214
 
215
     _Target Xtensa options:_
216
      [-[no-]text-section-literals] [-[no-]absolute-literals]
217
      [-[no-]target-align] [-[no-]longcalls]
218
      [-[no-]transform]
219
      [-rename-section OLDNAME=NEWNAME]
220
 
221
`@FILE'
222
     Read command-line options from FILE.  The options read are
223
     inserted in place of the original @FILE option.  If FILE does not
224
     exist, or cannot be read, then the option will be treated
225
     literally, and not removed.
226
 
227
     Options in FILE are separated by whitespace.  A whitespace
228
     character may be included in an option by surrounding the entire
229
     option in either single or double quotes.  Any character
230
     (including a backslash) may be included by prefixing the character
231
     to be included with a backslash.  The FILE may itself contain
232
     additional @FILE options; any such options will be processed
233
     recursively.
234
 
235
`-a[cdghlmns]'
236
     Turn on listings, in any of a variety of ways:
237
 
238
    `-ac'
239
          omit false conditionals
240
 
241
    `-ad'
242
          omit debugging directives
243
 
244
    `-ag'
245
          include general information, like as version and options
246
          passed
247
 
248
    `-ah'
249
          include high-level source
250
 
251
    `-al'
252
          include assembly
253
 
254
    `-am'
255
          include macro expansions
256
 
257
    `-an'
258
          omit forms processing
259
 
260
    `-as'
261
          include symbols
262
 
263
    `=file'
264
          set the name of the listing file
265
 
266
     You may combine these options; for example, use `-aln' for assembly
267
     listing without forms processing.  The `=file' option, if used,
268
     must be the last one.  By itself, `-a' defaults to `-ahls'.
269
 
270
`--alternate'
271
     Begin in alternate macro mode.  *Note `.altmacro': Altmacro.
272
 
273
`-D'
274
     Ignored.  This option is accepted for script compatibility with
275
     calls to other assemblers.
276
 
277
`--debug-prefix-map OLD=NEW'
278
     When assembling files in directory `OLD', record debugging
279
     information describing them as in `NEW' instead.
280
 
281
`--defsym SYM=VALUE'
282
     Define the symbol SYM to be VALUE before assembling the input file.
283
     VALUE must be an integer constant.  As in C, a leading `0x'
284
     indicates a hexadecimal value, and a leading `0' indicates an octal
285
     value.  The value of the symbol can be overridden inside a source
286
     file via the use of a `.set' pseudo-op.
287
 
288
`-f'
289
     "fast"--skip whitespace and comment preprocessing (assume source is
290
     compiler output).
291
 
292
`-g'
293
`--gen-debug'
294
     Generate debugging information for each assembler source line
295
     using whichever debug format is preferred by the target.  This
296
     currently means either STABS, ECOFF or DWARF2.
297
 
298
`--gstabs'
299
     Generate stabs debugging information for each assembler line.  This
300
     may help debugging assembler code, if the debugger can handle it.
301
 
302
`--gstabs+'
303
     Generate stabs debugging information for each assembler line, with
304
     GNU extensions that probably only gdb can handle, and that could
305
     make other debuggers crash or refuse to read your program.  This
306
     may help debugging assembler code.  Currently the only GNU
307
     extension is the location of the current working directory at
308
     assembling time.
309
 
310
`--gdwarf-2'
311
     Generate DWARF2 debugging information for each assembler line.
312
     This may help debugging assembler code, if the debugger can handle
313
     it.  Note--this option is only supported by some targets, not all
314
     of them.
315
 
316
`--help'
317
     Print a summary of the command line options and exit.
318
 
319
`--target-help'
320
     Print a summary of all target specific options and exit.
321
 
322
`-I DIR'
323
     Add directory DIR to the search list for `.include' directives.
324
 
325
`-J'
326
     Don't warn about signed overflow.
327
 
328
`-K'
329
     Issue warnings when difference tables altered for long
330
     displacements.
331
 
332
`-L'
333
`--keep-locals'
334
     Keep (in the symbol table) local symbols.  These symbols start with
335
     system-specific local label prefixes, typically `.L' for ELF
336
     systems or `L' for traditional a.out systems.  *Note Symbol
337
     Names::.
338
 
339
`--listing-lhs-width=NUMBER'
340
     Set the maximum width, in words, of the output data column for an
341
     assembler listing to NUMBER.
342
 
343
`--listing-lhs-width2=NUMBER'
344
     Set the maximum width, in words, of the output data column for
345
     continuation lines in an assembler listing to NUMBER.
346
 
347
`--listing-rhs-width=NUMBER'
348
     Set the maximum width of an input source line, as displayed in a
349
     listing, to NUMBER bytes.
350
 
351
`--listing-cont-lines=NUMBER'
352
     Set the maximum number of lines printed in a listing for a single
353
     line of input to NUMBER + 1.
354
 
355
`-o OBJFILE'
356
     Name the object-file output from `as' OBJFILE.
357
 
358
`-R'
359
     Fold the data section into the text section.
360
 
361
     Set the default size of GAS's hash tables to a prime number close
362
     to NUMBER.  Increasing this value can reduce the length of time it
363
     takes the assembler to perform its tasks, at the expense of
364
     increasing the assembler's memory requirements.  Similarly
365
     reducing this value can reduce the memory requirements at the
366
     expense of speed.
367
 
368
`--reduce-memory-overheads'
369
     This option reduces GAS's memory requirements, at the expense of
370
     making the assembly processes slower.  Currently this switch is a
371
     synonym for `--hash-size=4051', but in the future it may have
372
     other effects as well.
373
 
374
`--statistics'
375
     Print the maximum space (in bytes) and total time (in seconds)
376
     used by assembly.
377
 
378
`--strip-local-absolute'
379
     Remove local absolute symbols from the outgoing symbol table.
380
 
381
`-v'
382
`-version'
383
     Print the `as' version.
384
 
385
`--version'
386
     Print the `as' version and exit.
387
 
388
`-W'
389
`--no-warn'
390
     Suppress warning messages.
391
 
392
`--fatal-warnings'
393
     Treat warnings as errors.
394
 
395
`--warn'
396
     Don't suppress warning messages or treat them as errors.
397
 
398
`-w'
399
     Ignored.
400
 
401
`-x'
402
     Ignored.
403
 
404
`-Z'
405
     Generate an object file even after errors.
406
 
407
`-- | FILES ...'
408
     Standard input, or source files to assemble.
409
 
410
 
411
   The following options are available when as is configured for an ARC
412
processor.
413
 
414
`-marc[5|6|7|8]'
415
     This option selects the core processor variant.
416
 
417
`-EB | -EL'
418
     Select either big-endian (-EB) or little-endian (-EL) output.
419
 
420
   The following options are available when as is configured for the ARM
421
processor family.
422
 
423
`-mcpu=PROCESSOR[+EXTENSION...]'
424
     Specify which ARM processor variant is the target.
425
 
426
`-march=ARCHITECTURE[+EXTENSION...]'
427
     Specify which ARM architecture variant is used by the target.
428
 
429
`-mfpu=FLOATING-POINT-FORMAT'
430
     Select which Floating Point architecture is the target.
431
 
432
`-mfloat-abi=ABI'
433
     Select which floating point ABI is in use.
434
 
435
`-mthumb'
436
     Enable Thumb only instruction decoding.
437
 
438
`-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant'
439
     Select which procedure calling convention is in use.
440
 
441
`-EB | -EL'
442
     Select either big-endian (-EB) or little-endian (-EL) output.
443
 
444
`-mthumb-interwork'
445
     Specify that the code has been generated with interworking between
446
     Thumb and ARM code in mind.
447
 
448
`-k'
449
     Specify that PIC code has been generated.
450
 
451
   See the info pages for documentation of the CRIS-specific options.
452
 
453
   The following options are available when as is configured for a D10V
454
processor.
455
`-O'
456
     Optimize output by parallelizing instructions.
457
 
458
   The following options are available when as is configured for a D30V
459
processor.
460
`-O'
461
     Optimize output by parallelizing instructions.
462
 
463
`-n'
464
     Warn when nops are generated.
465
 
466
`-N'
467
     Warn when a nop after a 32-bit multiply instruction is generated.
468
 
469
   The following options are available when as is configured for the
470
Intel 80960 processor.
471
 
472
`-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC'
473
     Specify which variant of the 960 architecture is the target.
474
 
475
`-b'
476
     Add code to collect statistics about branches taken.
477
 
478
`-no-relax'
479
     Do not alter compare-and-branch instructions for long
480
     displacements; error if necessary.
481
 
482
 
483
   The following options are available when as is configured for the
484
Ubicom IP2K series.
485
 
486
`-mip2022ext'
487
     Specifies that the extended IP2022 instructions are allowed.
488
 
489
`-mip2022'
490
     Restores the default behaviour, which restricts the permitted
491
     instructions to just the basic IP2022 ones.
492
 
493
 
494
   The following options are available when as is configured for the
495
Renesas M32C and M16C processors.
496
 
497
`-m32c'
498
     Assemble M32C instructions.
499
 
500
`-m16c'
501
     Assemble M16C instructions (the default).
502
 
503
 
504
   The following options are available when as is configured for the
505
Renesas M32R (formerly Mitsubishi M32R) series.
506
 
507
`--m32rx'
508
     Specify which processor in the M32R family is the target.  The
509
     default is normally the M32R, but this option changes it to the
510
     M32RX.
511
 
512
`--warn-explicit-parallel-conflicts or --Wp'
513
     Produce warning messages when questionable parallel constructs are
514
     encountered.
515
 
516
`--no-warn-explicit-parallel-conflicts or --Wnp'
517
     Do not produce warning messages when questionable parallel
518
     constructs are encountered.
519
 
520
 
521
   The following options are available when as is configured for the
522
Motorola 68000 series.
523
 
524
`-l'
525
     Shorten references to undefined symbols, to one word instead of
526
     two.
527
 
528
`-m68000 | -m68008 | -m68010 | -m68020 | -m68030'
529
`| -m68040 | -m68060 | -m68302 | -m68331 | -m68332'
530
`| -m68333 | -m68340 | -mcpu32 | -m5200'
531
     Specify what processor in the 68000 family is the target.  The
532
     default is normally the 68020, but this can be changed at
533
     configuration time.
534
 
535
`-m68881 | -m68882 | -mno-68881 | -mno-68882'
536
     The target machine does (or does not) have a floating-point
537
     coprocessor.  The default is to assume a coprocessor for 68020,
538
     68030, and cpu32.  Although the basic 68000 is not compatible with
539
     the 68881, a combination of the two can be specified, since it's
540
     possible to do emulation of the coprocessor instructions with the
541
     main processor.
542
 
543
`-m68851 | -mno-68851'
544
     The target machine does (or does not) have a memory-management
545
     unit coprocessor.  The default is to assume an MMU for 68020 and
546
     up.
547
 
548
 
549
   For details about the PDP-11 machine dependent features options, see
550
*Note PDP-11-Options::.
551
 
552
`-mpic | -mno-pic'
553
     Generate position-independent (or position-dependent) code.  The
554
     default is `-mpic'.
555
 
556
`-mall'
557
`-mall-extensions'
558
     Enable all instruction set extensions.  This is the default.
559
 
560
`-mno-extensions'
561
     Disable all instruction set extensions.
562
 
563
`-mEXTENSION | -mno-EXTENSION'
564
     Enable (or disable) a particular instruction set extension.
565
 
566
`-mCPU'
567
     Enable the instruction set extensions supported by a particular
568
     CPU, and disable all other extensions.
569
 
570
`-mMACHINE'
571
     Enable the instruction set extensions supported by a particular
572
     machine model, and disable all other extensions.
573
 
574
   The following options are available when as is configured for a
575
picoJava processor.
576
 
577
`-mb'
578
     Generate "big endian" format output.
579
 
580
`-ml'
581
     Generate "little endian" format output.
582
 
583
 
584
   The following options are available when as is configured for the
585
Motorola 68HC11 or 68HC12 series.
586
 
587
`-m68hc11 | -m68hc12 | -m68hcs12'
588
     Specify what processor is the target.  The default is defined by
589
     the configuration option when building the assembler.
590
 
591
`-mshort'
592
     Specify to use the 16-bit integer ABI.
593
 
594
`-mlong'
595
     Specify to use the 32-bit integer ABI.
596
 
597
`-mshort-double'
598
     Specify to use the 32-bit double ABI.
599
 
600
`-mlong-double'
601
     Specify to use the 64-bit double ABI.
602
 
603
`--force-long-branches'
604
     Relative branches are turned into absolute ones. This concerns
605
     conditional branches, unconditional branches and branches to a sub
606
     routine.
607
 
608
`-S | --short-branches'
609
     Do not turn relative branches into absolute ones when the offset
610
     is out of range.
611
 
612
`--strict-direct-mode'
613
     Do not turn the direct addressing mode into extended addressing
614
     mode when the instruction does not support direct addressing mode.
615
 
616
`--print-insn-syntax'
617
     Print the syntax of instruction in case of error.
618
 
619
`--print-opcodes'
620
     print the list of instructions with syntax and then exit.
621
 
622
`--generate-example'
623
     print an example of instruction for each possible instruction and
624
     then exit.  This option is only useful for testing `as'.
625
 
626
 
627
   The following options are available when `as' is configured for the
628
SPARC architecture:
629
 
630
`-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite'
631
`-Av8plus | -Av8plusa | -Av9 | -Av9a'
632
     Explicitly select a variant of the SPARC architecture.
633
 
634
     `-Av8plus' and `-Av8plusa' select a 32 bit environment.  `-Av9'
635
     and `-Av9a' select a 64 bit environment.
636
 
637
     `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with
638
     UltraSPARC extensions.
639
 
640
`-xarch=v8plus | -xarch=v8plusa'
641
     For compatibility with the Solaris v9 assembler.  These options are
642
     equivalent to -Av8plus and -Av8plusa, respectively.
643
 
644
`-bump'
645
     Warn when the assembler switches to another architecture.
646
 
647
   The following options are available when as is configured for the
648
'c54x architecture.
649
 
650
`-mfar-mode'
651
     Enable extended addressing mode.  All addresses and relocations
652
     will assume extended addressing (usually 23 bits).
653
 
654
`-mcpu=CPU_VERSION'
655
     Sets the CPU version being compiled for.
656
 
657
`-merrors-to-file FILENAME'
658
     Redirect error output to a file, for broken systems which don't
659
     support such behaviour in the shell.
660
 
661
   The following options are available when as is configured for a MIPS
662
processor.
663
 
664
`-G NUM'
665
     This option sets the largest size of an object that can be
666
     referenced implicitly with the `gp' register.  It is only accepted
667
     for targets that use ECOFF format, such as a DECstation running
668
     Ultrix.  The default value is 8.
669
 
670
`-EB'
671
     Generate "big endian" format output.
672
 
673
`-EL'
674
     Generate "little endian" format output.
675
 
676
`-mips1'
677
`-mips2'
678
`-mips3'
679
`-mips4'
680
`-mips5'
681
`-mips32'
682
`-mips32r2'
683
`-mips64'
684
`-mips64r2'
685
     Generate code for a particular MIPS Instruction Set Architecture
686
     level.  `-mips1' is an alias for `-march=r3000', `-mips2' is an
687
     alias for `-march=r6000', `-mips3' is an alias for `-march=r4000'
688
     and `-mips4' is an alias for `-march=r8000'.  `-mips5', `-mips32',
689
     `-mips32r2', `-mips64', and `-mips64r2' correspond to generic
690
     `MIPS V', `MIPS32', `MIPS32 Release 2', `MIPS64', and `MIPS64
691
     Release 2' ISA processors, respectively.
692
 
693
`-march=CPU'
694
     Generate code for a particular MIPS cpu.
695
 
696
`-mtune=CPU'
697
     Schedule and tune for a particular MIPS cpu.
698
 
699
`-mfix7000'
700
`-mno-fix7000'
701
     Cause nops to be inserted if the read of the destination register
702
     of an mfhi or mflo instruction occurs in the following two
703
     instructions.
704
 
705
`-mdebug'
706
`-no-mdebug'
707
     Cause stabs-style debugging output to go into an ECOFF-style
708
     .mdebug section instead of the standard ELF .stabs sections.
709
 
710
`-mpdr'
711
`-mno-pdr'
712
     Control generation of `.pdr' sections.
713
 
714
`-mgp32'
715
`-mfp32'
716
     The register sizes are normally inferred from the ISA and ABI, but
717
     these flags force a certain group of registers to be treated as 32
718
     bits wide at all times.  `-mgp32' controls the size of
719
     general-purpose registers and `-mfp32' controls the size of
720
     floating-point registers.
721
 
722
`-mips16'
723
`-no-mips16'
724
     Generate code for the MIPS 16 processor.  This is equivalent to
725
     putting `.set mips16' at the start of the assembly file.
726
     `-no-mips16' turns off this option.
727
 
728
`-msmartmips'
729
`-mno-smartmips'
730
     Enables the SmartMIPS extension to the MIPS32 instruction set.
731
     This is equivalent to putting `.set smartmips' at the start of the
732
     assembly file.  `-mno-smartmips' turns off this option.
733
 
734
`-mips3d'
735
`-no-mips3d'
736
     Generate code for the MIPS-3D Application Specific Extension.
737
     This tells the assembler to accept MIPS-3D instructions.
738
     `-no-mips3d' turns off this option.
739
 
740
`-mdmx'
741
`-no-mdmx'
742
     Generate code for the MDMX Application Specific Extension.  This
743
     tells the assembler to accept MDMX instructions.  `-no-mdmx' turns
744
     off this option.
745
 
746
`-mdsp'
747
`-mno-dsp'
748
     Generate code for the DSP Release 1 Application Specific Extension.
749
     This tells the assembler to accept DSP Release 1 instructions.
750
     `-mno-dsp' turns off this option.
751
 
752
`-mdspr2'
753
`-mno-dspr2'
754
     Generate code for the DSP Release 2 Application Specific Extension.
755
     This option implies -mdsp.  This tells the assembler to accept DSP
756
     Release 2 instructions.  `-mno-dspr2' turns off this option.
757
 
758
`-mmt'
759
`-mno-mt'
760
     Generate code for the MT Application Specific Extension.  This
761
     tells the assembler to accept MT instructions.  `-mno-mt' turns
762
     off this option.
763
 
764
`--construct-floats'
765
`--no-construct-floats'
766
     The `--no-construct-floats' option disables the construction of
767
     double width floating point constants by loading the two halves of
768
     the value into the two single width floating point registers that
769
     make up the double width register.  By default
770
     `--construct-floats' is selected, allowing construction of these
771
     floating point constants.
772
 
773
`--emulation=NAME'
774
     This option causes `as' to emulate `as' configured for some other
775
     target, in all respects, including output format (choosing between
776
     ELF and ECOFF only), handling of pseudo-opcodes which may generate
777
     debugging information or store symbol table information, and
778
     default endianness.  The available configuration names are:
779
     `mipsecoff', `mipself', `mipslecoff', `mipsbecoff', `mipslelf',
780
     `mipsbelf'.  The first two do not alter the default endianness
781
     from that of the primary target for which the assembler was
782
     configured; the others change the default to little- or big-endian
783
     as indicated by the `b' or `l' in the name.  Using `-EB' or `-EL'
784
     will override the endianness selection in any case.
785
 
786
     This option is currently supported only when the primary target
787
     `as' is configured for is a MIPS ELF or ECOFF target.
788
     Furthermore, the primary target or others specified with
789
     `--enable-targets=...' at configuration time must include support
790
     for the other format, if both are to be available.  For example,
791
     the Irix 5 configuration includes support for both.
792
 
793
     Eventually, this option will support more configurations, with more
794
     fine-grained control over the assembler's behavior, and will be
795
     supported for more processors.
796
 
797
`-nocpp'
798
     `as' ignores this option.  It is accepted for compatibility with
799
     the native tools.
800
 
801
`--trap'
802
`--no-trap'
803
`--break'
804
`--no-break'
805
     Control how to deal with multiplication overflow and division by
806
     zero.  `--trap' or `--no-break' (which are synonyms) take a trap
807
     exception (and only work for Instruction Set Architecture level 2
808
     and higher); `--break' or `--no-trap' (also synonyms, and the
809
     default) take a break exception.
810
 
811
`-n'
812
     When this option is used, `as' will issue a warning every time it
813
     generates a nop instruction from a macro.
814
 
815
   The following options are available when as is configured for an
816
MCore processor.
817
 
818
`-jsri2bsr'
819
`-nojsri2bsr'
820
     Enable or disable the JSRI to BSR transformation.  By default this
821
     is enabled.  The command line option `-nojsri2bsr' can be used to
822
     disable it.
823
 
824
`-sifilter'
825
`-nosifilter'
826
     Enable or disable the silicon filter behaviour.  By default this
827
     is disabled.  The default can be overridden by the `-sifilter'
828
     command line option.
829
 
830
`-relax'
831
     Alter jump instructions for long displacements.
832
 
833
`-mcpu=[210|340]'
834
     Select the cpu type on the target hardware.  This controls which
835
     instructions can be assembled.
836
 
837
`-EB'
838
     Assemble for a big endian target.
839
 
840
`-EL'
841
     Assemble for a little endian target.
842
 
843
 
844
   See the info pages for documentation of the MMIX-specific options.
845
 
846
   The following options are available when as is configured for an
847
Xtensa processor.
848
 
849
`--text-section-literals | --no-text-section-literals'
850
     With `--text-section-literals', literal pools are interspersed in
851
     the text section.  The default is `--no-text-section-literals',
852
     which places literals in a separate section in the output file.
853
     These options only affect literals referenced via PC-relative
854
     `L32R' instructions; literals for absolute mode `L32R'
855
     instructions are handled separately.
856
 
857
`--absolute-literals | --no-absolute-literals'
858
     Indicate to the assembler whether `L32R' instructions use absolute
859
     or PC-relative addressing.  The default is to assume absolute
860
     addressing if the Xtensa processor includes the absolute `L32R'
861
     addressing option.  Otherwise, only the PC-relative `L32R' mode
862
     can be used.
863
 
864
`--target-align | --no-target-align'
865
     Enable or disable automatic alignment to reduce branch penalties
866
     at the expense of some code density.  The default is
867
     `--target-align'.
868
 
869
`--longcalls | --no-longcalls'
870
     Enable or disable transformation of call instructions to allow
871
     calls across a greater range of addresses.  The default is
872
     `--no-longcalls'.
873
 
874
`--transform | --no-transform'
875
     Enable or disable all assembler transformations of Xtensa
876
     instructions.  The default is `--transform'; `--no-transform'
877
     should be used only in the rare cases when the instructions must
878
     be exactly as specified in the assembly source.
879
 
880
`--rename-section OLDNAME=NEWNAME'
881
     When generating output sections, rename the OLDNAME section to
882
     NEWNAME.
883
 
884
   The following options are available when as is configured for a Z80
885
family processor.
886
`-z80'
887
     Assemble for Z80 processor.
888
 
889
`-r800'
890
     Assemble for R800 processor.
891
 
892
`-ignore-undocumented-instructions'
893
`-Wnud'
894
     Assemble undocumented Z80 instructions that also work on R800
895
     without warning.
896
 
897
`-ignore-unportable-instructions'
898
`-Wnup'
899
     Assemble all undocumented Z80 instructions without warning.
900
 
901
`-warn-undocumented-instructions'
902
`-Wud'
903
     Issue a warning for undocumented Z80 instructions that also work
904
     on R800.
905
 
906
`-warn-unportable-instructions'
907
`-Wup'
908
     Issue a warning for undocumented Z80 instructions that do not work
909
     on R800.
910
 
911
`-forbid-undocumented-instructions'
912
`-Fud'
913
     Treat all undocumented instructions as errors.
914
 
915
`-forbid-unportable-instructions'
916
`-Fup'
917
     Treat undocumented Z80 instructions that do not work on R800 as
918
     errors.
919
 
920
* Menu:
921
 
922
* Manual::                      Structure of this Manual
923
* GNU Assembler::               The GNU Assembler
924
* Object Formats::              Object File Formats
925
* Command Line::                Command Line
926
* Input Files::                 Input Files
927
* Object::                      Output (Object) File
928
* Errors::                      Error and Warning Messages
929
 
930

931
File: as.info,  Node: Manual,  Next: GNU Assembler,  Up: Overview
932
 
933
1.1 Structure of this Manual
934
============================
935
 
936
This manual is intended to describe what you need to know to use GNU
937
`as'.  We cover the syntax expected in source files, including notation
938
for symbols, constants, and expressions; the directives that `as'
939
understands; and of course how to invoke `as'.
940
 
941
   This manual also describes some of the machine-dependent features of
942
various flavors of the assembler.
943
 
944
   On the other hand, this manual is _not_ intended as an introduction
945
to programming in assembly language--let alone programming in general!
946
In a similar vein, we make no attempt to introduce the machine
947
architecture; we do _not_ describe the instruction set, standard
948
mnemonics, registers or addressing modes that are standard to a
949
particular architecture.  You may want to consult the manufacturer's
950
machine architecture manual for this information.
951
 
952

953
File: as.info,  Node: GNU Assembler,  Next: Object Formats,  Prev: Manual,  Up: Overview
954
 
955
1.2 The GNU Assembler
956
=====================
957
 
958
GNU `as' is really a family of assemblers.  If you use (or have used)
959
the GNU assembler on one architecture, you should find a fairly similar
960
environment when you use it on another architecture.  Each version has
961
much in common with the others, including object file formats, most
962
assembler directives (often called "pseudo-ops") and assembler syntax.
963
 
964
   `as' is primarily intended to assemble the output of the GNU C
965
compiler `gcc' for use by the linker `ld'.  Nevertheless, we've tried
966
to make `as' assemble correctly everything that other assemblers for
967
the same machine would assemble.  Any exceptions are documented
968
explicitly (*note Machine Dependencies::).  This doesn't mean `as'
969
always uses the same syntax as another assembler for the same
970
architecture; for example, we know of several incompatible versions of
971
680x0 assembly language syntax.
972
 
973
   Unlike older assemblers, `as' is designed to assemble a source
974
program in one pass of the source file.  This has a subtle impact on the
975
`.org' directive (*note `.org': Org.).
976
 
977

978
File: as.info,  Node: Object Formats,  Next: Command Line,  Prev: GNU Assembler,  Up: Overview
979
 
980
1.3 Object File Formats
981
=======================
982
 
983
The GNU assembler can be configured to produce several alternative
984
object file formats.  For the most part, this does not affect how you
985
write assembly language programs; but directives for debugging symbols
986
are typically different in different file formats.  *Note Symbol
987
Attributes: Symbol Attributes.
988
 
989

990
File: as.info,  Node: Command Line,  Next: Input Files,  Prev: Object Formats,  Up: Overview
991
 
992
1.4 Command Line
993
================
994
 
995
After the program name `as', the command line may contain options and
996
file names.  Options may appear in any order, and may be before, after,
997
or between file names.  The order of file names is significant.
998
 
999
   `--' (two hyphens) by itself names the standard input file
1000
explicitly, as one of the files for `as' to assemble.
1001
 
1002
   Except for `--' any command line argument that begins with a hyphen
1003
(`-') is an option.  Each option changes the behavior of `as'.  No
1004
option changes the way another option works.  An option is a `-'
1005
followed by one or more letters; the case of the letter is important.
1006
All options are optional.
1007
 
1008
   Some options expect exactly one file name to follow them.  The file
1009
name may either immediately follow the option's letter (compatible with
1010
older assemblers) or it may be the next command argument (GNU
1011
standard).  These two command lines are equivalent:
1012
 
1013
     as -o my-object-file.o mumble.s
1014
     as -omy-object-file.o mumble.s
1015
 
1016

1017
File: as.info,  Node: Input Files,  Next: Object,  Prev: Command Line,  Up: Overview
1018
 
1019
1.5 Input Files
1020
===============
1021
 
1022
We use the phrase "source program", abbreviated "source", to describe
1023
the program input to one run of `as'.  The program may be in one or
1024
more files; how the source is partitioned into files doesn't change the
1025
meaning of the source.
1026
 
1027
   The source program is a concatenation of the text in all the files,
1028
in the order specified.
1029
 
1030
   Each time you run `as' it assembles exactly one source program.  The
1031
source program is made up of one or more files.  (The standard input is
1032
also a file.)
1033
 
1034
   You give `as' a command line that has zero or more input file names.
1035
The input files are read (from left file name to right).  A command
1036
line argument (in any position) that has no special meaning is taken to
1037
be an input file name.
1038
 
1039
   If you give `as' no file names it attempts to read one input file
1040
from the `as' standard input, which is normally your terminal.  You may
1041
have to type  to tell `as' there is no more program to assemble.
1042
 
1043
   Use `--' if you need to explicitly name the standard input file in
1044
your command line.
1045
 
1046
   If the source is empty, `as' produces a small, empty object file.
1047
 
1048
Filenames and Line-numbers
1049
--------------------------
1050
 
1051
There are two ways of locating a line in the input file (or files) and
1052
either may be used in reporting error messages.  One way refers to a
1053
line number in a physical file; the other refers to a line number in a
1054
"logical" file.  *Note Error and Warning Messages: Errors.
1055
 
1056
   "Physical files" are those files named in the command line given to
1057
`as'.
1058
 
1059
   "Logical files" are simply names declared explicitly by assembler
1060
directives; they bear no relation to physical files.  Logical file
1061
names help error messages reflect the original source file, when `as'
1062
source is itself synthesized from other files.  `as' understands the
1063
`#' directives emitted by the `gcc' preprocessor.  See also *Note
1064
`.file': File.
1065
 
1066

1067
File: as.info,  Node: Object,  Next: Errors,  Prev: Input Files,  Up: Overview
1068
 
1069
1.6 Output (Object) File
1070
========================
1071
 
1072
Every time you run `as' it produces an output file, which is your
1073
assembly language program translated into numbers.  This file is the
1074
object file.  Its default name is `a.out'.  You can give it another
1075
name by using the `-o' option.  Conventionally, object file names end
1076
with `.o'.  The default name is used for historical reasons: older
1077
assemblers were capable of assembling self-contained programs directly
1078
into a runnable program.  (For some formats, this isn't currently
1079
possible, but it can be done for the `a.out' format.)
1080
 
1081
   The object file is meant for input to the linker `ld'.  It contains
1082
assembled program code, information to help `ld' integrate the
1083
assembled program into a runnable file, and (optionally) symbolic
1084
information for the debugger.
1085
 
1086

1087
File: as.info,  Node: Errors,  Prev: Object,  Up: Overview
1088
 
1089
1.7 Error and Warning Messages
1090
==============================
1091
 
1092
`as' may write warnings and error messages to the standard error file
1093
(usually your terminal).  This should not happen when  a compiler runs
1094
`as' automatically.  Warnings report an assumption made so that `as'
1095
could keep assembling a flawed program; errors report a grave problem
1096
that stops the assembly.
1097
 
1098
   Warning messages have the format
1099
 
1100
     file_name:NNN:Warning Message Text
1101
 
1102
(where NNN is a line number).  If a logical file name has been given
1103
(*note `.file': File.) it is used for the filename, otherwise the name
1104
of the current input file is used.  If a logical line number was given
1105
(*note `.line': Line.)  then it is used to calculate the number printed,
1106
otherwise the actual line in the current source file is printed.  The
1107
message text is intended to be self explanatory (in the grand Unix
1108
tradition).
1109
 
1110
   Error messages have the format
1111
     file_name:NNN:FATAL:Error Message Text
1112
   The file name and line number are derived as for warning messages.
1113
The actual message text may be rather less explanatory because many of
1114
them aren't supposed to happen.
1115
 
1116

1117
File: as.info,  Node: Invoking,  Next: Syntax,  Prev: Overview,  Up: Top
1118
 
1119
2 Command-Line Options
1120
**********************
1121
 
1122
This chapter describes command-line options available in _all_ versions
1123
of the GNU assembler; see *Note Machine Dependencies::, for options
1124
specific to particular machine architectures.
1125
 
1126
   If you are invoking `as' via the GNU C compiler, you can use the
1127
`-Wa' option to pass arguments through to the assembler.  The assembler
1128
arguments must be separated from each other (and the `-Wa') by commas.
1129
For example:
1130
 
1131
     gcc -c -g -O -Wa,-alh,-L file.c
1132
 
1133
This passes two options to the assembler: `-alh' (emit a listing to
1134
standard output with high-level and assembly source) and `-L' (retain
1135
local symbols in the symbol table).
1136
 
1137
   Usually you do not need to use this `-Wa' mechanism, since many
1138
compiler command-line options are automatically passed to the assembler
1139
by the compiler.  (You can call the GNU compiler driver with the `-v'
1140
option to see precisely what options it passes to each compilation
1141
pass, including the assembler.)
1142
 
1143
* Menu:
1144
 
1145
* a::             -a[cdghlns] enable listings
1146
* alternate::     --alternate enable alternate macro syntax
1147
* D::             -D for compatibility
1148
* f::             -f to work faster
1149
* I::             -I for .include search path
1150
 
1151
* K::             -K for difference tables
1152
 
1153
* L::             -L to retain local symbols
1154
* listing::       --listing-XXX to configure listing output
1155
* M::             -M or --mri to assemble in MRI compatibility mode
1156
* MD::            --MD for dependency tracking
1157
* o::             -o to name the object file
1158
* R::             -R to join data and text sections
1159
* statistics::    --statistics to see statistics about assembly
1160
* traditional-format:: --traditional-format for compatible output
1161
* v::             -v to announce version
1162
* W::             -W, --no-warn, --warn, --fatal-warnings to control warnings
1163
* Z::             -Z to make object file even after errors
1164
 
1165

1166
File: as.info,  Node: a,  Next: alternate,  Up: Invoking
1167
 
1168
2.1 Enable Listings: `-a[cdghlns]'
1169
==================================
1170
 
1171
These options enable listing output from the assembler.  By itself,
1172
`-a' requests high-level, assembly, and symbols listing.  You can use
1173
other letters to select specific options for the list: `-ah' requests a
1174
high-level language listing, `-al' requests an output-program assembly
1175
listing, and `-as' requests a symbol table listing.  High-level
1176
listings require that a compiler debugging option like `-g' be used,
1177
and that assembly listings (`-al') be requested also.
1178
 
1179
   Use the `-ag' option to print a first section with general assembly
1180
information, like as version, switches passed, or time stamp.
1181
 
1182
   Use the `-ac' option to omit false conditionals from a listing.  Any
1183
lines which are not assembled because of a false `.if' (or `.ifdef', or
1184
any other conditional), or a true `.if' followed by an `.else', will be
1185
omitted from the listing.
1186
 
1187
   Use the `-ad' option to omit debugging directives from the listing.
1188
 
1189
   Once you have specified one of these options, you can further control
1190
listing output and its appearance using the directives `.list',
1191
`.nolist', `.psize', `.eject', `.title', and `.sbttl'.  The `-an'
1192
option turns off all forms processing.  If you do not request listing
1193
output with one of the `-a' options, the listing-control directives
1194
have no effect.
1195
 
1196
   The letters after `-a' may be combined into one option, _e.g._,
1197
`-aln'.
1198
 
1199
   Note if the assembler source is coming from the standard input (e.g.,
1200
because it is being created by `gcc' and the `-pipe' command line switch
1201
is being used) then the listing will not contain any comments or
1202
preprocessor directives.  This is because the listing code buffers
1203
input source lines from stdin only after they have been preprocessed by
1204
the assembler.  This reduces memory usage and makes the code more
1205
efficient.
1206
 
1207

1208
File: as.info,  Node: alternate,  Next: D,  Prev: a,  Up: Invoking
1209
 
1210
2.2 `--alternate'
1211
=================
1212
 
1213
Begin in alternate macro mode, see *Note `.altmacro': Altmacro.
1214
 
1215

1216
File: as.info,  Node: D,  Next: f,  Prev: alternate,  Up: Invoking
1217
 
1218
2.3 `-D'
1219
========
1220
 
1221
This option has no effect whatsoever, but it is accepted to make it more
1222
likely that scripts written for other assemblers also work with `as'.
1223
 
1224

1225
File: as.info,  Node: f,  Next: I,  Prev: D,  Up: Invoking
1226
 
1227
2.4 Work Faster: `-f'
1228
=====================
1229
 
1230
`-f' should only be used when assembling programs written by a
1231
(trusted) compiler.  `-f' stops the assembler from doing whitespace and
1232
comment preprocessing on the input file(s) before assembling them.
1233
*Note Preprocessing: Preprocessing.
1234
 
1235
     _Warning:_ if you use `-f' when the files actually need to be
1236
     preprocessed (if they contain comments, for example), `as' does
1237
     not work correctly.
1238
 
1239

1240
File: as.info,  Node: I,  Next: K,  Prev: f,  Up: Invoking
1241
 
1242
2.5 `.include' Search Path: `-I' PATH
1243
=====================================
1244
 
1245
Use this option to add a PATH to the list of directories `as' searches
1246
for files specified in `.include' directives (*note `.include':
1247
Include.).  You may use `-I' as many times as necessary to include a
1248
variety of paths.  The current working directory is always searched
1249
first; after that, `as' searches any `-I' directories in the same order
1250
as they were specified (left to right) on the command line.
1251
 
1252

1253
File: as.info,  Node: K,  Next: L,  Prev: I,  Up: Invoking
1254
 
1255
2.6 Difference Tables: `-K'
1256
===========================
1257
 
1258
`as' sometimes alters the code emitted for directives of the form
1259
`.word SYM1-SYM2'.  *Note `.word': Word.  You can use the `-K' option
1260
if you want a warning issued when this is done.
1261
 
1262

1263
File: as.info,  Node: L,  Next: listing,  Prev: K,  Up: Invoking
1264
 
1265
2.7 Include Local Symbols: `-L'
1266
===============================
1267
 
1268
Symbols beginning with system-specific local label prefixes, typically
1269
`.L' for ELF systems or `L' for traditional a.out systems, are called
1270
"local symbols".  *Note Symbol Names::.  Normally you do not see such
1271
symbols when debugging, because they are intended for the use of
1272
programs (like compilers) that compose assembler programs, not for your
1273
notice.  Normally both `as' and `ld' discard such symbols, so you do
1274
not normally debug with them.
1275
 
1276
   This option tells `as' to retain those local symbols in the object
1277
file.  Usually if you do this you also tell the linker `ld' to preserve
1278
those symbols.
1279
 
1280

1281
File: as.info,  Node: listing,  Next: M,  Prev: L,  Up: Invoking
1282
 
1283
2.8 Configuring listing output: `--listing'
1284
===========================================
1285
 
1286
The listing feature of the assembler can be enabled via the command
1287
line switch `-a' (*note a::).  This feature combines the input source
1288
file(s) with a hex dump of the corresponding locations in the output
1289
object file, and displays them as a listing file.  The format of this
1290
listing can be controlled by directives inside the assembler source
1291
(i.e., `.list' (*note List::), `.title' (*note Title::), `.sbttl'
1292
(*note Sbttl::), `.psize' (*note Psize::), and `.eject' (*note Eject::)
1293
and also by the following switches:
1294
 
1295
`--listing-lhs-width=`number''
1296
     Sets the maximum width, in words, of the first line of the hex
1297
     byte dump.  This dump appears on the left hand side of the listing
1298
     output.
1299
 
1300
`--listing-lhs-width2=`number''
1301
     Sets the maximum width, in words, of any further lines of the hex
1302
     byte dump for a given input source line.  If this value is not
1303
     specified, it defaults to being the same as the value specified
1304
     for `--listing-lhs-width'.  If neither switch is used the default
1305
     is to one.
1306
 
1307
`--listing-rhs-width=`number''
1308
     Sets the maximum width, in characters, of the source line that is
1309
     displayed alongside the hex dump.  The default value for this
1310
     parameter is 100.  The source line is displayed on the right hand
1311
     side of the listing output.
1312
 
1313
`--listing-cont-lines=`number''
1314
     Sets the maximum number of continuation lines of hex dump that
1315
     will be displayed for a given single line of source input.  The
1316
     default value is 4.
1317
 
1318

1319
File: as.info,  Node: M,  Next: MD,  Prev: listing,  Up: Invoking
1320
 
1321
2.9 Assemble in MRI Compatibility Mode: `-M'
1322
============================================
1323
 
1324
The `-M' or `--mri' option selects MRI compatibility mode.  This
1325
changes the syntax and pseudo-op handling of `as' to make it compatible
1326
with the `ASM68K' or the `ASM960' (depending upon the configured
1327
target) assembler from Microtec Research.  The exact nature of the MRI
1328
syntax will not be documented here; see the MRI manuals for more
1329
information.  Note in particular that the handling of macros and macro
1330
arguments is somewhat different.  The purpose of this option is to
1331
permit assembling existing MRI assembler code using `as'.
1332
 
1333
   The MRI compatibility is not complete.  Certain operations of the
1334
MRI assembler depend upon its object file format, and can not be
1335
supported using other object file formats.  Supporting these would
1336
require enhancing each object file format individually.  These are:
1337
 
1338
   * global symbols in common section
1339
 
1340
     The m68k MRI assembler supports common sections which are merged
1341
     by the linker.  Other object file formats do not support this.
1342
     `as' handles common sections by treating them as a single common
1343
     symbol.  It permits local symbols to be defined within a common
1344
     section, but it can not support global symbols, since it has no
1345
     way to describe them.
1346
 
1347
   * complex relocations
1348
 
1349
     The MRI assemblers support relocations against a negated section
1350
     address, and relocations which combine the start addresses of two
1351
     or more sections.  These are not support by other object file
1352
     formats.
1353
 
1354
   * `END' pseudo-op specifying start address
1355
 
1356
     The MRI `END' pseudo-op permits the specification of a start
1357
     address.  This is not supported by other object file formats.  The
1358
     start address may instead be specified using the `-e' option to
1359
     the linker, or in a linker script.
1360
 
1361
   * `IDNT', `.ident' and `NAME' pseudo-ops
1362
 
1363
     The MRI `IDNT', `.ident' and `NAME' pseudo-ops assign a module
1364
     name to the output file.  This is not supported by other object
1365
     file formats.
1366
 
1367
   * `ORG' pseudo-op
1368
 
1369
     The m68k MRI `ORG' pseudo-op begins an absolute section at a given
1370
     address.  This differs from the usual `as' `.org' pseudo-op, which
1371
     changes the location within the current section.  Absolute
1372
     sections are not supported by other object file formats.  The
1373
     address of a section may be assigned within a linker script.
1374
 
1375
   There are some other features of the MRI assembler which are not
1376
supported by `as', typically either because they are difficult or
1377
because they seem of little consequence.  Some of these may be
1378
supported in future releases.
1379
 
1380
   * EBCDIC strings
1381
 
1382
     EBCDIC strings are not supported.
1383
 
1384
   * packed binary coded decimal
1385
 
1386
     Packed binary coded decimal is not supported.  This means that the
1387
     `DC.P' and `DCB.P' pseudo-ops are not supported.
1388
 
1389
   * `FEQU' pseudo-op
1390
 
1391
     The m68k `FEQU' pseudo-op is not supported.
1392
 
1393
   * `NOOBJ' pseudo-op
1394
 
1395
     The m68k `NOOBJ' pseudo-op is not supported.
1396
 
1397
   * `OPT' branch control options
1398
 
1399
     The m68k `OPT' branch control options--`B', `BRS', `BRB', `BRL',
1400
     and `BRW'--are ignored.  `as' automatically relaxes all branches,
1401
     whether forward or backward, to an appropriate size, so these
1402
     options serve no purpose.
1403
 
1404
   * `OPT' list control options
1405
 
1406
     The following m68k `OPT' list control options are ignored: `C',
1407
     `CEX', `CL', `CRE', `E', `G', `I', `M', `MEX', `MC', `MD', `X'.
1408
 
1409
   * other `OPT' options
1410
 
1411
     The following m68k `OPT' options are ignored: `NEST', `O', `OLD',
1412
     `OP', `P', `PCO', `PCR', `PCS', `R'.
1413
 
1414
   * `OPT' `D' option is default
1415
 
1416
     The m68k `OPT' `D' option is the default, unlike the MRI assembler.
1417
     `OPT NOD' may be used to turn it off.
1418
 
1419
   * `XREF' pseudo-op.
1420
 
1421
     The m68k `XREF' pseudo-op is ignored.
1422
 
1423
   * `.debug' pseudo-op
1424
 
1425
     The i960 `.debug' pseudo-op is not supported.
1426
 
1427
   * `.extended' pseudo-op
1428
 
1429
     The i960 `.extended' pseudo-op is not supported.
1430
 
1431
   * `.list' pseudo-op.
1432
 
1433
     The various options of the i960 `.list' pseudo-op are not
1434
     supported.
1435
 
1436
   * `.optimize' pseudo-op
1437
 
1438
     The i960 `.optimize' pseudo-op is not supported.
1439
 
1440
   * `.output' pseudo-op
1441
 
1442
     The i960 `.output' pseudo-op is not supported.
1443
 
1444
   * `.setreal' pseudo-op
1445
 
1446
     The i960 `.setreal' pseudo-op is not supported.
1447
 
1448
 
1449

1450
File: as.info,  Node: MD,  Next: o,  Prev: M,  Up: Invoking
1451
 
1452
2.10 Dependency Tracking: `--MD'
1453
================================
1454
 
1455
`as' can generate a dependency file for the file it creates.  This file
1456
consists of a single rule suitable for `make' describing the
1457
dependencies of the main source file.
1458
 
1459
   The rule is written to the file named in its argument.
1460
 
1461
   This feature is used in the automatic updating of makefiles.
1462
 
1463

1464
File: as.info,  Node: o,  Next: R,  Prev: MD,  Up: Invoking
1465
 
1466
2.11 Name the Object File: `-o'
1467
===============================
1468
 
1469
There is always one object file output when you run `as'.  By default
1470
it has the name `a.out' (or `b.out', for Intel 960 targets only).  You
1471
use this option (which takes exactly one filename) to give the object
1472
file a different name.
1473
 
1474
   Whatever the object file is called, `as' overwrites any existing
1475
file of the same name.
1476
 
1477

1478
File: as.info,  Node: R,  Next: statistics,  Prev: o,  Up: Invoking
1479
 
1480
2.12 Join Data and Text Sections: `-R'
1481
======================================
1482
 
1483
`-R' tells `as' to write the object file as if all data-section data
1484
lives in the text section.  This is only done at the very last moment:
1485
your binary data are the same, but data section parts are relocated
1486
differently.  The data section part of your object file is zero bytes
1487
long because all its bytes are appended to the text section.  (*Note
1488
Sections and Relocation: Sections.)
1489
 
1490
   When you specify `-R' it would be possible to generate shorter
1491
address displacements (because we do not have to cross between text and
1492
data section).  We refrain from doing this simply for compatibility with
1493
older versions of `as'.  In future, `-R' may work this way.
1494
 
1495
   When `as' is configured for COFF or ELF output, this option is only
1496
useful if you use sections named `.text' and `.data'.
1497
 
1498
   `-R' is not supported for any of the HPPA targets.  Using `-R'
1499
generates a warning from `as'.
1500
 
1501

1502
File: as.info,  Node: statistics,  Next: traditional-format,  Prev: R,  Up: Invoking
1503
 
1504
2.13 Display Assembly Statistics: `--statistics'
1505
================================================
1506
 
1507
Use `--statistics' to display two statistics about the resources used by
1508
`as': the maximum amount of space allocated during the assembly (in
1509
bytes), and the total execution time taken for the assembly (in CPU
1510
seconds).
1511
 
1512

1513
File: as.info,  Node: traditional-format,  Next: v,  Prev: statistics,  Up: Invoking
1514
 
1515
2.14 Compatible Output: `--traditional-format'
1516
==============================================
1517
 
1518
For some targets, the output of `as' is different in some ways from the
1519
output of some existing assembler.  This switch requests `as' to use
1520
the traditional format instead.
1521
 
1522
   For example, it disables the exception frame optimizations which
1523
`as' normally does by default on `gcc' output.
1524
 
1525

1526
File: as.info,  Node: v,  Next: W,  Prev: traditional-format,  Up: Invoking
1527
 
1528
2.15 Announce Version: `-v'
1529
===========================
1530
 
1531
You can find out what version of as is running by including the option
1532
`-v' (which you can also spell as `-version') on the command line.
1533
 
1534

1535
File: as.info,  Node: W,  Next: Z,  Prev: v,  Up: Invoking
1536
 
1537
2.16 Control Warnings: `-W', `--warn', `--no-warn', `--fatal-warnings'
1538
======================================================================
1539
 
1540
`as' should never give a warning or error message when assembling
1541
compiler output.  But programs written by people often cause `as' to
1542
give a warning that a particular assumption was made.  All such
1543
warnings are directed to the standard error file.
1544
 
1545
   If you use the `-W' and `--no-warn' options, no warnings are issued.
1546
This only affects the warning messages: it does not change any
1547
particular of how `as' assembles your file.  Errors, which stop the
1548
assembly, are still reported.
1549
 
1550
   If you use the `--fatal-warnings' option, `as' considers files that
1551
generate warnings to be in error.
1552
 
1553
   You can switch these options off again by specifying `--warn', which
1554
causes warnings to be output as usual.
1555
 
1556

1557
File: as.info,  Node: Z,  Prev: W,  Up: Invoking
1558
 
1559
2.17 Generate Object File in Spite of Errors: `-Z'
1560
==================================================
1561
 
1562
After an error message, `as' normally produces no output.  If for some
1563
reason you are interested in object file output even after `as' gives
1564
an error message on your program, use the `-Z' option.  If there are
1565
any errors, `as' continues anyways, and writes an object file after a
1566
final warning message of the form `N errors, M warnings, generating bad
1567
object file.'
1568
 
1569

1570
File: as.info,  Node: Syntax,  Next: Sections,  Prev: Invoking,  Up: Top
1571
 
1572
3 Syntax
1573
********
1574
 
1575
This chapter describes the machine-independent syntax allowed in a
1576
source file.  `as' syntax is similar to what many other assemblers use;
1577
it is inspired by the BSD 4.2 assembler, except that `as' does not
1578
assemble Vax bit-fields.
1579
 
1580
* Menu:
1581
 
1582
* Preprocessing::              Preprocessing
1583
* Whitespace::                  Whitespace
1584
* Comments::                    Comments
1585
* Symbol Intro::                Symbols
1586
* Statements::                  Statements
1587
* Constants::                   Constants
1588
 
1589

1590
File: as.info,  Node: Preprocessing,  Next: Whitespace,  Up: Syntax
1591
 
1592
3.1 Preprocessing
1593
=================
1594
 
1595
The `as' internal preprocessor:
1596
   * adjusts and removes extra whitespace.  It leaves one space or tab
1597
     before the keywords on a line, and turns any other whitespace on
1598
     the line into a single space.
1599
 
1600
   * removes all comments, replacing them with a single space, or an
1601
     appropriate number of newlines.
1602
 
1603
   * converts character constants into the appropriate numeric values.
1604
 
1605
   It does not do macro processing, include file handling, or anything
1606
else you may get from your C compiler's preprocessor.  You can do
1607
include file processing with the `.include' directive (*note
1608
`.include': Include.).  You can use the GNU C compiler driver to get
1609
other "CPP" style preprocessing by giving the input file a `.S' suffix.
1610
*Note Options Controlling the Kind of Output: (gcc.info)Overall
1611
Options.
1612
 
1613
   Excess whitespace, comments, and character constants cannot be used
1614
in the portions of the input text that are not preprocessed.
1615
 
1616
   If the first line of an input file is `#NO_APP' or if you use the
1617
`-f' option, whitespace and comments are not removed from the input
1618
file.  Within an input file, you can ask for whitespace and comment
1619
removal in specific portions of the by putting a line that says `#APP'
1620
before the text that may contain whitespace or comments, and putting a
1621
line that says `#NO_APP' after this text.  This feature is mainly
1622
intend to support `asm' statements in compilers whose output is
1623
otherwise free of comments and whitespace.
1624
 
1625

1626
File: as.info,  Node: Whitespace,  Next: Comments,  Prev: Preprocessing,  Up: Syntax
1627
 
1628
3.2 Whitespace
1629
==============
1630
 
1631
"Whitespace" is one or more blanks or tabs, in any order.  Whitespace
1632
is used to separate symbols, and to make programs neater for people to
1633
read.  Unless within character constants (*note Character Constants:
1634
Characters.), any whitespace means the same as exactly one space.
1635
 
1636

1637
File: as.info,  Node: Comments,  Next: Symbol Intro,  Prev: Whitespace,  Up: Syntax
1638
 
1639
3.3 Comments
1640
============
1641
 
1642
There are two ways of rendering comments to `as'.  In both cases the
1643
comment is equivalent to one space.
1644
 
1645
   Anything from `/*' through the next `*/' is a comment.  This means
1646
you may not nest these comments.
1647
 
1648
     /*
1649
       The only way to include a newline ('\n') in a comment
1650
       is to use this sort of comment.
1651
     */
1652
 
1653
     /* This sort of comment does not nest. */
1654
 
1655
   Anything from the "line comment" character to the next newline is
1656
considered a comment and is ignored.  The line comment character is `;'
1657
on the ARC; `@' on the ARM; `;' for the H8/300 family; `;' for the HPPA;
1658
`#' on the i386 and x86-64; `#' on the i960; `;' for the PDP-11; `;'
1659
for picoJava; `#' for Motorola PowerPC; `!' for the Renesas / SuperH SH;
1660
`!' on the SPARC; `#' on the ip2k; `#' on the m32c; `#' on the m32r;
1661
`|' on the 680x0; `#' on the 68HC11 and 68HC12; `#' on the Vax; `;' for
1662
the Z80; `!' for the Z8000; `#' on the V850; `#' for Xtensa systems;
1663
see *Note Machine Dependencies::.
1664
 
1665
   On some machines there are two different line comment characters.
1666
One character only begins a comment if it is the first non-whitespace
1667
character on a line, while the other always begins a comment.
1668
 
1669
   The V850 assembler also supports a double dash as starting a comment
1670
that extends to the end of the line.
1671
 
1672
   `--';
1673
 
1674
   To be compatible with past assemblers, lines that begin with `#'
1675
have a special interpretation.  Following the `#' should be an absolute
1676
expression (*note Expressions::): the logical line number of the _next_
1677
line.  Then a string (*note Strings: Strings.) is allowed: if present
1678
it is a new logical file name.  The rest of the line, if any, should be
1679
whitespace.
1680
 
1681
   If the first non-whitespace characters on the line are not numeric,
1682
the line is ignored.  (Just like a comment.)
1683
 
1684
                               # This is an ordinary comment.
1685
     # 42-6 "new_file_name"    # New logical file name
1686
                               # This is logical line # 36.
1687
   This feature is deprecated, and may disappear from future versions
1688
of `as'.
1689
 
1690

1691
File: as.info,  Node: Symbol Intro,  Next: Statements,  Prev: Comments,  Up: Syntax
1692
 
1693
3.4 Symbols
1694
===========
1695
 
1696
A "symbol" is one or more characters chosen from the set of all letters
1697
(both upper and lower case), digits and the three characters `_.$'.  On
1698
most machines, you can also use `$' in symbol names; exceptions are
1699
noted in *Note Machine Dependencies::.  No symbol may begin with a
1700
digit.  Case is significant.  There is no length limit: all characters
1701
are significant.  Symbols are delimited by characters not in that set,
1702
or by the beginning of a file (since the source program must end with a
1703
newline, the end of a file is not a possible symbol delimiter).  *Note
1704
Symbols::.
1705
 
1706

1707
File: as.info,  Node: Statements,  Next: Constants,  Prev: Symbol Intro,  Up: Syntax
1708
 
1709
3.5 Statements
1710
==============
1711
 
1712
A "statement" ends at a newline character (`\n') or line separator
1713
character.  (The line separator is usually `;', unless this conflicts
1714
with the comment character; see *Note Machine Dependencies::.)  The
1715
newline or separator character is considered part of the preceding
1716
statement.  Newlines and separators within character constants are an
1717
exception: they do not end statements.
1718
 
1719
It is an error to end any statement with end-of-file:  the last
1720
character of any input file should be a newline.
1721
 
1722
   An empty statement is allowed, and may include whitespace.  It is
1723
ignored.
1724
 
1725
   A statement begins with zero or more labels, optionally followed by a
1726
key symbol which determines what kind of statement it is.  The key
1727
symbol determines the syntax of the rest of the statement.  If the
1728
symbol begins with a dot `.' then the statement is an assembler
1729
directive: typically valid for any computer.  If the symbol begins with
1730
a letter the statement is an assembly language "instruction": it
1731
assembles into a machine language instruction.  Different versions of
1732
`as' for different computers recognize different instructions.  In
1733
fact, the same symbol may represent a different instruction in a
1734
different computer's assembly language.
1735
 
1736
   A label is a symbol immediately followed by a colon (`:').
1737
Whitespace before a label or after a colon is permitted, but you may not
1738
have whitespace between a label's symbol and its colon. *Note Labels::.
1739
 
1740
   For HPPA targets, labels need not be immediately followed by a
1741
colon, but the definition of a label must begin in column zero.  This
1742
also implies that only one label may be defined on each line.
1743
 
1744
     label:     .directive    followed by something
1745
     another_label:           # This is an empty statement.
1746
                instruction   operand_1, operand_2, ...
1747
 
1748

1749
File: as.info,  Node: Constants,  Prev: Statements,  Up: Syntax
1750
 
1751
3.6 Constants
1752
=============
1753
 
1754
A constant is a number, written so that its value is known by
1755
inspection, without knowing any context.  Like this:
1756
     .byte  74, 0112, 092, 0x4A, 0X4a, 'J, '\J # All the same value.
1757
     .ascii "Ring the bell\7"                  # A string constant.
1758
     .octa  0x123456789abcdef0123456789ABCDEF0 # A bignum.
1759
     .float 0f-314159265358979323846264338327\
1760
     95028841971.693993751E-40                 # - pi, a flonum.
1761
 
1762
* Menu:
1763
 
1764
* Characters::                  Character Constants
1765
* Numbers::                     Number Constants
1766
 
1767

1768
File: as.info,  Node: Characters,  Next: Numbers,  Up: Constants
1769
 
1770
3.6.1 Character Constants
1771
-------------------------
1772
 
1773
There are two kinds of character constants.  A "character" stands for
1774
one character in one byte and its value may be used in numeric
1775
expressions.  String constants (properly called string _literals_) are
1776
potentially many bytes and their values may not be used in arithmetic
1777
expressions.
1778
 
1779
* Menu:
1780
 
1781
* Strings::                     Strings
1782
* Chars::                       Characters
1783
 
1784

1785
File: as.info,  Node: Strings,  Next: Chars,  Up: Characters
1786
 
1787
3.6.1.1 Strings
1788
...............
1789
 
1790
A "string" is written between double-quotes.  It may contain
1791
double-quotes or null characters.  The way to get special characters
1792
into a string is to "escape" these characters: precede them with a
1793
backslash `\' character.  For example `\\' represents one backslash:
1794
the first `\' is an escape which tells `as' to interpret the second
1795
character literally as a backslash (which prevents `as' from
1796
recognizing the second `\' as an escape character).  The complete list
1797
of escapes follows.
1798
 
1799
`\b'
1800
     Mnemonic for backspace; for ASCII this is octal code 010.
1801
 
1802
`\f'
1803
     Mnemonic for FormFeed; for ASCII this is octal code 014.
1804
 
1805
`\n'
1806
     Mnemonic for newline; for ASCII this is octal code 012.
1807
 
1808
`\r'
1809
     Mnemonic for carriage-Return; for ASCII this is octal code 015.
1810
 
1811
`\t'
1812
     Mnemonic for horizontal Tab; for ASCII this is octal code 011.
1813
 
1814
`\ DIGIT DIGIT DIGIT'
1815
     An octal character code.  The numeric code is 3 octal digits.  For
1816
     compatibility with other Unix systems, 8 and 9 are accepted as
1817
     digits: for example, `\008' has the value 010, and `\009' the
1818
     value 011.
1819
 
1820
`\`x' HEX-DIGITS...'
1821
     A hex character code.  All trailing hex digits are combined.
1822
     Either upper or lower case `x' works.
1823
 
1824
`\\'
1825
     Represents one `\' character.
1826
 
1827
`\"'
1828
     Represents one `"' character.  Needed in strings to represent this
1829
     character, because an unescaped `"' would end the string.
1830
 
1831
`\ ANYTHING-ELSE'
1832
     Any other character when escaped by `\' gives a warning, but
1833
     assembles as if the `\' was not present.  The idea is that if you
1834
     used an escape sequence you clearly didn't want the literal
1835
     interpretation of the following character.  However `as' has no
1836
     other interpretation, so `as' knows it is giving you the wrong
1837
     code and warns you of the fact.
1838
 
1839
   Which characters are escapable, and what those escapes represent,
1840
varies widely among assemblers.  The current set is what we think the
1841
BSD 4.2 assembler recognizes, and is a subset of what most C compilers
1842
recognize.  If you are in doubt, do not use an escape sequence.
1843
 
1844

1845
File: as.info,  Node: Chars,  Prev: Strings,  Up: Characters
1846
 
1847
3.6.1.2 Characters
1848
..................
1849
 
1850
A single character may be written as a single quote immediately
1851
followed by that character.  The same escapes apply to characters as to
1852
strings.  So if you want to write the character backslash, you must
1853
write `'\\' where the first `\' escapes the second `\'.  As you can
1854
see, the quote is an acute accent, not a grave accent.  A newline
1855
immediately following an acute accent is taken as a literal character
1856
and does not count as the end of a statement.  The value of a character
1857
constant in a numeric expression is the machine's byte-wide code for
1858
that character.  `as' assumes your character code is ASCII: `'A' means
1859
65, `'B' means 66, and so on.
1860
 
1861

1862
File: as.info,  Node: Numbers,  Prev: Characters,  Up: Constants
1863
 
1864
3.6.2 Number Constants
1865
----------------------
1866
 
1867
`as' distinguishes three kinds of numbers according to how they are
1868
stored in the target machine.  _Integers_ are numbers that would fit
1869
into an `int' in the C language.  _Bignums_ are integers, but they are
1870
stored in more than 32 bits.  _Flonums_ are floating point numbers,
1871
described below.
1872
 
1873
* Menu:
1874
 
1875
* Integers::                    Integers
1876
* Bignums::                     Bignums
1877
* Flonums::                     Flonums
1878
 
1879

1880
File: as.info,  Node: Integers,  Next: Bignums,  Up: Numbers
1881
 
1882
3.6.2.1 Integers
1883
................
1884
 
1885
A binary integer is `0b' or `0B' followed by zero or more of the binary
1886
digits `01'.
1887
 
1888
   An octal integer is `0' followed by zero or more of the octal digits
1889
(`01234567').
1890
 
1891
   A decimal integer starts with a non-zero digit followed by zero or
1892
more digits (`0123456789').
1893
 
1894
   A hexadecimal integer is `0x' or `0X' followed by one or more
1895
hexadecimal digits chosen from `0123456789abcdefABCDEF'.
1896
 
1897
   Integers have the usual values.  To denote a negative integer, use
1898
the prefix operator `-' discussed under expressions (*note Prefix
1899
Operators: Prefix Ops.).
1900
 
1901

1902
File: as.info,  Node: Bignums,  Next: Flonums,  Prev: Integers,  Up: Numbers
1903
 
1904
3.6.2.2 Bignums
1905
...............
1906
 
1907
A "bignum" has the same syntax and semantics as an integer except that
1908
the number (or its negative) takes more than 32 bits to represent in
1909
binary.  The distinction is made because in some places integers are
1910
permitted while bignums are not.
1911
 
1912

1913
File: as.info,  Node: Flonums,  Prev: Bignums,  Up: Numbers
1914
 
1915
3.6.2.3 Flonums
1916
...............
1917
 
1918
A "flonum" represents a floating point number.  The translation is
1919
indirect: a decimal floating point number from the text is converted by
1920
`as' to a generic binary floating point number of more than sufficient
1921
precision.  This generic floating point number is converted to a
1922
particular computer's floating point format (or formats) by a portion
1923
of `as' specialized to that computer.
1924
 
1925
   A flonum is written by writing (in order)
1926
   * The digit `0'.  (`0' is optional on the HPPA.)
1927
 
1928
   * A letter, to tell `as' the rest of the number is a flonum.  `e' is
1929
     recommended.  Case is not important.
1930
 
1931
     On the H8/300, Renesas / SuperH SH, and AMD 29K architectures, the
1932
     letter must be one of the letters `DFPRSX' (in upper or lower
1933
     case).
1934
 
1935
     On the ARC, the letter must be one of the letters `DFRS' (in upper
1936
     or lower case).
1937
 
1938
     On the Intel 960 architecture, the letter must be one of the
1939
     letters `DFT' (in upper or lower case).
1940
 
1941
     On the HPPA architecture, the letter must be `E' (upper case only).
1942
 
1943
   * An optional sign: either `+' or `-'.
1944
 
1945
   * An optional "integer part": zero or more decimal digits.
1946
 
1947
   * An optional "fractional part": `.' followed by zero or more
1948
     decimal digits.
1949
 
1950
   * An optional exponent, consisting of:
1951
 
1952
        * An `E' or `e'.
1953
 
1954
        * Optional sign: either `+' or `-'.
1955
 
1956
        * One or more decimal digits.
1957
 
1958
 
1959
   At least one of the integer part or the fractional part must be
1960
present.  The floating point number has the usual base-10 value.
1961
 
1962
   `as' does all processing using integers.  Flonums are computed
1963
independently of any floating point hardware in the computer running
1964
`as'.
1965
 
1966

1967
File: as.info,  Node: Sections,  Next: Symbols,  Prev: Syntax,  Up: Top
1968
 
1969
4 Sections and Relocation
1970
*************************
1971
 
1972
* Menu:
1973
 
1974
* Secs Background::             Background
1975
* Ld Sections::                 Linker Sections
1976
* As Sections::                 Assembler Internal Sections
1977
* Sub-Sections::                Sub-Sections
1978
* bss::                         bss Section
1979
 
1980

1981
File: as.info,  Node: Secs Background,  Next: Ld Sections,  Up: Sections
1982
 
1983
4.1 Background
1984
==============
1985
 
1986
Roughly, a section is a range of addresses, with no gaps; all data "in"
1987
those addresses is treated the same for some particular purpose.  For
1988
example there may be a "read only" section.
1989
 
1990
   The linker `ld' reads many object files (partial programs) and
1991
combines their contents to form a runnable program.  When `as' emits an
1992
object file, the partial program is assumed to start at address 0.
1993
`ld' assigns the final addresses for the partial program, so that
1994
different partial programs do not overlap.  This is actually an
1995
oversimplification, but it suffices to explain how `as' uses sections.
1996
 
1997
   `ld' moves blocks of bytes of your program to their run-time
1998
addresses.  These blocks slide to their run-time addresses as rigid
1999
units; their length does not change and neither does the order of bytes
2000
within them.  Such a rigid unit is called a _section_.  Assigning
2001
run-time addresses to sections is called "relocation".  It includes the
2002
task of adjusting mentions of object-file addresses so they refer to
2003
the proper run-time addresses.  For the H8/300, and for the Renesas /
2004
SuperH SH, `as' pads sections if needed to ensure they end on a word
2005
(sixteen bit) boundary.
2006
 
2007
   An object file written by `as' has at least three sections, any of
2008
which may be empty.  These are named "text", "data" and "bss" sections.
2009
 
2010
   When it generates COFF or ELF output, `as' can also generate
2011
whatever other named sections you specify using the `.section'
2012
directive (*note `.section': Section.).  If you do not use any
2013
directives that place output in the `.text' or `.data' sections, these
2014
sections still exist, but are empty.
2015
 
2016
   When `as' generates SOM or ELF output for the HPPA, `as' can also
2017
generate whatever other named sections you specify using the `.space'
2018
and `.subspace' directives.  See `HP9000 Series 800 Assembly Language
2019
Reference Manual' (HP 92432-90001) for details on the `.space' and
2020
`.subspace' assembler directives.
2021
 
2022
   Additionally, `as' uses different names for the standard text, data,
2023
and bss sections when generating SOM output.  Program text is placed
2024
into the `$CODE$' section, data into `$DATA$', and BSS into `$BSS$'.
2025
 
2026
   Within the object file, the text section starts at address `0', the
2027
data section follows, and the bss section follows the data section.
2028
 
2029
   When generating either SOM or ELF output files on the HPPA, the text
2030
section starts at address `0', the data section at address `0x4000000',
2031
and the bss section follows the data section.
2032
 
2033
   To let `ld' know which data changes when the sections are relocated,
2034
and how to change that data, `as' also writes to the object file
2035
details of the relocation needed.  To perform relocation `ld' must
2036
know, each time an address in the object file is mentioned:
2037
   * Where in the object file is the beginning of this reference to an
2038
     address?
2039
 
2040
   * How long (in bytes) is this reference?
2041
 
2042
   * Which section does the address refer to?  What is the numeric
2043
     value of
2044
          (ADDRESS) - (START-ADDRESS OF SECTION)?
2045
 
2046
   * Is the reference to an address "Program-Counter relative"?
2047
 
2048
   In fact, every address `as' ever uses is expressed as
2049
     (SECTION) + (OFFSET INTO SECTION)
2050
   Further, most expressions `as' computes have this section-relative
2051
nature.  (For some object formats, such as SOM for the HPPA, some
2052
expressions are symbol-relative instead.)
2053
 
2054
   In this manual we use the notation {SECNAME N} to mean "offset N
2055
into section SECNAME."
2056
 
2057
   Apart from text, data and bss sections you need to know about the
2058
"absolute" section.  When `ld' mixes partial programs, addresses in the
2059
absolute section remain unchanged.  For example, address `{absolute 0}'
2060
is "relocated" to run-time address 0 by `ld'.  Although the linker
2061
never arranges two partial programs' data sections with overlapping
2062
addresses after linking, _by definition_ their absolute sections must
2063
overlap.  Address `{absolute 239}' in one part of a program is always
2064
the same address when the program is running as address `{absolute
2065
239}' in any other part of the program.
2066
 
2067
   The idea of sections is extended to the "undefined" section.  Any
2068
address whose section is unknown at assembly time is by definition
2069
rendered {undefined U}--where U is filled in later.  Since numbers are
2070
always defined, the only way to generate an undefined address is to
2071
mention an undefined symbol.  A reference to a named common block would
2072
be such a symbol: its value is unknown at assembly time so it has
2073
section _undefined_.
2074
 
2075
   By analogy the word _section_ is used to describe groups of sections
2076
in the linked program.  `ld' puts all partial programs' text sections
2077
in contiguous addresses in the linked program.  It is customary to
2078
refer to the _text section_ of a program, meaning all the addresses of
2079
all partial programs' text sections.  Likewise for data and bss
2080
sections.
2081
 
2082
   Some sections are manipulated by `ld'; others are invented for use
2083
of `as' and have no meaning except during assembly.
2084
 
2085

2086
File: as.info,  Node: Ld Sections,  Next: As Sections,  Prev: Secs Background,  Up: Sections
2087
 
2088
4.2 Linker Sections
2089
===================
2090
 
2091
`ld' deals with just four kinds of sections, summarized below.
2092
 
2093
*named sections*
2094
*text section*
2095
*data section*
2096
     These sections hold your program.  `as' and `ld' treat them as
2097
     separate but equal sections.  Anything you can say of one section
2098
     is true of another.  When the program is running, however, it is
2099
     customary for the text section to be unalterable.  The text
2100
     section is often shared among processes: it contains instructions,
2101
     constants and the like.  The data section of a running program is
2102
     usually alterable: for example, C variables would be stored in the
2103
     data section.
2104
 
2105
*bss section*
2106
     This section contains zeroed bytes when your program begins
2107
     running.  It is used to hold uninitialized variables or common
2108
     storage.  The length of each partial program's bss section is
2109
     important, but because it starts out containing zeroed bytes there
2110
     is no need to store explicit zero bytes in the object file.  The
2111
     bss section was invented to eliminate those explicit zeros from
2112
     object files.
2113
 
2114
*absolute section*
2115
     Address 0 of this section is always "relocated" to runtime address
2116
     0.  This is useful if you want to refer to an address that `ld'
2117
     must not change when relocating.  In this sense we speak of
2118
     absolute addresses being "unrelocatable": they do not change
2119
     during relocation.
2120
 
2121
*undefined section*
2122
     This "section" is a catch-all for address references to objects
2123
     not in the preceding sections.
2124
 
2125
   An idealized example of three relocatable sections follows.  The
2126
example uses the traditional section names `.text' and `.data'.  Memory
2127
addresses are on the horizontal axis.
2128
 
2129
                           +-----+----+--+
2130
     partial program # 1:  |ttttt|dddd|00|
2131
                           +-----+----+--+
2132
 
2133
                           text   data bss
2134
                           seg.   seg. seg.
2135
 
2136
                           +---+---+---+
2137
     partial program # 2:  |TTT|DDD|000|
2138
                           +---+---+---+
2139
 
2140
                           +--+---+-----+--+----+---+-----+~~
2141
     linked program:       |  |TTT|ttttt|  |dddd|DDD|00000|
2142
                           +--+---+-----+--+----+---+-----+~~
2143
 
2144
         addresses:        0 ...
2145
 
2146

2147
File: as.info,  Node: As Sections,  Next: Sub-Sections,  Prev: Ld Sections,  Up: Sections
2148
 
2149
4.3 Assembler Internal Sections
2150
===============================
2151
 
2152
These sections are meant only for the internal use of `as'.  They have
2153
no meaning at run-time.  You do not really need to know about these
2154
sections for most purposes; but they can be mentioned in `as' warning
2155
messages, so it might be helpful to have an idea of their meanings to
2156
`as'.  These sections are used to permit the value of every expression
2157
in your assembly language program to be a section-relative address.
2158
 
2159
ASSEMBLER-INTERNAL-LOGIC-ERROR!
2160
     An internal assembler logic error has been found.  This means
2161
     there is a bug in the assembler.
2162
 
2163
expr section
2164
     The assembler stores complex expression internally as combinations
2165
     of symbols.  When it needs to represent an expression as a symbol,
2166
     it puts it in the expr section.
2167
 
2168

2169
File: as.info,  Node: Sub-Sections,  Next: bss,  Prev: As Sections,  Up: Sections
2170
 
2171
4.4 Sub-Sections
2172
================
2173
 
2174
Assembled bytes conventionally fall into two sections: text and data.
2175
You may have separate groups of data in named sections that you want to
2176
end up near to each other in the object file, even though they are not
2177
contiguous in the assembler source.  `as' allows you to use
2178
"subsections" for this purpose.  Within each section, there can be
2179
numbered subsections with values from 0 to 8192.  Objects assembled
2180
into the same subsection go into the object file together with other
2181
objects in the same subsection.  For example, a compiler might want to
2182
store constants in the text section, but might not want to have them
2183
interspersed with the program being assembled.  In this case, the
2184
compiler could issue a `.text 0' before each section of code being
2185
output, and a `.text 1' before each group of constants being output.
2186
 
2187
Subsections are optional.  If you do not use subsections, everything
2188
goes in subsection number zero.
2189
 
2190
   Each subsection is zero-padded up to a multiple of four bytes.
2191
(Subsections may be padded a different amount on different flavors of
2192
`as'.)
2193
 
2194
   Subsections appear in your object file in numeric order, lowest
2195
numbered to highest.  (All this to be compatible with other people's
2196
assemblers.)  The object file contains no representation of
2197
subsections; `ld' and other programs that manipulate object files see
2198
no trace of them.  They just see all your text subsections as a text
2199
section, and all your data subsections as a data section.
2200
 
2201
   To specify which subsection you want subsequent statements assembled
2202
into, use a numeric argument to specify it, in a `.text EXPRESSION' or
2203
a `.data EXPRESSION' statement.  When generating COFF output, you can
2204
also use an extra subsection argument with arbitrary named sections:
2205
`.section NAME, EXPRESSION'.  When generating ELF output, you can also
2206
use the `.subsection' directive (*note SubSection::) to specify a
2207
subsection: `.subsection EXPRESSION'.  EXPRESSION should be an absolute
2208
expression (*note Expressions::).  If you just say `.text' then `.text
2209
0' is assumed.  Likewise `.data' means `.data 0'.  Assembly begins in
2210
`text 0'.  For instance:
2211
     .text 0     # The default subsection is text 0 anyway.
2212
     .ascii "This lives in the first text subsection. *"
2213
     .text 1
2214
     .ascii "But this lives in the second text subsection."
2215
     .data 0
2216
     .ascii "This lives in the data section,"
2217
     .ascii "in the first data subsection."
2218
     .text 0
2219
     .ascii "This lives in the first text section,"
2220
     .ascii "immediately following the asterisk (*)."
2221
 
2222
   Each section has a "location counter" incremented by one for every
2223
byte assembled into that section.  Because subsections are merely a
2224
convenience restricted to `as' there is no concept of a subsection
2225
location counter.  There is no way to directly manipulate a location
2226
counter--but the `.align' directive changes it, and any label
2227
definition captures its current value.  The location counter of the
2228
section where statements are being assembled is said to be the "active"
2229
location counter.
2230
 
2231

2232
File: as.info,  Node: bss,  Prev: Sub-Sections,  Up: Sections
2233
 
2234
4.5 bss Section
2235
===============
2236
 
2237
The bss section is used for local common variable storage.  You may
2238
allocate address space in the bss section, but you may not dictate data
2239
to load into it before your program executes.  When your program starts
2240
running, all the contents of the bss section are zeroed bytes.
2241
 
2242
   The `.lcomm' pseudo-op defines a symbol in the bss section; see
2243
*Note `.lcomm': Lcomm.
2244
 
2245
   The `.comm' pseudo-op may be used to declare a common symbol, which
2246
is another form of uninitialized symbol; see *Note `.comm': Comm.
2247
 
2248
   When assembling for a target which supports multiple sections, such
2249
as ELF or COFF, you may switch into the `.bss' section and define
2250
symbols as usual; see *Note `.section': Section.  You may only assemble
2251
zero values into the section.  Typically the section will only contain
2252
symbol definitions and `.skip' directives (*note `.skip': Skip.).
2253
 
2254

2255
File: as.info,  Node: Symbols,  Next: Expressions,  Prev: Sections,  Up: Top
2256
 
2257
5 Symbols
2258
*********
2259
 
2260
Symbols are a central concept: the programmer uses symbols to name
2261
things, the linker uses symbols to link, and the debugger uses symbols
2262
to debug.
2263
 
2264
     _Warning:_ `as' does not place symbols in the object file in the
2265
     same order they were declared.  This may break some debuggers.
2266
 
2267
* Menu:
2268
 
2269
* Labels::                      Labels
2270
* Setting Symbols::             Giving Symbols Other Values
2271
* Symbol Names::                Symbol Names
2272
* Dot::                         The Special Dot Symbol
2273
* Symbol Attributes::           Symbol Attributes
2274
 
2275

2276
File: as.info,  Node: Labels,  Next: Setting Symbols,  Up: Symbols
2277
 
2278
5.1 Labels
2279
==========
2280
 
2281
A "label" is written as a symbol immediately followed by a colon `:'.
2282
The symbol then represents the current value of the active location
2283
counter, and is, for example, a suitable instruction operand.  You are
2284
warned if you use the same symbol to represent two different locations:
2285
the first definition overrides any other definitions.
2286
 
2287
   On the HPPA, the usual form for a label need not be immediately
2288
followed by a colon, but instead must start in column zero.  Only one
2289
label may be defined on a single line.  To work around this, the HPPA
2290
version of `as' also provides a special directive `.label' for defining
2291
labels more flexibly.
2292
 
2293

2294
File: as.info,  Node: Setting Symbols,  Next: Symbol Names,  Prev: Labels,  Up: Symbols
2295
 
2296
5.2 Giving Symbols Other Values
2297
===============================
2298
 
2299
A symbol can be given an arbitrary value by writing a symbol, followed
2300
by an equals sign `=', followed by an expression (*note Expressions::).
2301
This is equivalent to using the `.set' directive.  *Note `.set': Set.
2302
In the same way, using a double equals sign `='`=' here represents an
2303
equivalent of the `.eqv' directive.  *Note `.eqv': Eqv.
2304
 
2305

2306
File: as.info,  Node: Symbol Names,  Next: Dot,  Prev: Setting Symbols,  Up: Symbols
2307
 
2308
5.3 Symbol Names
2309
================
2310
 
2311
Symbol names begin with a letter or with one of `._'.  On most
2312
machines, you can also use `$' in symbol names; exceptions are noted in
2313
*Note Machine Dependencies::.  That character may be followed by any
2314
string of digits, letters, dollar signs (unless otherwise noted for a
2315
particular target machine), and underscores.
2316
 
2317
Case of letters is significant: `foo' is a different symbol name than
2318
`Foo'.
2319
 
2320
   Each symbol has exactly one name.  Each name in an assembly language
2321
program refers to exactly one symbol.  You may use that symbol name any
2322
number of times in a program.
2323
 
2324
Local Symbol Names
2325
------------------
2326
 
2327
A local symbol is any symbol beginning with certain local label
2328
prefixes.  By default, the local label prefix is `.L' for ELF systems or
2329
`L' for traditional a.out systems, but each target may have its own set
2330
of local label prefixes.  On the HPPA local symbols begin with `L$'.
2331
 
2332
   Local symbols are defined and used within the assembler, but they are
2333
normally not saved in object files.  Thus, they are not visible when
2334
debugging.  You may use the `-L' option (*note Include Local Symbols:
2335
`-L': L.) to retain the local symbols in the object files.
2336
 
2337
Local Labels
2338
------------
2339
 
2340
Local labels help compilers and programmers use names temporarily.
2341
They create symbols which are guaranteed to be unique over the entire
2342
scope of the input source code and which can be referred to by a simple
2343
notation.  To define a local label, write a label of the form `N:'
2344
(where N represents any positive integer).  To refer to the most recent
2345
previous definition of that label write `Nb', using the same number as
2346
when you defined the label.  To refer to the next definition of a local
2347
label, write `Nf'--the `b' stands for "backwards" and the `f' stands
2348
for "forwards".
2349
 
2350
   There is no restriction on how you can use these labels, and you can
2351
reuse them too.  So that it is possible to repeatedly define the same
2352
local label (using the same number `N'), although you can only refer to
2353
the most recently defined local label of that number (for a backwards
2354
reference) or the next definition of a specific local label for a
2355
forward reference.  It is also worth noting that the first 10 local
2356
labels (`0:'...`9:') are implemented in a slightly more efficient
2357
manner than the others.
2358
 
2359
   Here is an example:
2360
 
2361
     1:        branch 1f
2362
     2:        branch 1b
2363
     1:        branch 2f
2364
     2:        branch 1b
2365
 
2366
   Which is the equivalent of:
2367
 
2368
     label_1:  branch label_3
2369
     label_2:  branch label_1
2370
     label_3:  branch label_4
2371
     label_4:  branch label_3
2372
 
2373
   Local label names are only a notational device.  They are immediately
2374
transformed into more conventional symbol names before the assembler
2375
uses them.  The symbol names are stored in the symbol table, appear in
2376
error messages, and are optionally emitted to the object file.  The
2377
names are constructed using these parts:
2378
 
2379
`_local label prefix_'
2380
     All local symbols begin with the system-specific local label
2381
     prefix.  Normally both `as' and `ld' forget symbols that start
2382
     with the local label prefix.  These labels are used for symbols
2383
     you are never intended to see.  If you use the `-L' option then
2384
     `as' retains these symbols in the object file. If you also
2385
     instruct `ld' to retain these symbols, you may use them in
2386
     debugging.
2387
 
2388
`NUMBER'
2389
     This is the number that was used in the local label definition.
2390
     So if the label is written `55:' then the number is `55'.
2391
 
2392
`C-B'
2393
     This unusual character is included so you do not accidentally
2394
     invent a symbol of the same name.  The character has ASCII value
2395
     of `\002' (control-B).
2396
 
2397
`_ordinal number_'
2398
     This is a serial number to keep the labels distinct.  The first
2399
     definition of `0:' gets the number `1'.  The 15th definition of
2400
     `0:' gets the number `15', and so on.  Likewise the first
2401
     definition of `1:' gets the number `1' and its 15th definition
2402
     gets `15' as well.
2403
 
2404
   So for example, the first `1:' may be named `.L1C-B1', and the 44th
2405
`3:' may be named `.L3C-B44'.
2406
 
2407
Dollar Local Labels
2408
-------------------
2409
 
2410
`as' also supports an even more local form of local labels called
2411
dollar labels.  These labels go out of scope (i.e., they become
2412
undefined) as soon as a non-local label is defined.  Thus they remain
2413
valid for only a small region of the input source code.  Normal local
2414
labels, by contrast, remain in scope for the entire file, or until they
2415
are redefined by another occurrence of the same local label.
2416
 
2417
   Dollar labels are defined in exactly the same way as ordinary local
2418
labels, except that instead of being terminated by a colon, they are
2419
terminated by a dollar sign, e.g., `55$'.
2420
 
2421
   They can also be distinguished from ordinary local labels by their
2422
transformed names which use ASCII character `\001' (control-A) as the
2423
magic character to distinguish them from ordinary labels.  For example,
2424
the fifth definition of `6$' may be named `.L6C-A5'.
2425
 
2426

2427
File: as.info,  Node: Dot,  Next: Symbol Attributes,  Prev: Symbol Names,  Up: Symbols
2428
 
2429
5.4 The Special Dot Symbol
2430
==========================
2431
 
2432
The special symbol `.' refers to the current address that `as' is
2433
assembling into.  Thus, the expression `melvin: .long .' defines
2434
`melvin' to contain its own address.  Assigning a value to `.' is
2435
treated the same as a `.org' directive.  Thus, the expression `.=.+4'
2436
is the same as saying `.space 4'.
2437
 
2438

2439
File: as.info,  Node: Symbol Attributes,  Prev: Dot,  Up: Symbols
2440
 
2441
5.5 Symbol Attributes
2442
=====================
2443
 
2444
Every symbol has, as well as its name, the attributes "Value" and
2445
"Type".  Depending on output format, symbols can also have auxiliary
2446
attributes.
2447
 
2448
   If you use a symbol without defining it, `as' assumes zero for all
2449
these attributes, and probably won't warn you.  This makes the symbol
2450
an externally defined symbol, which is generally what you would want.
2451
 
2452
* Menu:
2453
 
2454
* Symbol Value::                Value
2455
* Symbol Type::                 Type
2456
 
2457
 
2458
* a.out Symbols::               Symbol Attributes: `a.out'
2459
 
2460
* COFF Symbols::                Symbol Attributes for COFF
2461
 
2462
* SOM Symbols::                Symbol Attributes for SOM
2463
 
2464

2465
File: as.info,  Node: Symbol Value,  Next: Symbol Type,  Up: Symbol Attributes
2466
 
2467
5.5.1 Value
2468
-----------
2469
 
2470
The value of a symbol is (usually) 32 bits.  For a symbol which labels a
2471
location in the text, data, bss or absolute sections the value is the
2472
number of addresses from the start of that section to the label.
2473
Naturally for text, data and bss sections the value of a symbol changes
2474
as `ld' changes section base addresses during linking.  Absolute
2475
symbols' values do not change during linking: that is why they are
2476
called absolute.
2477
 
2478
   The value of an undefined symbol is treated in a special way.  If it
2479
is 0 then the symbol is not defined in this assembler source file, and
2480
`ld' tries to determine its value from other files linked into the same
2481
program.  You make this kind of symbol simply by mentioning a symbol
2482
name without defining it.  A non-zero value represents a `.comm' common
2483
declaration.  The value is how much common storage to reserve, in bytes
2484
(addresses).  The symbol refers to the first address of the allocated
2485
storage.
2486
 
2487

2488
File: as.info,  Node: Symbol Type,  Next: a.out Symbols,  Prev: Symbol Value,  Up: Symbol Attributes
2489
 
2490
5.5.2 Type
2491
----------
2492
 
2493
The type attribute of a symbol contains relocation (section)
2494
information, any flag settings indicating that a symbol is external, and
2495
(optionally), other information for linkers and debuggers.  The exact
2496
format depends on the object-code output format in use.
2497
 
2498

2499
File: as.info,  Node: a.out Symbols,  Next: COFF Symbols,  Prev: Symbol Type,  Up: Symbol Attributes
2500
 
2501
5.5.3 Symbol Attributes: `a.out'
2502
--------------------------------
2503
 
2504
* Menu:
2505
 
2506
* Symbol Desc::                 Descriptor
2507
* Symbol Other::                Other
2508
 
2509

2510
File: as.info,  Node: Symbol Desc,  Next: Symbol Other,  Up: a.out Symbols
2511
 
2512
5.5.3.1 Descriptor
2513
..................
2514
 
2515
This is an arbitrary 16-bit value.  You may establish a symbol's
2516
descriptor value by using a `.desc' statement (*note `.desc': Desc.).
2517
A descriptor value means nothing to `as'.
2518
 
2519

2520
File: as.info,  Node: Symbol Other,  Prev: Symbol Desc,  Up: a.out Symbols
2521
 
2522
5.5.3.2 Other
2523
.............
2524
 
2525
This is an arbitrary 8-bit value.  It means nothing to `as'.
2526
 
2527

2528
File: as.info,  Node: COFF Symbols,  Next: SOM Symbols,  Prev: a.out Symbols,  Up: Symbol Attributes
2529
 
2530
5.5.4 Symbol Attributes for COFF
2531
--------------------------------
2532
 
2533
The COFF format supports a multitude of auxiliary symbol attributes;
2534
like the primary symbol attributes, they are set between `.def' and
2535
`.endef' directives.
2536
 
2537
5.5.4.1 Primary Attributes
2538
..........................
2539
 
2540
The symbol name is set with `.def'; the value and type, respectively,
2541
with `.val' and `.type'.
2542
 
2543
5.5.4.2 Auxiliary Attributes
2544
............................
2545
 
2546
The `as' directives `.dim', `.line', `.scl', `.size', `.tag', and
2547
`.weak' can generate auxiliary symbol table information for COFF.
2548
 
2549

2550
File: as.info,  Node: SOM Symbols,  Prev: COFF Symbols,  Up: Symbol Attributes
2551
 
2552
5.5.5 Symbol Attributes for SOM
2553
-------------------------------
2554
 
2555
The SOM format for the HPPA supports a multitude of symbol attributes
2556
set with the `.EXPORT' and `.IMPORT' directives.
2557
 
2558
   The attributes are described in `HP9000 Series 800 Assembly Language
2559
Reference Manual' (HP 92432-90001) under the `IMPORT' and `EXPORT'
2560
assembler directive documentation.
2561
 
2562

2563
File: as.info,  Node: Expressions,  Next: Pseudo Ops,  Prev: Symbols,  Up: Top
2564
 
2565
6 Expressions
2566
*************
2567
 
2568
An "expression" specifies an address or numeric value.  Whitespace may
2569
precede and/or follow an expression.
2570
 
2571
   The result of an expression must be an absolute number, or else an
2572
offset into a particular section.  If an expression is not absolute,
2573
and there is not enough information when `as' sees the expression to
2574
know its section, a second pass over the source program might be
2575
necessary to interpret the expression--but the second pass is currently
2576
not implemented.  `as' aborts with an error message in this situation.
2577
 
2578
* Menu:
2579
 
2580
* Empty Exprs::                 Empty Expressions
2581
* Integer Exprs::               Integer Expressions
2582
 
2583

2584
File: as.info,  Node: Empty Exprs,  Next: Integer Exprs,  Up: Expressions
2585
 
2586
6.1 Empty Expressions
2587
=====================
2588
 
2589
An empty expression has no value: it is just whitespace or null.
2590
Wherever an absolute expression is required, you may omit the
2591
expression, and `as' assumes a value of (absolute) 0.  This is
2592
compatible with other assemblers.
2593
 
2594

2595
File: as.info,  Node: Integer Exprs,  Prev: Empty Exprs,  Up: Expressions
2596
 
2597
6.2 Integer Expressions
2598
=======================
2599
 
2600
An "integer expression" is one or more _arguments_ delimited by
2601
_operators_.
2602
 
2603
* Menu:
2604
 
2605
* Arguments::                   Arguments
2606
* Operators::                   Operators
2607
* Prefix Ops::                  Prefix Operators
2608
* Infix Ops::                   Infix Operators
2609
 
2610

2611
File: as.info,  Node: Arguments,  Next: Operators,  Up: Integer Exprs
2612
 
2613
6.2.1 Arguments
2614
---------------
2615
 
2616
"Arguments" are symbols, numbers or subexpressions.  In other contexts
2617
arguments are sometimes called "arithmetic operands".  In this manual,
2618
to avoid confusing them with the "instruction operands" of the machine
2619
language, we use the term "argument" to refer to parts of expressions
2620
only, reserving the word "operand" to refer only to machine instruction
2621
operands.
2622
 
2623
   Symbols are evaluated to yield {SECTION NNN} where SECTION is one of
2624
text, data, bss, absolute, or undefined.  NNN is a signed, 2's
2625
complement 32 bit integer.
2626
 
2627
   Numbers are usually integers.
2628
 
2629
   A number can be a flonum or bignum.  In this case, you are warned
2630
that only the low order 32 bits are used, and `as' pretends these 32
2631
bits are an integer.  You may write integer-manipulating instructions
2632
that act on exotic constants, compatible with other assemblers.
2633
 
2634
   Subexpressions are a left parenthesis `(' followed by an integer
2635
expression, followed by a right parenthesis `)'; or a prefix operator
2636
followed by an argument.
2637
 
2638

2639
File: as.info,  Node: Operators,  Next: Prefix Ops,  Prev: Arguments,  Up: Integer Exprs
2640
 
2641
6.2.2 Operators
2642
---------------
2643
 
2644
"Operators" are arithmetic functions, like `+' or `%'.  Prefix
2645
operators are followed by an argument.  Infix operators appear between
2646
their arguments.  Operators may be preceded and/or followed by
2647
whitespace.
2648
 
2649

2650
File: as.info,  Node: Prefix Ops,  Next: Infix Ops,  Prev: Operators,  Up: Integer Exprs
2651
 
2652
6.2.3 Prefix Operator
2653
---------------------
2654
 
2655
`as' has the following "prefix operators".  They each take one
2656
argument, which must be absolute.
2657
 
2658
`-'
2659
     "Negation".  Two's complement negation.
2660
 
2661
`~'
2662
     "Complementation".  Bitwise not.
2663
 
2664

2665
File: as.info,  Node: Infix Ops,  Prev: Prefix Ops,  Up: Integer Exprs
2666
 
2667
6.2.4 Infix Operators
2668
---------------------
2669
 
2670
"Infix operators" take two arguments, one on either side.  Operators
2671
have precedence, but operations with equal precedence are performed left
2672
to right.  Apart from `+' or `-', both arguments must be absolute, and
2673
the result is absolute.
2674
 
2675
  1. Highest Precedence
2676
 
2677
    `*'
2678
          "Multiplication".
2679
 
2680
    `/'
2681
          "Division".  Truncation is the same as the C operator `/'
2682
 
2683
    `%'
2684
          "Remainder".
2685
 
2686
    `<<'
2687
          "Shift Left".  Same as the C operator `<<'.
2688
 
2689
    `>>'
2690
          "Shift Right".  Same as the C operator `>>'.
2691
 
2692
  2. Intermediate precedence
2693
 
2694
    `|'
2695
          "Bitwise Inclusive Or".
2696
 
2697
    `&'
2698
          "Bitwise And".
2699
 
2700
    `^'
2701
          "Bitwise Exclusive Or".
2702
 
2703
    `!'
2704
          "Bitwise Or Not".
2705
 
2706
  3. Low Precedence
2707
 
2708
    `+'
2709
          "Addition".  If either argument is absolute, the result has
2710
          the section of the other argument.  You may not add together
2711
          arguments from different sections.
2712
 
2713
    `-'
2714
          "Subtraction".  If the right argument is absolute, the result
2715
          has the section of the left argument.  If both arguments are
2716
          in the same section, the result is absolute.  You may not
2717
          subtract arguments from different sections.
2718
 
2719
    `=='
2720
          "Is Equal To"
2721
 
2722
    `<>'
2723
    `!='
2724
          "Is Not Equal To"
2725
 
2726
    `<'
2727
          "Is Less Than"
2728
 
2729
    `>'
2730
          "Is Greater Than"
2731
 
2732
    `>='
2733
          "Is Greater Than Or Equal To"
2734
 
2735
    `<='
2736
          "Is Less Than Or Equal To"
2737
 
2738
          The comparison operators can be used as infix operators.  A
2739
          true results has a value of -1 whereas a false result has a
2740
          value of 0.   Note, these operators perform signed
2741
          comparisons.
2742
 
2743
  4. Lowest Precedence
2744
 
2745
    `&&'
2746
          "Logical And".
2747
 
2748
    `||'
2749
          "Logical Or".
2750
 
2751
          These two logical operations can be used to combine the
2752
          results of sub expressions.  Note, unlike the comparison
2753
          operators a true result returns a value of 1 but a false
2754
          results does still return 0.  Also note that the logical or
2755
          operator has a slightly lower precedence than logical and.
2756
 
2757
 
2758
   In short, it's only meaningful to add or subtract the _offsets_ in an
2759
address; you can only have a defined section in one of the two
2760
arguments.
2761
 
2762

2763
File: as.info,  Node: Pseudo Ops,  Next: Object Attributes,  Prev: Expressions,  Up: Top
2764
 
2765
7 Assembler Directives
2766
**********************
2767
 
2768
All assembler directives have names that begin with a period (`.').
2769
The rest of the name is letters, usually in lower case.
2770
 
2771
   This chapter discusses directives that are available regardless of
2772
the target machine configuration for the GNU assembler.  Some machine
2773
configurations provide additional directives.  *Note Machine
2774
Dependencies::.
2775
 
2776
* Menu:
2777
 
2778
* Abort::                       `.abort'
2779
 
2780
* ABORT (COFF)::                `.ABORT'
2781
 
2782
* Align::                       `.align ABS-EXPR , ABS-EXPR'
2783
* Altmacro::                    `.altmacro'
2784
* Ascii::                       `.ascii "STRING"'...
2785
* Asciz::                       `.asciz "STRING"'...
2786
* Balign::                      `.balign ABS-EXPR , ABS-EXPR'
2787
* Byte::                        `.byte EXPRESSIONS'
2788
* Comm::                        `.comm SYMBOL , LENGTH '
2789
 
2790
* CFI directives::              `.cfi_startproc [simple]', `.cfi_endproc', etc.
2791
 
2792
* Data::                        `.data SUBSECTION'
2793
 
2794
* Def::                         `.def NAME'
2795
 
2796
* Desc::                        `.desc SYMBOL, ABS-EXPRESSION'
2797
 
2798
* Dim::                         `.dim'
2799
 
2800
* Double::                      `.double FLONUMS'
2801
* Eject::                       `.eject'
2802
* Else::                        `.else'
2803
* Elseif::                      `.elseif'
2804
* End::                         `.end'
2805
 
2806
* Endef::                       `.endef'
2807
 
2808
* Endfunc::                     `.endfunc'
2809
* Endif::                       `.endif'
2810
* Equ::                         `.equ SYMBOL, EXPRESSION'
2811
* Equiv::                       `.equiv SYMBOL, EXPRESSION'
2812
* Eqv::                         `.eqv SYMBOL, EXPRESSION'
2813
* Err::                         `.err'
2814
* Error::                       `.error STRING'
2815
* Exitm::                       `.exitm'
2816
* Extern::                      `.extern'
2817
* Fail::                        `.fail'
2818
 
2819
* File::                        `.file STRING'
2820
 
2821
* Fill::                        `.fill REPEAT , SIZE , VALUE'
2822
* Float::                       `.float FLONUMS'
2823
* Func::                        `.func'
2824
* Global::                      `.global SYMBOL', `.globl SYMBOL'
2825
 
2826
* Gnu_attribute::               `.gnu_attribute TAG,VALUE'
2827
* Hidden::                      `.hidden NAMES'
2828
 
2829
* hword::                       `.hword EXPRESSIONS'
2830
* Ident::                       `.ident'
2831
* If::                          `.if ABSOLUTE EXPRESSION'
2832
* Incbin::                      `.incbin "FILE"[,SKIP[,COUNT]]'
2833
* Include::                     `.include "FILE"'
2834
* Int::                         `.int EXPRESSIONS'
2835
 
2836
* Internal::                    `.internal NAMES'
2837
 
2838
* Irp::                         `.irp SYMBOL,VALUES'...
2839
* Irpc::                        `.irpc SYMBOL,VALUES'...
2840
* Lcomm::                       `.lcomm SYMBOL , LENGTH'
2841
* Lflags::                      `.lflags'
2842
 
2843
* Line::                        `.line LINE-NUMBER'
2844
 
2845
* Linkonce::                    `.linkonce [TYPE]'
2846
* List::                        `.list'
2847
* Ln::                          `.ln LINE-NUMBER'
2848
 
2849
* LNS directives::              `.file', `.loc', etc.
2850
 
2851
* Long::                        `.long EXPRESSIONS'
2852
 
2853
* Macro::                       `.macro NAME ARGS'...
2854
* MRI::                         `.mri VAL'
2855
* Noaltmacro::                  `.noaltmacro'
2856
* Nolist::                      `.nolist'
2857
* Octa::                        `.octa BIGNUMS'
2858
* Org::                         `.org NEW-LC, FILL'
2859
* P2align::                     `.p2align ABS-EXPR, ABS-EXPR, ABS-EXPR'
2860
 
2861
* PopSection::                  `.popsection'
2862
* Previous::                    `.previous'
2863
 
2864
* Print::                       `.print STRING'
2865
 
2866
* Protected::                   `.protected NAMES'
2867
 
2868
* Psize::                       `.psize LINES, COLUMNS'
2869
* Purgem::                      `.purgem NAME'
2870
 
2871
* PushSection::                 `.pushsection NAME'
2872
 
2873
* Quad::                        `.quad BIGNUMS'
2874
* Reloc::                       `.reloc OFFSET, RELOC_NAME[, EXPRESSION]'
2875
* Rept::                        `.rept COUNT'
2876
* Sbttl::                       `.sbttl "SUBHEADING"'
2877
 
2878
* Scl::                         `.scl CLASS'
2879
 
2880
* Section::                     `.section NAME[, FLAGS]'
2881
 
2882
* Set::                         `.set SYMBOL, EXPRESSION'
2883
* Short::                       `.short EXPRESSIONS'
2884
* Single::                      `.single FLONUMS'
2885
 
2886
* Size::                        `.size [NAME , EXPRESSION]'
2887
 
2888
* Skip::                        `.skip SIZE , FILL'
2889
* Sleb128::                     `.sleb128 EXPRESSIONS'
2890
* Space::                       `.space SIZE , FILL'
2891
 
2892
* Stab::                        `.stabd, .stabn, .stabs'
2893
 
2894
* String::                      `.string "STR"', `.string8 "STR"', `.string16 "STR"', `.string32 "STR"', `.string64 "STR"'
2895
* Struct::                      `.struct EXPRESSION'
2896
 
2897
* SubSection::                  `.subsection'
2898
* Symver::                      `.symver NAME,NAME2@NODENAME'
2899
 
2900
 
2901
* Tag::                         `.tag STRUCTNAME'
2902
 
2903
* Text::                        `.text SUBSECTION'
2904
* Title::                       `.title "HEADING"'
2905
 
2906
* Type::                        `.type '
2907
 
2908
* Uleb128::                     `.uleb128 EXPRESSIONS'
2909
 
2910
* Val::                         `.val ADDR'
2911
 
2912
 
2913
* Version::                     `.version "STRING"'
2914
* VTableEntry::                 `.vtable_entry TABLE, OFFSET'
2915
* VTableInherit::               `.vtable_inherit CHILD, PARENT'
2916
 
2917
* Warning::                     `.warning STRING'
2918
* Weak::                        `.weak NAMES'
2919
* Weakref::                     `.weakref ALIAS, SYMBOL'
2920
* Word::                        `.word EXPRESSIONS'
2921
* Deprecated::                  Deprecated Directives
2922
 
2923

2924
File: as.info,  Node: Abort,  Next: ABORT (COFF),  Up: Pseudo Ops
2925
 
2926
7.1 `.abort'
2927
============
2928
 
2929
This directive stops the assembly immediately.  It is for compatibility
2930
with other assemblers.  The original idea was that the assembly
2931
language source would be piped into the assembler.  If the sender of
2932
the source quit, it could use this directive tells `as' to quit also.
2933
One day `.abort' will not be supported.
2934
 
2935

2936
File: as.info,  Node: ABORT (COFF),  Next: Align,  Prev: Abort,  Up: Pseudo Ops
2937
 
2938
7.2 `.ABORT' (COFF)
2939
===================
2940
 
2941
When producing COFF output, `as' accepts this directive as a synonym
2942
for `.abort'.
2943
 
2944

2945
File: as.info,  Node: Align,  Next: Altmacro,  Prev: ABORT (COFF),  Up: Pseudo Ops
2946
 
2947
7.3 `.align ABS-EXPR, ABS-EXPR, ABS-EXPR'
2948
=========================================
2949
 
2950
Pad the location counter (in the current subsection) to a particular
2951
storage boundary.  The first expression (which must be absolute) is the
2952
alignment required, as described below.
2953
 
2954
   The second expression (also absolute) gives the fill value to be
2955
stored in the padding bytes.  It (and the comma) may be omitted.  If it
2956
is omitted, the padding bytes are normally zero.  However, on some
2957
systems, if the section is marked as containing code and the fill value
2958
is omitted, the space is filled with no-op instructions.
2959
 
2960
   The third expression is also absolute, and is also optional.  If it
2961
is present, it is the maximum number of bytes that should be skipped by
2962
this alignment directive.  If doing the alignment would require
2963
skipping more bytes than the specified maximum, then the alignment is
2964
not done at all.  You can omit the fill value (the second argument)
2965
entirely by simply using two commas after the required alignment; this
2966
can be useful if you want the alignment to be filled with no-op
2967
instructions when appropriate.
2968
 
2969
   The way the required alignment is specified varies from system to
2970
system.  For the arc, hppa, i386 using ELF, i860, iq2000, m68k, or32,
2971
s390, sparc, tic4x, tic80 and xtensa, the first expression is the
2972
alignment request in bytes.  For example `.align 8' advances the
2973
location counter until it is a multiple of 8.  If the location counter
2974
is already a multiple of 8, no change is needed.  For the tic54x, the
2975
first expression is the alignment request in words.
2976
 
2977
   For other systems, including the i386 using a.out format, and the
2978
arm and strongarm, it is the number of low-order zero bits the location
2979
counter must have after advancement.  For example `.align 3' advances
2980
the location counter until it a multiple of 8.  If the location counter
2981
is already a multiple of 8, no change is needed.
2982
 
2983
   This inconsistency is due to the different behaviors of the various
2984
native assemblers for these systems which GAS must emulate.  GAS also
2985
provides `.balign' and `.p2align' directives, described later, which
2986
have a consistent behavior across all architectures (but are specific
2987
to GAS).
2988
 
2989

2990
File: as.info,  Node: Ascii,  Next: Asciz,  Prev: Altmacro,  Up: Pseudo Ops
2991
 
2992
7.4 `.ascii "STRING"'...
2993
========================
2994
 
2995
`.ascii' expects zero or more string literals (*note Strings::)
2996
separated by commas.  It assembles each string (with no automatic
2997
trailing zero byte) into consecutive addresses.
2998
 
2999

3000
File: as.info,  Node: Asciz,  Next: Balign,  Prev: Ascii,  Up: Pseudo Ops
3001
 
3002
7.5 `.asciz "STRING"'...
3003
========================
3004
 
3005
`.asciz' is just like `.ascii', but each string is followed by a zero
3006
byte.  The "z" in `.asciz' stands for "zero".
3007
 
3008

3009
File: as.info,  Node: Balign,  Next: Byte,  Prev: Asciz,  Up: Pseudo Ops
3010
 
3011
7.6 `.balign[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR'
3012
==============================================
3013
 
3014
Pad the location counter (in the current subsection) to a particular
3015
storage boundary.  The first expression (which must be absolute) is the
3016
alignment request in bytes.  For example `.balign 8' advances the
3017
location counter until it is a multiple of 8.  If the location counter
3018
is already a multiple of 8, no change is needed.
3019
 
3020
   The second expression (also absolute) gives the fill value to be
3021
stored in the padding bytes.  It (and the comma) may be omitted.  If it
3022
is omitted, the padding bytes are normally zero.  However, on some
3023
systems, if the section is marked as containing code and the fill value
3024
is omitted, the space is filled with no-op instructions.
3025
 
3026
   The third expression is also absolute, and is also optional.  If it
3027
is present, it is the maximum number of bytes that should be skipped by
3028
this alignment directive.  If doing the alignment would require
3029
skipping more bytes than the specified maximum, then the alignment is
3030
not done at all.  You can omit the fill value (the second argument)
3031
entirely by simply using two commas after the required alignment; this
3032
can be useful if you want the alignment to be filled with no-op
3033
instructions when appropriate.
3034
 
3035
   The `.balignw' and `.balignl' directives are variants of the
3036
`.balign' directive.  The `.balignw' directive treats the fill pattern
3037
as a two byte word value.  The `.balignl' directives treats the fill
3038
pattern as a four byte longword value.  For example, `.balignw
3039
4,0x368d' will align to a multiple of 4.  If it skips two bytes, they
3040
will be filled in with the value 0x368d (the exact placement of the
3041
bytes depends upon the endianness of the processor).  If it skips 1 or
3042
3 bytes, the fill value is undefined.
3043
 
3044

3045
File: as.info,  Node: Byte,  Next: Comm,  Prev: Balign,  Up: Pseudo Ops
3046
 
3047
7.7 `.byte EXPRESSIONS'
3048
=======================
3049
 
3050
`.byte' expects zero or more expressions, separated by commas.  Each
3051
expression is assembled into the next byte.
3052
 
3053

3054
File: as.info,  Node: Comm,  Next: CFI directives,  Prev: Byte,  Up: Pseudo Ops
3055
 
3056
7.8 `.comm SYMBOL , LENGTH '
3057
============================
3058
 
3059
`.comm' declares a common symbol named SYMBOL.  When linking, a common
3060
symbol in one object file may be merged with a defined or common symbol
3061
of the same name in another object file.  If `ld' does not see a
3062
definition for the symbol-just one or more common symbols-then it will
3063
allocate LENGTH bytes of uninitialized memory.  LENGTH must be an
3064
absolute expression.  If `ld' sees multiple common symbols with the
3065
same name, and they do not all have the same size, it will allocate
3066
space using the largest size.
3067
 
3068
   When using ELF, the `.comm' directive takes an optional third
3069
argument.  This is the desired alignment of the symbol, specified as a
3070
byte boundary (for example, an alignment of 16 means that the least
3071
significant 4 bits of the address should be zero).  The alignment must
3072
be an absolute expression, and it must be a power of two.  If `ld'
3073
allocates uninitialized memory for the common symbol, it will use the
3074
alignment when placing the symbol.  If no alignment is specified, `as'
3075
will set the alignment to the largest power of two less than or equal
3076
to the size of the symbol, up to a maximum of 16.
3077
 
3078
   The syntax for `.comm' differs slightly on the HPPA.  The syntax is
3079
`SYMBOL .comm, LENGTH'; SYMBOL is optional.
3080
 
3081

3082
File: as.info,  Node: CFI directives,  Next: Data,  Prev: Comm,  Up: Pseudo Ops
3083
 
3084
7.9 `.cfi_startproc [simple]'
3085
=============================
3086
 
3087
`.cfi_startproc' is used at the beginning of each function that should
3088
have an entry in `.eh_frame'. It initializes some internal data
3089
structures. Don't forget to close the function by `.cfi_endproc'.
3090
 
3091
   Unless `.cfi_startproc' is used along with parameter `simple' it
3092
also emits some architecture dependent initial CFI instructions.
3093
 
3094
7.10 `.cfi_endproc'
3095
===================
3096
 
3097
`.cfi_endproc' is used at the end of a function where it closes its
3098
unwind entry previously opened by `.cfi_startproc', and emits it to
3099
`.eh_frame'.
3100
 
3101
7.11 `.cfi_personality ENCODING [, EXP]'
3102
========================================
3103
 
3104
`.cfi_personality' defines personality routine and its encoding.
3105
ENCODING must be a constant determining how the personality should be
3106
encoded.  If it is 255 (`DW_EH_PE_omit'), second argument is not
3107
present, otherwise second argument should be a constant or a symbol
3108
name.  When using indirect encodings, the symbol provided should be the
3109
location where personality can be loaded from, not the personality
3110
routine itself.  The default after `.cfi_startproc' is
3111
`.cfi_personality 0xff', no personality routine.
3112
 
3113
7.12 `.cfi_lsda ENCODING [, EXP]'
3114
=================================
3115
 
3116
`.cfi_lsda' defines LSDA and its encoding.  ENCODING must be a constant
3117
determining how the LSDA should be encoded.  If it is 255
3118
(`DW_EH_PE_omit'), second argument is not present, otherwise second
3119
argument should be a constant or a symbol name.  The default after
3120
`.cfi_startproc' is `.cfi_lsda 0xff', no LSDA.
3121
 
3122
7.13 `.cfi_def_cfa REGISTER, OFFSET'
3123
====================================
3124
 
3125
`.cfi_def_cfa' defines a rule for computing CFA as: take address from
3126
REGISTER and add OFFSET to it.
3127
 
3128
7.14 `.cfi_def_cfa_register REGISTER'
3129
=====================================
3130
 
3131
`.cfi_def_cfa_register' modifies a rule for computing CFA. From now on
3132
REGISTER will be used instead of the old one. Offset remains the same.
3133
 
3134
7.15 `.cfi_def_cfa_offset OFFSET'
3135
=================================
3136
 
3137
`.cfi_def_cfa_offset' modifies a rule for computing CFA. Register
3138
remains the same, but OFFSET is new. Note that it is the absolute
3139
offset that will be added to a defined register to compute CFA address.
3140
 
3141
7.16 `.cfi_adjust_cfa_offset OFFSET'
3142
====================================
3143
 
3144
Same as `.cfi_def_cfa_offset' but OFFSET is a relative value that is
3145
added/substracted from the previous offset.
3146
 
3147
7.17 `.cfi_offset REGISTER, OFFSET'
3148
===================================
3149
 
3150
Previous value of REGISTER is saved at offset OFFSET from CFA.
3151
 
3152
7.18 `.cfi_rel_offset REGISTER, OFFSET'
3153
=======================================
3154
 
3155
Previous value of REGISTER is saved at offset OFFSET from the current
3156
CFA register.  This is transformed to `.cfi_offset' using the known
3157
displacement of the CFA register from the CFA.  This is often easier to
3158
use, because the number will match the code it's annotating.
3159
 
3160
7.19 `.cfi_register REGISTER1, REGISTER2'
3161
=========================================
3162
 
3163
Previous value of REGISTER1 is saved in register REGISTER2.
3164
 
3165
7.20 `.cfi_restore REGISTER'
3166
============================
3167
 
3168
`.cfi_restore' says that the rule for REGISTER is now the same as it
3169
was at the beginning of the function, after all initial instruction
3170
added by `.cfi_startproc' were executed.
3171
 
3172
7.21 `.cfi_undefined REGISTER'
3173
==============================
3174
 
3175
From now on the previous value of REGISTER can't be restored anymore.
3176
 
3177
7.22 `.cfi_same_value REGISTER'
3178
===============================
3179
 
3180
Current value of REGISTER is the same like in the previous frame, i.e.
3181
no restoration needed.
3182
 
3183
7.23 `.cfi_remember_state',
3184
===========================
3185
 
3186
First save all current rules for all registers by `.cfi_remember_state',
3187
then totally screw them up by subsequent `.cfi_*' directives and when
3188
everything is hopelessly bad, use `.cfi_restore_state' to restore the
3189
previous saved state.
3190
 
3191
7.24 `.cfi_return_column REGISTER'
3192
==================================
3193
 
3194
Change return column REGISTER, i.e. the return address is either
3195
directly in REGISTER or can be accessed by rules for REGISTER.
3196
 
3197
7.25 `.cfi_signal_frame'
3198
========================
3199
 
3200
Mark current function as signal trampoline.
3201
 
3202
7.26 `.cfi_window_save'
3203
=======================
3204
 
3205
SPARC register window has been saved.
3206
 
3207
7.27 `.cfi_escape' EXPRESSION[, ...]
3208
====================================
3209
 
3210
Allows the user to add arbitrary bytes to the unwind info.  One might
3211
use this to add OS-specific CFI opcodes, or generic CFI opcodes that
3212
GAS does not yet support.
3213
 
3214

3215
File: as.info,  Node: LNS directives,  Next: Long,  Prev: Ln,  Up: Pseudo Ops
3216
 
3217
7.28 `.file FILENO FILENAME'
3218
============================
3219
 
3220
When emitting dwarf2 line number information `.file' assigns filenames
3221
to the `.debug_line' file name table.  The FILENO operand should be a
3222
unique positive integer to use as the index of the entry in the table.
3223
The FILENAME operand is a C string literal.
3224
 
3225
   The detail of filename indices is exposed to the user because the
3226
filename table is shared with the `.debug_info' section of the dwarf2
3227
debugging information, and thus the user must know the exact indices
3228
that table entries will have.
3229
 
3230
7.29 `.loc FILENO LINENO [COLUMN] [OPTIONS]'
3231
============================================
3232
 
3233
The `.loc' directive will add row to the `.debug_line' line number
3234
matrix corresponding to the immediately following assembly instruction.
3235
The FILENO, LINENO, and optional COLUMN arguments will be applied to
3236
the `.debug_line' state machine before the row is added.
3237
 
3238
   The OPTIONS are a sequence of the following tokens in any order:
3239
 
3240
`basic_block'
3241
     This option will set the `basic_block' register in the
3242
     `.debug_line' state machine to `true'.
3243
 
3244
`prologue_end'
3245
     This option will set the `prologue_end' register in the
3246
     `.debug_line' state machine to `true'.
3247
 
3248
`epilogue_begin'
3249
     This option will set the `epilogue_begin' register in the
3250
     `.debug_line' state machine to `true'.
3251
 
3252
`is_stmt VALUE'
3253
     This option will set the `is_stmt' register in the `.debug_line'
3254
     state machine to `value', which must be either 0 or 1.
3255
 
3256
`isa VALUE'
3257
     This directive will set the `isa' register in the `.debug_line'
3258
     state machine to VALUE, which must be an unsigned integer.
3259
 
3260
 
3261
7.30 `.loc_mark_labels ENABLE'
3262
==============================
3263
 
3264
The `.loc_mark_labels' directive makes the assembler emit an entry to
3265
the `.debug_line' line number matrix with the `basic_block' register in
3266
the state machine set whenever a code label is seen.  The ENABLE
3267
argument should be either 1 or 0, to enable or disable this function
3268
respectively.
3269
 
3270

3271
File: as.info,  Node: Data,  Next: Def,  Prev: CFI directives,  Up: Pseudo Ops
3272
 
3273
7.31 `.data SUBSECTION'
3274
=======================
3275
 
3276
`.data' tells `as' to assemble the following statements onto the end of
3277
the data subsection numbered SUBSECTION (which is an absolute
3278
expression).  If SUBSECTION is omitted, it defaults to zero.
3279
 
3280

3281
File: as.info,  Node: Def,  Next: Desc,  Prev: Data,  Up: Pseudo Ops
3282
 
3283
7.32 `.def NAME'
3284
================
3285
 
3286
Begin defining debugging information for a symbol NAME; the definition
3287
extends until the `.endef' directive is encountered.
3288
 
3289

3290
File: as.info,  Node: Desc,  Next: Dim,  Prev: Def,  Up: Pseudo Ops
3291
 
3292
7.33 `.desc SYMBOL, ABS-EXPRESSION'
3293
===================================
3294
 
3295
This directive sets the descriptor of the symbol (*note Symbol
3296
Attributes::) to the low 16 bits of an absolute expression.
3297
 
3298
   The `.desc' directive is not available when `as' is configured for
3299
COFF output; it is only for `a.out' or `b.out' object format.  For the
3300
sake of compatibility, `as' accepts it, but produces no output, when
3301
configured for COFF.
3302
 
3303

3304
File: as.info,  Node: Dim,  Next: Double,  Prev: Desc,  Up: Pseudo Ops
3305
 
3306
7.34 `.dim'
3307
===========
3308
 
3309
This directive is generated by compilers to include auxiliary debugging
3310
information in the symbol table.  It is only permitted inside
3311
`.def'/`.endef' pairs.
3312
 
3313

3314
File: as.info,  Node: Double,  Next: Eject,  Prev: Dim,  Up: Pseudo Ops
3315
 
3316
7.35 `.double FLONUMS'
3317
======================
3318
 
3319
`.double' expects zero or more flonums, separated by commas.  It
3320
assembles floating point numbers.  The exact kind of floating point
3321
numbers emitted depends on how `as' is configured.  *Note Machine
3322
Dependencies::.
3323
 
3324

3325
File: as.info,  Node: Eject,  Next: Else,  Prev: Double,  Up: Pseudo Ops
3326
 
3327
7.36 `.eject'
3328
=============
3329
 
3330
Force a page break at this point, when generating assembly listings.
3331
 
3332

3333
File: as.info,  Node: Else,  Next: Elseif,  Prev: Eject,  Up: Pseudo Ops
3334
 
3335
7.37 `.else'
3336
============
3337
 
3338
`.else' is part of the `as' support for conditional assembly; see *Note
3339
`.if': If.  It marks the beginning of a section of code to be assembled
3340
if the condition for the preceding `.if' was false.
3341
 
3342

3343
File: as.info,  Node: Elseif,  Next: End,  Prev: Else,  Up: Pseudo Ops
3344
 
3345
7.38 `.elseif'
3346
==============
3347
 
3348
`.elseif' is part of the `as' support for conditional assembly; see
3349
*Note `.if': If.  It is shorthand for beginning a new `.if' block that
3350
would otherwise fill the entire `.else' section.
3351
 
3352

3353
File: as.info,  Node: End,  Next: Endef,  Prev: Elseif,  Up: Pseudo Ops
3354
 
3355
7.39 `.end'
3356
===========
3357
 
3358
`.end' marks the end of the assembly file.  `as' does not process
3359
anything in the file past the `.end' directive.
3360
 
3361

3362
File: as.info,  Node: Endef,  Next: Endfunc,  Prev: End,  Up: Pseudo Ops
3363
 
3364
7.40 `.endef'
3365
=============
3366
 
3367
This directive flags the end of a symbol definition begun with `.def'.
3368
 
3369

3370
File: as.info,  Node: Endfunc,  Next: Endif,  Prev: Endef,  Up: Pseudo Ops
3371
 
3372
7.41 `.endfunc'
3373
===============
3374
 
3375
`.endfunc' marks the end of a function specified with `.func'.
3376
 
3377

3378
File: as.info,  Node: Endif,  Next: Equ,  Prev: Endfunc,  Up: Pseudo Ops
3379
 
3380
7.42 `.endif'
3381
=============
3382
 
3383
`.endif' is part of the `as' support for conditional assembly; it marks
3384
the end of a block of code that is only assembled conditionally.  *Note
3385
`.if': If.
3386
 
3387

3388
File: as.info,  Node: Equ,  Next: Equiv,  Prev: Endif,  Up: Pseudo Ops
3389
 
3390
7.43 `.equ SYMBOL, EXPRESSION'
3391
==============================
3392
 
3393
This directive sets the value of SYMBOL to EXPRESSION.  It is
3394
synonymous with `.set'; see *Note `.set': Set.
3395
 
3396
   The syntax for `equ' on the HPPA is `SYMBOL .equ EXPRESSION'.
3397
 
3398
   The syntax for `equ' on the Z80 is `SYMBOL equ EXPRESSION'.  On the
3399
Z80 it is an eror if SYMBOL is already defined, but the symbol is not
3400
protected from later redefinition.  Compare *Note Equiv::.
3401
 
3402

3403
File: as.info,  Node: Equiv,  Next: Eqv,  Prev: Equ,  Up: Pseudo Ops
3404
 
3405
7.44 `.equiv SYMBOL, EXPRESSION'
3406
================================
3407
 
3408
The `.equiv' directive is like `.equ' and `.set', except that the
3409
assembler will signal an error if SYMBOL is already defined.  Note a
3410
symbol which has been referenced but not actually defined is considered
3411
to be undefined.
3412
 
3413
   Except for the contents of the error message, this is roughly
3414
equivalent to
3415
     .ifdef SYM
3416
     .err
3417
     .endif
3418
     .equ SYM,VAL
3419
   plus it protects the symbol from later redefinition.
3420
 
3421

3422
File: as.info,  Node: Eqv,  Next: Err,  Prev: Equiv,  Up: Pseudo Ops
3423
 
3424
7.45 `.eqv SYMBOL, EXPRESSION'
3425
==============================
3426
 
3427
The `.eqv' directive is like `.equiv', but no attempt is made to
3428
evaluate the expression or any part of it immediately.  Instead each
3429
time the resulting symbol is used in an expression, a snapshot of its
3430
current value is taken.
3431
 
3432

3433
File: as.info,  Node: Err,  Next: Error,  Prev: Eqv,  Up: Pseudo Ops
3434
 
3435
7.46 `.err'
3436
===========
3437
 
3438
If `as' assembles a `.err' directive, it will print an error message
3439
and, unless the `-Z' option was used, it will not generate an object
3440
file.  This can be used to signal an error in conditionally compiled
3441
code.
3442
 
3443

3444
File: as.info,  Node: Error,  Next: Exitm,  Prev: Err,  Up: Pseudo Ops
3445
 
3446
7.47 `.error "STRING"'
3447
======================
3448
 
3449
Similarly to `.err', this directive emits an error, but you can specify
3450
a string that will be emitted as the error message.  If you don't
3451
specify the message, it defaults to `".error directive invoked in
3452
source file"'.  *Note Error and Warning Messages: Errors.
3453
 
3454
      .error "This code has not been assembled and tested."
3455
 
3456

3457
File: as.info,  Node: Exitm,  Next: Extern,  Prev: Error,  Up: Pseudo Ops
3458
 
3459
7.48 `.exitm'
3460
=============
3461
 
3462
Exit early from the current macro definition.  *Note Macro::.
3463
 
3464

3465
File: as.info,  Node: Extern,  Next: Fail,  Prev: Exitm,  Up: Pseudo Ops
3466
 
3467
7.49 `.extern'
3468
==============
3469
 
3470
`.extern' is accepted in the source program--for compatibility with
3471
other assemblers--but it is ignored.  `as' treats all undefined symbols
3472
as external.
3473
 
3474

3475
File: as.info,  Node: Fail,  Next: File,  Prev: Extern,  Up: Pseudo Ops
3476
 
3477
7.50 `.fail EXPRESSION'
3478
=======================
3479
 
3480
Generates an error or a warning.  If the value of the EXPRESSION is 500
3481
or more, `as' will print a warning message.  If the value is less than
3482
500, `as' will print an error message.  The message will include the
3483
value of EXPRESSION.  This can occasionally be useful inside complex
3484
nested macros or conditional assembly.
3485
 
3486

3487
File: as.info,  Node: File,  Next: Fill,  Prev: Fail,  Up: Pseudo Ops
3488
 
3489
7.51 `.file STRING'
3490
===================
3491
 
3492
`.file' tells `as' that we are about to start a new logical file.
3493
STRING is the new file name.  In general, the filename is recognized
3494
whether or not it is surrounded by quotes `"'; but if you wish to
3495
specify an empty file name, you must give the quotes-`""'.  This
3496
statement may go away in future: it is only recognized to be compatible
3497
with old `as' programs.
3498
 
3499

3500
File: as.info,  Node: Fill,  Next: Float,  Prev: File,  Up: Pseudo Ops
3501
 
3502
7.52 `.fill REPEAT , SIZE , VALUE'
3503
==================================
3504
 
3505
REPEAT, SIZE and VALUE are absolute expressions.  This emits REPEAT
3506
copies of SIZE bytes.  REPEAT may be zero or more.  SIZE may be zero or
3507
more, but if it is more than 8, then it is deemed to have the value 8,
3508
compatible with other people's assemblers.  The contents of each REPEAT
3509
bytes is taken from an 8-byte number.  The highest order 4 bytes are
3510
zero.  The lowest order 4 bytes are VALUE rendered in the byte-order of
3511
an integer on the computer `as' is assembling for.  Each SIZE bytes in
3512
a repetition is taken from the lowest order SIZE bytes of this number.
3513
Again, this bizarre behavior is compatible with other people's
3514
assemblers.
3515
 
3516
   SIZE and VALUE are optional.  If the second comma and VALUE are
3517
absent, VALUE is assumed zero.  If the first comma and following tokens
3518
are absent, SIZE is assumed to be 1.
3519
 
3520

3521
File: as.info,  Node: Float,  Next: Func,  Prev: Fill,  Up: Pseudo Ops
3522
 
3523
7.53 `.float FLONUMS'
3524
=====================
3525
 
3526
This directive assembles zero or more flonums, separated by commas.  It
3527
has the same effect as `.single'.  The exact kind of floating point
3528
numbers emitted depends on how `as' is configured.  *Note Machine
3529
Dependencies::.
3530
 
3531

3532
File: as.info,  Node: Func,  Next: Global,  Prev: Float,  Up: Pseudo Ops
3533
 
3534
7.54 `.func NAME[,LABEL]'
3535
=========================
3536
 
3537
`.func' emits debugging information to denote function NAME, and is
3538
ignored unless the file is assembled with debugging enabled.  Only
3539
`--gstabs[+]' is currently supported.  LABEL is the entry point of the
3540
function and if omitted NAME prepended with the `leading char' is used.
3541
`leading char' is usually `_' or nothing, depending on the target.  All
3542
functions are currently defined to have `void' return type.  The
3543
function must be terminated with `.endfunc'.
3544
 
3545

3546
File: as.info,  Node: Global,  Next: Gnu_attribute,  Prev: Func,  Up: Pseudo Ops
3547
 
3548
7.55 `.global SYMBOL', `.globl SYMBOL'
3549
======================================
3550
 
3551
`.global' makes the symbol visible to `ld'.  If you define SYMBOL in
3552
your partial program, its value is made available to other partial
3553
programs that are linked with it.  Otherwise, SYMBOL takes its
3554
attributes from a symbol of the same name from another file linked into
3555
the same program.
3556
 
3557
   Both spellings (`.globl' and `.global') are accepted, for
3558
compatibility with other assemblers.
3559
 
3560
   On the HPPA, `.global' is not always enough to make it accessible to
3561
other partial programs.  You may need the HPPA-only `.EXPORT' directive
3562
as well.  *Note HPPA Assembler Directives: HPPA Directives.
3563
 
3564

3565
File: as.info,  Node: Gnu_attribute,  Next: Hidden,  Prev: Global,  Up: Pseudo Ops
3566
 
3567
7.56 `.gnu_attribute TAG,VALUE'
3568
===============================
3569
 
3570
Record a GNU object attribute for this file.  *Note Object Attributes::.
3571
 
3572

3573
File: as.info,  Node: Hidden,  Next: hword,  Prev: Gnu_attribute,  Up: Pseudo Ops
3574
 
3575
7.57 `.hidden NAMES'
3576
====================
3577
 
3578
This is one of the ELF visibility directives.  The other two are
3579
`.internal' (*note `.internal': Internal.) and `.protected' (*note
3580
`.protected': Protected.).
3581
 
3582
   This directive overrides the named symbols default visibility (which
3583
is set by their binding: local, global or weak).  The directive sets
3584
the visibility to `hidden' which means that the symbols are not visible
3585
to other components.  Such symbols are always considered to be
3586
`protected' as well.
3587
 
3588

3589
File: as.info,  Node: hword,  Next: Ident,  Prev: Hidden,  Up: Pseudo Ops
3590
 
3591
7.58 `.hword EXPRESSIONS'
3592
=========================
3593
 
3594
This expects zero or more EXPRESSIONS, and emits a 16 bit number for
3595
each.
3596
 
3597
   This directive is a synonym for `.short'; depending on the target
3598
architecture, it may also be a synonym for `.word'.
3599
 
3600

3601
File: as.info,  Node: Ident,  Next: If,  Prev: hword,  Up: Pseudo Ops
3602
 
3603
7.59 `.ident'
3604
=============
3605
 
3606
This directive is used by some assemblers to place tags in object
3607
files.  The behavior of this directive varies depending on the target.
3608
When using the a.out object file format, `as' simply accepts the
3609
directive for source-file compatibility with existing assemblers, but
3610
does not emit anything for it.  When using COFF, comments are emitted
3611
to the `.comment' or `.rdata' section, depending on the target.  When
3612
using ELF, comments are emitted to the `.comment' section.
3613
 
3614

3615
File: as.info,  Node: If,  Next: Incbin,  Prev: Ident,  Up: Pseudo Ops
3616
 
3617
7.60 `.if ABSOLUTE EXPRESSION'
3618
==============================
3619
 
3620
`.if' marks the beginning of a section of code which is only considered
3621
part of the source program being assembled if the argument (which must
3622
be an ABSOLUTE EXPRESSION) is non-zero.  The end of the conditional
3623
section of code must be marked by `.endif' (*note `.endif': Endif.);
3624
optionally, you may include code for the alternative condition, flagged
3625
by `.else' (*note `.else': Else.).  If you have several conditions to
3626
check, `.elseif' may be used to avoid nesting blocks if/else within
3627
each subsequent `.else' block.
3628
 
3629
   The following variants of `.if' are also supported:
3630
`.ifdef SYMBOL'
3631
     Assembles the following section of code if the specified SYMBOL
3632
     has been defined.  Note a symbol which has been referenced but not
3633
     yet defined is considered to be undefined.
3634
 
3635
`.ifb TEXT'
3636
     Assembles the following section of code if the operand is blank
3637
     (empty).
3638
 
3639
`.ifc STRING1,STRING2'
3640
     Assembles the following section of code if the two strings are the
3641
     same.  The strings may be optionally quoted with single quotes.
3642
     If they are not quoted, the first string stops at the first comma,
3643
     and the second string stops at the end of the line.  Strings which
3644
     contain whitespace should be quoted.  The string comparison is
3645
     case sensitive.
3646
 
3647
`.ifeq ABSOLUTE EXPRESSION'
3648
     Assembles the following section of code if the argument is zero.
3649
 
3650
`.ifeqs STRING1,STRING2'
3651
     Another form of `.ifc'.  The strings must be quoted using double
3652
     quotes.
3653
 
3654
`.ifge ABSOLUTE EXPRESSION'
3655
     Assembles the following section of code if the argument is greater
3656
     than or equal to zero.
3657
 
3658
`.ifgt ABSOLUTE EXPRESSION'
3659
     Assembles the following section of code if the argument is greater
3660
     than zero.
3661
 
3662
`.ifle ABSOLUTE EXPRESSION'
3663
     Assembles the following section of code if the argument is less
3664
     than or equal to zero.
3665
 
3666
`.iflt ABSOLUTE EXPRESSION'
3667
     Assembles the following section of code if the argument is less
3668
     than zero.
3669
 
3670
`.ifnb TEXT'
3671
     Like `.ifb', but the sense of the test is reversed: this assembles
3672
     the following section of code if the operand is non-blank
3673
     (non-empty).
3674
 
3675
`.ifnc STRING1,STRING2.'
3676
     Like `.ifc', but the sense of the test is reversed: this assembles
3677
     the following section of code if the two strings are not the same.
3678
 
3679
`.ifndef SYMBOL'
3680
`.ifnotdef SYMBOL'
3681
     Assembles the following section of code if the specified SYMBOL
3682
     has not been defined.  Both spelling variants are equivalent.
3683
     Note a symbol which has been referenced but not yet defined is
3684
     considered to be undefined.
3685
 
3686
`.ifne ABSOLUTE EXPRESSION'
3687
     Assembles the following section of code if the argument is not
3688
     equal to zero (in other words, this is equivalent to `.if').
3689
 
3690
`.ifnes STRING1,STRING2'
3691
     Like `.ifeqs', but the sense of the test is reversed: this
3692
     assembles the following section of code if the two strings are not
3693
     the same.
3694
 
3695

3696
File: as.info,  Node: Incbin,  Next: Include,  Prev: If,  Up: Pseudo Ops
3697
 
3698
7.61 `.incbin "FILE"[,SKIP[,COUNT]]'
3699
====================================
3700
 
3701
The `incbin' directive includes FILE verbatim at the current location.
3702
You can control the search paths used with the `-I' command-line option
3703
(*note Command-Line Options: Invoking.).  Quotation marks are required
3704
around FILE.
3705
 
3706
   The SKIP argument skips a number of bytes from the start of the
3707
FILE.  The COUNT argument indicates the maximum number of bytes to
3708
read.  Note that the data is not aligned in any way, so it is the user's
3709
responsibility to make sure that proper alignment is provided both
3710
before and after the `incbin' directive.
3711
 
3712

3713
File: as.info,  Node: Include,  Next: Int,  Prev: Incbin,  Up: Pseudo Ops
3714
 
3715
7.62 `.include "FILE"'
3716
======================
3717
 
3718
This directive provides a way to include supporting files at specified
3719
points in your source program.  The code from FILE is assembled as if
3720
it followed the point of the `.include'; when the end of the included
3721
file is reached, assembly of the original file continues.  You can
3722
control the search paths used with the `-I' command-line option (*note
3723
Command-Line Options: Invoking.).  Quotation marks are required around
3724
FILE.
3725
 
3726

3727
File: as.info,  Node: Int,  Next: Internal,  Prev: Include,  Up: Pseudo Ops
3728
 
3729
7.63 `.int EXPRESSIONS'
3730
=======================
3731
 
3732
Expect zero or more EXPRESSIONS, of any section, separated by commas.
3733
For each expression, emit a number that, at run time, is the value of
3734
that expression.  The byte order and bit size of the number depends on
3735
what kind of target the assembly is for.
3736
 
3737

3738
File: as.info,  Node: Internal,  Next: Irp,  Prev: Int,  Up: Pseudo Ops
3739
 
3740
7.64 `.internal NAMES'
3741
======================
3742
 
3743
This is one of the ELF visibility directives.  The other two are
3744
`.hidden' (*note `.hidden': Hidden.) and `.protected' (*note
3745
`.protected': Protected.).
3746
 
3747
   This directive overrides the named symbols default visibility (which
3748
is set by their binding: local, global or weak).  The directive sets
3749
the visibility to `internal' which means that the symbols are
3750
considered to be `hidden' (i.e., not visible to other components), and
3751
that some extra, processor specific processing must also be performed
3752
upon the  symbols as well.
3753
 
3754

3755
File: as.info,  Node: Irp,  Next: Irpc,  Prev: Internal,  Up: Pseudo Ops
3756
 
3757
7.65 `.irp SYMBOL,VALUES'...
3758
============================
3759
 
3760
Evaluate a sequence of statements assigning different values to SYMBOL.
3761
The sequence of statements starts at the `.irp' directive, and is
3762
terminated by an `.endr' directive.  For each VALUE, SYMBOL is set to
3763
VALUE, and the sequence of statements is assembled.  If no VALUE is
3764
listed, the sequence of statements is assembled once, with SYMBOL set
3765
to the null string.  To refer to SYMBOL within the sequence of
3766
statements, use \SYMBOL.
3767
 
3768
   For example, assembling
3769
 
3770
             .irp    param,1,2,3
3771
             move    d\param,sp@-
3772
             .endr
3773
 
3774
   is equivalent to assembling
3775
 
3776
             move    d1,sp@-
3777
             move    d2,sp@-
3778
             move    d3,sp@-
3779
 
3780
   For some caveats with the spelling of SYMBOL, see also *Note Macro::.
3781
 
3782

3783
File: as.info,  Node: Irpc,  Next: Lcomm,  Prev: Irp,  Up: Pseudo Ops
3784
 
3785
7.66 `.irpc SYMBOL,VALUES'...
3786
=============================
3787
 
3788
Evaluate a sequence of statements assigning different values to SYMBOL.
3789
The sequence of statements starts at the `.irpc' directive, and is
3790
terminated by an `.endr' directive.  For each character in VALUE,
3791
SYMBOL is set to the character, and the sequence of statements is
3792
assembled.  If no VALUE is listed, the sequence of statements is
3793
assembled once, with SYMBOL set to the null string.  To refer to SYMBOL
3794
within the sequence of statements, use \SYMBOL.
3795
 
3796
   For example, assembling
3797
 
3798
             .irpc    param,123
3799
             move    d\param,sp@-
3800
             .endr
3801
 
3802
   is equivalent to assembling
3803
 
3804
             move    d1,sp@-
3805
             move    d2,sp@-
3806
             move    d3,sp@-
3807
 
3808
   For some caveats with the spelling of SYMBOL, see also the discussion
3809
at *Note Macro::.
3810
 
3811

3812
File: as.info,  Node: Lcomm,  Next: Lflags,  Prev: Irpc,  Up: Pseudo Ops
3813
 
3814
7.67 `.lcomm SYMBOL , LENGTH'
3815
=============================
3816
 
3817
Reserve LENGTH (an absolute expression) bytes for a local common
3818
denoted by SYMBOL.  The section and value of SYMBOL are those of the
3819
new local common.  The addresses are allocated in the bss section, so
3820
that at run-time the bytes start off zeroed.  SYMBOL is not declared
3821
global (*note `.global': Global.), so is normally not visible to `ld'.
3822
 
3823
   Some targets permit a third argument to be used with `.lcomm'.  This
3824
argument specifies the desired alignment of the symbol in the bss
3825
section.
3826
 
3827
   The syntax for `.lcomm' differs slightly on the HPPA.  The syntax is
3828
`SYMBOL .lcomm, LENGTH'; SYMBOL is optional.
3829
 
3830

3831
File: as.info,  Node: Lflags,  Next: Line,  Prev: Lcomm,  Up: Pseudo Ops
3832
 
3833
7.68 `.lflags'
3834
==============
3835
 
3836
`as' accepts this directive, for compatibility with other assemblers,
3837
but ignores it.
3838
 
3839

3840
File: as.info,  Node: Line,  Next: Linkonce,  Prev: Lflags,  Up: Pseudo Ops
3841
 
3842
7.69 `.line LINE-NUMBER'
3843
========================
3844
 
3845
   Change the logical line number.  LINE-NUMBER must be an absolute
3846
expression.  The next line has that logical line number.  Therefore any
3847
other statements on the current line (after a statement separator
3848
character) are reported as on logical line number LINE-NUMBER - 1.  One
3849
day `as' will no longer support this directive: it is recognized only
3850
for compatibility with existing assembler programs.
3851
 
3852
   Even though this is a directive associated with the `a.out' or
3853
`b.out' object-code formats, `as' still recognizes it when producing
3854
COFF output, and treats `.line' as though it were the COFF `.ln' _if_
3855
it is found outside a `.def'/`.endef' pair.
3856
 
3857
   Inside a `.def', `.line' is, instead, one of the directives used by
3858
compilers to generate auxiliary symbol information for debugging.
3859
 
3860

3861
File: as.info,  Node: Linkonce,  Next: List,  Prev: Line,  Up: Pseudo Ops
3862
 
3863
7.70 `.linkonce [TYPE]'
3864
=======================
3865
 
3866
Mark the current section so that the linker only includes a single copy
3867
of it.  This may be used to include the same section in several
3868
different object files, but ensure that the linker will only include it
3869
once in the final output file.  The `.linkonce' pseudo-op must be used
3870
for each instance of the section.  Duplicate sections are detected
3871
based on the section name, so it should be unique.
3872
 
3873
   This directive is only supported by a few object file formats; as of
3874
this writing, the only object file format which supports it is the
3875
Portable Executable format used on Windows NT.
3876
 
3877
   The TYPE argument is optional.  If specified, it must be one of the
3878
following strings.  For example:
3879
     .linkonce same_size
3880
   Not all types may be supported on all object file formats.
3881
 
3882
`discard'
3883
     Silently discard duplicate sections.  This is the default.
3884
 
3885
`one_only'
3886
     Warn if there are duplicate sections, but still keep only one copy.
3887
 
3888
`same_size'
3889
     Warn if any of the duplicates have different sizes.
3890
 
3891
`same_contents'
3892
     Warn if any of the duplicates do not have exactly the same
3893
     contents.
3894
 
3895

3896
File: as.info,  Node: Ln,  Next: LNS directives,  Prev: List,  Up: Pseudo Ops
3897
 
3898
7.71 `.ln LINE-NUMBER'
3899
======================
3900
 
3901
`.ln' is a synonym for `.line'.
3902
 
3903

3904
File: as.info,  Node: MRI,  Next: Noaltmacro,  Prev: Macro,  Up: Pseudo Ops
3905
 
3906
7.72 `.mri VAL'
3907
===============
3908
 
3909
If VAL is non-zero, this tells `as' to enter MRI mode.  If VAL is zero,
3910
this tells `as' to exit MRI mode.  This change affects code assembled
3911
until the next `.mri' directive, or until the end of the file.  *Note
3912
MRI mode: M.
3913
 
3914

3915
File: as.info,  Node: List,  Next: Ln,  Prev: Linkonce,  Up: Pseudo Ops
3916
 
3917
7.73 `.list'
3918
============
3919
 
3920
Control (in conjunction with the `.nolist' directive) whether or not
3921
assembly listings are generated.  These two directives maintain an
3922
internal counter (which is zero initially).   `.list' increments the
3923
counter, and `.nolist' decrements it.  Assembly listings are generated
3924
whenever the counter is greater than zero.
3925
 
3926
   By default, listings are disabled.  When you enable them (with the
3927
`-a' command line option; *note Command-Line Options: Invoking.), the
3928
initial value of the listing counter is one.
3929
 
3930

3931
File: as.info,  Node: Long,  Next: Macro,  Prev: LNS directives,  Up: Pseudo Ops
3932
 
3933
7.74 `.long EXPRESSIONS'
3934
========================
3935
 
3936
`.long' is the same as `.int'.  *Note `.int': Int.
3937
 
3938

3939
File: as.info,  Node: Macro,  Next: MRI,  Prev: Long,  Up: Pseudo Ops
3940
 
3941
7.75 `.macro'
3942
=============
3943
 
3944
The commands `.macro' and `.endm' allow you to define macros that
3945
generate assembly output.  For example, this definition specifies a
3946
macro `sum' that puts a sequence of numbers into memory:
3947
 
3948
             .macro  sum from=0, to=5
3949
             .long   \from
3950
             .if     \to-\from
3951
             sum     "(\from+1)",\to
3952
             .endif
3953
             .endm
3954
 
3955
With that definition, `SUM 0,5' is equivalent to this assembly input:
3956
 
3957
             .long   0
3958
             .long   1
3959
             .long   2
3960
             .long   3
3961
             .long   4
3962
             .long   5
3963
 
3964
`.macro MACNAME'
3965
`.macro MACNAME MACARGS ...'
3966
     Begin the definition of a macro called MACNAME.  If your macro
3967
     definition requires arguments, specify their names after the macro
3968
     name, separated by commas or spaces.  You can qualify the macro
3969
     argument to indicate whether all invocations must specify a
3970
     non-blank value (through `:`req''), or whether it takes all of the
3971
     remaining arguments (through `:`vararg'').  You can supply a
3972
     default value for any macro argument by following the name with
3973
     `=DEFLT'.  You cannot define two macros with the same MACNAME
3974
     unless it has been subject to the `.purgem' directive (*note
3975
     Purgem::) between the two definitions.  For example, these are all
3976
     valid `.macro' statements:
3977
 
3978
    `.macro comm'
3979
          Begin the definition of a macro called `comm', which takes no
3980
          arguments.
3981
 
3982
    `.macro plus1 p, p1'
3983
    `.macro plus1 p p1'
3984
          Either statement begins the definition of a macro called
3985
          `plus1', which takes two arguments; within the macro
3986
          definition, write `\p' or `\p1' to evaluate the arguments.
3987
 
3988
    `.macro reserve_str p1=0 p2'
3989
          Begin the definition of a macro called `reserve_str', with two
3990
          arguments.  The first argument has a default value, but not
3991
          the second.  After the definition is complete, you can call
3992
          the macro either as `reserve_str A,B' (with `\p1' evaluating
3993
          to A and `\p2' evaluating to B), or as `reserve_str ,B' (with
3994
          `\p1' evaluating as the default, in this case `0', and `\p2'
3995
          evaluating to B).
3996
 
3997
    `.macro m p1:req, p2=0, p3:vararg'
3998
          Begin the definition of a macro called `m', with at least
3999
          three arguments.  The first argument must always have a value
4000
          specified, but not the second, which instead has a default
4001
          value. The third formal will get assigned all remaining
4002
          arguments specified at invocation time.
4003
 
4004
          When you call a macro, you can specify the argument values
4005
          either by position, or by keyword.  For example, `sum 9,17'
4006
          is equivalent to `sum to=17, from=9'.
4007
 
4008
 
4009
     Note that since each of the MACARGS can be an identifier exactly
4010
     as any other one permitted by the target architecture, there may be
4011
     occasional problems if the target hand-crafts special meanings to
4012
     certain characters when they occur in a special position.  For
4013
     example, if the colon (`:') is generally permitted to be part of a
4014
     symbol name, but the architecture specific code special-cases it
4015
     when occurring as the final character of a symbol (to denote a
4016
     label), then the macro parameter replacement code will have no way
4017
     of knowing that and consider the whole construct (including the
4018
     colon) an identifier, and check only this identifier for being the
4019
     subject to parameter substitution.  So for example this macro
4020
     definition:
4021
 
4022
                .macro label l
4023
          \l:
4024
                .endm
4025
 
4026
     might not work as expected.  Invoking `label foo' might not create
4027
     a label called `foo' but instead just insert the text `\l:' into
4028
     the assembler source, probably generating an error about an
4029
     unrecognised identifier.
4030
 
4031
     Similarly problems might occur with the period character (`.')
4032
     which is often allowed inside opcode names (and hence identifier
4033
     names).  So for example constructing a macro to build an opcode
4034
     from a base name and a length specifier like this:
4035
 
4036
                .macro opcode base length
4037
                  \base.\length
4038
                .endm
4039
 
4040
     and invoking it as `opcode store l' will not create a `store.l'
4041
     instruction but instead generate some kind of error as the
4042
     assembler tries to interpret the text `\base.\length'.
4043
 
4044
     There are several possible ways around this problem:
4045
 
4046
    `Insert white space'
4047
          If it is possible to use white space characters then this is
4048
          the simplest solution.  eg:
4049
 
4050
                .macro label l
4051
               \l :
4052
                .endm
4053
 
4054
    `Use `\()''
4055
          The string `\()' can be used to separate the end of a macro
4056
          argument from the following text.  eg:
4057
 
4058
                .macro opcode base length
4059
                       \base\().\length
4060
                .endm
4061
 
4062
    `Use the alternate macro syntax mode'
4063
          In the alternative macro syntax mode the ampersand character
4064
          (`&') can be used as a separator.  eg:
4065
 
4066
                .altmacro
4067
                .macro label l
4068
               l&:
4069
                .endm
4070
 
4071
     Note: this problem of correctly identifying string parameters to
4072
     pseudo ops also applies to the identifiers used in `.irp' (*note
4073
     Irp::) and `.irpc' (*note Irpc::) as well.
4074
 
4075
`.endm'
4076
     Mark the end of a macro definition.
4077
 
4078
`.exitm'
4079
     Exit early from the current macro definition.
4080
 
4081
`\@'
4082
     `as' maintains a counter of how many macros it has executed in
4083
     this pseudo-variable; you can copy that number to your output with
4084
     `\@', but _only within a macro definition_.
4085
 
4086
`LOCAL NAME [ , ... ]'
4087
     _Warning: `LOCAL' is only available if you select "alternate macro
4088
     syntax" with `--alternate' or `.altmacro'._ *Note `.altmacro':
4089
     Altmacro.
4090
 
4091

4092
File: as.info,  Node: Altmacro,  Next: Ascii,  Prev: Align,  Up: Pseudo Ops
4093
 
4094
7.76 `.altmacro'
4095
================
4096
 
4097
Enable alternate macro mode, enabling:
4098
 
4099
`LOCAL NAME [ , ... ]'
4100
     One additional directive, `LOCAL', is available.  It is used to
4101
     generate a string replacement for each of the NAME arguments, and
4102
     replace any instances of NAME in each macro expansion.  The
4103
     replacement string is unique in the assembly, and different for
4104
     each separate macro expansion.  `LOCAL' allows you to write macros
4105
     that define symbols, without fear of conflict between separate
4106
     macro expansions.
4107
 
4108
`String delimiters'
4109
     You can write strings delimited in these other ways besides
4110
     `"STRING"':
4111
 
4112
    `'STRING''
4113
          You can delimit strings with single-quote characters.
4114
 
4115
    `'
4116
          You can delimit strings with matching angle brackets.
4117
 
4118
`single-character string escape'
4119
     To include any single character literally in a string (even if the
4120
     character would otherwise have some special meaning), you can
4121
     prefix the character with `!' (an exclamation mark).  For example,
4122
     you can write `<4.3 !> 5.4!!>' to get the literal text `4.3 >
4123
     5.4!'.
4124
 
4125
`Expression results as strings'
4126
     You can write `%EXPR' to evaluate the expression EXPR and use the
4127
     result as a string.
4128
 
4129

4130
File: as.info,  Node: Noaltmacro,  Next: Nolist,  Prev: MRI,  Up: Pseudo Ops
4131
 
4132
7.77 `.noaltmacro'
4133
==================
4134
 
4135
Disable alternate macro mode.  *Note Altmacro::.
4136
 
4137

4138
File: as.info,  Node: Nolist,  Next: Octa,  Prev: Noaltmacro,  Up: Pseudo Ops
4139
 
4140
7.78 `.nolist'
4141
==============
4142
 
4143
Control (in conjunction with the `.list' directive) whether or not
4144
assembly listings are generated.  These two directives maintain an
4145
internal counter (which is zero initially).   `.list' increments the
4146
counter, and `.nolist' decrements it.  Assembly listings are generated
4147
whenever the counter is greater than zero.
4148
 
4149

4150
File: as.info,  Node: Octa,  Next: Org,  Prev: Nolist,  Up: Pseudo Ops
4151
 
4152
7.79 `.octa BIGNUMS'
4153
====================
4154
 
4155
This directive expects zero or more bignums, separated by commas.  For
4156
each bignum, it emits a 16-byte integer.
4157
 
4158
   The term "octa" comes from contexts in which a "word" is two bytes;
4159
hence _octa_-word for 16 bytes.
4160
 
4161

4162
File: as.info,  Node: Org,  Next: P2align,  Prev: Octa,  Up: Pseudo Ops
4163
 
4164
7.80 `.org NEW-LC , FILL'
4165
=========================
4166
 
4167
Advance the location counter of the current section to NEW-LC.  NEW-LC
4168
is either an absolute expression or an expression with the same section
4169
as the current subsection.  That is, you can't use `.org' to cross
4170
sections: if NEW-LC has the wrong section, the `.org' directive is
4171
ignored.  To be compatible with former assemblers, if the section of
4172
NEW-LC is absolute, `as' issues a warning, then pretends the section of
4173
NEW-LC is the same as the current subsection.
4174
 
4175
   `.org' may only increase the location counter, or leave it
4176
unchanged; you cannot use `.org' to move the location counter backwards.
4177
 
4178
   Because `as' tries to assemble programs in one pass, NEW-LC may not
4179
be undefined.  If you really detest this restriction we eagerly await a
4180
chance to share your improved assembler.
4181
 
4182
   Beware that the origin is relative to the start of the section, not
4183
to the start of the subsection.  This is compatible with other people's
4184
assemblers.
4185
 
4186
   When the location counter (of the current subsection) is advanced,
4187
the intervening bytes are filled with FILL which should be an absolute
4188
expression.  If the comma and FILL are omitted, FILL defaults to zero.
4189
 
4190

4191
File: as.info,  Node: P2align,  Next: PopSection,  Prev: Org,  Up: Pseudo Ops
4192
 
4193
7.81 `.p2align[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR'
4194
================================================
4195
 
4196
Pad the location counter (in the current subsection) to a particular
4197
storage boundary.  The first expression (which must be absolute) is the
4198
number of low-order zero bits the location counter must have after
4199
advancement.  For example `.p2align 3' advances the location counter
4200
until it a multiple of 8.  If the location counter is already a
4201
multiple of 8, no change is needed.
4202
 
4203
   The second expression (also absolute) gives the fill value to be
4204
stored in the padding bytes.  It (and the comma) may be omitted.  If it
4205
is omitted, the padding bytes are normally zero.  However, on some
4206
systems, if the section is marked as containing code and the fill value
4207
is omitted, the space is filled with no-op instructions.
4208
 
4209
   The third expression is also absolute, and is also optional.  If it
4210
is present, it is the maximum number of bytes that should be skipped by
4211
this alignment directive.  If doing the alignment would require
4212
skipping more bytes than the specified maximum, then the alignment is
4213
not done at all.  You can omit the fill value (the second argument)
4214
entirely by simply using two commas after the required alignment; this
4215
can be useful if you want the alignment to be filled with no-op
4216
instructions when appropriate.
4217
 
4218
   The `.p2alignw' and `.p2alignl' directives are variants of the
4219
`.p2align' directive.  The `.p2alignw' directive treats the fill
4220
pattern as a two byte word value.  The `.p2alignl' directives treats the
4221
fill pattern as a four byte longword value.  For example, `.p2alignw
4222
2,0x368d' will align to a multiple of 4.  If it skips two bytes, they
4223
will be filled in with the value 0x368d (the exact placement of the
4224
bytes depends upon the endianness of the processor).  If it skips 1 or
4225
3 bytes, the fill value is undefined.
4226
 
4227

4228
File: as.info,  Node: Previous,  Next: Print,  Prev: PopSection,  Up: Pseudo Ops
4229
 
4230
7.82 `.previous'
4231
================
4232
 
4233
This is one of the ELF section stack manipulation directives.  The
4234
others are `.section' (*note Section::), `.subsection' (*note
4235
SubSection::), `.pushsection' (*note PushSection::), and `.popsection'
4236
(*note PopSection::).
4237
 
4238
   This directive swaps the current section (and subsection) with most
4239
recently referenced section/subsection pair prior to this one.  Multiple
4240
`.previous' directives in a row will flip between two sections (and
4241
their subsections).  For example:
4242
 
4243
     .section A
4244
      .subsection 1
4245
       .word 0x1234
4246
      .subsection 2
4247
       .word 0x5678
4248
     .previous
4249
      .word 0x9abc
4250
 
4251
   Will place 0x1234 and 0x9abc into subsection 1 and 0x5678 into
4252
subsection 2 of section A.  Whilst:
4253
 
4254
     .section A
4255
     .subsection 1
4256
       # Now in section A subsection 1
4257
       .word 0x1234
4258
     .section B
4259
     .subsection 0
4260
       # Now in section B subsection 0
4261
       .word 0x5678
4262
     .subsection 1
4263
       # Now in section B subsection 1
4264
       .word 0x9abc
4265
     .previous
4266
       # Now in section B subsection 0
4267
       .word 0xdef0
4268
 
4269
   Will place 0x1234 into section A, 0x5678 and 0xdef0 into subsection
4270
 
4271
 
4272
   In terms of the section stack, this directive swaps the current
4273
section with the top section on the section stack.
4274
 
4275

4276
File: as.info,  Node: PopSection,  Next: Previous,  Prev: P2align,  Up: Pseudo Ops
4277
 
4278
7.83 `.popsection'
4279
==================
4280
 
4281
This is one of the ELF section stack manipulation directives.  The
4282
others are `.section' (*note Section::), `.subsection' (*note
4283
SubSection::), `.pushsection' (*note PushSection::), and `.previous'
4284
(*note Previous::).
4285
 
4286
   This directive replaces the current section (and subsection) with
4287
the top section (and subsection) on the section stack.  This section is
4288
popped off the stack.
4289
 
4290

4291
File: as.info,  Node: Print,  Next: Protected,  Prev: Previous,  Up: Pseudo Ops
4292
 
4293
7.84 `.print STRING'
4294
====================
4295
 
4296
`as' will print STRING on the standard output during assembly.  You
4297
must put STRING in double quotes.
4298
 
4299

4300
File: as.info,  Node: Protected,  Next: Psize,  Prev: Print,  Up: Pseudo Ops
4301
 
4302
7.85 `.protected NAMES'
4303
=======================
4304
 
4305
This is one of the ELF visibility directives.  The other two are
4306
`.hidden' (*note Hidden::) and `.internal' (*note Internal::).
4307
 
4308
   This directive overrides the named symbols default visibility (which
4309
is set by their binding: local, global or weak).  The directive sets
4310
the visibility to `protected' which means that any references to the
4311
symbols from within the components that defines them must be resolved
4312
to the definition in that component, even if a definition in another
4313
component would normally preempt this.
4314
 
4315

4316
File: as.info,  Node: Psize,  Next: Purgem,  Prev: Protected,  Up: Pseudo Ops
4317
 
4318
7.86 `.psize LINES , COLUMNS'
4319
=============================
4320
 
4321
Use this directive to declare the number of lines--and, optionally, the
4322
number of columns--to use for each page, when generating listings.
4323
 
4324
   If you do not use `.psize', listings use a default line-count of 60.
4325
You may omit the comma and COLUMNS specification; the default width is
4326
200 columns.
4327
 
4328
   `as' generates formfeeds whenever the specified number of lines is
4329
exceeded (or whenever you explicitly request one, using `.eject').
4330
 
4331
   If you specify LINES as `0', no formfeeds are generated save those
4332
explicitly specified with `.eject'.
4333
 
4334

4335
File: as.info,  Node: Purgem,  Next: PushSection,  Prev: Psize,  Up: Pseudo Ops
4336
 
4337
7.87 `.purgem NAME'
4338
===================
4339
 
4340
Undefine the macro NAME, so that later uses of the string will not be
4341
expanded.  *Note Macro::.
4342
 
4343

4344
File: as.info,  Node: PushSection,  Next: Quad,  Prev: Purgem,  Up: Pseudo Ops
4345
 
4346
7.88 `.pushsection NAME [, SUBSECTION] [, "FLAGS"[, @TYPE[,ARGUMENTS]]]'
4347
========================================================================
4348
 
4349
This is one of the ELF section stack manipulation directives.  The
4350
others are `.section' (*note Section::), `.subsection' (*note
4351
SubSection::), `.popsection' (*note PopSection::), and `.previous'
4352
(*note Previous::).
4353
 
4354
   This directive pushes the current section (and subsection) onto the
4355
top of the section stack, and then replaces the current section and
4356
subsection with `name' and `subsection'. The optional `flags', `type'
4357
and `arguments' are treated the same as in the `.section' (*note
4358
Section::) directive.
4359
 
4360

4361
File: as.info,  Node: Quad,  Next: Reloc,  Prev: PushSection,  Up: Pseudo Ops
4362
 
4363
7.89 `.quad BIGNUMS'
4364
====================
4365
 
4366
`.quad' expects zero or more bignums, separated by commas.  For each
4367
bignum, it emits an 8-byte integer.  If the bignum won't fit in 8
4368
bytes, it prints a warning message; and just takes the lowest order 8
4369
bytes of the bignum.
4370
 
4371
   The term "quad" comes from contexts in which a "word" is two bytes;
4372
hence _quad_-word for 8 bytes.
4373
 
4374

4375
File: as.info,  Node: Reloc,  Next: Rept,  Prev: Quad,  Up: Pseudo Ops
4376
 
4377
7.90 `.reloc OFFSET, RELOC_NAME[, EXPRESSION]'
4378
==============================================
4379
 
4380
Generate a relocation at OFFSET of type RELOC_NAME with value
4381
EXPRESSION.  If OFFSET is a number, the relocation is generated in the
4382
current section.  If OFFSET is an expression that resolves to a symbol
4383
plus offset, the relocation is generated in the given symbol's section.
4384
EXPRESSION, if present, must resolve to a symbol plus addend or to an
4385
absolute value, but note that not all targets support an addend.  e.g.
4386
ELF REL targets such as i386 store an addend in the section contents
4387
rather than in the relocation.  This low level interface does not
4388
support addends stored in the section.
4389
 
4390

4391
File: as.info,  Node: Rept,  Next: Sbttl,  Prev: Reloc,  Up: Pseudo Ops
4392
 
4393
7.91 `.rept COUNT'
4394
==================
4395
 
4396
Repeat the sequence of lines between the `.rept' directive and the next
4397
`.endr' directive COUNT times.
4398
 
4399
   For example, assembling
4400
 
4401
             .rept   3
4402
             .long   0
4403
             .endr
4404
 
4405
   is equivalent to assembling
4406
 
4407
             .long   0
4408
             .long   0
4409
             .long   0
4410
 
4411

4412
File: as.info,  Node: Sbttl,  Next: Scl,  Prev: Rept,  Up: Pseudo Ops
4413
 
4414
7.92 `.sbttl "SUBHEADING"'
4415
==========================
4416
 
4417
Use SUBHEADING as the title (third line, immediately after the title
4418
line) when generating assembly listings.
4419
 
4420
   This directive affects subsequent pages, as well as the current page
4421
if it appears within ten lines of the top of a page.
4422
 
4423

4424
File: as.info,  Node: Scl,  Next: Section,  Prev: Sbttl,  Up: Pseudo Ops
4425
 
4426
7.93 `.scl CLASS'
4427
=================
4428
 
4429
Set the storage-class value for a symbol.  This directive may only be
4430
used inside a `.def'/`.endef' pair.  Storage class may flag whether a
4431
symbol is static or external, or it may record further symbolic
4432
debugging information.
4433
 
4434

4435
File: as.info,  Node: Section,  Next: Set,  Prev: Scl,  Up: Pseudo Ops
4436
 
4437
7.94 `.section NAME'
4438
====================
4439
 
4440
Use the `.section' directive to assemble the following code into a
4441
section named NAME.
4442
 
4443
   This directive is only supported for targets that actually support
4444
arbitrarily named sections; on `a.out' targets, for example, it is not
4445
accepted, even with a standard `a.out' section name.
4446
 
4447
COFF Version
4448
------------
4449
 
4450
   For COFF targets, the `.section' directive is used in one of the
4451
following ways:
4452
 
4453
     .section NAME[, "FLAGS"]
4454
     .section NAME[, SUBSECTION]
4455
 
4456
   If the optional argument is quoted, it is taken as flags to use for
4457
the section.  Each flag is a single character.  The following flags are
4458
recognized:
4459
`b'
4460
     bss section (uninitialized data)
4461
 
4462
`n'
4463
     section is not loaded
4464
 
4465
`w'
4466
     writable section
4467
 
4468
`d'
4469
     data section
4470
 
4471
`r'
4472
     read-only section
4473
 
4474
`x'
4475
     executable section
4476
 
4477
`s'
4478
     shared section (meaningful for PE targets)
4479
 
4480
`a'
4481
     ignored.  (For compatibility with the ELF version)
4482
 
4483
   If no flags are specified, the default flags depend upon the section
4484
name.  If the section name is not recognized, the default will be for
4485
the section to be loaded and writable.  Note the `n' and `w' flags
4486
remove attributes from the section, rather than adding them, so if they
4487
are used on their own it will be as if no flags had been specified at
4488
all.
4489
 
4490
   If the optional argument to the `.section' directive is not quoted,
4491
it is taken as a subsection number (*note Sub-Sections::).
4492
 
4493
ELF Version
4494
-----------
4495
 
4496
   This is one of the ELF section stack manipulation directives.  The
4497
others are `.subsection' (*note SubSection::), `.pushsection' (*note
4498
PushSection::), `.popsection' (*note PopSection::), and `.previous'
4499
(*note Previous::).
4500
 
4501
   For ELF targets, the `.section' directive is used like this:
4502
 
4503
     .section NAME [, "FLAGS"[, @TYPE[,FLAG_SPECIFIC_ARGUMENTS]]]
4504
 
4505
   The optional FLAGS argument is a quoted string which may contain any
4506
combination of the following characters:
4507
`a'
4508
     section is allocatable
4509
 
4510
`w'
4511
     section is writable
4512
 
4513
`x'
4514
     section is executable
4515
 
4516
`M'
4517
     section is mergeable
4518
 
4519
`S'
4520
     section contains zero terminated strings
4521
 
4522
`G'
4523
     section is a member of a section group
4524
 
4525
`T'
4526
     section is used for thread-local-storage
4527
 
4528
   The optional TYPE argument may contain one of the following
4529
constants:
4530
`@progbits'
4531
     section contains data
4532
 
4533
`@nobits'
4534
     section does not contain data (i.e., section only occupies space)
4535
 
4536
`@note'
4537
     section contains data which is used by things other than the
4538
     program
4539
 
4540
`@init_array'
4541
     section contains an array of pointers to init functions
4542
 
4543
`@fini_array'
4544
     section contains an array of pointers to finish functions
4545
 
4546
`@preinit_array'
4547
     section contains an array of pointers to pre-init functions
4548
 
4549
   Many targets only support the first three section types.
4550
 
4551
   Note on targets where the `@' character is the start of a comment (eg
4552
ARM) then another character is used instead.  For example the ARM port
4553
uses the `%' character.
4554
 
4555
   If FLAGS contains the `M' symbol then the TYPE argument must be
4556
specified as well as an extra argument--ENTSIZE--like this:
4557
 
4558
     .section NAME , "FLAGS"M, @TYPE, ENTSIZE
4559
 
4560
   Sections with the `M' flag but not `S' flag must contain fixed size
4561
constants, each ENTSIZE octets long. Sections with both `M' and `S'
4562
must contain zero terminated strings where each character is ENTSIZE
4563
bytes long. The linker may remove duplicates within sections with the
4564
same name, same entity size and same flags.  ENTSIZE must be an
4565
absolute expression.
4566
 
4567
   If FLAGS contains the `G' symbol then the TYPE argument must be
4568
present along with an additional field like this:
4569
 
4570
     .section NAME , "FLAGS"G, @TYPE, GROUPNAME[, LINKAGE]
4571
 
4572
   The GROUPNAME field specifies the name of the section group to which
4573
this particular section belongs.  The optional linkage field can
4574
contain:
4575
`comdat'
4576
     indicates that only one copy of this section should be retained
4577
 
4578
`.gnu.linkonce'
4579
     an alias for comdat
4580
 
4581
   Note: if both the M and G flags are present then the fields for the
4582
Merge flag should come first, like this:
4583
 
4584
     .section NAME , "FLAGS"MG, @TYPE, ENTSIZE, GROUPNAME[, LINKAGE]
4585
 
4586
   If no flags are specified, the default flags depend upon the section
4587
name.  If the section name is not recognized, the default will be for
4588
the section to have none of the above flags: it will not be allocated
4589
in memory, nor writable, nor executable.  The section will contain data.
4590
 
4591
   For ELF targets, the assembler supports another type of `.section'
4592
directive for compatibility with the Solaris assembler:
4593
 
4594
     .section "NAME"[, FLAGS...]
4595
 
4596
   Note that the section name is quoted.  There may be a sequence of
4597
comma separated flags:
4598
`#alloc'
4599
     section is allocatable
4600
 
4601
`#write'
4602
     section is writable
4603
 
4604
`#execinstr'
4605
     section is executable
4606
 
4607
`#tls'
4608
     section is used for thread local storage
4609
 
4610
   This directive replaces the current section and subsection.  See the
4611
contents of the gas testsuite directory `gas/testsuite/gas/elf' for
4612
some examples of how this directive and the other section stack
4613
directives work.
4614
 
4615

4616
File: as.info,  Node: Set,  Next: Short,  Prev: Section,  Up: Pseudo Ops
4617
 
4618
7.95 `.set SYMBOL, EXPRESSION'
4619
==============================
4620
 
4621
Set the value of SYMBOL to EXPRESSION.  This changes SYMBOL's value and
4622
type to conform to EXPRESSION.  If SYMBOL was flagged as external, it
4623
remains flagged (*note Symbol Attributes::).
4624
 
4625
   You may `.set' a symbol many times in the same assembly.
4626
 
4627
   If you `.set' a global symbol, the value stored in the object file
4628
is the last value stored into it.
4629
 
4630
   The syntax for `set' on the HPPA is `SYMBOL .set EXPRESSION'.
4631
 
4632
   On Z80 `set' is a real instruction, use `SYMBOL defl EXPRESSION'
4633
instead.
4634
 
4635

4636
File: as.info,  Node: Short,  Next: Single,  Prev: Set,  Up: Pseudo Ops
4637
 
4638
7.96 `.short EXPRESSIONS'
4639
=========================
4640
 
4641
`.short' is normally the same as `.word'.  *Note `.word': Word.
4642
 
4643
   In some configurations, however, `.short' and `.word' generate
4644
numbers of different lengths.  *Note Machine Dependencies::.
4645
 
4646

4647
File: as.info,  Node: Single,  Next: Size,  Prev: Short,  Up: Pseudo Ops
4648
 
4649
7.97 `.single FLONUMS'
4650
======================
4651
 
4652
This directive assembles zero or more flonums, separated by commas.  It
4653
has the same effect as `.float'.  The exact kind of floating point
4654
numbers emitted depends on how `as' is configured.  *Note Machine
4655
Dependencies::.
4656
 
4657

4658
File: as.info,  Node: Size,  Next: Skip,  Prev: Single,  Up: Pseudo Ops
4659
 
4660
7.98 `.size'
4661
============
4662
 
4663
This directive is used to set the size associated with a symbol.
4664
 
4665
COFF Version
4666
------------
4667
 
4668
   For COFF targets, the `.size' directive is only permitted inside
4669
`.def'/`.endef' pairs.  It is used like this:
4670
 
4671
     .size EXPRESSION
4672
 
4673
ELF Version
4674
-----------
4675
 
4676
   For ELF targets, the `.size' directive is used like this:
4677
 
4678
     .size NAME , EXPRESSION
4679
 
4680
   This directive sets the size associated with a symbol NAME.  The
4681
size in bytes is computed from EXPRESSION which can make use of label
4682
arithmetic.  This directive is typically used to set the size of
4683
function symbols.
4684
 
4685

4686
File: as.info,  Node: Sleb128,  Next: Space,  Prev: Skip,  Up: Pseudo Ops
4687
 
4688
7.99 `.sleb128 EXPRESSIONS'
4689
===========================
4690
 
4691
SLEB128 stands for "signed little endian base 128."  This is a compact,
4692
variable length representation of numbers used by the DWARF symbolic
4693
debugging format.  *Note `.uleb128': Uleb128.
4694
 
4695

4696
File: as.info,  Node: Skip,  Next: Sleb128,  Prev: Size,  Up: Pseudo Ops
4697
 
4698
7.100 `.skip SIZE , FILL'
4699
=========================
4700
 
4701
This directive emits SIZE bytes, each of value FILL.  Both SIZE and
4702
FILL are absolute expressions.  If the comma and FILL are omitted, FILL
4703
is assumed to be zero.  This is the same as `.space'.
4704
 
4705

4706
File: as.info,  Node: Space,  Next: Stab,  Prev: Sleb128,  Up: Pseudo Ops
4707
 
4708
7.101 `.space SIZE , FILL'
4709
==========================
4710
 
4711
This directive emits SIZE bytes, each of value FILL.  Both SIZE and
4712
FILL are absolute expressions.  If the comma and FILL are omitted, FILL
4713
is assumed to be zero.  This is the same as `.skip'.
4714
 
4715
     _Warning:_ `.space' has a completely different meaning for HPPA
4716
     targets; use `.block' as a substitute.  See `HP9000 Series 800
4717
     Assembly Language Reference Manual' (HP 92432-90001) for the
4718
     meaning of the `.space' directive.  *Note HPPA Assembler
4719
     Directives: HPPA Directives, for a summary.
4720
 
4721

4722
File: as.info,  Node: Stab,  Next: String,  Prev: Space,  Up: Pseudo Ops
4723
 
4724
7.102 `.stabd, .stabn, .stabs'
4725
==============================
4726
 
4727
There are three directives that begin `.stab'.  All emit symbols (*note
4728
Symbols::), for use by symbolic debuggers.  The symbols are not entered
4729
in the `as' hash table: they cannot be referenced elsewhere in the
4730
source file.  Up to five fields are required:
4731
 
4732
STRING
4733
     This is the symbol's name.  It may contain any character except
4734
     `\000', so is more general than ordinary symbol names.  Some
4735
     debuggers used to code arbitrarily complex structures into symbol
4736
     names using this field.
4737
 
4738
TYPE
4739
     An absolute expression.  The symbol's type is set to the low 8
4740
     bits of this expression.  Any bit pattern is permitted, but `ld'
4741
     and debuggers choke on silly bit patterns.
4742
 
4743
OTHER
4744
     An absolute expression.  The symbol's "other" attribute is set to
4745
     the low 8 bits of this expression.
4746
 
4747
DESC
4748
     An absolute expression.  The symbol's descriptor is set to the low
4749
     16 bits of this expression.
4750
 
4751
VALUE
4752
     An absolute expression which becomes the symbol's value.
4753
 
4754
   If a warning is detected while reading a `.stabd', `.stabn', or
4755
`.stabs' statement, the symbol has probably already been created; you
4756
get a half-formed symbol in your object file.  This is compatible with
4757
earlier assemblers!
4758
 
4759
`.stabd TYPE , OTHER , DESC'
4760
     The "name" of the symbol generated is not even an empty string.
4761
     It is a null pointer, for compatibility.  Older assemblers used a
4762
     null pointer so they didn't waste space in object files with empty
4763
     strings.
4764
 
4765
     The symbol's value is set to the location counter, relocatably.
4766
     When your program is linked, the value of this symbol is the
4767
     address of the location counter when the `.stabd' was assembled.
4768
 
4769
`.stabn TYPE , OTHER , DESC , VALUE'
4770
     The name of the symbol is set to the empty string `""'.
4771
 
4772
`.stabs STRING ,  TYPE , OTHER , DESC , VALUE'
4773
     All five fields are specified.
4774
 
4775

4776
File: as.info,  Node: String,  Next: Struct,  Prev: Stab,  Up: Pseudo Ops
4777
 
4778
7.103 `.string' "STR", `.string8' "STR", `.string16'
4779
====================================================
4780
 
4781
"STR", `.string32' "STR", `.string64' "STR"
4782
 
4783
   Copy the characters in STR to the object file.  You may specify more
4784
than one string to copy, separated by commas.  Unless otherwise
4785
specified for a particular machine, the assembler marks the end of each
4786
string with a 0 byte.  You can use any of the escape sequences
4787
described in *Note Strings: Strings.
4788
 
4789
   The variants `string16', `string32' and `string64' differ from the
4790
`string' pseudo opcode in that each 8-bit character from STR is copied
4791
and expanded to 16, 32 or 64 bits respectively.  The expanded characters
4792
are stored in target endianness byte order.
4793
 
4794
   Example:
4795
        .string32 "BYE"
4796
     expands to:
4797
        .string   "B\0\0\0Y\0\0\0E\0\0\0"  /* On little endian targets.  */
4798
        .string   "\0\0\0B\0\0\0Y\0\0\0E"  /* On big endian targets.  */
4799
 
4800

4801
File: as.info,  Node: Struct,  Next: SubSection,  Prev: String,  Up: Pseudo Ops
4802
 
4803
7.104 `.struct EXPRESSION'
4804
==========================
4805
 
4806
Switch to the absolute section, and set the section offset to
4807
EXPRESSION, which must be an absolute expression.  You might use this
4808
as follows:
4809
             .struct 0
4810
     field1:
4811
             .struct field1 + 4
4812
     field2:
4813
             .struct field2 + 4
4814
     field3:
4815
   This would define the symbol `field1' to have the value 0, the symbol
4816
`field2' to have the value 4, and the symbol `field3' to have the value
4817
8.  Assembly would be left in the absolute section, and you would need
4818
to use a `.section' directive of some sort to change to some other
4819
section before further assembly.
4820
 
4821

4822
File: as.info,  Node: SubSection,  Next: Symver,  Prev: Struct,  Up: Pseudo Ops
4823
 
4824
7.105 `.subsection NAME'
4825
========================
4826
 
4827
This is one of the ELF section stack manipulation directives.  The
4828
others are `.section' (*note Section::), `.pushsection' (*note
4829
PushSection::), `.popsection' (*note PopSection::), and `.previous'
4830
(*note Previous::).
4831
 
4832
   This directive replaces the current subsection with `name'.  The
4833
current section is not changed.  The replaced subsection is put onto
4834
the section stack in place of the then current top of stack subsection.
4835
 
4836

4837
File: as.info,  Node: Symver,  Next: Tag,  Prev: SubSection,  Up: Pseudo Ops
4838
 
4839
7.106 `.symver'
4840
===============
4841
 
4842
Use the `.symver' directive to bind symbols to specific version nodes
4843
within a source file.  This is only supported on ELF platforms, and is
4844
typically used when assembling files to be linked into a shared library.
4845
There are cases where it may make sense to use this in objects to be
4846
bound into an application itself so as to override a versioned symbol
4847
from a shared library.
4848
 
4849
   For ELF targets, the `.symver' directive can be used like this:
4850
     .symver NAME, NAME2@NODENAME
4851
   If the symbol NAME is defined within the file being assembled, the
4852
`.symver' directive effectively creates a symbol alias with the name
4853
NAME2@NODENAME, and in fact the main reason that we just don't try and
4854
create a regular alias is that the @ character isn't permitted in
4855
symbol names.  The NAME2 part of the name is the actual name of the
4856
symbol by which it will be externally referenced.  The name NAME itself
4857
is merely a name of convenience that is used so that it is possible to
4858
have definitions for multiple versions of a function within a single
4859
source file, and so that the compiler can unambiguously know which
4860
version of a function is being mentioned.  The NODENAME portion of the
4861
alias should be the name of a node specified in the version script
4862
supplied to the linker when building a shared library.  If you are
4863
attempting to override a versioned symbol from a shared library, then
4864
NODENAME should correspond to the nodename of the symbol you are trying
4865
to override.
4866
 
4867
   If the symbol NAME is not defined within the file being assembled,
4868
all references to NAME will be changed to NAME2@NODENAME.  If no
4869
reference to NAME is made, NAME2@NODENAME will be removed from the
4870
symbol table.
4871
 
4872
   Another usage of the `.symver' directive is:
4873
     .symver NAME, NAME2@@NODENAME
4874
   In this case, the symbol NAME must exist and be defined within the
4875
file being assembled. It is similar to NAME2@NODENAME. The difference
4876
is NAME2@@NODENAME will also be used to resolve references to NAME2 by
4877
the linker.
4878
 
4879
   The third usage of the `.symver' directive is:
4880
     .symver NAME, NAME2@@@NODENAME
4881
   When NAME is not defined within the file being assembled, it is
4882
treated as NAME2@NODENAME. When NAME is defined within the file being
4883
assembled, the symbol name, NAME, will be changed to NAME2@@NODENAME.
4884
 
4885

4886
File: as.info,  Node: Tag,  Next: Text,  Prev: Symver,  Up: Pseudo Ops
4887
 
4888
7.107 `.tag STRUCTNAME'
4889
=======================
4890
 
4891
This directive is generated by compilers to include auxiliary debugging
4892
information in the symbol table.  It is only permitted inside
4893
`.def'/`.endef' pairs.  Tags are used to link structure definitions in
4894
the symbol table with instances of those structures.
4895
 
4896

4897
File: as.info,  Node: Text,  Next: Title,  Prev: Tag,  Up: Pseudo Ops
4898
 
4899
7.108 `.text SUBSECTION'
4900
========================
4901
 
4902
Tells `as' to assemble the following statements onto the end of the
4903
text subsection numbered SUBSECTION, which is an absolute expression.
4904
If SUBSECTION is omitted, subsection number zero is used.
4905
 
4906

4907
File: as.info,  Node: Title,  Next: Type,  Prev: Text,  Up: Pseudo Ops
4908
 
4909
7.109 `.title "HEADING"'
4910
========================
4911
 
4912
Use HEADING as the title (second line, immediately after the source
4913
file name and pagenumber) when generating assembly listings.
4914
 
4915
   This directive affects subsequent pages, as well as the current page
4916
if it appears within ten lines of the top of a page.
4917
 
4918

4919
File: as.info,  Node: Type,  Next: Uleb128,  Prev: Title,  Up: Pseudo Ops
4920
 
4921
7.110 `.type'
4922
=============
4923
 
4924
This directive is used to set the type of a symbol.
4925
 
4926
COFF Version
4927
------------
4928
 
4929
   For COFF targets, this directive is permitted only within
4930
`.def'/`.endef' pairs.  It is used like this:
4931
 
4932
     .type INT
4933
 
4934
   This records the integer INT as the type attribute of a symbol table
4935
entry.
4936
 
4937
ELF Version
4938
-----------
4939
 
4940
   For ELF targets, the `.type' directive is used like this:
4941
 
4942
     .type NAME , TYPE DESCRIPTION
4943
 
4944
   This sets the type of symbol NAME to be either a function symbol or
4945
an object symbol.  There are five different syntaxes supported for the
4946
TYPE DESCRIPTION field, in order to provide compatibility with various
4947
other assemblers.
4948
 
4949
   Because some of the characters used in these syntaxes (such as `@'
4950
and `#') are comment characters for some architectures, some of the
4951
syntaxes below do not work on all architectures.  The first variant
4952
will be accepted by the GNU assembler on all architectures so that
4953
variant should be used for maximum portability, if you do not need to
4954
assemble your code with other assemblers.
4955
 
4956
   The syntaxes supported are:
4957
 
4958
       .type  STT_
4959
       .type ,#
4960
       .type ,@
4961
       .type ,%>type>
4962
       .type ,""
4963
 
4964
   The types supported are:
4965
 
4966
`STT_FUNC'
4967
`function'
4968
     Mark the symbol as being a function name.
4969
 
4970
`STT_OBJECT'
4971
`object'
4972
     Mark the symbol as being a data object.
4973
 
4974
`STT_TLS'
4975
`tls_object'
4976
     Mark the symbol as being a thead-local data object.
4977
 
4978
`STT_COMMON'
4979
`common'
4980
     Mark the symbol as being a common data object.
4981
 
4982
   Note: Some targets support extra types in addition to those listed
4983
above.
4984
 
4985

4986
File: as.info,  Node: Uleb128,  Next: Val,  Prev: Type,  Up: Pseudo Ops
4987
 
4988
7.111 `.uleb128 EXPRESSIONS'
4989
============================
4990
 
4991
ULEB128 stands for "unsigned little endian base 128."  This is a
4992
compact, variable length representation of numbers used by the DWARF
4993
symbolic debugging format.  *Note `.sleb128': Sleb128.
4994
 
4995

4996
File: as.info,  Node: Val,  Next: Version,  Prev: Uleb128,  Up: Pseudo Ops
4997
 
4998
7.112 `.val ADDR'
4999
=================
5000
 
5001
This directive, permitted only within `.def'/`.endef' pairs, records
5002
the address ADDR as the value attribute of a symbol table entry.
5003
 
5004

5005
File: as.info,  Node: Version,  Next: VTableEntry,  Prev: Val,  Up: Pseudo Ops
5006
 
5007
7.113 `.version "STRING"'
5008
=========================
5009
 
5010
This directive creates a `.note' section and places into it an ELF
5011
formatted note of type NT_VERSION.  The note's name is set to `string'.
5012
 
5013

5014
File: as.info,  Node: VTableEntry,  Next: VTableInherit,  Prev: Version,  Up: Pseudo Ops
5015
 
5016
7.114 `.vtable_entry TABLE, OFFSET'
5017
===================================
5018
 
5019
This directive finds or creates a symbol `table' and creates a
5020
`VTABLE_ENTRY' relocation for it with an addend of `offset'.
5021
 
5022

5023
File: as.info,  Node: VTableInherit,  Next: Warning,  Prev: VTableEntry,  Up: Pseudo Ops
5024
 
5025
7.115 `.vtable_inherit CHILD, PARENT'
5026
=====================================
5027
 
5028
This directive finds the symbol `child' and finds or creates the symbol
5029
`parent' and then creates a `VTABLE_INHERIT' relocation for the parent
5030
whose addend is the value of the child symbol.  As a special case the
5031
parent name of `0' is treated as referring to the `*ABS*' section.
5032
 
5033

5034
File: as.info,  Node: Warning,  Next: Weak,  Prev: VTableInherit,  Up: Pseudo Ops
5035
 
5036
7.116 `.warning "STRING"'
5037
=========================
5038
 
5039
Similar to the directive `.error' (*note `.error "STRING"': Error.),
5040
but just emits a warning.
5041
 
5042

5043
File: as.info,  Node: Weak,  Next: Weakref,  Prev: Warning,  Up: Pseudo Ops
5044
 
5045
7.117 `.weak NAMES'
5046
===================
5047
 
5048
This directive sets the weak attribute on the comma separated list of
5049
symbol `names'.  If the symbols do not already exist, they will be
5050
created.
5051
 
5052
   On COFF targets other than PE, weak symbols are a GNU extension.
5053
This directive sets the weak attribute on the comma separated list of
5054
symbol `names'.  If the symbols do not already exist, they will be
5055
created.
5056
 
5057
   On the PE target, weak symbols are supported natively as weak
5058
aliases.  When a weak symbol is created that is not an alias, GAS
5059
creates an alternate symbol to hold the default value.
5060
 
5061

5062
File: as.info,  Node: Weakref,  Next: Word,  Prev: Weak,  Up: Pseudo Ops
5063
 
5064
7.118 `.weakref ALIAS, TARGET'
5065
==============================
5066
 
5067
This directive creates an alias to the target symbol that enables the
5068
symbol to be referenced with weak-symbol semantics, but without
5069
actually making it weak.  If direct references or definitions of the
5070
symbol are present, then the symbol will not be weak, but if all
5071
references to it are through weak references, the symbol will be marked
5072
as weak in the symbol table.
5073
 
5074
   The effect is equivalent to moving all references to the alias to a
5075
separate assembly source file, renaming the alias to the symbol in it,
5076
declaring the symbol as weak there, and running a reloadable link to
5077
merge the object files resulting from the assembly of the new source
5078
file and the old source file that had the references to the alias
5079
removed.
5080
 
5081
   The alias itself never makes to the symbol table, and is entirely
5082
handled within the assembler.
5083
 
5084

5085
File: as.info,  Node: Word,  Next: Deprecated,  Prev: Weakref,  Up: Pseudo Ops
5086
 
5087
7.119 `.word EXPRESSIONS'
5088
=========================
5089
 
5090
This directive expects zero or more EXPRESSIONS, of any section,
5091
separated by commas.
5092
 
5093
   The size of the number emitted, and its byte order, depend on what
5094
target computer the assembly is for.
5095
 
5096
     _Warning: Special Treatment to support Compilers_
5097
 
5098
   Machines with a 32-bit address space, but that do less than 32-bit
5099
addressing, require the following special treatment.  If the machine of
5100
interest to you does 32-bit addressing (or doesn't require it; *note
5101
Machine Dependencies::), you can ignore this issue.
5102
 
5103
   In order to assemble compiler output into something that works, `as'
5104
occasionally does strange things to `.word' directives.  Directives of
5105
the form `.word sym1-sym2' are often emitted by compilers as part of
5106
jump tables.  Therefore, when `as' assembles a directive of the form
5107
`.word sym1-sym2', and the difference between `sym1' and `sym2' does
5108
not fit in 16 bits, `as' creates a "secondary jump table", immediately
5109
before the next label.  This secondary jump table is preceded by a
5110
short-jump to the first byte after the secondary table.  This
5111
short-jump prevents the flow of control from accidentally falling into
5112
the new table.  Inside the table is a long-jump to `sym2'.  The
5113
original `.word' contains `sym1' minus the address of the long-jump to
5114
`sym2'.
5115
 
5116
   If there were several occurrences of `.word sym1-sym2' before the
5117
secondary jump table, all of them are adjusted.  If there was a `.word
5118
sym3-sym4', that also did not fit in sixteen bits, a long-jump to
5119
`sym4' is included in the secondary jump table, and the `.word'
5120
directives are adjusted to contain `sym3' minus the address of the
5121
long-jump to `sym4'; and so on, for as many entries in the original
5122
jump table as necessary.
5123
 
5124

5125
File: as.info,  Node: Deprecated,  Prev: Word,  Up: Pseudo Ops
5126
 
5127
7.120 Deprecated Directives
5128
===========================
5129
 
5130
One day these directives won't work.  They are included for
5131
compatibility with older assemblers.
5132
.abort
5133
 
5134
.line
5135
 
5136

5137
File: as.info,  Node: Object Attributes,  Next: Machine Dependencies,  Prev: Pseudo Ops,  Up: Top
5138
 
5139
8 Object Attributes
5140
*******************
5141
 
5142
`as' assembles source files written for a specific architecture into
5143
object files for that architecture.  But not all object files are alike.
5144
Many architectures support incompatible variations.  For instance,
5145
floating point arguments might be passed in floating point registers if
5146
the object file requires hardware floating point support--or floating
5147
point arguments might be passed in integer registers if the object file
5148
supports processors with no hardware floating point unit.  Or, if two
5149
objects are built for different generations of the same architecture,
5150
the combination may require the newer generation at run-time.
5151
 
5152
   This information is useful during and after linking.  At link time,
5153
`ld' can warn about incompatible object files.  After link time, tools
5154
like `gdb' can use it to process the linked file correctly.
5155
 
5156
   Compatibility information is recorded as a series of object
5157
attributes.  Each attribute has a "vendor", "tag", and "value".  The
5158
vendor is a string, and indicates who sets the meaning of the tag.  The
5159
tag is an integer, and indicates what property the attribute describes.
5160
The value may be a string or an integer, and indicates how the
5161
property affects this object.  Missing attributes are the same as
5162
attributes with a zero value or empty string value.
5163
 
5164
   Object attributes were developed as part of the ABI for the ARM
5165
Architecture.  The file format is documented in `ELF for the ARM
5166
Architecture'.
5167
 
5168
* Menu:
5169
 
5170
* GNU Object Attributes::               GNU Object Attributes
5171
* Defining New Object Attributes::      Defining New Object Attributes
5172
 
5173

5174
File: as.info,  Node: GNU Object Attributes,  Next: Defining New Object Attributes,  Up: Object Attributes
5175
 
5176
8.1 GNU Object Attributes
5177
=========================
5178
 
5179
The `.gnu_attribute' directive records an object attribute with vendor
5180
`gnu'.
5181
 
5182
   Except for `Tag_compatibility', which has both an integer and a
5183
string for its value, GNU attributes have a string value if the tag
5184
number is odd and an integer value if the tag number is even.  The
5185
second bit (`TAG & 2' is set for architecture-independent attributes
5186
and clear for architecture-dependent ones.
5187
 
5188
8.1.1 Common GNU attributes
5189
---------------------------
5190
 
5191
These attributes are valid on all architectures.
5192
 
5193
Tag_compatibility (32)
5194
     The compatibility attribute takes an integer flag value and a
5195
     vendor name.  If the flag value is 0, the file is compatible with
5196
     other toolchains.  If it is 1, then the file is only compatible
5197
     with the named toolchain.  If it is greater than 1, the file can
5198
     only be processed by other toolchains under some private
5199
     arrangement indicated by the flag value and the vendor name.
5200
 
5201
8.1.2 MIPS Attributes
5202
---------------------
5203
 
5204
Tag_GNU_MIPS_ABI_FP (4)
5205
     The floating-point ABI used by this object file.  The value will
5206
     be:
5207
 
5208
        * 0 for files not affected by the floating-point ABI.
5209
 
5210
        * 1 for files using the hardware floating-point with a standard
5211
          double-precision FPU.
5212
 
5213
        * 2 for files using the hardware floating-point ABI with a
5214
          single-precision FPU.
5215
 
5216
        * 3 for files using the software floating-point ABI.
5217
 
5218
        * 4 for files using the hardware floating-point ABI with 64-bit
5219
          wide double-precision floating-point registers and 32-bit
5220
          wide general purpose registers.
5221
 
5222
8.1.3 PowerPC Attributes
5223
------------------------
5224
 
5225
Tag_GNU_Power_ABI_FP (4)
5226
     The floating-point ABI used by this object file.  The value will
5227
     be:
5228
 
5229
        * 0 for files not affected by the floating-point ABI.
5230
 
5231
        * 1 for files using the hardware floating-point ABI.
5232
 
5233
        * 2 for files using the software floating-point ABI.
5234
 
5235
Tag_GNU_Power_ABI_Vector (8)
5236
     The vector ABI used by this object file.  The value will be:
5237
 
5238
        * 0 for files not affected by the vector ABI.
5239
 
5240
        * 1 for files using general purpose registers to pass vectors.
5241
 
5242
        * 2 for files using AltiVec registers to pass vectors.
5243
 
5244
        * 3 for files using SPE registers to pass vectors.
5245
 
5246

5247
File: as.info,  Node: Defining New Object Attributes,  Prev: GNU Object Attributes,  Up: Object Attributes
5248
 
5249
8.2 Defining New Object Attributes
5250
==================================
5251
 
5252
If you want to define a new GNU object attribute, here are the places
5253
you will need to modify.  New attributes should be discussed on the
5254
`binutils' mailing list.
5255
 
5256
   * This manual, which is the official register of attributes.
5257
 
5258
   * The header for your architecture `include/elf', to define the tag.
5259
 
5260
   * The `bfd' support file for your architecture, to merge the
5261
     attribute and issue any appropriate link warnings.
5262
 
5263
   * Test cases in `ld/testsuite' for merging and link warnings.
5264
 
5265
   * `binutils/readelf.c' to display your attribute.
5266
 
5267
   * GCC, if you want the compiler to mark the attribute automatically.
5268
 
5269

5270
File: as.info,  Node: Machine Dependencies,  Next: Reporting Bugs,  Prev: Object Attributes,  Up: Top
5271
 
5272
9 Machine Dependent Features
5273
****************************
5274
 
5275
The machine instruction sets are (almost by definition) different on
5276
each machine where `as' runs.  Floating point representations vary as
5277
well, and `as' often supports a few additional directives or
5278
command-line options for compatibility with other assemblers on a
5279
particular platform.  Finally, some versions of `as' support special
5280
pseudo-instructions for branch optimization.
5281
 
5282
   This chapter discusses most of these differences, though it does not
5283
include details on any machine's instruction set.  For details on that
5284
subject, see the hardware manufacturer's manual.
5285
 
5286
* Menu:
5287
 
5288
 
5289
* Alpha-Dependent::             Alpha Dependent Features
5290
 
5291
* ARC-Dependent::               ARC Dependent Features
5292
 
5293
* ARM-Dependent::               ARM Dependent Features
5294
 
5295
* AVR-Dependent::               AVR Dependent Features
5296
 
5297
* BFIN-Dependent::              BFIN Dependent Features
5298
 
5299
* CR16-Dependent::              CR16 Dependent Features
5300
 
5301
* CRIS-Dependent::              CRIS Dependent Features
5302
 
5303
* D10V-Dependent::              D10V Dependent Features
5304
 
5305
* D30V-Dependent::              D30V Dependent Features
5306
 
5307
* H8/300-Dependent::            Renesas H8/300 Dependent Features
5308
 
5309
* HPPA-Dependent::              HPPA Dependent Features
5310
 
5311
* ESA/390-Dependent::           IBM ESA/390 Dependent Features
5312
 
5313
* i386-Dependent::              Intel 80386 and AMD x86-64 Dependent Features
5314
 
5315
* i860-Dependent::              Intel 80860 Dependent Features
5316
 
5317
* i960-Dependent::              Intel 80960 Dependent Features
5318
 
5319
* IA-64-Dependent::             Intel IA-64 Dependent Features
5320
 
5321
* IP2K-Dependent::              IP2K Dependent Features
5322
 
5323
* M32C-Dependent::              M32C Dependent Features
5324
 
5325
* M32R-Dependent::              M32R Dependent Features
5326
 
5327
* M68K-Dependent::              M680x0 Dependent Features
5328
 
5329
* M68HC11-Dependent::           M68HC11 and 68HC12 Dependent Features
5330
 
5331
* MIPS-Dependent::              MIPS Dependent Features
5332
 
5333
* MMIX-Dependent::              MMIX Dependent Features
5334
 
5335
* MSP430-Dependent::            MSP430 Dependent Features
5336
 
5337
* SH-Dependent::                Renesas / SuperH SH Dependent Features
5338
* SH64-Dependent::              SuperH SH64 Dependent Features
5339
 
5340
* PDP-11-Dependent::            PDP-11 Dependent Features
5341
 
5342
* PJ-Dependent::                picoJava Dependent Features
5343
 
5344
* PPC-Dependent::               PowerPC Dependent Features
5345
 
5346
* Sparc-Dependent::             SPARC Dependent Features
5347
 
5348
* TIC54X-Dependent::            TI TMS320C54x Dependent Features
5349
 
5350
* V850-Dependent::              V850 Dependent Features
5351
 
5352
* Xtensa-Dependent::            Xtensa Dependent Features
5353
 
5354
* Z80-Dependent::               Z80 Dependent Features
5355
 
5356
* Z8000-Dependent::             Z8000 Dependent Features
5357
 
5358
* Vax-Dependent::               VAX Dependent Features
5359
 
5360

5361
File: as.info,  Node: Alpha-Dependent,  Next: ARC-Dependent,  Up: Machine Dependencies
5362
 
5363
9.1 Alpha Dependent Features
5364
============================
5365
 
5366
* Menu:
5367
 
5368
* Alpha Notes::                Notes
5369
* Alpha Options::              Options
5370
* Alpha Syntax::               Syntax
5371
* Alpha Floating Point::       Floating Point
5372
* Alpha Directives::           Alpha Machine Directives
5373
* Alpha Opcodes::              Opcodes
5374
 
5375

5376
File: as.info,  Node: Alpha Notes,  Next: Alpha Options,  Up: Alpha-Dependent
5377
 
5378
9.1.1 Notes
5379
-----------
5380
 
5381
The documentation here is primarily for the ELF object format.  `as'
5382
also supports the ECOFF and EVAX formats, but features specific to
5383
these formats are not yet documented.
5384
 
5385

5386
File: as.info,  Node: Alpha Options,  Next: Alpha Syntax,  Prev: Alpha Notes,  Up: Alpha-Dependent
5387
 
5388
9.1.2 Options
5389
-------------
5390
 
5391
`-mCPU'
5392
     This option specifies the target processor.  If an attempt is made
5393
     to assemble an instruction which will not execute on the target
5394
     processor, the assembler may either expand the instruction as a
5395
     macro or issue an error message.  This option is equivalent to the
5396
     `.arch' directive.
5397
 
5398
     The following processor names are recognized: `21064', `21064a',
5399
     `21066', `21068', `21164', `21164a', `21164pc', `21264', `21264a',
5400
     `21264b', `ev4', `ev5', `lca45', `ev5', `ev56', `pca56', `ev6',
5401
     `ev67', `ev68'.  The special name `all' may be used to allow the
5402
     assembler to accept instructions valid for any Alpha processor.
5403
 
5404
     In order to support existing practice in OSF/1 with respect to
5405
     `.arch', and existing practice within `MILO' (the Linux ARC
5406
     bootloader), the numbered processor names (e.g. 21064) enable the
5407
     processor-specific PALcode instructions, while the
5408
     "electro-vlasic" names (e.g. `ev4') do not.
5409
 
5410
`-mdebug'
5411
`-no-mdebug'
5412
     Enables or disables the generation of `.mdebug' encapsulation for
5413
     stabs directives and procedure descriptors.  The default is to
5414
     automatically enable `.mdebug' when the first stabs directive is
5415
     seen.
5416
 
5417
`-relax'
5418
     This option forces all relocations to be put into the object file,
5419
     instead of saving space and resolving some relocations at assembly
5420
     time.  Note that this option does not propagate all symbol
5421
     arithmetic into the object file, because not all symbol arithmetic
5422
     can be represented.  However, the option can still be useful in
5423
     specific applications.
5424
 
5425
`-g'
5426
     This option is used when the compiler generates debug information.
5427
     When `gcc' is using `mips-tfile' to generate debug information
5428
     for ECOFF, local labels must be passed through to the object file.
5429
     Otherwise this option has no effect.
5430
 
5431
`-GSIZE'
5432
     A local common symbol larger than SIZE is placed in `.bss', while
5433
     smaller symbols are placed in `.sbss'.
5434
 
5435
`-F'
5436
`-32addr'
5437
     These options are ignored for backward compatibility.
5438
 
5439

5440
File: as.info,  Node: Alpha Syntax,  Next: Alpha Floating Point,  Prev: Alpha Options,  Up: Alpha-Dependent
5441
 
5442
9.1.3 Syntax
5443
------------
5444
 
5445
The assembler syntax closely follow the Alpha Reference Manual;
5446
assembler directives and general syntax closely follow the OSF/1 and
5447
OpenVMS syntax, with a few differences for ELF.
5448
 
5449
* Menu:
5450
 
5451
* Alpha-Chars::                Special Characters
5452
* Alpha-Regs::                 Register Names
5453
* Alpha-Relocs::               Relocations
5454
 
5455

5456
File: as.info,  Node: Alpha-Chars,  Next: Alpha-Regs,  Up: Alpha Syntax
5457
 
5458
9.1.3.1 Special Characters
5459
..........................
5460
 
5461
`#' is the line comment character.
5462
 
5463
   `;' can be used instead of a newline to separate statements.
5464
 
5465

5466
File: as.info,  Node: Alpha-Regs,  Next: Alpha-Relocs,  Prev: Alpha-Chars,  Up: Alpha Syntax
5467
 
5468
9.1.3.2 Register Names
5469
......................
5470
 
5471
The 32 integer registers are referred to as `$N' or `$rN'.  In
5472
addition, registers 15, 28, 29, and 30 may be referred to by the
5473
symbols `$fp', `$at', `$gp', and `$sp' respectively.
5474
 
5475
   The 32 floating-point registers are referred to as `$fN'.
5476
 
5477

5478
File: as.info,  Node: Alpha-Relocs,  Prev: Alpha-Regs,  Up: Alpha Syntax
5479
 
5480
9.1.3.3 Relocations
5481
...................
5482
 
5483
Some of these relocations are available for ECOFF, but mostly only for
5484
ELF.  They are modeled after the relocation format introduced in
5485
Digital Unix 4.0, but there are additions.
5486
 
5487
   The format is `!TAG' or `!TAG!NUMBER' where TAG is the name of the
5488
relocation.  In some cases NUMBER is used to relate specific
5489
instructions.
5490
 
5491
   The relocation is placed at the end of the instruction like so:
5492
 
5493
     ldah  $0,a($29)    !gprelhigh
5494
     lda   $0,a($0)     !gprellow
5495
     ldq   $1,b($29)    !literal!100
5496
     ldl   $2,0($1)     !lituse_base!100
5497
 
5498
`!literal'
5499
`!literal!N'
5500
     Used with an `ldq' instruction to load the address of a symbol
5501
     from the GOT.
5502
 
5503
     A sequence number N is optional, and if present is used to pair
5504
     `lituse' relocations with this `literal' relocation.  The `lituse'
5505
     relocations are used by the linker to optimize the code based on
5506
     the final location of the symbol.
5507
 
5508
     Note that these optimizations are dependent on the data flow of the
5509
     program.  Therefore, if _any_ `lituse' is paired with a `literal'
5510
     relocation, then _all_ uses of the register set by the `literal'
5511
     instruction must also be marked with `lituse' relocations.  This
5512
     is because the original `literal' instruction may be deleted or
5513
     transformed into another instruction.
5514
 
5515
     Also note that there may be a one-to-many relationship between
5516
     `literal' and `lituse', but not a many-to-one.  That is, if there
5517
     are two code paths that load up the same address and feed the
5518
     value to a single use, then the use may not use a `lituse'
5519
     relocation.
5520
 
5521
`!lituse_base!N'
5522
     Used with any memory format instruction (e.g. `ldl') to indicate
5523
     that the literal is used for an address load.  The offset field of
5524
     the instruction must be zero.  During relaxation, the code may be
5525
     altered to use a gp-relative load.
5526
 
5527
`!lituse_jsr!N'
5528
     Used with a register branch format instruction (e.g. `jsr') to
5529
     indicate that the literal is used for a call.  During relaxation,
5530
     the code may be altered to use a direct branch (e.g. `bsr').
5531
 
5532
`!lituse_jsrdirect!N'
5533
     Similar to `lituse_jsr', but also that this call cannot be vectored
5534
     through a PLT entry.  This is useful for functions with special
5535
     calling conventions which do not allow the normal call-clobbered
5536
     registers to be clobbered.
5537
 
5538
`!lituse_bytoff!N'
5539
     Used with a byte mask instruction (e.g. `extbl') to indicate that
5540
     only the low 3 bits of the address are relevant.  During
5541
     relaxation, the code may be altered to use an immediate instead of
5542
     a register shift.
5543
 
5544
`!lituse_addr!N'
5545
     Used with any other instruction to indicate that the original
5546
     address is in fact used, and the original `ldq' instruction may
5547
     not be altered or deleted.  This is useful in conjunction with
5548
     `lituse_jsr' to test whether a weak symbol is defined.
5549
 
5550
          ldq  $27,foo($29)   !literal!1
5551
          beq  $27,is_undef   !lituse_addr!1
5552
          jsr  $26,($27),foo  !lituse_jsr!1
5553
 
5554
`!lituse_tlsgd!N'
5555
     Used with a register branch format instruction to indicate that the
5556
     literal is the call to `__tls_get_addr' used to compute the
5557
     address of the thread-local storage variable whose descriptor was
5558
     loaded with `!tlsgd!N'.
5559
 
5560
`!lituse_tlsldm!N'
5561
     Used with a register branch format instruction to indicate that the
5562
     literal is the call to `__tls_get_addr' used to compute the
5563
     address of the base of the thread-local storage block for the
5564
     current module.  The descriptor for the module must have been
5565
     loaded with `!tlsldm!N'.
5566
 
5567
`!gpdisp!N'
5568
     Used with `ldah' and `lda' to load the GP from the current
5569
     address, a-la the `ldgp' macro.  The source register for the
5570
     `ldah' instruction must contain the address of the `ldah'
5571
     instruction.  There must be exactly one `lda' instruction paired
5572
     with the `ldah' instruction, though it may appear anywhere in the
5573
     instruction stream.  The immediate operands must be zero.
5574
 
5575
          bsr  $26,foo
5576
          ldah $29,0($26)     !gpdisp!1
5577
          lda  $29,0($29)     !gpdisp!1
5578
 
5579
`!gprelhigh'
5580
     Used with an `ldah' instruction to add the high 16 bits of a
5581
     32-bit displacement from the GP.
5582
 
5583
`!gprellow'
5584
     Used with any memory format instruction to add the low 16 bits of a
5585
     32-bit displacement from the GP.
5586
 
5587
`!gprel'
5588
     Used with any memory format instruction to add a 16-bit
5589
     displacement from the GP.
5590
 
5591
`!samegp'
5592
     Used with any branch format instruction to skip the GP load at the
5593
     target address.  The referenced symbol must have the same GP as the
5594
     source object file, and it must be declared to either not use `$27'
5595
     or perform a standard GP load in the first two instructions via the
5596
     `.prologue' directive.
5597
 
5598
`!tlsgd'
5599
`!tlsgd!N'
5600
     Used with an `lda' instruction to load the address of a TLS
5601
     descriptor for a symbol in the GOT.
5602
 
5603
     The sequence number N is optional, and if present it used to pair
5604
     the descriptor load with both the `literal' loading the address of
5605
     the `__tls_get_addr' function and the `lituse_tlsgd' marking the
5606
     call to that function.
5607
 
5608
     For proper relaxation, both the `tlsgd', `literal' and `lituse'
5609
     relocations must be in the same extended basic block.  That is,
5610
     the relocation with the lowest address must be executed first at
5611
     runtime.
5612
 
5613
`!tlsldm'
5614
`!tlsldm!N'
5615
     Used with an `lda' instruction to load the address of a TLS
5616
     descriptor for the current module in the GOT.
5617
 
5618
     Similar in other respects to `tlsgd'.
5619
 
5620
`!gotdtprel'
5621
     Used with an `ldq' instruction to load the offset of the TLS
5622
     symbol within its module's thread-local storage block.  Also known
5623
     as the dynamic thread pointer offset or dtp-relative offset.
5624
 
5625
`!dtprelhi'
5626
`!dtprello'
5627
`!dtprel'
5628
     Like `gprel' relocations except they compute dtp-relative offsets.
5629
 
5630
`!gottprel'
5631
     Used with an `ldq' instruction to load the offset of the TLS
5632
     symbol from the thread pointer.  Also known as the tp-relative
5633
     offset.
5634
 
5635
`!tprelhi'
5636
`!tprello'
5637
`!tprel'
5638
     Like `gprel' relocations except they compute tp-relative offsets.
5639
 
5640

5641
File: as.info,  Node: Alpha Floating Point,  Next: Alpha Directives,  Prev: Alpha Syntax,  Up: Alpha-Dependent
5642
 
5643
9.1.4 Floating Point
5644
--------------------
5645
 
5646
The Alpha family uses both IEEE and VAX floating-point numbers.
5647
 
5648

5649
File: as.info,  Node: Alpha Directives,  Next: Alpha Opcodes,  Prev: Alpha Floating Point,  Up: Alpha-Dependent
5650
 
5651
9.1.5 Alpha Assembler Directives
5652
--------------------------------
5653
 
5654
`as' for the Alpha supports many additional directives for
5655
compatibility with the native assembler.  This section describes them
5656
only briefly.
5657
 
5658
   These are the additional directives in `as' for the Alpha:
5659
 
5660
`.arch CPU'
5661
     Specifies the target processor.  This is equivalent to the `-mCPU'
5662
     command-line option.  *Note Options: Alpha Options, for a list of
5663
     values for CPU.
5664
 
5665
`.ent FUNCTION[, N]'
5666
     Mark the beginning of FUNCTION.  An optional number may follow for
5667
     compatibility with the OSF/1 assembler, but is ignored.  When
5668
     generating `.mdebug' information, this will create a procedure
5669
     descriptor for the function.  In ELF, it will mark the symbol as a
5670
     function a-la the generic `.type' directive.
5671
 
5672
`.end FUNCTION'
5673
     Mark the end of FUNCTION.  In ELF, it will set the size of the
5674
     symbol a-la the generic `.size' directive.
5675
 
5676
`.mask MASK, OFFSET'
5677
     Indicate which of the integer registers are saved in the current
5678
     function's stack frame.  MASK is interpreted a bit mask in which
5679
     bit N set indicates that register N is saved.  The registers are
5680
     saved in a block located OFFSET bytes from the "canonical frame
5681
     address" (CFA) which is the value of the stack pointer on entry to
5682
     the function.  The registers are saved sequentially, except that
5683
     the return address register (normally `$26') is saved first.
5684
 
5685
     This and the other directives that describe the stack frame are
5686
     currently only used when generating `.mdebug' information.  They
5687
     may in the future be used to generate DWARF2 `.debug_frame' unwind
5688
     information for hand written assembly.
5689
 
5690
`.fmask MASK, OFFSET'
5691
     Indicate which of the floating-point registers are saved in the
5692
     current stack frame.  The MASK and OFFSET parameters are
5693
     interpreted as with `.mask'.
5694
 
5695
`.frame FRAMEREG, FRAMEOFFSET, RETREG[, ARGOFFSET]'
5696
     Describes the shape of the stack frame.  The frame pointer in use
5697
     is FRAMEREG; normally this is either `$fp' or `$sp'.  The frame
5698
     pointer is FRAMEOFFSET bytes below the CFA.  The return address is
5699
     initially located in RETREG until it is saved as indicated in
5700
     `.mask'.  For compatibility with OSF/1 an optional ARGOFFSET
5701
     parameter is accepted and ignored.  It is believed to indicate the
5702
     offset from the CFA to the saved argument registers.
5703
 
5704
`.prologue N'
5705
     Indicate that the stack frame is set up and all registers have been
5706
     spilled.  The argument N indicates whether and how the function
5707
     uses the incoming "procedure vector" (the address of the called
5708
     function) in `$27'.  0 indicates that `$27' is not used; 1
5709
     indicates that the first two instructions of the function use `$27'
5710
     to perform a load of the GP register; 2 indicates that `$27' is
5711
     used in some non-standard way and so the linker cannot elide the
5712
     load of the procedure vector during relaxation.
5713
 
5714
`.usepv FUNCTION, WHICH'
5715
     Used to indicate the use of the `$27' register, similar to
5716
     `.prologue', but without the other semantics of needing to be
5717
     inside an open `.ent'/`.end' block.
5718
 
5719
     The WHICH argument should be either `no', indicating that `$27' is
5720
     not used, or `std', indicating that the first two instructions of
5721
     the function perform a GP load.
5722
 
5723
     One might use this directive instead of `.prologue' if you are
5724
     also using dwarf2 CFI directives.
5725
 
5726
`.gprel32 EXPRESSION'
5727
     Computes the difference between the address in EXPRESSION and the
5728
     GP for the current object file, and stores it in 4 bytes.  In
5729
     addition to being smaller than a full 8 byte address, this also
5730
     does not require a dynamic relocation when used in a shared
5731
     library.
5732
 
5733
`.t_floating EXPRESSION'
5734
     Stores EXPRESSION as an IEEE double precision value.
5735
 
5736
`.s_floating EXPRESSION'
5737
     Stores EXPRESSION as an IEEE single precision value.
5738
 
5739
`.f_floating EXPRESSION'
5740
     Stores EXPRESSION as a VAX F format value.
5741
 
5742
`.g_floating EXPRESSION'
5743
     Stores EXPRESSION as a VAX G format value.
5744
 
5745
`.d_floating EXPRESSION'
5746
     Stores EXPRESSION as a VAX D format value.
5747
 
5748
`.set FEATURE'
5749
     Enables or disables various assembler features.  Using the positive
5750
     name of the feature enables while using `noFEATURE' disables.
5751
 
5752
    `at'
5753
          Indicates that macro expansions may clobber the "assembler
5754
          temporary" (`$at' or `$28') register.  Some macros may not be
5755
          expanded without this and will generate an error message if
5756
          `noat' is in effect.  When `at' is in effect, a warning will
5757
          be generated if `$at' is used by the programmer.
5758
 
5759
    `macro'
5760
          Enables the expansion of macro instructions.  Note that
5761
          variants of real instructions, such as `br label' vs `br
5762
          $31,label' are considered alternate forms and not macros.
5763
 
5764
    `move'
5765
    `reorder'
5766
    `volatile'
5767
          These control whether and how the assembler may re-order
5768
          instructions.  Accepted for compatibility with the OSF/1
5769
          assembler, but `as' does not do instruction scheduling, so
5770
          these features are ignored.
5771
 
5772
   The following directives are recognized for compatibility with the
5773
OSF/1 assembler but are ignored.
5774
 
5775
     .proc           .aproc
5776
     .reguse         .livereg
5777
     .option         .aent
5778
     .ugen           .eflag
5779
     .alias          .noalias
5780
 
5781

5782
File: as.info,  Node: Alpha Opcodes,  Prev: Alpha Directives,  Up: Alpha-Dependent
5783
 
5784
9.1.6 Opcodes
5785
-------------
5786
 
5787
For detailed information on the Alpha machine instruction set, see the
5788
Alpha Architecture Handbook
5789
(ftp://ftp.digital.com/pub/Digital/info/semiconductor/literature/alphaahb.pdf).
5790
 
5791

5792
File: as.info,  Node: ARC-Dependent,  Next: ARM-Dependent,  Prev: Alpha-Dependent,  Up: Machine Dependencies
5793
 
5794
9.2 ARC Dependent Features
5795
==========================
5796
 
5797
* Menu:
5798
 
5799
* ARC Options::              Options
5800
* ARC Syntax::               Syntax
5801
* ARC Floating Point::       Floating Point
5802
* ARC Directives::           ARC Machine Directives
5803
* ARC Opcodes::              Opcodes
5804
 
5805

5806
File: as.info,  Node: ARC Options,  Next: ARC Syntax,  Up: ARC-Dependent
5807
 
5808
9.2.1 Options
5809
-------------
5810
 
5811
`-marc[5|6|7|8]'
5812
     This option selects the core processor variant.  Using `-marc' is
5813
     the same as `-marc6', which is also the default.
5814
 
5815
    `arc5'
5816
          Base instruction set.
5817
 
5818
    `arc6'
5819
          Jump-and-link (jl) instruction.  No requirement of an
5820
          instruction between setting flags and conditional jump.  For
5821
          example:
5822
 
5823
                 mov.f r0,r1
5824
                 beq   foo
5825
 
5826
    `arc7'
5827
          Break (brk) and sleep (sleep) instructions.
5828
 
5829
    `arc8'
5830
          Software interrupt (swi) instruction.
5831
 
5832
 
5833
     Note: the `.option' directive can to be used to select a core
5834
     variant from within assembly code.
5835
 
5836
`-EB'
5837
     This option specifies that the output generated by the assembler
5838
     should be marked as being encoded for a big-endian processor.
5839
 
5840
`-EL'
5841
     This option specifies that the output generated by the assembler
5842
     should be marked as being encoded for a little-endian processor -
5843
     this is the default.
5844
 
5845
 
5846

5847
File: as.info,  Node: ARC Syntax,  Next: ARC Floating Point,  Prev: ARC Options,  Up: ARC-Dependent
5848
 
5849
9.2.2 Syntax
5850
------------
5851
 
5852
* Menu:
5853
 
5854
* ARC-Chars::                Special Characters
5855
* ARC-Regs::                 Register Names
5856
 
5857

5858
File: as.info,  Node: ARC-Chars,  Next: ARC-Regs,  Up: ARC Syntax
5859
 
5860
9.2.2.1 Special Characters
5861
..........................
5862
 
5863
*TODO*
5864
 
5865

5866
File: as.info,  Node: ARC-Regs,  Prev: ARC-Chars,  Up: ARC Syntax
5867
 
5868
9.2.2.2 Register Names
5869
......................
5870
 
5871
*TODO*
5872
 
5873

5874
File: as.info,  Node: ARC Floating Point,  Next: ARC Directives,  Prev: ARC Syntax,  Up: ARC-Dependent
5875
 
5876
9.2.3 Floating Point
5877
--------------------
5878
 
5879
The ARC core does not currently have hardware floating point support.
5880
Software floating point support is provided by `GCC' and uses IEEE
5881
floating-point numbers.
5882
 
5883

5884
File: as.info,  Node: ARC Directives,  Next: ARC Opcodes,  Prev: ARC Floating Point,  Up: ARC-Dependent
5885
 
5886
9.2.4 ARC Machine Directives
5887
----------------------------
5888
 
5889
The ARC version of `as' supports the following additional machine
5890
directives:
5891
 
5892
`.2byte EXPRESSIONS'
5893
     *TODO*
5894
 
5895
`.3byte EXPRESSIONS'
5896
     *TODO*
5897
 
5898
`.4byte EXPRESSIONS'
5899
     *TODO*
5900
 
5901
`.extAuxRegister NAME,ADDRESS,MODE'
5902
     The ARCtangent A4 has extensible auxiliary register space.  The
5903
     auxiliary registers can be defined in the assembler source code by
5904
     using this directive.  The first parameter is the NAME of the new
5905
     auxiallry register.  The second parameter is the ADDRESS of the
5906
     register in the auxiliary register memory map for the variant of
5907
     the ARC.  The third parameter specifies the MODE in which the
5908
     register can be operated is and it can be one of:
5909
 
5910
    `r          (readonly)'
5911
 
5912
    `w          (write only)'
5913
 
5914
    `r|w        (read or write)'
5915
 
5916
     For example:
5917
 
5918
            .extAuxRegister mulhi,0x12,w
5919
 
5920
     This specifies an extension auxiliary register called _mulhi_
5921
     which is at address 0x12 in the memory space and which is only
5922
     writable.
5923
 
5924
`.extCondCode SUFFIX,VALUE'
5925
     The condition codes on the ARCtangent A4 are extensible and can be
5926
     specified by means of this assembler directive.  They are specified
5927
     by the suffix and the value for the condition code.  They can be
5928
     used to specify extra condition codes with any values.  For
5929
     example:
5930
 
5931
            .extCondCode is_busy,0x14
5932
 
5933
             add.is_busy  r1,r2,r3
5934
             bis_busy     _main
5935
 
5936
`.extCoreRegister NAME,REGNUM,MODE,SHORTCUT'
5937
     Specifies an extension core register NAME for the application.
5938
     This allows a register NAME with a valid REGNUM between 0 and 60,
5939
     with the following as valid values for MODE
5940
 
5941
    `_r_   (readonly)'
5942
 
5943
    `_w_   (write only)'
5944
 
5945
    `_r|w_ (read or write)'
5946
 
5947
     The other parameter gives a description of the register having a
5948
     SHORTCUT in the pipeline.  The valid values are:
5949
 
5950
    `can_shortcut'
5951
 
5952
    `cannot_shortcut'
5953
 
5954
     For example:
5955
 
5956
            .extCoreRegister mlo,57,r,can_shortcut
5957
 
5958
     This defines an extension core register mlo with the value 57 which
5959
     can shortcut the pipeline.
5960
 
5961
`.extInstruction NAME,OPCODE,SUBOPCODE,SUFFIXCLASS,SYNTAXCLASS'
5962
     The ARCtangent A4 allows the user to specify extension
5963
     instructions.  The extension instructions are not macros.  The
5964
     assembler creates encodings for use of these instructions
5965
     according to the specification by the user.  The parameters are:
5966
 
5967
    *NAME
5968
          Name of the extension instruction
5969
 
5970
    *OPCODE
5971
          Opcode to be used. (Bits 27:31 in the encoding).  Valid values
5972
          0x10-0x1f or 0x03
5973
 
5974
    *SUBOPCODE
5975
          Subopcode to be used.  Valid values are from 0x09-0x3f.
5976
          However the correct value also depends on SYNTAXCLASS
5977
 
5978
    *SUFFIXCLASS
5979
          Determines the kinds of suffixes to be allowed.  Valid values
5980
          are `SUFFIX_NONE', `SUFFIX_COND', `SUFFIX_FLAG' which
5981
          indicates the absence or presence of conditional suffixes and
5982
          flag setting by the extension instruction.  It is also
5983
          possible to specify that an instruction sets the flags and is
5984
          conditional by using `SUFFIX_CODE' | `SUFFIX_FLAG'.
5985
 
5986
    *SYNTAXCLASS
5987
          Determines the syntax class for the instruction.  It can have
5988
          the following values:
5989
 
5990
         ``SYNTAX_2OP':'
5991
               2 Operand Instruction
5992
 
5993
         ``SYNTAX_3OP':'
5994
               3 Operand Instruction
5995
 
5996
          In addition there could be modifiers for the syntax class as
5997
          described below:
5998
 
5999
               Syntax Class Modifiers are:
6000
 
6001
             - `OP1_MUST_BE_IMM': Modifies syntax class SYNTAX_3OP,
6002
               specifying that the first operand of a three-operand
6003
               instruction must be an immediate (i.e., the result is
6004
               discarded).  OP1_MUST_BE_IMM is used by bitwise ORing it
6005
               with SYNTAX_3OP as given in the example below.  This
6006
               could usually be used to set the flags using specific
6007
               instructions and not retain results.
6008
 
6009
             - `OP1_IMM_IMPLIED': Modifies syntax class SYNTAX_20P, it
6010
               specifies that there is an implied immediate destination
6011
               operand which does not appear in the syntax.  For
6012
               example, if the source code contains an instruction like:
6013
 
6014
                    inst r1,r2
6015
 
6016
               it really means that the first argument is an implied
6017
               immediate (that is, the result is discarded).  This is
6018
               the same as though the source code were: inst 0,r1,r2.
6019
               You use OP1_IMM_IMPLIED by bitwise ORing it with
6020
               SYNTAX_20P.
6021
 
6022
 
6023
     For example, defining 64-bit multiplier with immediate operands:
6024
 
6025
          .extInstruction mp64,0x14,0x0,SUFFIX_COND | SUFFIX_FLAG ,
6026
                          SYNTAX_3OP|OP1_MUST_BE_IMM
6027
 
6028
     The above specifies an extension instruction called mp64 which has
6029
     3 operands, sets the flags, can be used with a condition code, for
6030
     which the first operand is an immediate.  (Equivalent to
6031
     discarding the result of the operation).
6032
 
6033
           .extInstruction mul64,0x14,0x00,SUFFIX_COND, SYNTAX_2OP|OP1_IMM_IMPLIED
6034
 
6035
     This describes a 2 operand instruction with an implicit first
6036
     immediate operand.  The result of this operation would be
6037
     discarded.
6038
 
6039
`.half EXPRESSIONS'
6040
     *TODO*
6041
 
6042
`.long EXPRESSIONS'
6043
     *TODO*
6044
 
6045
`.option ARC|ARC5|ARC6|ARC7|ARC8'
6046
     The `.option' directive must be followed by the desired core
6047
     version. Again `arc' is an alias for `arc6'.
6048
 
6049
     Note: the `.option' directive overrides the command line option
6050
     `-marc'; a warning is emitted when the version is not consistent
6051
     between the two - even for the implicit default core version
6052
     (arc6).
6053
 
6054
`.short EXPRESSIONS'
6055
     *TODO*
6056
 
6057
`.word EXPRESSIONS'
6058
     *TODO*
6059
 
6060
 
6061

6062
File: as.info,  Node: ARC Opcodes,  Prev: ARC Directives,  Up: ARC-Dependent
6063
 
6064
9.2.5 Opcodes
6065
-------------
6066
 
6067
For information on the ARC instruction set, see `ARC Programmers
6068
Reference Manual', ARC International (www.arc.com)
6069
 
6070

6071
File: as.info,  Node: ARM-Dependent,  Next: AVR-Dependent,  Prev: ARC-Dependent,  Up: Machine Dependencies
6072
 
6073
9.3 ARM Dependent Features
6074
==========================
6075
 
6076
* Menu:
6077
 
6078
* ARM Options::              Options
6079
* ARM Syntax::               Syntax
6080
* ARM Floating Point::       Floating Point
6081
* ARM Directives::           ARM Machine Directives
6082
* ARM Opcodes::              Opcodes
6083
* ARM Mapping Symbols::      Mapping Symbols
6084
 
6085

6086
File: as.info,  Node: ARM Options,  Next: ARM Syntax,  Up: ARM-Dependent
6087
 
6088
9.3.1 Options
6089
-------------
6090
 
6091
`-mcpu=PROCESSOR[+EXTENSION...]'
6092
     This option specifies the target processor.  The assembler will
6093
     issue an error message if an attempt is made to assemble an
6094
     instruction which will not execute on the target processor.  The
6095
     following processor names are recognized: `arm1', `arm2', `arm250',
6096
     `arm3', `arm6', `arm60', `arm600', `arm610', `arm620', `arm7',
6097
     `arm7m', `arm7d', `arm7dm', `arm7di', `arm7dmi', `arm70', `arm700',
6098
     `arm700i', `arm710', `arm710t', `arm720', `arm720t', `arm740t',
6099
     `arm710c', `arm7100', `arm7500', `arm7500fe', `arm7t', `arm7tdmi',
6100
     `arm7tdmi-s', `arm8', `arm810', `strongarm', `strongarm1',
6101
     `strongarm110', `strongarm1100', `strongarm1110', `arm9', `arm920',
6102
     `arm920t', `arm922t', `arm940t', `arm9tdmi', `arm9e', `arm926e',
6103
     `arm926ej-s', `arm946e-r0', `arm946e', `arm946e-s', `arm966e-r0',
6104
     `arm966e', `arm966e-s', `arm968e-s', `arm10t', `arm10tdmi',
6105
     `arm10e', `arm1020', `arm1020t', `arm1020e', `arm1022e',
6106
     `arm1026ej-s', `arm1136j-s', `arm1136jf-s', `arm1156t2-s',
6107
     `arm1156t2f-s', `arm1176jz-s', `arm1176jzf-s', `mpcore',
6108
     `mpcorenovfp', `cortex-a8', `cortex-a9', `cortex-r4', `cortex-m3',
6109
     `ep9312' (ARM920 with Cirrus Maverick coprocessor), `i80200'
6110
     (Intel XScale processor) `iwmmxt' (Intel(r) XScale processor with
6111
     Wireless MMX(tm) technology coprocessor) and `xscale'.  The
6112
     special name `all' may be used to allow the assembler to accept
6113
     instructions valid for any ARM processor.
6114
 
6115
     In addition to the basic instruction set, the assembler can be
6116
     told to accept various extension mnemonics that extend the
6117
     processor using the co-processor instruction space.  For example,
6118
     `-mcpu=arm920+maverick' is equivalent to specifying
6119
     `-mcpu=ep9312'.  The following extensions are currently supported:
6120
     `+maverick' `+iwmmxt' and `+xscale'.
6121
 
6122
`-march=ARCHITECTURE[+EXTENSION...]'
6123
     This option specifies the target architecture.  The assembler will
6124
     issue an error message if an attempt is made to assemble an
6125
     instruction which will not execute on the target architecture.
6126
     The following architecture names are recognized: `armv1', `armv2',
6127
     `armv2a', `armv2s', `armv3', `armv3m', `armv4', `armv4xm',
6128
     `armv4t', `armv4txm', `armv5', `armv5t', `armv5txm', `armv5te',
6129
     `armv5texp', `armv6', `armv6j', `armv6k', `armv6z', `armv6zk',
6130
     `armv7', `armv7-a', `armv7-r', `armv7-m', `iwmmxt' and `xscale'.
6131
     If both `-mcpu' and `-march' are specified, the assembler will use
6132
     the setting for `-mcpu'.
6133
 
6134
     The architecture option can be extended with the same instruction
6135
     set extension options as the `-mcpu' option.
6136
 
6137
`-mfpu=FLOATING-POINT-FORMAT'
6138
     This option specifies the floating point format to assemble for.
6139
     The assembler will issue an error message if an attempt is made to
6140
     assemble an instruction which will not execute on the target
6141
     floating point unit.  The following format options are recognized:
6142
     `softfpa', `fpe', `fpe2', `fpe3', `fpa', `fpa10', `fpa11',
6143
     `arm7500fe', `softvfp', `softvfp+vfp', `vfp', `vfp10', `vfp10-r0',
6144
     `vfp9', `vfpxd', `vfpv2' `vfpv3' `vfpv3-d16' `arm1020t',
6145
     `arm1020e', `arm1136jf-s', `maverick' and `neon'.
6146
 
6147
     In addition to determining which instructions are assembled, this
6148
     option also affects the way in which the `.double' assembler
6149
     directive behaves when assembling little-endian code.
6150
 
6151
     The default is dependent on the processor selected.  For
6152
     Architecture 5 or later, the default is to assembler for VFP
6153
     instructions; for earlier architectures the default is to assemble
6154
     for FPA instructions.
6155
 
6156
`-mthumb'
6157
     This option specifies that the assembler should start assembling
6158
     Thumb instructions; that is, it should behave as though the file
6159
     starts with a `.code 16' directive.
6160
 
6161
`-mthumb-interwork'
6162
     This option specifies that the output generated by the assembler
6163
     should be marked as supporting interworking.
6164
 
6165
`-mapcs `[26|32]''
6166
     This option specifies that the output generated by the assembler
6167
     should be marked as supporting the indicated version of the Arm
6168
     Procedure.  Calling Standard.
6169
 
6170
`-matpcs'
6171
     This option specifies that the output generated by the assembler
6172
     should be marked as supporting the Arm/Thumb Procedure Calling
6173
     Standard.  If enabled this option will cause the assembler to
6174
     create an empty debugging section in the object file called
6175
     .arm.atpcs.  Debuggers can use this to determine the ABI being
6176
     used by.
6177
 
6178
`-mapcs-float'
6179
     This indicates the floating point variant of the APCS should be
6180
     used.  In this variant floating point arguments are passed in FP
6181
     registers rather than integer registers.
6182
 
6183
`-mapcs-reentrant'
6184
     This indicates that the reentrant variant of the APCS should be
6185
     used.  This variant supports position independent code.
6186
 
6187
`-mfloat-abi=ABI'
6188
     This option specifies that the output generated by the assembler
6189
     should be marked as using specified floating point ABI.  The
6190
     following values are recognized: `soft', `softfp' and `hard'.
6191
 
6192
`-meabi=VER'
6193
     This option specifies which EABI version the produced object files
6194
     should conform to.  The following values are recognized: `gnu', `4'
6195
     and `5'.
6196
 
6197
`-EB'
6198
     This option specifies that the output generated by the assembler
6199
     should be marked as being encoded for a big-endian processor.
6200
 
6201
`-EL'
6202
     This option specifies that the output generated by the assembler
6203
     should be marked as being encoded for a little-endian processor.
6204
 
6205
`-k'
6206
     This option specifies that the output of the assembler should be
6207
     marked as position-independent code (PIC).
6208
 
6209
`--fix-v4bx'
6210
     Allow `BX' instructions in ARMv4 code.  This is intended for use
6211
     with the linker option of the same name.
6212
 
6213
 
6214

6215
File: as.info,  Node: ARM Syntax,  Next: ARM Floating Point,  Prev: ARM Options,  Up: ARM-Dependent
6216
 
6217
9.3.2 Syntax
6218
------------
6219
 
6220
* Menu:
6221
 
6222
* ARM-Chars::                Special Characters
6223
* ARM-Regs::                 Register Names
6224
* ARM-Relocations::          Relocations
6225
 
6226

6227
File: as.info,  Node: ARM-Chars,  Next: ARM-Regs,  Up: ARM Syntax
6228
 
6229
9.3.2.1 Special Characters
6230
..........................
6231
 
6232
The presence of a `@' on a line indicates the start of a comment that
6233
extends to the end of the current line.  If a `#' appears as the first
6234
character of a line, the whole line is treated as a comment.
6235
 
6236
   The `;' character can be used instead of a newline to separate
6237
statements.
6238
 
6239
   Either `#' or `$' can be used to indicate immediate operands.
6240
 
6241
   *TODO* Explain about /data modifier on symbols.
6242
 
6243

6244
File: as.info,  Node: ARM-Regs,  Next: ARM-Relocations,  Prev: ARM-Chars,  Up: ARM Syntax
6245
 
6246
9.3.2.2 Register Names
6247
......................
6248
 
6249
*TODO* Explain about ARM register naming, and the predefined names.
6250
 
6251

6252
File: as.info,  Node: ARM Floating Point,  Next: ARM Directives,  Prev: ARM Syntax,  Up: ARM-Dependent
6253
 
6254
9.3.3 Floating Point
6255
--------------------
6256
 
6257
The ARM family uses IEEE floating-point numbers.
6258
 
6259

6260
File: as.info,  Node: ARM-Relocations,  Prev: ARM-Regs,  Up: ARM Syntax
6261
 
6262
9.3.3.1 ARM relocation generation
6263
.................................
6264
 
6265
Specific data relocations can be generated by putting the relocation
6266
name in parentheses after the symbol name.  For example:
6267
 
6268
             .word foo(TARGET1)
6269
 
6270
   This will generate an `R_ARM_TARGET1' relocation against the symbol
6271
FOO.  The following relocations are supported: `GOT', `GOTOFF',
6272
`TARGET1', `TARGET2', `SBREL', `TLSGD', `TLSLDM', `TLSLDO', `GOTTPOFF'
6273
and `TPOFF'.
6274
 
6275
   For compatibility with older toolchains the assembler also accepts
6276
`(PLT)' after branch targets.  This will generate the deprecated
6277
`R_ARM_PLT32' relocation.
6278
 
6279
   Relocations for `MOVW' and `MOVT' instructions can be generated by
6280
prefixing the value with `#:lower16:' and `#:upper16' respectively.
6281
For example to load the 32-bit address of foo into r0:
6282
 
6283
             MOVW r0, #:lower16:foo
6284
             MOVT r0, #:upper16:foo
6285
 
6286

6287
File: as.info,  Node: ARM Directives,  Next: ARM Opcodes,  Prev: ARM Floating Point,  Up: ARM-Dependent
6288
 
6289
9.3.4 ARM Machine Directives
6290
----------------------------
6291
 
6292
`.align EXPRESSION [, EXPRESSION]'
6293
     This is the generic .ALIGN directive.  For the ARM however if the
6294
     first argument is zero (ie no alignment is needed) the assembler
6295
     will behave as if the argument had been 2 (ie pad to the next four
6296
     byte boundary).  This is for compatibility with ARM's own
6297
     assembler.
6298
 
6299
`NAME .req REGISTER NAME'
6300
     This creates an alias for REGISTER NAME called NAME.  For example:
6301
 
6302
                  foo .req r0
6303
 
6304
`.unreq ALIAS-NAME'
6305
     This undefines a register alias which was previously defined using
6306
     the `req', `dn' or `qn' directives.  For example:
6307
 
6308
                  foo .req r0
6309
                  .unreq foo
6310
 
6311
     An error occurs if the name is undefined.  Note - this pseudo op
6312
     can be used to delete builtin in register name aliases (eg 'r0').
6313
     This should only be done if it is really necessary.
6314
 
6315
`NAME .dn REGISTER NAME [.TYPE] [[INDEX]]'
6316
 
6317
`NAME .qn REGISTER NAME [.TYPE] [[INDEX]]'
6318
     The `dn' and `qn' directives are used to create typed and/or
6319
     indexed register aliases for use in Advanced SIMD Extension (Neon)
6320
     instructions.  The former should be used to create aliases of
6321
     double-precision registers, and the latter to create aliases of
6322
     quad-precision registers.
6323
 
6324
     If these directives are used to create typed aliases, those
6325
     aliases can be used in Neon instructions instead of writing types
6326
     after the mnemonic or after each operand.  For example:
6327
 
6328
                  x .dn d2.f32
6329
                  y .dn d3.f32
6330
                  z .dn d4.f32[1]
6331
                  vmul x,y,z
6332
 
6333
     This is equivalent to writing the following:
6334
 
6335
                  vmul.f32 d2,d3,d4[1]
6336
 
6337
     Aliases created using `dn' or `qn' can be destroyed using `unreq'.
6338
 
6339
`.code `[16|32]''
6340
     This directive selects the instruction set being generated. The
6341
     value 16 selects Thumb, with the value 32 selecting ARM.
6342
 
6343
`.thumb'
6344
     This performs the same action as .CODE 16.
6345
 
6346
`.arm'
6347
     This performs the same action as .CODE 32.
6348
 
6349
`.force_thumb'
6350
     This directive forces the selection of Thumb instructions, even if
6351
     the target processor does not support those instructions
6352
 
6353
`.thumb_func'
6354
     This directive specifies that the following symbol is the name of a
6355
     Thumb encoded function.  This information is necessary in order to
6356
     allow the assembler and linker to generate correct code for
6357
     interworking between Arm and Thumb instructions and should be used
6358
     even if interworking is not going to be performed.  The presence
6359
     of this directive also implies `.thumb'
6360
 
6361
     This directive is not neccessary when generating EABI objects.  On
6362
     these targets the encoding is implicit when generating Thumb code.
6363
 
6364
`.thumb_set'
6365
     This performs the equivalent of a `.set' directive in that it
6366
     creates a symbol which is an alias for another symbol (possibly
6367
     not yet defined).  This directive also has the added property in
6368
     that it marks the aliased symbol as being a thumb function entry
6369
     point, in the same way that the `.thumb_func' directive does.
6370
 
6371
`.ltorg'
6372
     This directive causes the current contents of the literal pool to
6373
     be dumped into the current section (which is assumed to be the
6374
     .text section) at the current location (aligned to a word
6375
     boundary).  `GAS' maintains a separate literal pool for each
6376
     section and each sub-section.  The `.ltorg' directive will only
6377
     affect the literal pool of the current section and sub-section.
6378
     At the end of assembly all remaining, un-empty literal pools will
6379
     automatically be dumped.
6380
 
6381
     Note - older versions of `GAS' would dump the current literal pool
6382
     any time a section change occurred.  This is no longer done, since
6383
     it prevents accurate control of the placement of literal pools.
6384
 
6385
`.pool'
6386
     This is a synonym for .ltorg.
6387
 
6388
`.fnstart'
6389
     Marks the start of a function with an unwind table entry.
6390
 
6391
`.fnend'
6392
     Marks the end of a function with an unwind table entry.  The
6393
     unwind index table entry is created when this directive is
6394
     processed.
6395
 
6396
     If no personality routine has been specified then standard
6397
     personality routine 0 or 1 will be used, depending on the number
6398
     of unwind opcodes required.
6399
 
6400
`.cantunwind'
6401
     Prevents unwinding through the current function.  No personality
6402
     routine or exception table data is required or permitted.
6403
 
6404
`.personality NAME'
6405
     Sets the personality routine for the current function to NAME.
6406
 
6407
`.personalityindex INDEX'
6408
     Sets the personality routine for the current function to the EABI
6409
     standard routine number INDEX
6410
 
6411
`.handlerdata'
6412
     Marks the end of the current function, and the start of the
6413
     exception table entry for that function.  Anything between this
6414
     directive and the `.fnend' directive will be added to the
6415
     exception table entry.
6416
 
6417
     Must be preceded by a `.personality' or `.personalityindex'
6418
     directive.
6419
 
6420
`.save REGLIST'
6421
     Generate unwinder annotations to restore the registers in REGLIST.
6422
     The format of REGLIST is the same as the corresponding
6423
     store-multiple instruction.
6424
 
6425
     _core registers_
6426
            .save {r4, r5, r6, lr}
6427
            stmfd sp!, {r4, r5, r6, lr}
6428
     _FPA registers_
6429
            .save f4, 2
6430
            sfmfd f4, 2, [sp]!
6431
     _VFP registers_
6432
            .save {d8, d9, d10}
6433
            fstmdx sp!, {d8, d9, d10}
6434
     _iWMMXt registers_
6435
            .save {wr10, wr11}
6436
            wstrd wr11, [sp, #-8]!
6437
            wstrd wr10, [sp, #-8]!
6438
          or
6439
            .save wr11
6440
            wstrd wr11, [sp, #-8]!
6441
            .save wr10
6442
            wstrd wr10, [sp, #-8]!
6443
 
6444
`.vsave VFP-REGLIST'
6445
     Generate unwinder annotations to restore the VFP registers in
6446
     VFP-REGLIST using FLDMD.  Also works for VFPv3 registers that are
6447
     to be restored using VLDM.  The format of VFP-REGLIST is the same
6448
     as the corresponding store-multiple instruction.
6449
 
6450
     _VFP registers_
6451
            .vsave {d8, d9, d10}
6452
            fstmdd sp!, {d8, d9, d10}
6453
     _VFPv3 registers_
6454
            .vsave {d15, d16, d17}
6455
            vstm sp!, {d15, d16, d17}
6456
 
6457
     Since FLDMX and FSTMX are now deprecated, this directive should be
6458
     used in favour of `.save' for saving VFP registers for ARMv6 and
6459
     above.
6460
 
6461
`.pad #COUNT'
6462
     Generate unwinder annotations for a stack adjustment of COUNT
6463
     bytes.  A positive value indicates the function prologue allocated
6464
     stack space by decrementing the stack pointer.
6465
 
6466
`.movsp REG [, #OFFSET]'
6467
     Tell the unwinder that REG contains an offset from the current
6468
     stack pointer.  If OFFSET is not specified then it is assumed to be
6469
     zero.
6470
 
6471
`.setfp FPREG, SPREG [, #OFFSET]'
6472
     Make all unwinder annotations relaive to a frame pointer.  Without
6473
     this the unwinder will use offsets from the stack pointer.
6474
 
6475
     The syntax of this directive is the same as the `sub' or `mov'
6476
     instruction used to set the frame pointer.  SPREG must be either
6477
     `sp' or mentioned in a previous `.movsp' directive.
6478
 
6479
          .movsp ip
6480
          mov ip, sp
6481
          ...
6482
          .setfp fp, ip, #4
6483
          sub fp, ip, #4
6484
 
6485
`.raw OFFSET, BYTE1, ...'
6486
     Insert one of more arbitary unwind opcode bytes, which are known
6487
     to adjust the stack pointer by OFFSET bytes.
6488
 
6489
     For example `.unwind_raw 4, 0xb1, 0x01' is equivalent to `.save
6490
     {r0}'
6491
 
6492
`.cpu NAME'
6493
     Select the target processor.  Valid values for NAME are the same as
6494
     for the `-mcpu' commandline option.
6495
 
6496
`.arch NAME'
6497
     Select the target architecture.  Valid values for NAME are the
6498
     same as for the `-march' commandline option.
6499
 
6500
`.object_arch NAME'
6501
     Override the architecture recorded in the EABI object attribute
6502
     section.  Valid values for NAME are the same as for the `.arch'
6503
     directive.  Typically this is useful when code uses runtime
6504
     detection of CPU features.
6505
 
6506
`.fpu NAME'
6507
     Select the floating point unit to assemble for.  Valid values for
6508
     NAME are the same as for the `-mfpu' commandline option.
6509
 
6510
`.eabi_attribute TAG, VALUE'
6511
     Set the EABI object attribute number TAG to VALUE.  The value is
6512
     either a `number', `"string"', or `number, "string"' depending on
6513
     the tag.
6514
 
6515
 
6516

6517
File: as.info,  Node: ARM Opcodes,  Next: ARM Mapping Symbols,  Prev: ARM Directives,  Up: ARM-Dependent
6518
 
6519
9.3.5 Opcodes
6520
-------------
6521
 
6522
`as' implements all the standard ARM opcodes.  It also implements
6523
several pseudo opcodes, including several synthetic load instructions.
6524
 
6525
`NOP'
6526
            nop
6527
 
6528
     This pseudo op will always evaluate to a legal ARM instruction
6529
     that does nothing.  Currently it will evaluate to MOV r0, r0.
6530
 
6531
`LDR'
6532
            ldr  , = 
6533
 
6534
     If expression evaluates to a numeric constant then a MOV or MVN
6535
     instruction will be used in place of the LDR instruction, if the
6536
     constant can be generated by either of these instructions.
6537
     Otherwise the constant will be placed into the nearest literal
6538
     pool (if it not already there) and a PC relative LDR instruction
6539
     will be generated.
6540
 
6541
`ADR'
6542
            adr  
6543
 
6544
     This instruction will load the address of LABEL into the indicated
6545
     register.  The instruction will evaluate to a PC relative ADD or
6546
     SUB instruction depending upon where the label is located.  If the
6547
     label is out of range, or if it is not defined in the same file
6548
     (and section) as the ADR instruction, then an error will be
6549
     generated.  This instruction will not make use of the literal pool.
6550
 
6551
`ADRL'
6552
            adrl  
6553
 
6554
     This instruction will load the address of LABEL into the indicated
6555
     register.  The instruction will evaluate to one or two PC relative
6556
     ADD or SUB instructions depending upon where the label is located.
6557
     If a second instruction is not needed a NOP instruction will be
6558
     generated in its place, so that this instruction is always 8 bytes
6559
     long.
6560
 
6561
     If the label is out of range, or if it is not defined in the same
6562
     file (and section) as the ADRL instruction, then an error will be
6563
     generated.  This instruction will not make use of the literal pool.
6564
 
6565
 
6566
   For information on the ARM or Thumb instruction sets, see `ARM
6567
Software Development Toolkit Reference Manual', Advanced RISC Machines
6568
Ltd.
6569
 
6570

6571
File: as.info,  Node: ARM Mapping Symbols,  Prev: ARM Opcodes,  Up: ARM-Dependent
6572
 
6573
9.3.6 Mapping Symbols
6574
---------------------
6575
 
6576
The ARM ELF specification requires that special symbols be inserted
6577
into object files to mark certain features:
6578
 
6579
`$a'
6580
     At the start of a region of code containing ARM instructions.
6581
 
6582
`$t'
6583
     At the start of a region of code containing THUMB instructions.
6584
 
6585
`$d'
6586
     At the start of a region of data.
6587
 
6588
 
6589
   The assembler will automatically insert these symbols for you - there
6590
is no need to code them yourself.  Support for tagging symbols ($b, $f,
6591
$p and $m) which is also mentioned in the current ARM ELF specification
6592
is not implemented.  This is because they have been dropped from the
6593
new EABI and so tools cannot rely upon their presence.
6594
 
6595

6596
File: as.info,  Node: AVR-Dependent,  Next: BFIN-Dependent,  Prev: ARM-Dependent,  Up: Machine Dependencies
6597
 
6598
9.4 AVR Dependent Features
6599
==========================
6600
 
6601
* Menu:
6602
 
6603
* AVR Options::              Options
6604
* AVR Syntax::               Syntax
6605
* AVR Opcodes::              Opcodes
6606
 
6607

6608
File: as.info,  Node: AVR Options,  Next: AVR Syntax,  Up: AVR-Dependent
6609
 
6610
9.4.1 Options
6611
-------------
6612
 
6613
`-mmcu=MCU'
6614
     Specify ATMEL AVR instruction set or MCU type.
6615
 
6616
     Instruction set avr1 is for the minimal AVR core, not supported by
6617
     the C compiler, only for assembler programs (MCU types: at90s1200,
6618
     attiny11, attiny12, attiny15, attiny28).
6619
 
6620
     Instruction set avr2 (default) is for the classic AVR core with up
6621
     to 8K program memory space (MCU types: at90s2313, at90s2323,
6622
     attiny22, attiny26, at90s2333, at90s2343, at90s4414, at90s4433,
6623
     at90s4434, at90s8515, at90c8534, at90s8535, at86rf401, attiny13,
6624
     attiny2313, attiny261, attiny461, attiny861, attiny24, attiny44,
6625
     attiny84, attiny25, attiny45, attiny85, attiny43u, attiny48,
6626
     attiny88).
6627
 
6628
     Instruction set avr3 is for the classic AVR core with up to 128K
6629
     program memory space (MCU types: atmega103, at43usb320,
6630
     at43usb355, at76c711, at90usb82, at90usb162, attiny167).
6631
 
6632
     Instruction set avr4 is for the enhanced AVR core with up to 8K
6633
     program memory space (MCU types: atmega48, atmega48p,atmega8,
6634
     atmega88, atmega88p, atmega8515, atmega8535, atmega8hva, at90pwm1,
6635
     at90pwm2, at90pwm2b, at90pwm3, at90pwm3b).
6636
 
6637
     Instruction set avr5 is for the enhanced AVR core with up to 128K
6638
     program memory space (MCU types: atmega16, atmega161, atmega162,
6639
     atmega163, atmega164p, atmega165, atmega165p, atmega168,
6640
     atmega168p, atmega169, atmega169p, atmega32, atmega323,
6641
     atmega324p, atmega325, atmega325p, atmega328p, atmega329,
6642
     atmega329p, atmega3250, atmega3250p, atmega3290, atmega3290p,
6643
     atmega32hvb, atmega406, atmega64, atmega640, atmega644,
6644
     atmega644p, atmega128, atmega1280, atmega1281, atmega1284p,
6645
     atmega645, atmega649, atmega6450, atmega6490, atmega16hva,
6646
     at90can32, at90can64, at90can128, at90pwm216, at90pwm316,
6647
     atmega32c1, atmega32m1, atmega32u4, at90usb646, at90usb647,
6648
     at90usb1286, at90usb1287, at94k).
6649
 
6650
     Instruction set avr6 is for the enhanced AVR core with 256K program
6651
     memory space (MCU types: atmega2560, atmega2561).
6652
 
6653
`-mall-opcodes'
6654
     Accept all AVR opcodes, even if not supported by `-mmcu'.
6655
 
6656
`-mno-skip-bug'
6657
     This option disable warnings for skipping two-word instructions.
6658
 
6659
`-mno-wrap'
6660
     This option reject `rjmp/rcall' instructions with 8K wrap-around.
6661
 
6662
 
6663

6664
File: as.info,  Node: AVR Syntax,  Next: AVR Opcodes,  Prev: AVR Options,  Up: AVR-Dependent
6665
 
6666
9.4.2 Syntax
6667
------------
6668
 
6669
* Menu:
6670
 
6671
* AVR-Chars::                Special Characters
6672
* AVR-Regs::                 Register Names
6673
* AVR-Modifiers::            Relocatable Expression Modifiers
6674
 
6675

6676
File: as.info,  Node: AVR-Chars,  Next: AVR-Regs,  Up: AVR Syntax
6677
 
6678
9.4.2.1 Special Characters
6679
..........................
6680
 
6681
The presence of a `;' on a line indicates the start of a comment that
6682
extends to the end of the current line.  If a `#' appears as the first
6683
character of a line, the whole line is treated as a comment.
6684
 
6685
   The `$' character can be used instead of a newline to separate
6686
statements.
6687
 
6688

6689
File: as.info,  Node: AVR-Regs,  Next: AVR-Modifiers,  Prev: AVR-Chars,  Up: AVR Syntax
6690
 
6691
9.4.2.2 Register Names
6692
......................
6693
 
6694
The AVR has 32 x 8-bit general purpose working registers `r0', `r1',
6695
... `r31'.  Six of the 32 registers can be used as three 16-bit
6696
indirect address register pointers for Data Space addressing. One of
6697
the these address pointers can also be used as an address pointer for
6698
look up tables in Flash program memory. These added function registers
6699
are the 16-bit `X', `Y' and `Z' - registers.
6700
 
6701
     X = r26:r27
6702
     Y = r28:r29
6703
     Z = r30:r31
6704
 
6705

6706
File: as.info,  Node: AVR-Modifiers,  Prev: AVR-Regs,  Up: AVR Syntax
6707
 
6708
9.4.2.3 Relocatable Expression Modifiers
6709
........................................
6710
 
6711
The assembler supports several modifiers when using relocatable
6712
addresses in AVR instruction operands.  The general syntax is the
6713
following:
6714
 
6715
     modifier(relocatable-expression)
6716
 
6717
`lo8'
6718
     This modifier allows you to use bits 0 through 7 of an address
6719
     expression as 8 bit relocatable expression.
6720
 
6721
`hi8'
6722
     This modifier allows you to use bits 7 through 15 of an address
6723
     expression as 8 bit relocatable expression.  This is useful with,
6724
     for example, the AVR `ldi' instruction and `lo8' modifier.
6725
 
6726
     For example
6727
 
6728
          ldi r26, lo8(sym+10)
6729
          ldi r27, hi8(sym+10)
6730
 
6731
`hh8'
6732
     This modifier allows you to use bits 16 through 23 of an address
6733
     expression as 8 bit relocatable expression.  Also, can be useful
6734
     for loading 32 bit constants.
6735
 
6736
`hlo8'
6737
     Synonym of `hh8'.
6738
 
6739
`hhi8'
6740
     This modifier allows you to use bits 24 through 31 of an
6741
     expression as 8 bit expression. This is useful with, for example,
6742
     the AVR `ldi' instruction and `lo8', `hi8', `hlo8', `hhi8',
6743
     modifier.
6744
 
6745
     For example
6746
 
6747
          ldi r26, lo8(285774925)
6748
          ldi r27, hi8(285774925)
6749
          ldi r28, hlo8(285774925)
6750
          ldi r29, hhi8(285774925)
6751
          ; r29,r28,r27,r26 = 285774925
6752
 
6753
`pm_lo8'
6754
     This modifier allows you to use bits 0 through 7 of an address
6755
     expression as 8 bit relocatable expression.  This modifier useful
6756
     for addressing data or code from Flash/Program memory. The using
6757
     of `pm_lo8' similar to `lo8'.
6758
 
6759
`pm_hi8'
6760
     This modifier allows you to use bits 8 through 15 of an address
6761
     expression as 8 bit relocatable expression.  This modifier useful
6762
     for addressing data or code from Flash/Program memory.
6763
 
6764
`pm_hh8'
6765
     This modifier allows you to use bits 15 through 23 of an address
6766
     expression as 8 bit relocatable expression.  This modifier useful
6767
     for addressing data or code from Flash/Program memory.
6768
 
6769
 
6770

6771
File: as.info,  Node: AVR Opcodes,  Prev: AVR Syntax,  Up: AVR-Dependent
6772
 
6773
9.4.3 Opcodes
6774
-------------
6775
 
6776
For detailed information on the AVR machine instruction set, see
6777
`www.atmel.com/products/AVR'.
6778
 
6779
   `as' implements all the standard AVR opcodes.  The following table
6780
summarizes the AVR opcodes, and their arguments.
6781
 
6782
     Legend:
6783
        r   any register
6784
        d   `ldi' register (r16-r31)
6785
        v   `movw' even register (r0, r2, ..., r28, r30)
6786
        a   `fmul' register (r16-r23)
6787
        w   `adiw' register (r24,r26,r28,r30)
6788
        e   pointer registers (X,Y,Z)
6789
        b   base pointer register and displacement ([YZ]+disp)
6790
        z   Z pointer register (for [e]lpm Rd,Z[+])
6791
        M   immediate value from 0 to 255
6792
        n   immediate value from 0 to 255 ( n = ~M ). Relocation impossible
6793
        s   immediate value from 0 to 7
6794
        P   Port address value from 0 to 63. (in, out)
6795
        p   Port address value from 0 to 31. (cbi, sbi, sbic, sbis)
6796
        K   immediate value from 0 to 63 (used in `adiw', `sbiw')
6797
        i   immediate value
6798
        l   signed pc relative offset from -64 to 63
6799
        L   signed pc relative offset from -2048 to 2047
6800
        h   absolute code address (call, jmp)
6801
        S   immediate value from 0 to 7 (S = s << 4)
6802
        ?   use this opcode entry if no parameters, else use next opcode entry
6803
 
6804
     1001010010001000   clc
6805
     1001010011011000   clh
6806
     1001010011111000   cli
6807
     1001010010101000   cln
6808
     1001010011001000   cls
6809
     1001010011101000   clt
6810
     1001010010111000   clv
6811
     1001010010011000   clz
6812
     1001010000001000   sec
6813
     1001010001011000   seh
6814
     1001010001111000   sei
6815
     1001010000101000   sen
6816
     1001010001001000   ses
6817
     1001010001101000   set
6818
     1001010000111000   sev
6819
     1001010000011000   sez
6820
     100101001SSS1000   bclr    S
6821
     100101000SSS1000   bset    S
6822
     1001010100001001   icall
6823
     1001010000001001   ijmp
6824
     1001010111001000   lpm     ?
6825
     1001000ddddd010+   lpm     r,z
6826
     1001010111011000   elpm    ?
6827
     1001000ddddd011+   elpm    r,z
6828
     0000000000000000   nop
6829
     1001010100001000   ret
6830
     1001010100011000   reti
6831
     1001010110001000   sleep
6832
     1001010110011000   break
6833
     1001010110101000   wdr
6834
     1001010111101000   spm
6835
     000111rdddddrrrr   adc     r,r
6836
     000011rdddddrrrr   add     r,r
6837
     001000rdddddrrrr   and     r,r
6838
     000101rdddddrrrr   cp      r,r
6839
     000001rdddddrrrr   cpc     r,r
6840
     000100rdddddrrrr   cpse    r,r
6841
     001001rdddddrrrr   eor     r,r
6842
     001011rdddddrrrr   mov     r,r
6843
     100111rdddddrrrr   mul     r,r
6844
     001010rdddddrrrr   or      r,r
6845
     000010rdddddrrrr   sbc     r,r
6846
     000110rdddddrrrr   sub     r,r
6847
     001001rdddddrrrr   clr     r
6848
     000011rdddddrrrr   lsl     r
6849
     000111rdddddrrrr   rol     r
6850
     001000rdddddrrrr   tst     r
6851
     0111KKKKddddKKKK   andi    d,M
6852
     0111KKKKddddKKKK   cbr     d,n
6853
     1110KKKKddddKKKK   ldi     d,M
6854
     11101111dddd1111   ser     d
6855
     0110KKKKddddKKKK   ori     d,M
6856
     0110KKKKddddKKKK   sbr     d,M
6857
     0011KKKKddddKKKK   cpi     d,M
6858
     0100KKKKddddKKKK   sbci    d,M
6859
     0101KKKKddddKKKK   subi    d,M
6860
     1111110rrrrr0sss   sbrc    r,s
6861
     1111111rrrrr0sss   sbrs    r,s
6862
     1111100ddddd0sss   bld     r,s
6863
     1111101ddddd0sss   bst     r,s
6864
     10110PPdddddPPPP   in      r,P
6865
     10111PPrrrrrPPPP   out     P,r
6866
     10010110KKddKKKK   adiw    w,K
6867
     10010111KKddKKKK   sbiw    w,K
6868
     10011000pppppsss   cbi     p,s
6869
     10011010pppppsss   sbi     p,s
6870
     10011001pppppsss   sbic    p,s
6871
     10011011pppppsss   sbis    p,s
6872
     111101lllllll000   brcc    l
6873
     111100lllllll000   brcs    l
6874
     111100lllllll001   breq    l
6875
     111101lllllll100   brge    l
6876
     111101lllllll101   brhc    l
6877
     111100lllllll101   brhs    l
6878
     111101lllllll111   brid    l
6879
     111100lllllll111   brie    l
6880
     111100lllllll000   brlo    l
6881
     111100lllllll100   brlt    l
6882
     111100lllllll010   brmi    l
6883
     111101lllllll001   brne    l
6884
     111101lllllll010   brpl    l
6885
     111101lllllll000   brsh    l
6886
     111101lllllll110   brtc    l
6887
     111100lllllll110   brts    l
6888
     111101lllllll011   brvc    l
6889
     111100lllllll011   brvs    l
6890
     111101lllllllsss   brbc    s,l
6891
     111100lllllllsss   brbs    s,l
6892
     1101LLLLLLLLLLLL   rcall   L
6893
     1100LLLLLLLLLLLL   rjmp    L
6894
     1001010hhhhh111h   call    h
6895
     1001010hhhhh110h   jmp     h
6896
     1001010rrrrr0101   asr     r
6897
     1001010rrrrr0000   com     r
6898
     1001010rrrrr1010   dec     r
6899
     1001010rrrrr0011   inc     r
6900
     1001010rrrrr0110   lsr     r
6901
     1001010rrrrr0001   neg     r
6902
     1001000rrrrr1111   pop     r
6903
     1001001rrrrr1111   push    r
6904
     1001010rrrrr0111   ror     r
6905
     1001010rrrrr0010   swap    r
6906
     00000001ddddrrrr   movw    v,v
6907
     00000010ddddrrrr   muls    d,d
6908
     000000110ddd0rrr   mulsu   a,a
6909
     000000110ddd1rrr   fmul    a,a
6910
     000000111ddd0rrr   fmuls   a,a
6911
     000000111ddd1rrr   fmulsu  a,a
6912
     1001001ddddd0000   sts     i,r
6913
     1001000ddddd0000   lds     r,i
6914
     10o0oo0dddddbooo   ldd     r,b
6915
     100!000dddddee-+   ld      r,e
6916
     10o0oo1rrrrrbooo   std     b,r
6917
     100!001rrrrree-+   st      e,r
6918
     1001010100011001   eicall
6919
     1001010000011001   eijmp
6920
 
6921

6922
File: as.info,  Node: BFIN-Dependent,  Next: CR16-Dependent,  Prev: AVR-Dependent,  Up: Machine Dependencies
6923
 
6924
9.5 Blackfin Dependent Features
6925
===============================
6926
 
6927
* Menu:
6928
 
6929
* BFIN Syntax::                 BFIN Syntax
6930
* BFIN Directives::             BFIN Directives
6931
 
6932

6933
File: as.info,  Node: BFIN Syntax,  Next: BFIN Directives,  Up: BFIN-Dependent
6934
 
6935
9.5.1 Syntax
6936
------------
6937
 
6938
`Special Characters'
6939
     Assembler input is free format and may appear anywhere on the line.
6940
     One instruction may extend across multiple lines or more than one
6941
     instruction may appear on the same line.  White space (space, tab,
6942
     comments or newline) may appear anywhere between tokens.  A token
6943
     must not have embedded spaces.  Tokens include numbers, register
6944
     names, keywords, user identifiers, and also some multicharacter
6945
     special symbols like "+=", "/*" or "||".
6946
 
6947
`Instruction Delimiting'
6948
     A semicolon must terminate every instruction.  Sometimes a complete
6949
     instruction will consist of more than one operation.  There are two
6950
     cases where this occurs.  The first is when two general operations
6951
     are combined.  Normally a comma separates the different parts, as
6952
     in
6953
 
6954
          a0= r3.h * r2.l, a1 = r3.l * r2.h ;
6955
 
6956
     The second case occurs when a general instruction is combined with
6957
     one or two memory references for joint issue.  The latter portions
6958
     are set off by a "||" token.
6959
 
6960
          a0 = r3.h * r2.l || r1 = [p3++] || r4 = [i2++];
6961
 
6962
`Register Names'
6963
     The assembler treats register names and instruction keywords in a
6964
     case insensitive manner.  User identifiers are case sensitive.
6965
     Thus, R3.l, R3.L, r3.l and r3.L are all equivalent input to the
6966
     assembler.
6967
 
6968
     Register names are reserved and may not be used as program
6969
     identifiers.
6970
 
6971
     Some operations (such as "Move Register") require a register pair.
6972
     Register pairs are always data registers and are denoted using a
6973
     colon, eg., R3:2.  The larger number must be written firsts.  Note
6974
     that the hardware only supports odd-even pairs, eg., R7:6, R5:4,
6975
     R3:2, and R1:0.
6976
 
6977
     Some instructions (such as -SP (Push Multiple)) require a group of
6978
     adjacent registers.  Adjacent registers are denoted in the syntax
6979
     by the range enclosed in parentheses and separated by a colon,
6980
     eg., (R7:3).  Again, the larger number appears first.
6981
 
6982
     Portions of a particular register may be individually specified.
6983
     This is written with a dot (".") following the register name and
6984
     then a letter denoting the desired portion.  For 32-bit registers,
6985
     ".H" denotes the most significant ("High") portion.  ".L" denotes
6986
     the least-significant portion.  The subdivisions of the 40-bit
6987
     registers are described later.
6988
 
6989
`Accumulators'
6990
     The set of 40-bit registers A1 and A0 that normally contain data
6991
     that is being manipulated.  Each accumulator can be accessed in
6992
     four ways.
6993
 
6994
    `one 40-bit register'
6995
          The register will be referred to as A1 or A0.
6996
 
6997
    `one 32-bit register'
6998
          The registers are designated as A1.W or A0.W.
6999
 
7000
    `two 16-bit registers'
7001
          The registers are designated as A1.H, A1.L, A0.H or A0.L.
7002
 
7003
    `one 8-bit register'
7004
          The registers are designated as A1.X or A0.X for the bits that
7005
          extend beyond bit 31.
7006
 
7007
`Data Registers'
7008
     The set of 32-bit registers (R0, R1, R2, R3, R4, R5, R6 and R7)
7009
     that normally contain data for manipulation.  These are
7010
     abbreviated as D-register or Dreg.  Data registers can be accessed
7011
     as 32-bit registers or as two independent 16-bit registers.  The
7012
     least significant 16 bits of each register is called the "low"
7013
     half and is designated with ".L" following the register name.  The
7014
     most significant 16 bits are called the "high" half and is
7015
     designated with ".H" following the name.
7016
 
7017
             R7.L, r2.h, r4.L, R0.H
7018
 
7019
`Pointer Registers'
7020
     The set of 32-bit registers (P0, P1, P2, P3, P4, P5, SP and FP)
7021
     that normally contain byte addresses of data structures.  These are
7022
     abbreviated as P-register or Preg.
7023
 
7024
          p2, p5, fp, sp
7025
 
7026
`Stack Pointer SP'
7027
     The stack pointer contains the 32-bit address of the last occupied
7028
     byte location in the stack.  The stack grows by decrementing the
7029
     stack pointer.
7030
 
7031
`Frame Pointer FP'
7032
     The frame pointer contains the 32-bit address of the previous frame
7033
     pointer in the stack.  It is located at the top of a frame.
7034
 
7035
`Loop Top'
7036
     LT0 and LT1.  These registers contain the 32-bit address of the
7037
     top of a zero overhead loop.
7038
 
7039
`Loop Count'
7040
     LC0 and LC1.  These registers contain the 32-bit counter of the
7041
     zero overhead loop executions.
7042
 
7043
`Loop Bottom'
7044
     LB0 and LB1.  These registers contain the 32-bit address of the
7045
     bottom of a zero overhead loop.
7046
 
7047
`Index Registers'
7048
     The set of 32-bit registers (I0, I1, I2, I3) that normally contain
7049
     byte addresses of data structures.  Abbreviated I-register or Ireg.
7050
 
7051
`Modify Registers'
7052
     The set of 32-bit registers (M0, M1, M2, M3) that normally contain
7053
     offset values that are added and subracted to one of the index
7054
     registers.  Abbreviated as Mreg.
7055
 
7056
`Length Registers'
7057
     The set of 32-bit registers (L0, L1, L2, L3) that normally contain
7058
     the length in bytes of the circular buffer.  Abbreviated as Lreg.
7059
     Clear the Lreg to disable circular addressing for the
7060
     corresponding Ireg.
7061
 
7062
`Base Registers'
7063
     The set of 32-bit registers (B0, B1, B2, B3) that normally contain
7064
     the base address in bytes of the circular buffer.  Abbreviated as
7065
     Breg.
7066
 
7067
`Floating Point'
7068
     The Blackfin family has no hardware floating point but the .float
7069
     directive generates ieee floating point numbers for use with
7070
     software floating point libraries.
7071
 
7072
`Blackfin Opcodes'
7073
     For detailed information on the Blackfin machine instruction set,
7074
     see the Blackfin(r) Processor Instruction Set Reference.
7075
 
7076
 
7077

7078
File: as.info,  Node: BFIN Directives,  Prev: BFIN Syntax,  Up: BFIN-Dependent
7079
 
7080
9.5.2 Directives
7081
----------------
7082
 
7083
The following directives are provided for compatibility with the VDSP
7084
assembler.
7085
 
7086
`.byte2'
7087
     Initializes a four byte data object.
7088
 
7089
`.byte4'
7090
     Initializes a two byte data object.
7091
 
7092
`.db'
7093
     TBD
7094
 
7095
`.dd'
7096
     TBD
7097
 
7098
`.dw'
7099
     TBD
7100
 
7101
`.var'
7102
     Define and initialize a 32 bit data object.
7103
 
7104

7105
File: as.info,  Node: CR16-Dependent,  Next: CRIS-Dependent,  Prev: BFIN-Dependent,  Up: Machine Dependencies
7106
 
7107
9.6 CR16 Dependent Features
7108
===========================
7109
 
7110
* Menu:
7111
 
7112
* CR16 Operand Qualifiers::     CR16 Machine Operand Qualifiers
7113
 
7114

7115
File: as.info,  Node: CR16 Operand Qualifiers,  Up: CR16-Dependent
7116
 
7117
9.6.1 CR16 Operand Qualifiers
7118
-----------------------------
7119
 
7120
The National Semiconductor CR16 target of `as' has a few machine
7121
dependent operand qualifiers.
7122
 
7123
   Operand expression type qualifier is an optional field in the
7124
instruction operand, to determines the type of the expression field of
7125
an operand. The `@' is required. CR16 architecture uses one of the
7126
following expression qualifiers:
7127
 
7128
`s'
7129
     - `Specifies expression operand type as small'
7130
 
7131
`m'
7132
     - `Specifies expression operand type as medium'
7133
 
7134
`l'
7135
     - `Specifies expression operand type as large'
7136
 
7137
`c'
7138
     - `Specifies the CR16 Assembler generates a relocation entry for
7139
     the operand, where pc has implied bit, the expression is adjusted
7140
     accordingly. The linker uses the relocation entry to update the
7141
     operand address at link time.'
7142
 
7143
   CR16 target operand qualifiers and its size (in bits):
7144
 
7145
`Immediate Operand'
7146
     - s --- 4 bits
7147
 
7148
`'
7149
     - m --- 16 bits, for movb and movw instructions.
7150
 
7151
`'
7152
     - m --- 20 bits, movd instructions.
7153
 
7154
`'
7155
     - l --- 32 bits
7156
 
7157
`Absolute Operand'
7158
     - s --- Illegal specifier for this operand.
7159
 
7160
`'
7161
     - m --- 20 bits, movd instructions.
7162
 
7163
`Displacement Operand'
7164
     - s --- 8 bits
7165
 
7166
`'
7167
     - m --- 16 bits
7168
 
7169
`'
7170
     - l --- 24 bits
7171
 
7172
   For example:
7173
     1   `movw $_myfun@c,r1'
7174
 
7175
         This loads the address of _myfun, shifted right by 1, into r1.
7176
 
7177
     2   `movd $_myfun@c,(r2,r1)'
7178
 
7179
         This loads the address of _myfun, shifted right by 1, into register-pair r2-r1.
7180
 
7181
     3   `_myfun_ptr:'
7182
         `.long _myfun@c'
7183
         `loadd _myfun_ptr, (r1,r0)'
7184
         `jal (r1,r0)'
7185
 
7186
         This .long directive, the address of _myfunc, shifted right by 1 at link time.
7187
 
7188

7189
File: as.info,  Node: CRIS-Dependent,  Next: D10V-Dependent,  Prev: CR16-Dependent,  Up: Machine Dependencies
7190
 
7191
9.7 CRIS Dependent Features
7192
===========================
7193
 
7194
* Menu:
7195
 
7196
* CRIS-Opts::              Command-line Options
7197
* CRIS-Expand::            Instruction expansion
7198
* CRIS-Symbols::           Symbols
7199
* CRIS-Syntax::            Syntax
7200
 
7201

7202
File: as.info,  Node: CRIS-Opts,  Next: CRIS-Expand,  Up: CRIS-Dependent
7203
 
7204
9.7.1 Command-line Options
7205
--------------------------
7206
 
7207
The CRIS version of `as' has these machine-dependent command-line
7208
options.
7209
 
7210
   The format of the generated object files can be either ELF or a.out,
7211
specified by the command-line options `--emulation=crisaout' and
7212
`--emulation=criself'.  The default is ELF (criself), unless `as' has
7213
been configured specifically for a.out by using the configuration name
7214
`cris-axis-aout'.
7215
 
7216
   There are two different link-incompatible ELF object file variants
7217
for CRIS, for use in environments where symbols are expected to be
7218
prefixed by a leading `_' character and for environments without such a
7219
symbol prefix.  The variant used for GNU/Linux port has no symbol
7220
prefix.  Which variant to produce is specified by either of the options
7221
`--underscore' and `--no-underscore'.  The default is `--underscore'.
7222
Since symbols in CRIS a.out objects are expected to have a `_' prefix,
7223
specifying `--no-underscore' when generating a.out objects is an error.
7224
Besides the object format difference, the effect of this option is to
7225
parse register names differently (*note crisnous::).  The
7226
`--no-underscore' option makes a `$' register prefix mandatory.
7227
 
7228
   The option `--pic' must be passed to `as' in order to recognize the
7229
symbol syntax used for ELF (SVR4 PIC) position-independent-code (*note
7230
crispic::).  This will also affect expansion of instructions.  The
7231
expansion with `--pic' will use PC-relative rather than (slightly
7232
faster) absolute addresses in those expansions.
7233
 
7234
   The option `--march=ARCHITECTURE' specifies the recognized
7235
instruction set and recognized register names.  It also controls the
7236
architecture type of the object file.  Valid values for ARCHITECTURE
7237
are:
7238
`v0_v10'
7239
     All instructions and register names for any architecture variant
7240
     in the set v0...v10 are recognized.  This is the default if the
7241
     target is configured as cris-*.
7242
 
7243
`v10'
7244
     Only instructions and register names for CRIS v10 (as found in
7245
     ETRAX 100 LX) are recognized.  This is the default if the target
7246
     is configured as crisv10-*.
7247
 
7248
`v32'
7249
     Only instructions and register names for CRIS v32 (code name
7250
     Guinness) are recognized.  This is the default if the target is
7251
     configured as crisv32-*.  This value implies `--no-mul-bug-abort'.
7252
     (A subsequent `--mul-bug-abort' will turn it back on.)
7253
 
7254
`common_v10_v32'
7255
     Only instructions with register names and addressing modes with
7256
     opcodes common to the v10 and v32 are recognized.
7257
 
7258
   When `-N' is specified, `as' will emit a warning when a 16-bit
7259
branch instruction is expanded into a 32-bit multiple-instruction
7260
construct (*note CRIS-Expand::).
7261
 
7262
   Some versions of the CRIS v10, for example in the Etrax 100 LX,
7263
contain a bug that causes destabilizing memory accesses when a multiply
7264
instruction is executed with certain values in the first operand just
7265
before a cache-miss.  When the `--mul-bug-abort' command line option is
7266
active (the default value), `as' will refuse to assemble a file
7267
containing a multiply instruction at a dangerous offset, one that could
7268
be the last on a cache-line, or is in a section with insufficient
7269
alignment.  This placement checking does not catch any case where the
7270
multiply instruction is dangerously placed because it is located in a
7271
delay-slot.  The `--mul-bug-abort' command line option turns off the
7272
checking.
7273
 
7274

7275
File: as.info,  Node: CRIS-Expand,  Next: CRIS-Symbols,  Prev: CRIS-Opts,  Up: CRIS-Dependent
7276
 
7277
9.7.2 Instruction expansion
7278
---------------------------
7279
 
7280
`as' will silently choose an instruction that fits the operand size for
7281
`[register+constant]' operands.  For example, the offset `127' in
7282
`move.d [r3+127],r4' fits in an instruction using a signed-byte offset.
7283
Similarly, `move.d [r2+32767],r1' will generate an instruction using a
7284
16-bit offset.  For symbolic expressions and constants that do not fit
7285
in 16 bits including the sign bit, a 32-bit offset is generated.
7286
 
7287
   For branches, `as' will expand from a 16-bit branch instruction into
7288
a sequence of instructions that can reach a full 32-bit address.  Since
7289
this does not correspond to a single instruction, such expansions can
7290
optionally be warned about.  *Note CRIS-Opts::.
7291
 
7292
   If the operand is found to fit the range, a `lapc' mnemonic will
7293
translate to a `lapcq' instruction.  Use `lapc.d' to force the 32-bit
7294
`lapc' instruction.
7295
 
7296
   Similarly, the `addo' mnemonic will translate to the shortest
7297
fitting instruction of `addoq', `addo.w' and `addo.d', when used with a
7298
operand that is a constant known at assembly time.
7299
 
7300

7301
File: as.info,  Node: CRIS-Symbols,  Next: CRIS-Syntax,  Prev: CRIS-Expand,  Up: CRIS-Dependent
7302
 
7303
9.7.3 Symbols
7304
-------------
7305
 
7306
Some symbols are defined by the assembler.  They're intended to be used
7307
in conditional assembly, for example:
7308
      .if ..asm.arch.cris.v32
7309
      CODE FOR CRIS V32
7310
      .elseif ..asm.arch.cris.common_v10_v32
7311
      CODE COMMON TO CRIS V32 AND CRIS V10
7312
      .elseif ..asm.arch.cris.v10 | ..asm.arch.cris.any_v0_v10
7313
      CODE FOR V10
7314
      .else
7315
      .error "Code needs to be added here."
7316
      .endif
7317
 
7318
   These symbols are defined in the assembler, reflecting command-line
7319
options, either when specified or the default.  They are always
7320
defined, to 0 or 1.
7321
`..asm.arch.cris.any_v0_v10'
7322
     This symbol is non-zero when `--march=v0_v10' is specified or the
7323
     default.
7324
 
7325
`..asm.arch.cris.common_v10_v32'
7326
     Set according to the option `--march=common_v10_v32'.
7327
 
7328
`..asm.arch.cris.v10'
7329
     Reflects the option `--march=v10'.
7330
 
7331
`..asm.arch.cris.v32'
7332
     Corresponds to `--march=v10'.
7333
 
7334
   Speaking of symbols, when a symbol is used in code, it can have a
7335
suffix modifying its value for use in position-independent code. *Note
7336
CRIS-Pic::.
7337
 
7338

7339
File: as.info,  Node: CRIS-Syntax,  Prev: CRIS-Symbols,  Up: CRIS-Dependent
7340
 
7341
9.7.4 Syntax
7342
------------
7343
 
7344
There are different aspects of the CRIS assembly syntax.
7345
 
7346
* Menu:
7347
 
7348
* CRIS-Chars::                  Special Characters
7349
* CRIS-Pic::                    Position-Independent Code Symbols
7350
* CRIS-Regs::                   Register Names
7351
* CRIS-Pseudos::                Assembler Directives
7352
 
7353

7354
File: as.info,  Node: CRIS-Chars,  Next: CRIS-Pic,  Up: CRIS-Syntax
7355
 
7356
9.7.4.1 Special Characters
7357
..........................
7358
 
7359
The character `#' is a line comment character.  It starts a comment if
7360
and only if it is placed at the beginning of a line.
7361
 
7362
   A `;' character starts a comment anywhere on the line, causing all
7363
characters up to the end of the line to be ignored.
7364
 
7365
   A `@' character is handled as a line separator equivalent to a
7366
logical new-line character (except in a comment), so separate
7367
instructions can be specified on a single line.
7368
 
7369

7370
File: as.info,  Node: CRIS-Pic,  Next: CRIS-Regs,  Prev: CRIS-Chars,  Up: CRIS-Syntax
7371
 
7372
9.7.4.2 Symbols in position-independent code
7373
............................................
7374
 
7375
When generating position-independent code (SVR4 PIC) for use in
7376
cris-axis-linux-gnu or crisv32-axis-linux-gnu shared libraries, symbol
7377
suffixes are used to specify what kind of run-time symbol lookup will
7378
be used, expressed in the object as different _relocation types_.
7379
Usually, all absolute symbol values must be located in a table, the
7380
_global offset table_, leaving the code position-independent;
7381
independent of values of global symbols and independent of the address
7382
of the code.  The suffix modifies the value of the symbol, into for
7383
example an index into the global offset table where the real symbol
7384
value is entered, or a PC-relative value, or a value relative to the
7385
start of the global offset table.  All symbol suffixes start with the
7386
character `:' (omitted in the list below).  Every symbol use in code or
7387
a read-only section must therefore have a PIC suffix to enable a useful
7388
shared library to be created.  Usually, these constructs must not be
7389
used with an additive constant offset as is usually allowed, i.e. no 4
7390
as in `symbol + 4' is allowed.  This restriction is checked at
7391
link-time, not at assembly-time.
7392
 
7393
`GOT'
7394
     Attaching this suffix to a symbol in an instruction causes the
7395
     symbol to be entered into the global offset table.  The value is a
7396
     32-bit index for that symbol into the global offset table.  The
7397
     name of the corresponding relocation is `R_CRIS_32_GOT'.  Example:
7398
     `move.d [$r0+extsym:GOT],$r9'
7399
 
7400
`GOT16'
7401
     Same as for `GOT', but the value is a 16-bit index into the global
7402
     offset table.  The corresponding relocation is `R_CRIS_16_GOT'.
7403
     Example: `move.d [$r0+asymbol:GOT16],$r10'
7404
 
7405
`PLT'
7406
     This suffix is used for function symbols.  It causes a _procedure
7407
     linkage table_, an array of code stubs, to be created at the time
7408
     the shared object is created or linked against, together with a
7409
     global offset table entry.  The value is a pc-relative offset to
7410
     the corresponding stub code in the procedure linkage table.  This
7411
     arrangement causes the run-time symbol resolver to be called to
7412
     look up and set the value of the symbol the first time the
7413
     function is called (at latest; depending environment variables).
7414
     It is only safe to leave the symbol unresolved this way if all
7415
     references are function calls.  The name of the relocation is
7416
     `R_CRIS_32_PLT_PCREL'.  Example: `add.d fnname:PLT,$pc'
7417
 
7418
`PLTG'
7419
     Like PLT, but the value is relative to the beginning of the global
7420
     offset table.  The relocation is `R_CRIS_32_PLT_GOTREL'.  Example:
7421
     `move.d fnname:PLTG,$r3'
7422
 
7423
`GOTPLT'
7424
     Similar to `PLT', but the value of the symbol is a 32-bit index
7425
     into the global offset table.  This is somewhat of a mix between
7426
     the effect of the `GOT' and the `PLT' suffix; the difference to
7427
     `GOT' is that there will be a procedure linkage table entry
7428
     created, and that the symbol is assumed to be a function entry and
7429
     will be resolved by the run-time resolver as with `PLT'.  The
7430
     relocation is `R_CRIS_32_GOTPLT'.  Example: `jsr
7431
     [$r0+fnname:GOTPLT]'
7432
 
7433
`GOTPLT16'
7434
     A variant of `GOTPLT' giving a 16-bit value.  Its relocation name
7435
     is `R_CRIS_16_GOTPLT'.  Example: `jsr [$r0+fnname:GOTPLT16]'
7436
 
7437
`GOTOFF'
7438
     This suffix must only be attached to a local symbol, but may be
7439
     used in an expression adding an offset.  The value is the address
7440
     of the symbol relative to the start of the global offset table.
7441
     The relocation name is `R_CRIS_32_GOTREL'.  Example: `move.d
7442
     [$r0+localsym:GOTOFF],r3'
7443
 
7444

7445
File: as.info,  Node: CRIS-Regs,  Next: CRIS-Pseudos,  Prev: CRIS-Pic,  Up: CRIS-Syntax
7446
 
7447
9.7.4.3 Register names
7448
......................
7449
 
7450
A `$' character may always prefix a general or special register name in
7451
an instruction operand but is mandatory when the option
7452
`--no-underscore' is specified or when the `.syntax register_prefix'
7453
directive is in effect (*note crisnous::).  Register names are
7454
case-insensitive.
7455
 
7456

7457
File: as.info,  Node: CRIS-Pseudos,  Prev: CRIS-Regs,  Up: CRIS-Syntax
7458
 
7459
9.7.4.4 Assembler Directives
7460
............................
7461
 
7462
There are a few CRIS-specific pseudo-directives in addition to the
7463
generic ones.  *Note Pseudo Ops::.  Constants emitted by
7464
pseudo-directives are in little-endian order for CRIS.  There is no
7465
support for floating-point-specific directives for CRIS.
7466
 
7467
`.dword EXPRESSIONS'
7468
     The `.dword' directive is a synonym for `.int', expecting zero or
7469
     more EXPRESSIONS, separated by commas.  For each expression, a
7470
     32-bit little-endian constant is emitted.
7471
 
7472
`.syntax ARGUMENT'
7473
     The `.syntax' directive takes as ARGUMENT one of the following
7474
     case-sensitive choices.
7475
 
7476
    `no_register_prefix'
7477
          The `.syntax no_register_prefix' directive makes a `$'
7478
          character prefix on all registers optional.  It overrides a
7479
          previous setting, including the corresponding effect of the
7480
          option `--no-underscore'.  If this directive is used when
7481
          ordinary symbols do not have a `_' character prefix, care
7482
          must be taken to avoid ambiguities whether an operand is a
7483
          register or a symbol; using symbols with names the same as
7484
          general or special registers then invoke undefined behavior.
7485
 
7486
    `register_prefix'
7487
          This directive makes a `$' character prefix on all registers
7488
          mandatory.  It overrides a previous setting, including the
7489
          corresponding effect of the option `--underscore'.
7490
 
7491
    `leading_underscore'
7492
          This is an assertion directive, emitting an error if the
7493
          `--no-underscore' option is in effect.
7494
 
7495
    `no_leading_underscore'
7496
          This is the opposite of the `.syntax leading_underscore'
7497
          directive and emits an error if the option `--underscore' is
7498
          in effect.
7499
 
7500
`.arch ARGUMENT'
7501
     This is an assertion directive, giving an error if the specified
7502
     ARGUMENT is not the same as the specified or default value for the
7503
     `--march=ARCHITECTURE' option (*note march-option::).
7504
 
7505
 
7506

7507
File: as.info,  Node: D10V-Dependent,  Next: D30V-Dependent,  Prev: CRIS-Dependent,  Up: Machine Dependencies
7508
 
7509
9.8 D10V Dependent Features
7510
===========================
7511
 
7512
* Menu:
7513
 
7514
* D10V-Opts::                   D10V Options
7515
* D10V-Syntax::                 Syntax
7516
* D10V-Float::                  Floating Point
7517
* D10V-Opcodes::                Opcodes
7518
 
7519

7520
File: as.info,  Node: D10V-Opts,  Next: D10V-Syntax,  Up: D10V-Dependent
7521
 
7522
9.8.1 D10V Options
7523
------------------
7524
 
7525
The Mitsubishi D10V version of `as' has a few machine dependent options.
7526
 
7527
`-O'
7528
     The D10V can often execute two sub-instructions in parallel. When
7529
     this option is used, `as' will attempt to optimize its output by
7530
     detecting when instructions can be executed in parallel.
7531
 
7532
`--nowarnswap'
7533
     To optimize execution performance, `as' will sometimes swap the
7534
     order of instructions. Normally this generates a warning. When
7535
     this option is used, no warning will be generated when
7536
     instructions are swapped.
7537
 
7538
`--gstabs-packing'
7539
 
7540
`--no-gstabs-packing'
7541
     `as' packs adjacent short instructions into a single packed
7542
     instruction. `--no-gstabs-packing' turns instruction packing off if
7543
     `--gstabs' is specified as well; `--gstabs-packing' (the default)
7544
     turns instruction packing on even when `--gstabs' is specified.
7545
 
7546

7547
File: as.info,  Node: D10V-Syntax,  Next: D10V-Float,  Prev: D10V-Opts,  Up: D10V-Dependent
7548
 
7549
9.8.2 Syntax
7550
------------
7551
 
7552
The D10V syntax is based on the syntax in Mitsubishi's D10V
7553
architecture manual.  The differences are detailed below.
7554
 
7555
* Menu:
7556
 
7557
* D10V-Size::                 Size Modifiers
7558
* D10V-Subs::                 Sub-Instructions
7559
* D10V-Chars::                Special Characters
7560
* D10V-Regs::                 Register Names
7561
* D10V-Addressing::           Addressing Modes
7562
* D10V-Word::                 @WORD Modifier
7563
 
7564

7565
File: as.info,  Node: D10V-Size,  Next: D10V-Subs,  Up: D10V-Syntax
7566
 
7567
9.8.2.1 Size Modifiers
7568
......................
7569
 
7570
The D10V version of `as' uses the instruction names in the D10V
7571
Architecture Manual.  However, the names in the manual are sometimes
7572
ambiguous.  There are instruction names that can assemble to a short or
7573
long form opcode.  How does the assembler pick the correct form?  `as'
7574
will always pick the smallest form if it can.  When dealing with a
7575
symbol that is not defined yet when a line is being assembled, it will
7576
always use the long form.  If you need to force the assembler to use
7577
either the short or long form of the instruction, you can append either
7578
`.s' (short) or `.l' (long) to it.  For example, if you are writing an
7579
assembly program and you want to do a branch to a symbol that is
7580
defined later in your program, you can write `bra.s   foo'.  Objdump
7581
and GDB will always append `.s' or `.l' to instructions which have both
7582
short and long forms.
7583
 
7584

7585
File: as.info,  Node: D10V-Subs,  Next: D10V-Chars,  Prev: D10V-Size,  Up: D10V-Syntax
7586
 
7587
9.8.2.2 Sub-Instructions
7588
........................
7589
 
7590
The D10V assembler takes as input a series of instructions, either
7591
one-per-line, or in the special two-per-line format described in the
7592
next section.  Some of these instructions will be short-form or
7593
sub-instructions.  These sub-instructions can be packed into a single
7594
instruction.  The assembler will do this automatically.  It will also
7595
detect when it should not pack instructions.  For example, when a label
7596
is defined, the next instruction will never be packaged with the
7597
previous one.  Whenever a branch and link instruction is called, it
7598
will not be packaged with the next instruction so the return address
7599
will be valid.  Nops are automatically inserted when necessary.
7600
 
7601
   If you do not want the assembler automatically making these
7602
decisions, you can control the packaging and execution type (parallel
7603
or sequential) with the special execution symbols described in the next
7604
section.
7605
 
7606

7607
File: as.info,  Node: D10V-Chars,  Next: D10V-Regs,  Prev: D10V-Subs,  Up: D10V-Syntax
7608
 
7609
9.8.2.3 Special Characters
7610
..........................
7611
 
7612
`;' and `#' are the line comment characters.  Sub-instructions may be
7613
executed in order, in reverse-order, or in parallel.  Instructions
7614
listed in the standard one-per-line format will be executed
7615
sequentially.  To specify the executing order, use the following
7616
symbols:
7617
`->'
7618
     Sequential with instruction on the left first.
7619
 
7620
`<-'
7621
     Sequential with instruction on the right first.
7622
 
7623
`||'
7624
     Parallel
7625
   The D10V syntax allows either one instruction per line, one
7626
instruction per line with the execution symbol, or two instructions per
7627
line.  For example
7628
`abs       a1      ->      abs     r0'
7629
     Execute these sequentially.  The instruction on the right is in
7630
     the right container and is executed second.
7631
 
7632
`abs       r0      <-      abs     a1'
7633
     Execute these reverse-sequentially.  The instruction on the right
7634
     is in the right container, and is executed first.
7635
 
7636
`ld2w    r2,@r8+         ||      mac     a0,r0,r7'
7637
     Execute these in parallel.
7638
 
7639
`ld2w    r2,@r8+         ||'
7640
`mac     a0,r0,r7'
7641
     Two-line format. Execute these in parallel.
7642
 
7643
`ld2w    r2,@r8+'
7644
`mac     a0,r0,r7'
7645
     Two-line format. Execute these sequentially.  Assembler will put
7646
     them in the proper containers.
7647
 
7648
`ld2w    r2,@r8+         ->'
7649
`mac     a0,r0,r7'
7650
     Two-line format. Execute these sequentially.  Same as above but
7651
     second instruction will always go into right container.
7652
   Since `$' has no special meaning, you may use it in symbol names.
7653
 
7654

7655
File: as.info,  Node: D10V-Regs,  Next: D10V-Addressing,  Prev: D10V-Chars,  Up: D10V-Syntax
7656
 
7657
9.8.2.4 Register Names
7658
......................
7659
 
7660
You can use the predefined symbols `r0' through `r15' to refer to the
7661
D10V registers.  You can also use `sp' as an alias for `r15'.  The
7662
accumulators are `a0' and `a1'.  There are special register-pair names
7663
that may optionally be used in opcodes that require even-numbered
7664
registers. Register names are not case sensitive.
7665
 
7666
   Register Pairs
7667
`r0-r1'
7668
 
7669
`r2-r3'
7670
 
7671
`r4-r5'
7672
 
7673
`r6-r7'
7674
 
7675
`r8-r9'
7676
 
7677
`r10-r11'
7678
 
7679
`r12-r13'
7680
 
7681
`r14-r15'
7682
 
7683
   The D10V also has predefined symbols for these control registers and
7684
status bits:
7685
`psw'
7686
     Processor Status Word
7687
 
7688
`bpsw'
7689
     Backup Processor Status Word
7690
 
7691
`pc'
7692
     Program Counter
7693
 
7694
`bpc'
7695
     Backup Program Counter
7696
 
7697
`rpt_c'
7698
     Repeat Count
7699
 
7700
`rpt_s'
7701
     Repeat Start address
7702
 
7703
`rpt_e'
7704
     Repeat End address
7705
 
7706
`mod_s'
7707
     Modulo Start address
7708
 
7709
`mod_e'
7710
     Modulo End address
7711
 
7712
`iba'
7713
     Instruction Break Address
7714
 
7715
`f0'
7716
     Flag 0
7717
 
7718
`f1'
7719
     Flag 1
7720
 
7721
`c'
7722
     Carry flag
7723
 
7724

7725
File: as.info,  Node: D10V-Addressing,  Next: D10V-Word,  Prev: D10V-Regs,  Up: D10V-Syntax
7726
 
7727
9.8.2.5 Addressing Modes
7728
........................
7729
 
7730
`as' understands the following addressing modes for the D10V.  `RN' in
7731
the following refers to any of the numbered registers, but _not_ the
7732
control registers.
7733
`RN'
7734
     Register direct
7735
 
7736
`@RN'
7737
     Register indirect
7738
 
7739
`@RN+'
7740
     Register indirect with post-increment
7741
 
7742
`@RN-'
7743
     Register indirect with post-decrement
7744
 
7745
`@-SP'
7746
     Register indirect with pre-decrement
7747
 
7748
`@(DISP, RN)'
7749
     Register indirect with displacement
7750
 
7751
`ADDR'
7752
     PC relative address (for branch or rep).
7753
 
7754
`#IMM'
7755
     Immediate data (the `#' is optional and ignored)
7756
 
7757

7758
File: as.info,  Node: D10V-Word,  Prev: D10V-Addressing,  Up: D10V-Syntax
7759
 
7760
9.8.2.6 @WORD Modifier
7761
......................
7762
 
7763
Any symbol followed by `@word' will be replaced by the symbol's value
7764
shifted right by 2.  This is used in situations such as loading a
7765
register with the address of a function (or any other code fragment).
7766
For example, if you want to load a register with the location of the
7767
function `main' then jump to that function, you could do it as follows:
7768
     ldi     r2, main@word
7769
     jmp     r2
7770
 
7771

7772
File: as.info,  Node: D10V-Float,  Next: D10V-Opcodes,  Prev: D10V-Syntax,  Up: D10V-Dependent
7773
 
7774
9.8.3 Floating Point
7775
--------------------
7776
 
7777
The D10V has no hardware floating point, but the `.float' and `.double'
7778
directives generates IEEE floating-point numbers for compatibility with
7779
other development tools.
7780
 
7781

7782
File: as.info,  Node: D10V-Opcodes,  Prev: D10V-Float,  Up: D10V-Dependent
7783
 
7784
9.8.4 Opcodes
7785
-------------
7786
 
7787
For detailed information on the D10V machine instruction set, see `D10V
7788
Architecture: A VLIW Microprocessor for Multimedia Applications'
7789
(Mitsubishi Electric Corp.).  `as' implements all the standard D10V
7790
opcodes.  The only changes are those described in the section on size
7791
modifiers
7792
 
7793

7794
File: as.info,  Node: D30V-Dependent,  Next: H8/300-Dependent,  Prev: D10V-Dependent,  Up: Machine Dependencies
7795
 
7796
9.9 D30V Dependent Features
7797
===========================
7798
 
7799
* Menu:
7800
 
7801
* D30V-Opts::                   D30V Options
7802
* D30V-Syntax::                 Syntax
7803
* D30V-Float::                  Floating Point
7804
* D30V-Opcodes::                Opcodes
7805
 
7806

7807
File: as.info,  Node: D30V-Opts,  Next: D30V-Syntax,  Up: D30V-Dependent
7808
 
7809
9.9.1 D30V Options
7810
------------------
7811
 
7812
The Mitsubishi D30V version of `as' has a few machine dependent options.
7813
 
7814
`-O'
7815
     The D30V can often execute two sub-instructions in parallel. When
7816
     this option is used, `as' will attempt to optimize its output by
7817
     detecting when instructions can be executed in parallel.
7818
 
7819
`-n'
7820
     When this option is used, `as' will issue a warning every time it
7821
     adds a nop instruction.
7822
 
7823
`-N'
7824
     When this option is used, `as' will issue a warning if it needs to
7825
     insert a nop after a 32-bit multiply before a load or 16-bit
7826
     multiply instruction.
7827
 
7828

7829
File: as.info,  Node: D30V-Syntax,  Next: D30V-Float,  Prev: D30V-Opts,  Up: D30V-Dependent
7830
 
7831
9.9.2 Syntax
7832
------------
7833
 
7834
The D30V syntax is based on the syntax in Mitsubishi's D30V
7835
architecture manual.  The differences are detailed below.
7836
 
7837
* Menu:
7838
 
7839
* D30V-Size::                 Size Modifiers
7840
* D30V-Subs::                 Sub-Instructions
7841
* D30V-Chars::                Special Characters
7842
* D30V-Guarded::              Guarded Execution
7843
* D30V-Regs::                 Register Names
7844
* D30V-Addressing::           Addressing Modes
7845
 
7846

7847
File: as.info,  Node: D30V-Size,  Next: D30V-Subs,  Up: D30V-Syntax
7848
 
7849
9.9.2.1 Size Modifiers
7850
......................
7851
 
7852
The D30V version of `as' uses the instruction names in the D30V
7853
Architecture Manual.  However, the names in the manual are sometimes
7854
ambiguous.  There are instruction names that can assemble to a short or
7855
long form opcode.  How does the assembler pick the correct form?  `as'
7856
will always pick the smallest form if it can.  When dealing with a
7857
symbol that is not defined yet when a line is being assembled, it will
7858
always use the long form.  If you need to force the assembler to use
7859
either the short or long form of the instruction, you can append either
7860
`.s' (short) or `.l' (long) to it.  For example, if you are writing an
7861
assembly program and you want to do a branch to a symbol that is
7862
defined later in your program, you can write `bra.s foo'.  Objdump and
7863
GDB will always append `.s' or `.l' to instructions which have both
7864
short and long forms.
7865
 
7866

7867
File: as.info,  Node: D30V-Subs,  Next: D30V-Chars,  Prev: D30V-Size,  Up: D30V-Syntax
7868
 
7869
9.9.2.2 Sub-Instructions
7870
........................
7871
 
7872
The D30V assembler takes as input a series of instructions, either
7873
one-per-line, or in the special two-per-line format described in the
7874
next section.  Some of these instructions will be short-form or
7875
sub-instructions.  These sub-instructions can be packed into a single
7876
instruction.  The assembler will do this automatically.  It will also
7877
detect when it should not pack instructions.  For example, when a label
7878
is defined, the next instruction will never be packaged with the
7879
previous one.  Whenever a branch and link instruction is called, it
7880
will not be packaged with the next instruction so the return address
7881
will be valid.  Nops are automatically inserted when necessary.
7882
 
7883
   If you do not want the assembler automatically making these
7884
decisions, you can control the packaging and execution type (parallel
7885
or sequential) with the special execution symbols described in the next
7886
section.
7887
 
7888

7889
File: as.info,  Node: D30V-Chars,  Next: D30V-Guarded,  Prev: D30V-Subs,  Up: D30V-Syntax
7890
 
7891
9.9.2.3 Special Characters
7892
..........................
7893
 
7894
`;' and `#' are the line comment characters.  Sub-instructions may be
7895
executed in order, in reverse-order, or in parallel.  Instructions
7896
listed in the standard one-per-line format will be executed
7897
sequentially unless you use the `-O' option.
7898
 
7899
   To specify the executing order, use the following symbols:
7900
`->'
7901
     Sequential with instruction on the left first.
7902
 
7903
`<-'
7904
     Sequential with instruction on the right first.
7905
 
7906
`||'
7907
     Parallel
7908
 
7909
   The D30V syntax allows either one instruction per line, one
7910
instruction per line with the execution symbol, or two instructions per
7911
line.  For example
7912
`abs r2,r3 -> abs r4,r5'
7913
     Execute these sequentially.  The instruction on the right is in
7914
     the right container and is executed second.
7915
 
7916
`abs r2,r3 <- abs r4,r5'
7917
     Execute these reverse-sequentially.  The instruction on the right
7918
     is in the right container, and is executed first.
7919
 
7920
`abs r2,r3 || abs r4,r5'
7921
     Execute these in parallel.
7922
 
7923
`ldw r2,@(r3,r4) ||'
7924
`mulx r6,r8,r9'
7925
     Two-line format. Execute these in parallel.
7926
 
7927
`mulx a0,r8,r9'
7928
`stw r2,@(r3,r4)'
7929
     Two-line format. Execute these sequentially unless `-O' option is
7930
     used.  If the `-O' option is used, the assembler will determine if
7931
     the instructions could be done in parallel (the above two
7932
     instructions can be done in parallel), and if so, emit them as
7933
     parallel instructions.  The assembler will put them in the proper
7934
     containers.  In the above example, the assembler will put the
7935
     `stw' instruction in left container and the `mulx' instruction in
7936
     the right container.
7937
 
7938
`stw r2,@(r3,r4) ->'
7939
`mulx a0,r8,r9'
7940
     Two-line format.  Execute the `stw' instruction followed by the
7941
     `mulx' instruction sequentially.  The first instruction goes in the
7942
     left container and the second instruction goes into right
7943
     container.  The assembler will give an error if the machine
7944
     ordering constraints are violated.
7945
 
7946
`stw r2,@(r3,r4) <-'
7947
`mulx a0,r8,r9'
7948
     Same as previous example, except that the `mulx' instruction is
7949
     executed before the `stw' instruction.
7950
 
7951
   Since `$' has no special meaning, you may use it in symbol names.
7952
 
7953

7954
File: as.info,  Node: D30V-Guarded,  Next: D30V-Regs,  Prev: D30V-Chars,  Up: D30V-Syntax
7955
 
7956
9.9.2.4 Guarded Execution
7957
.........................
7958
 
7959
`as' supports the full range of guarded execution directives for each
7960
instruction.  Just append the directive after the instruction proper.
7961
The directives are:
7962
 
7963
`/tx'
7964
     Execute the instruction if flag f0 is true.
7965
 
7966
`/fx'
7967
     Execute the instruction if flag f0 is false.
7968
 
7969
`/xt'
7970
     Execute the instruction if flag f1 is true.
7971
 
7972
`/xf'
7973
     Execute the instruction if flag f1 is false.
7974
 
7975
`/tt'
7976
     Execute the instruction if both flags f0 and f1 are true.
7977
 
7978
`/tf'
7979
     Execute the instruction if flag f0 is true and flag f1 is false.
7980
 
7981

7982
File: as.info,  Node: D30V-Regs,  Next: D30V-Addressing,  Prev: D30V-Guarded,  Up: D30V-Syntax
7983
 
7984
9.9.2.5 Register Names
7985
......................
7986
 
7987
You can use the predefined symbols `r0' through `r63' to refer to the
7988
D30V registers.  You can also use `sp' as an alias for `r63' and `link'
7989
as an alias for `r62'.  The accumulators are `a0' and `a1'.
7990
 
7991
   The D30V also has predefined symbols for these control registers and
7992
status bits:
7993
`psw'
7994
     Processor Status Word
7995
 
7996
`bpsw'
7997
     Backup Processor Status Word
7998
 
7999
`pc'
8000
     Program Counter
8001
 
8002
`bpc'
8003
     Backup Program Counter
8004
 
8005
`rpt_c'
8006
     Repeat Count
8007
 
8008
`rpt_s'
8009
     Repeat Start address
8010
 
8011
`rpt_e'
8012
     Repeat End address
8013
 
8014
`mod_s'
8015
     Modulo Start address
8016
 
8017
`mod_e'
8018
     Modulo End address
8019
 
8020
`iba'
8021
     Instruction Break Address
8022
 
8023
`f0'
8024
     Flag 0
8025
 
8026
`f1'
8027
     Flag 1
8028
 
8029
`f2'
8030
     Flag 2
8031
 
8032
`f3'
8033
     Flag 3
8034
 
8035
`f4'
8036
     Flag 4
8037
 
8038
`f5'
8039
     Flag 5
8040
 
8041
`f6'
8042
     Flag 6
8043
 
8044
`f7'
8045
     Flag 7
8046
 
8047
`s'
8048
     Same as flag 4 (saturation flag)
8049
 
8050
`v'
8051
     Same as flag 5 (overflow flag)
8052
 
8053
`va'
8054
     Same as flag 6 (sticky overflow flag)
8055
 
8056
`c'
8057
     Same as flag 7 (carry/borrow flag)
8058
 
8059
`b'
8060
     Same as flag 7 (carry/borrow flag)
8061
 
8062

8063
File: as.info,  Node: D30V-Addressing,  Prev: D30V-Regs,  Up: D30V-Syntax
8064
 
8065
9.9.2.6 Addressing Modes
8066
........................
8067
 
8068
`as' understands the following addressing modes for the D30V.  `RN' in
8069
the following refers to any of the numbered registers, but _not_ the
8070
control registers.
8071
`RN'
8072
     Register direct
8073
 
8074
`@RN'
8075
     Register indirect
8076
 
8077
`@RN+'
8078
     Register indirect with post-increment
8079
 
8080
`@RN-'
8081
     Register indirect with post-decrement
8082
 
8083
`@-SP'
8084
     Register indirect with pre-decrement
8085
 
8086
`@(DISP, RN)'
8087
     Register indirect with displacement
8088
 
8089
`ADDR'
8090
     PC relative address (for branch or rep).
8091
 
8092
`#IMM'
8093
     Immediate data (the `#' is optional and ignored)
8094
 
8095

8096
File: as.info,  Node: D30V-Float,  Next: D30V-Opcodes,  Prev: D30V-Syntax,  Up: D30V-Dependent
8097
 
8098
9.9.3 Floating Point
8099
--------------------
8100
 
8101
The D30V has no hardware floating point, but the `.float' and `.double'
8102
directives generates IEEE floating-point numbers for compatibility with
8103
other development tools.
8104
 
8105

8106
File: as.info,  Node: D30V-Opcodes,  Prev: D30V-Float,  Up: D30V-Dependent
8107
 
8108
9.9.4 Opcodes
8109
-------------
8110
 
8111
For detailed information on the D30V machine instruction set, see `D30V
8112
Architecture: A VLIW Microprocessor for Multimedia Applications'
8113
(Mitsubishi Electric Corp.).  `as' implements all the standard D30V
8114
opcodes.  The only changes are those described in the section on size
8115
modifiers
8116
 
8117

8118
File: as.info,  Node: H8/300-Dependent,  Next: HPPA-Dependent,  Prev: D30V-Dependent,  Up: Machine Dependencies
8119
 
8120
9.10 H8/300 Dependent Features
8121
==============================
8122
 
8123
* Menu:
8124
 
8125
* H8/300 Options::              Options
8126
* H8/300 Syntax::               Syntax
8127
* H8/300 Floating Point::       Floating Point
8128
* H8/300 Directives::           H8/300 Machine Directives
8129
* H8/300 Opcodes::              Opcodes
8130
 
8131

8132
File: as.info,  Node: H8/300 Options,  Next: H8/300 Syntax,  Up: H8/300-Dependent
8133
 
8134
9.10.1 Options
8135
--------------
8136
 
8137
`as' has no additional command-line options for the Renesas (formerly
8138
Hitachi) H8/300 family.
8139
 
8140

8141
File: as.info,  Node: H8/300 Syntax,  Next: H8/300 Floating Point,  Prev: H8/300 Options,  Up: H8/300-Dependent
8142
 
8143
9.10.2 Syntax
8144
-------------
8145
 
8146
* Menu:
8147
 
8148
* H8/300-Chars::                Special Characters
8149
* H8/300-Regs::                 Register Names
8150
* H8/300-Addressing::           Addressing Modes
8151
 
8152

8153
File: as.info,  Node: H8/300-Chars,  Next: H8/300-Regs,  Up: H8/300 Syntax
8154
 
8155
9.10.2.1 Special Characters
8156
...........................
8157
 
8158
`;' is the line comment character.
8159
 
8160
   `$' can be used instead of a newline to separate statements.
8161
Therefore _you may not use `$' in symbol names_ on the H8/300.
8162
 
8163

8164
File: as.info,  Node: H8/300-Regs,  Next: H8/300-Addressing,  Prev: H8/300-Chars,  Up: H8/300 Syntax
8165
 
8166
9.10.2.2 Register Names
8167
.......................
8168
 
8169
You can use predefined symbols of the form `rNh' and `rNl' to refer to
8170
the H8/300 registers as sixteen 8-bit general-purpose registers.  N is
8171
a digit from `0' to `7'); for instance, both `r0h' and `r7l' are valid
8172
register names.
8173
 
8174
   You can also use the eight predefined symbols `rN' to refer to the
8175
H8/300 registers as 16-bit registers (you must use this form for
8176
addressing).
8177
 
8178
   On the H8/300H, you can also use the eight predefined symbols `erN'
8179
(`er0' ... `er7') to refer to the 32-bit general purpose registers.
8180
 
8181
   The two control registers are called `pc' (program counter; a 16-bit
8182
register, except on the H8/300H where it is 24 bits) and `ccr'
8183
(condition code register; an 8-bit register).  `r7' is used as the
8184
stack pointer, and can also be called `sp'.
8185
 
8186

8187
File: as.info,  Node: H8/300-Addressing,  Prev: H8/300-Regs,  Up: H8/300 Syntax
8188
 
8189
9.10.2.3 Addressing Modes
8190
.........................
8191
 
8192
as understands the following addressing modes for the H8/300:
8193
`rN'
8194
     Register direct
8195
 
8196
`@rN'
8197
     Register indirect
8198
 
8199
`@(D, rN)'
8200
`@(D:16, rN)'
8201
`@(D:24, rN)'
8202
     Register indirect: 16-bit or 24-bit displacement D from register
8203
     N.  (24-bit displacements are only meaningful on the H8/300H.)
8204
 
8205
`@rN+'
8206
     Register indirect with post-increment
8207
 
8208
`@-rN'
8209
     Register indirect with pre-decrement
8210
 
8211
``@'AA'
8212
``@'AA:8'
8213
``@'AA:16'
8214
``@'AA:24'
8215
     Absolute address `aa'.  (The address size `:24' only makes sense
8216
     on the H8/300H.)
8217
 
8218
`#XX'
8219
`#XX:8'
8220
`#XX:16'
8221
`#XX:32'
8222
     Immediate data XX.  You may specify the `:8', `:16', or `:32' for
8223
     clarity, if you wish; but `as' neither requires this nor uses
8224
     it--the data size required is taken from context.
8225
 
8226
``@'`@'AA'
8227
``@'`@'AA:8'
8228
     Memory indirect.  You may specify the `:8' for clarity, if you
8229
     wish; but `as' neither requires this nor uses it.
8230
 
8231

8232
File: as.info,  Node: H8/300 Floating Point,  Next: H8/300 Directives,  Prev: H8/300 Syntax,  Up: H8/300-Dependent
8233
 
8234
9.10.3 Floating Point
8235
---------------------
8236
 
8237
The H8/300 family has no hardware floating point, but the `.float'
8238
directive generates IEEE floating-point numbers for compatibility with
8239
other development tools.
8240
 
8241

8242
File: as.info,  Node: H8/300 Directives,  Next: H8/300 Opcodes,  Prev: H8/300 Floating Point,  Up: H8/300-Dependent
8243
 
8244
9.10.4 H8/300 Machine Directives
8245
--------------------------------
8246
 
8247
`as' has the following machine-dependent directives for the H8/300:
8248
 
8249
`.h8300h'
8250
     Recognize and emit additional instructions for the H8/300H
8251
     variant, and also make `.int' emit 32-bit numbers rather than the
8252
     usual (16-bit) for the H8/300 family.
8253
 
8254
`.h8300s'
8255
     Recognize and emit additional instructions for the H8S variant, and
8256
     also make `.int' emit 32-bit numbers rather than the usual (16-bit)
8257
     for the H8/300 family.
8258
 
8259
`.h8300hn'
8260
     Recognize and emit additional instructions for the H8/300H variant
8261
     in normal mode, and also make `.int' emit 32-bit numbers rather
8262
     than the usual (16-bit) for the H8/300 family.
8263
 
8264
`.h8300sn'
8265
     Recognize and emit additional instructions for the H8S variant in
8266
     normal mode, and also make `.int' emit 32-bit numbers rather than
8267
     the usual (16-bit) for the H8/300 family.
8268
 
8269
   On the H8/300 family (including the H8/300H) `.word' directives
8270
generate 16-bit numbers.
8271
 
8272

8273
File: as.info,  Node: H8/300 Opcodes,  Prev: H8/300 Directives,  Up: H8/300-Dependent
8274
 
8275
9.10.5 Opcodes
8276
--------------
8277
 
8278
For detailed information on the H8/300 machine instruction set, see
8279
`H8/300 Series Programming Manual'.  For information specific to the
8280
H8/300H, see `H8/300H Series Programming Manual' (Renesas).
8281
 
8282
   `as' implements all the standard H8/300 opcodes.  No additional
8283
pseudo-instructions are needed on this family.
8284
 
8285
   The following table summarizes the H8/300 opcodes, and their
8286
arguments.  Entries marked `*' are opcodes used only on the H8/300H.
8287
 
8288
              Legend:
8289
                 Rs   source register
8290
                 Rd   destination register
8291
                 abs  absolute address
8292
                 imm  immediate data
8293
              disp:N  N-bit displacement from a register
8294
             pcrel:N  N-bit displacement relative to program counter
8295
 
8296
        add.b #imm,rd              *  andc #imm,ccr
8297
        add.b rs,rd                   band #imm,rd
8298
        add.w rs,rd                   band #imm,@rd
8299
     *  add.w #imm,rd                 band #imm,@abs:8
8300
     *  add.l rs,rd                   bra  pcrel:8
8301
     *  add.l #imm,rd              *  bra  pcrel:16
8302
        adds #imm,rd                  bt   pcrel:8
8303
        addx #imm,rd               *  bt   pcrel:16
8304
        addx rs,rd                    brn  pcrel:8
8305
        and.b #imm,rd              *  brn  pcrel:16
8306
        and.b rs,rd                   bf   pcrel:8
8307
     *  and.w rs,rd                *  bf   pcrel:16
8308
     *  and.w #imm,rd                 bhi  pcrel:8
8309
     *  and.l #imm,rd              *  bhi  pcrel:16
8310
     *  and.l rs,rd                   bls  pcrel:8
8311
 
8312
     *  bls  pcrel:16                 bld  #imm,rd
8313
        bcc  pcrel:8                  bld  #imm,@rd
8314
     *  bcc  pcrel:16                 bld  #imm,@abs:8
8315
        bhs  pcrel:8                  bnot #imm,rd
8316
     *  bhs  pcrel:16                 bnot #imm,@rd
8317
        bcs  pcrel:8                  bnot #imm,@abs:8
8318
     *  bcs  pcrel:16                 bnot rs,rd
8319
        blo  pcrel:8                  bnot rs,@rd
8320
     *  blo  pcrel:16                 bnot rs,@abs:8
8321
        bne  pcrel:8                  bor  #imm,rd
8322
     *  bne  pcrel:16                 bor  #imm,@rd
8323
        beq  pcrel:8                  bor  #imm,@abs:8
8324
     *  beq  pcrel:16                 bset #imm,rd
8325
        bvc  pcrel:8                  bset #imm,@rd
8326
     *  bvc  pcrel:16                 bset #imm,@abs:8
8327
        bvs  pcrel:8                  bset rs,rd
8328
     *  bvs  pcrel:16                 bset rs,@rd
8329
        bpl  pcrel:8                  bset rs,@abs:8
8330
     *  bpl  pcrel:16                 bsr  pcrel:8
8331
        bmi  pcrel:8                  bsr  pcrel:16
8332
     *  bmi  pcrel:16                 bst  #imm,rd
8333
        bge  pcrel:8                  bst  #imm,@rd
8334
     *  bge  pcrel:16                 bst  #imm,@abs:8
8335
        blt  pcrel:8                  btst #imm,rd
8336
     *  blt  pcrel:16                 btst #imm,@rd
8337
        bgt  pcrel:8                  btst #imm,@abs:8
8338
     *  bgt  pcrel:16                 btst rs,rd
8339
        ble  pcrel:8                  btst rs,@rd
8340
     *  ble  pcrel:16                 btst rs,@abs:8
8341
        bclr #imm,rd                  bxor #imm,rd
8342
        bclr #imm,@rd                 bxor #imm,@rd
8343
        bclr #imm,@abs:8              bxor #imm,@abs:8
8344
        bclr rs,rd                    cmp.b #imm,rd
8345
        bclr rs,@rd                   cmp.b rs,rd
8346
        bclr rs,@abs:8                cmp.w rs,rd
8347
        biand #imm,rd                 cmp.w rs,rd
8348
        biand #imm,@rd             *  cmp.w #imm,rd
8349
        biand #imm,@abs:8          *  cmp.l #imm,rd
8350
        bild #imm,rd               *  cmp.l rs,rd
8351
        bild #imm,@rd                 daa  rs
8352
        bild #imm,@abs:8              das  rs
8353
        bior #imm,rd                  dec.b rs
8354
        bior #imm,@rd              *  dec.w #imm,rd
8355
        bior #imm,@abs:8           *  dec.l #imm,rd
8356
        bist #imm,rd                  divxu.b rs,rd
8357
        bist #imm,@rd              *  divxu.w rs,rd
8358
        bist #imm,@abs:8           *  divxs.b rs,rd
8359
        bixor #imm,rd              *  divxs.w rs,rd
8360
        bixor #imm,@rd                eepmov
8361
        bixor #imm,@abs:8          *  eepmovw
8362
 
8363
     *  exts.w rd                     mov.w rs,@abs:16
8364
     *  exts.l rd                  *  mov.l #imm,rd
8365
     *  extu.w rd                  *  mov.l rs,rd
8366
     *  extu.l rd                  *  mov.l @rs,rd
8367
        inc  rs                    *  mov.l @(disp:16,rs),rd
8368
     *  inc.w #imm,rd              *  mov.l @(disp:24,rs),rd
8369
     *  inc.l #imm,rd              *  mov.l @rs+,rd
8370
        jmp  @rs                   *  mov.l @abs:16,rd
8371
        jmp  abs                   *  mov.l @abs:24,rd
8372
        jmp  @@abs:8               *  mov.l rs,@rd
8373
        jsr  @rs                   *  mov.l rs,@(disp:16,rd)
8374
        jsr  abs                   *  mov.l rs,@(disp:24,rd)
8375
        jsr  @@abs:8               *  mov.l rs,@-rd
8376
        ldc  #imm,ccr              *  mov.l rs,@abs:16
8377
        ldc  rs,ccr                *  mov.l rs,@abs:24
8378
     *  ldc  @abs:16,ccr              movfpe @abs:16,rd
8379
     *  ldc  @abs:24,ccr              movtpe rs,@abs:16
8380
     *  ldc  @(disp:16,rs),ccr        mulxu.b rs,rd
8381
     *  ldc  @(disp:24,rs),ccr     *  mulxu.w rs,rd
8382
     *  ldc  @rs+,ccr              *  mulxs.b rs,rd
8383
     *  ldc  @rs,ccr               *  mulxs.w rs,rd
8384
     *  mov.b @(disp:24,rs),rd        neg.b rs
8385
     *  mov.b rs,@(disp:24,rd)     *  neg.w rs
8386
        mov.b @abs:16,rd           *  neg.l rs
8387
        mov.b rs,rd                   nop
8388
        mov.b @abs:8,rd               not.b rs
8389
        mov.b rs,@abs:8            *  not.w rs
8390
        mov.b rs,rd                *  not.l rs
8391
        mov.b #imm,rd                 or.b #imm,rd
8392
        mov.b @rs,rd                  or.b rs,rd
8393
        mov.b @(disp:16,rs),rd     *  or.w #imm,rd
8394
        mov.b @rs+,rd              *  or.w rs,rd
8395
        mov.b @abs:8,rd            *  or.l #imm,rd
8396
        mov.b rs,@rd               *  or.l rs,rd
8397
        mov.b rs,@(disp:16,rd)        orc  #imm,ccr
8398
        mov.b rs,@-rd                 pop.w rs
8399
        mov.b rs,@abs:8            *  pop.l rs
8400
        mov.w rs,@rd                  push.w rs
8401
     *  mov.w @(disp:24,rs),rd     *  push.l rs
8402
     *  mov.w rs,@(disp:24,rd)        rotl.b rs
8403
     *  mov.w @abs:24,rd           *  rotl.w rs
8404
     *  mov.w rs,@abs:24           *  rotl.l rs
8405
        mov.w rs,rd                   rotr.b rs
8406
        mov.w #imm,rd              *  rotr.w rs
8407
        mov.w @rs,rd               *  rotr.l rs
8408
        mov.w @(disp:16,rs),rd        rotxl.b rs
8409
        mov.w @rs+,rd              *  rotxl.w rs
8410
        mov.w @abs:16,rd           *  rotxl.l rs
8411
        mov.w rs,@(disp:16,rd)        rotxr.b rs
8412
        mov.w rs,@-rd              *  rotxr.w rs
8413
 
8414
     *  rotxr.l rs                 *  stc  ccr,@(disp:24,rd)
8415
        bpt                        *  stc  ccr,@-rd
8416
        rte                        *  stc  ccr,@abs:16
8417
        rts                        *  stc  ccr,@abs:24
8418
        shal.b rs                     sub.b rs,rd
8419
     *  shal.w rs                     sub.w rs,rd
8420
     *  shal.l rs                  *  sub.w #imm,rd
8421
        shar.b rs                  *  sub.l rs,rd
8422
     *  shar.w rs                  *  sub.l #imm,rd
8423
     *  shar.l rs                     subs #imm,rd
8424
        shll.b rs                     subx #imm,rd
8425
     *  shll.w rs                     subx rs,rd
8426
     *  shll.l rs                  *  trapa #imm
8427
        shlr.b rs                     xor  #imm,rd
8428
     *  shlr.w rs                     xor  rs,rd
8429
     *  shlr.l rs                  *  xor.w #imm,rd
8430
        sleep                      *  xor.w rs,rd
8431
        stc  ccr,rd                *  xor.l #imm,rd
8432
     *  stc  ccr,@rs               *  xor.l rs,rd
8433
     *  stc  ccr,@(disp:16,rd)        xorc #imm,ccr
8434
 
8435
   Four H8/300 instructions (`add', `cmp', `mov', `sub') are defined
8436
with variants using the suffixes `.b', `.w', and `.l' to specify the
8437
size of a memory operand.  `as' supports these suffixes, but does not
8438
require them; since one of the operands is always a register, `as' can
8439
deduce the correct size.
8440
 
8441
   For example, since `r0' refers to a 16-bit register,
8442
     mov    r0,@foo
8443
is equivalent to
8444
     mov.w  r0,@foo
8445
 
8446
   If you use the size suffixes, `as' issues a warning when the suffix
8447
and the register size do not match.
8448
 
8449

8450
File: as.info,  Node: HPPA-Dependent,  Next: ESA/390-Dependent,  Prev: H8/300-Dependent,  Up: Machine Dependencies
8451
 
8452
9.11 HPPA Dependent Features
8453
============================
8454
 
8455
* Menu:
8456
 
8457
* HPPA Notes::                Notes
8458
* HPPA Options::              Options
8459
* HPPA Syntax::               Syntax
8460
* HPPA Floating Point::       Floating Point
8461
* HPPA Directives::           HPPA Machine Directives
8462
* HPPA Opcodes::              Opcodes
8463
 
8464

8465
File: as.info,  Node: HPPA Notes,  Next: HPPA Options,  Up: HPPA-Dependent
8466
 
8467
9.11.1 Notes
8468
------------
8469
 
8470
As a back end for GNU CC `as' has been throughly tested and should work
8471
extremely well.  We have tested it only minimally on hand written
8472
assembly code and no one has tested it much on the assembly output from
8473
the HP compilers.
8474
 
8475
   The format of the debugging sections has changed since the original
8476
`as' port (version 1.3X) was released; therefore, you must rebuild all
8477
HPPA objects and libraries with the new assembler so that you can debug
8478
the final executable.
8479
 
8480
   The HPPA `as' port generates a small subset of the relocations
8481
available in the SOM and ELF object file formats.  Additional relocation
8482
support will be added as it becomes necessary.
8483
 
8484

8485
File: as.info,  Node: HPPA Options,  Next: HPPA Syntax,  Prev: HPPA Notes,  Up: HPPA-Dependent
8486
 
8487
9.11.2 Options
8488
--------------
8489
 
8490
`as' has no machine-dependent command-line options for the HPPA.
8491
 
8492

8493
File: as.info,  Node: HPPA Syntax,  Next: HPPA Floating Point,  Prev: HPPA Options,  Up: HPPA-Dependent
8494
 
8495
9.11.3 Syntax
8496
-------------
8497
 
8498
The assembler syntax closely follows the HPPA instruction set reference
8499
manual; assembler directives and general syntax closely follow the HPPA
8500
assembly language reference manual, with a few noteworthy differences.
8501
 
8502
   First, a colon may immediately follow a label definition.  This is
8503
simply for compatibility with how most assembly language programmers
8504
write code.
8505
 
8506
   Some obscure expression parsing problems may affect hand written
8507
code which uses the `spop' instructions, or code which makes significant
8508
use of the `!' line separator.
8509
 
8510
   `as' is much less forgiving about missing arguments and other
8511
similar oversights than the HP assembler.  `as' notifies you of missing
8512
arguments as syntax errors; this is regarded as a feature, not a bug.
8513
 
8514
   Finally, `as' allows you to use an external symbol without
8515
explicitly importing the symbol.  _Warning:_ in the future this will be
8516
an error for HPPA targets.
8517
 
8518
   Special characters for HPPA targets include:
8519
 
8520
   `;' is the line comment character.
8521
 
8522
   `!' can be used instead of a newline to separate statements.
8523
 
8524
   Since `$' has no special meaning, you may use it in symbol names.
8525
 
8526

8527
File: as.info,  Node: HPPA Floating Point,  Next: HPPA Directives,  Prev: HPPA Syntax,  Up: HPPA-Dependent
8528
 
8529
9.11.4 Floating Point
8530
---------------------
8531
 
8532
The HPPA family uses IEEE floating-point numbers.
8533
 
8534

8535
File: as.info,  Node: HPPA Directives,  Next: HPPA Opcodes,  Prev: HPPA Floating Point,  Up: HPPA-Dependent
8536
 
8537
9.11.5 HPPA Assembler Directives
8538
--------------------------------
8539
 
8540
`as' for the HPPA supports many additional directives for compatibility
8541
with the native assembler.  This section describes them only briefly.
8542
For detailed information on HPPA-specific assembler directives, see
8543
`HP9000 Series 800 Assembly Language Reference Manual' (HP 92432-90001).
8544
 
8545
   `as' does _not_ support the following assembler directives described
8546
in the HP manual:
8547
 
8548
     .endm           .liston
8549
     .enter          .locct
8550
     .leave          .macro
8551
     .listoff
8552
 
8553
   Beyond those implemented for compatibility, `as' supports one
8554
additional assembler directive for the HPPA: `.param'.  It conveys
8555
register argument locations for static functions.  Its syntax closely
8556
follows the `.export' directive.
8557
 
8558
   These are the additional directives in `as' for the HPPA:
8559
 
8560
`.block N'
8561
`.blockz N'
8562
     Reserve N bytes of storage, and initialize them to zero.
8563
 
8564
`.call'
8565
     Mark the beginning of a procedure call.  Only the special case
8566
     with _no arguments_ is allowed.
8567
 
8568
`.callinfo [ PARAM=VALUE, ... ]  [ FLAG, ... ]'
8569
     Specify a number of parameters and flags that define the
8570
     environment for a procedure.
8571
 
8572
     PARAM may be any of `frame' (frame size), `entry_gr' (end of
8573
     general register range), `entry_fr' (end of float register range),
8574
     `entry_sr' (end of space register range).
8575
 
8576
     The values for FLAG are `calls' or `caller' (proc has
8577
     subroutines), `no_calls' (proc does not call subroutines),
8578
     `save_rp' (preserve return pointer), `save_sp' (proc preserves
8579
     stack pointer), `no_unwind' (do not unwind this proc), `hpux_int'
8580
     (proc is interrupt routine).
8581
 
8582
`.code'
8583
     Assemble into the standard section called `$TEXT$', subsection
8584
     `$CODE$'.
8585
 
8586
`.copyright "STRING"'
8587
     In the SOM object format, insert STRING into the object code,
8588
     marked as a copyright string.
8589
 
8590
`.copyright "STRING"'
8591
     In the ELF object format, insert STRING into the object code,
8592
     marked as a version string.
8593
 
8594
`.enter'
8595
     Not yet supported; the assembler rejects programs containing this
8596
     directive.
8597
 
8598
`.entry'
8599
     Mark the beginning of a procedure.
8600
 
8601
`.exit'
8602
     Mark the end of a procedure.
8603
 
8604
`.export NAME [ ,TYP ]  [ ,PARAM=R ]'
8605
     Make a procedure NAME available to callers.  TYP, if present, must
8606
     be one of `absolute', `code' (ELF only, not SOM), `data', `entry',
8607
     `data', `entry', `millicode', `plabel', `pri_prog', or `sec_prog'.
8608
 
8609
     PARAM, if present, provides either relocation information for the
8610
     procedure arguments and result, or a privilege level.  PARAM may be
8611
     `argwN' (where N ranges from `0' to `3', and indicates one of four
8612
     one-word arguments); `rtnval' (the procedure's result); or
8613
     `priv_lev' (privilege level).  For arguments or the result, R
8614
     specifies how to relocate, and must be one of `no' (not
8615
     relocatable), `gr' (argument is in general register), `fr' (in
8616
     floating point register), or `fu' (upper half of float register).
8617
     For `priv_lev', R is an integer.
8618
 
8619
`.half N'
8620
     Define a two-byte integer constant N; synonym for the portable
8621
     `as' directive `.short'.
8622
 
8623
`.import NAME [ ,TYP ]'
8624
     Converse of `.export'; make a procedure available to call.  The
8625
     arguments use the same conventions as the first two arguments for
8626
     `.export'.
8627
 
8628
`.label NAME'
8629
     Define NAME as a label for the current assembly location.
8630
 
8631
`.leave'
8632
     Not yet supported; the assembler rejects programs containing this
8633
     directive.
8634
 
8635
`.origin LC'
8636
     Advance location counter to LC. Synonym for the `as' portable
8637
     directive `.org'.
8638
 
8639
`.param NAME [ ,TYP ]  [ ,PARAM=R ]'
8640
     Similar to `.export', but used for static procedures.
8641
 
8642
`.proc'
8643
     Use preceding the first statement of a procedure.
8644
 
8645
`.procend'
8646
     Use following the last statement of a procedure.
8647
 
8648
`LABEL .reg EXPR'
8649
     Synonym for `.equ'; define LABEL with the absolute expression EXPR
8650
     as its value.
8651
 
8652
`.space SECNAME [ ,PARAMS ]'
8653
     Switch to section SECNAME, creating a new section by that name if
8654
     necessary.  You may only use PARAMS when creating a new section,
8655
     not when switching to an existing one.  SECNAME may identify a
8656
     section by number rather than by name.
8657
 
8658
     If specified, the list PARAMS declares attributes of the section,
8659
     identified by keywords.  The keywords recognized are `spnum=EXP'
8660
     (identify this section by the number EXP, an absolute expression),
8661
     `sort=EXP' (order sections according to this sort key when linking;
8662
     EXP is an absolute expression), `unloadable' (section contains no
8663
     loadable data), `notdefined' (this section defined elsewhere), and
8664
     `private' (data in this section not available to other programs).
8665
 
8666
`.spnum SECNAM'
8667
     Allocate four bytes of storage, and initialize them with the
8668
     section number of the section named SECNAM.  (You can define the
8669
     section number with the HPPA `.space' directive.)
8670
 
8671
`.string "STR"'
8672
     Copy the characters in the string STR to the object file.  *Note
8673
     Strings: Strings, for information on escape sequences you can use
8674
     in `as' strings.
8675
 
8676
     _Warning!_ The HPPA version of `.string' differs from the usual
8677
     `as' definition: it does _not_ write a zero byte after copying STR.
8678
 
8679
`.stringz "STR"'
8680
     Like `.string', but appends a zero byte after copying STR to object
8681
     file.
8682
 
8683
`.subspa NAME [ ,PARAMS ]'
8684
`.nsubspa NAME [ ,PARAMS ]'
8685
     Similar to `.space', but selects a subsection NAME within the
8686
     current section.  You may only specify PARAMS when you create a
8687
     subsection (in the first instance of `.subspa' for this NAME).
8688
 
8689
     If specified, the list PARAMS declares attributes of the
8690
     subsection, identified by keywords.  The keywords recognized are
8691
     `quad=EXPR' ("quadrant" for this subsection), `align=EXPR'
8692
     (alignment for beginning of this subsection; a power of two),
8693
     `access=EXPR' (value for "access rights" field), `sort=EXPR'
8694
     (sorting order for this subspace in link), `code_only' (subsection
8695
     contains only code), `unloadable' (subsection cannot be loaded
8696
     into memory), `comdat' (subsection is comdat), `common'
8697
     (subsection is common block), `dup_comm' (subsection may have
8698
     duplicate names), or `zero' (subsection is all zeros, do not write
8699
     in object file).
8700
 
8701
     `.nsubspa' always creates a new subspace with the given name, even
8702
     if one with the same name already exists.
8703
 
8704
     `comdat', `common' and `dup_comm' can be used to implement various
8705
     flavors of one-only support when using the SOM linker.  The SOM
8706
     linker only supports specific combinations of these flags.  The
8707
     details are not documented.  A brief description is provided here.
8708
 
8709
     `comdat' provides a form of linkonce support.  It is useful for
8710
     both code and data subspaces.  A `comdat' subspace has a key symbol
8711
     marked by the `is_comdat' flag or `ST_COMDAT'.  Only the first
8712
     subspace for any given key is selected.  The key symbol becomes
8713
     universal in shared links.  This is similar to the behavior of
8714
     `secondary_def' symbols.
8715
 
8716
     `common' provides Fortran named common support.  It is only useful
8717
     for data subspaces.  Symbols with the flag `is_common' retain this
8718
     flag in shared links.  Referencing a `is_common' symbol in a shared
8719
     library from outside the library doesn't work.  Thus, `is_common'
8720
     symbols must be output whenever they are needed.
8721
 
8722
     `common' and `dup_comm' together provide Cobol common support.
8723
     The subspaces in this case must all be the same length.
8724
     Otherwise, this support is similar to the Fortran common support.
8725
 
8726
     `dup_comm' by itself provides a type of one-only support for code.
8727
     Only the first `dup_comm' subspace is selected.  There is a rather
8728
     complex algorithm to compare subspaces.  Code symbols marked with
8729
     the `dup_common' flag are hidden.  This support was intended for
8730
     "C++ duplicate inlines".
8731
 
8732
     A simplified technique is used to mark the flags of symbols based
8733
     on the flags of their subspace.  A symbol with the scope
8734
     SS_UNIVERSAL and type ST_ENTRY, ST_CODE or ST_DATA is marked with
8735
     the corresponding settings of `comdat', `common' and `dup_comm'
8736
     from the subspace, respectively.  This avoids having to introduce
8737
     additional directives to mark these symbols.  The HP assembler
8738
     sets `is_common' from `common'.  However, it doesn't set the
8739
     `dup_common' from `dup_comm'.  It doesn't have `comdat' support.
8740
 
8741
`.version "STR"'
8742
     Write STR as version identifier in object code.
8743
 
8744

8745
File: as.info,  Node: HPPA Opcodes,  Prev: HPPA Directives,  Up: HPPA-Dependent
8746
 
8747
9.11.6 Opcodes
8748
--------------
8749
 
8750
For detailed information on the HPPA machine instruction set, see
8751
`PA-RISC Architecture and Instruction Set Reference Manual' (HP
8752
09740-90039).
8753
 
8754

8755
File: as.info,  Node: ESA/390-Dependent,  Next: i386-Dependent,  Prev: HPPA-Dependent,  Up: Machine Dependencies
8756
 
8757
9.12 ESA/390 Dependent Features
8758
===============================
8759
 
8760
* Menu:
8761
 
8762
* ESA/390 Notes::                Notes
8763
* ESA/390 Options::              Options
8764
* ESA/390 Syntax::               Syntax
8765
* ESA/390 Floating Point::       Floating Point
8766
* ESA/390 Directives::           ESA/390 Machine Directives
8767
* ESA/390 Opcodes::              Opcodes
8768
 
8769

8770
File: as.info,  Node: ESA/390 Notes,  Next: ESA/390 Options,  Up: ESA/390-Dependent
8771
 
8772
9.12.1 Notes
8773
------------
8774
 
8775
The ESA/390 `as' port is currently intended to be a back-end for the
8776
GNU CC compiler.  It is not HLASM compatible, although it does support
8777
a subset of some of the HLASM directives.  The only supported binary
8778
file format is ELF; none of the usual MVS/VM/OE/USS object file
8779
formats, such as ESD or XSD, are supported.
8780
 
8781
   When used with the GNU CC compiler, the ESA/390 `as' will produce
8782
correct, fully relocated, functional binaries, and has been used to
8783
compile and execute large projects.  However, many aspects should still
8784
be considered experimental; these include shared library support,
8785
dynamically loadable objects, and any relocation other than the 31-bit
8786
relocation.
8787
 
8788

8789
File: as.info,  Node: ESA/390 Options,  Next: ESA/390 Syntax,  Prev: ESA/390 Notes,  Up: ESA/390-Dependent
8790
 
8791
9.12.2 Options
8792
--------------
8793
 
8794
`as' has no machine-dependent command-line options for the ESA/390.
8795
 
8796

8797
File: as.info,  Node: ESA/390 Syntax,  Next: ESA/390 Floating Point,  Prev: ESA/390 Options,  Up: ESA/390-Dependent
8798
 
8799
9.12.3 Syntax
8800
-------------
8801
 
8802
The opcode/operand syntax follows the ESA/390 Principles of Operation
8803
manual; assembler directives and general syntax are loosely based on the
8804
prevailing AT&T/SVR4/ELF/Solaris style notation.  HLASM-style directives
8805
are _not_ supported for the most part, with the exception of those
8806
described herein.
8807
 
8808
   A leading dot in front of directives is optional, and the case of
8809
directives is ignored; thus for example, .using and USING have the same
8810
effect.
8811
 
8812
   A colon may immediately follow a label definition.  This is simply
8813
for compatibility with how most assembly language programmers write
8814
code.
8815
 
8816
   `#' is the line comment character.
8817
 
8818
   `;' can be used instead of a newline to separate statements.
8819
 
8820
   Since `$' has no special meaning, you may use it in symbol names.
8821
 
8822
   Registers can be given the symbolic names r0..r15, fp0, fp2, fp4,
8823
fp6.  By using thesse symbolic names, `as' can detect simple syntax
8824
errors. The name rarg or r.arg is a synonym for r11, rtca or r.tca for
8825
r12, sp, r.sp, dsa r.dsa for r13, lr or r.lr for r14, rbase or r.base
8826
for r3 and rpgt or r.pgt for r4.
8827
 
8828
   `*' is the current location counter.  Unlike `.' it is always
8829
relative to the last USING directive.  Note that this means that
8830
expressions cannot use multiplication, as any occurrence of `*' will be
8831
interpreted as a location counter.
8832
 
8833
   All labels are relative to the last USING.  Thus, branches to a label
8834
always imply the use of base+displacement.
8835
 
8836
   Many of the usual forms of address constants / address literals are
8837
supported.  Thus,
8838
        .using  *,r3
8839
        L       r15,=A(some_routine)
8840
        LM      r6,r7,=V(some_longlong_extern)
8841
        A       r1,=F'12'
8842
        AH      r0,=H'42'
8843
        ME      r6,=E'3.1416'
8844
        MD      r6,=D'3.14159265358979'
8845
        O       r6,=XL4'cacad0d0'
8846
        .ltorg
8847
   should all behave as expected: that is, an entry in the literal pool
8848
will be created (or reused if it already exists), and the instruction
8849
operands will be the displacement into the literal pool using the
8850
current base register (as last declared with the `.using' directive).
8851
 
8852

8853
File: as.info,  Node: ESA/390 Floating Point,  Next: ESA/390 Directives,  Prev: ESA/390 Syntax,  Up: ESA/390-Dependent
8854
 
8855
9.12.4 Floating Point
8856
---------------------
8857
 
8858
The assembler generates only IEEE floating-point numbers.  The older
8859
floating point formats are not supported.
8860
 
8861

8862
File: as.info,  Node: ESA/390 Directives,  Next: ESA/390 Opcodes,  Prev: ESA/390 Floating Point,  Up: ESA/390-Dependent
8863
 
8864
9.12.5 ESA/390 Assembler Directives
8865
-----------------------------------
8866
 
8867
`as' for the ESA/390 supports all of the standard ELF/SVR4 assembler
8868
directives that are documented in the main part of this documentation.
8869
Several additional directives are supported in order to implement the
8870
ESA/390 addressing model.  The most important of these are `.using' and
8871
`.ltorg'
8872
 
8873
   These are the additional directives in `as' for the ESA/390:
8874
 
8875
`.dc'
8876
     A small subset of the usual DC directive is supported.
8877
 
8878
`.drop REGNO'
8879
     Stop using REGNO as the base register.  The REGNO must have been
8880
     previously declared with a `.using' directive in the same section
8881
     as the current section.
8882
 
8883
`.ebcdic STRING'
8884
     Emit the EBCDIC equivalent of the indicated string.  The emitted
8885
     string will be null terminated.  Note that the directives
8886
     `.string' etc. emit ascii strings by default.
8887
 
8888
`EQU'
8889
     The standard HLASM-style EQU directive is not supported; however,
8890
     the standard `as' directive .equ can be used to the same effect.
8891
 
8892
`.ltorg'
8893
     Dump the literal pool accumulated so far; begin a new literal pool.
8894
     The literal pool will be written in the current section; in order
8895
     to generate correct assembly, a `.using' must have been previously
8896
     specified in the same section.
8897
 
8898
`.using EXPR,REGNO'
8899
     Use REGNO as the base register for all subsequent RX, RS, and SS
8900
     form instructions. The EXPR will be evaluated to obtain the base
8901
     address; usually, EXPR will merely be `*'.
8902
 
8903
     This assembler allows two `.using' directives to be simultaneously
8904
     outstanding, one in the `.text' section, and one in another section
8905
     (typically, the `.data' section).  This feature allows dynamically
8906
     loaded objects to be implemented in a relatively straightforward
8907
     way.  A `.using' directive must always be specified in the `.text'
8908
     section; this will specify the base register that will be used for
8909
     branches in the `.text' section.  A second `.using' may be
8910
     specified in another section; this will specify the base register
8911
     that is used for non-label address literals.  When a second
8912
     `.using' is specified, then the subsequent `.ltorg' must be put in
8913
     the same section; otherwise an error will result.
8914
 
8915
     Thus, for example, the following code uses `r3' to address branch
8916
     targets and `r4' to address the literal pool, which has been
8917
     written to the `.data' section.  The is, the constants
8918
     `=A(some_routine)', `=H'42'' and `=E'3.1416'' will all appear in
8919
     the `.data' section.
8920
 
8921
          .data
8922
                .using  LITPOOL,r4
8923
          .text
8924
                BASR    r3,0
8925
                .using  *,r3
8926
                  B       START
8927
                .long   LITPOOL
8928
          START:
8929
                L       r4,4(,r3)
8930
                L       r15,=A(some_routine)
8931
                LTR     r15,r15
8932
                BNE     LABEL
8933
                AH      r0,=H'42'
8934
          LABEL:
8935
                ME      r6,=E'3.1416'
8936
          .data
8937
          LITPOOL:
8938
                .ltorg
8939
 
8940
     Note that this dual-`.using' directive semantics extends and is
8941
     not compatible with HLASM semantics.  Note that this assembler
8942
     directive does not support the full range of HLASM semantics.
8943
 
8944
 
8945

8946
File: as.info,  Node: ESA/390 Opcodes,  Prev: ESA/390 Directives,  Up: ESA/390-Dependent
8947
 
8948
9.12.6 Opcodes
8949
--------------
8950
 
8951
For detailed information on the ESA/390 machine instruction set, see
8952
`ESA/390 Principles of Operation' (IBM Publication Number DZ9AR004).
8953
 
8954

8955
File: as.info,  Node: i386-Dependent,  Next: i860-Dependent,  Prev: ESA/390-Dependent,  Up: Machine Dependencies
8956
 
8957
9.13 80386 Dependent Features
8958
=============================
8959
 
8960
   The i386 version `as' supports both the original Intel 386
8961
architecture in both 16 and 32-bit mode as well as AMD x86-64
8962
architecture extending the Intel architecture to 64-bits.
8963
 
8964
* Menu:
8965
 
8966
* i386-Options::                Options
8967
* i386-Syntax::                 AT&T Syntax versus Intel Syntax
8968
* i386-Mnemonics::              Instruction Naming
8969
* i386-Regs::                   Register Naming
8970
* i386-Prefixes::               Instruction Prefixes
8971
* i386-Memory::                 Memory References
8972
* i386-Jumps::                  Handling of Jump Instructions
8973
* i386-Float::                  Floating Point
8974
* i386-SIMD::                   Intel's MMX and AMD's 3DNow! SIMD Operations
8975
* i386-16bit::                  Writing 16-bit Code
8976
* i386-Arch::                   Specifying an x86 CPU architecture
8977
* i386-Bugs::                   AT&T Syntax bugs
8978
* i386-Notes::                  Notes
8979
 
8980

8981
File: as.info,  Node: i386-Options,  Next: i386-Syntax,  Up: i386-Dependent
8982
 
8983
9.13.1 Options
8984
--------------
8985
 
8986
The i386 version of `as' has a few machine dependent options:
8987
 
8988
`--32 | --64'
8989
     Select the word size, either 32 bits or 64 bits. Selecting 32-bit
8990
     implies Intel i386 architecture, while 64-bit implies AMD x86-64
8991
     architecture.
8992
 
8993
     These options are only available with the ELF object file format,
8994
     and require that the necessary BFD support has been included (on a
8995
     32-bit platform you have to add -enable-64-bit-bfd to configure
8996
     enable 64-bit usage and use x86-64 as target platform).
8997
 
8998
`-n'
8999
     By default, x86 GAS replaces multiple nop instructions used for
9000
     alignment within code sections with multi-byte nop instructions
9001
     such as leal 0(%esi,1),%esi.  This switch disables the
9002
     optimization.
9003
 
9004
`--divide'
9005
     On SVR4-derived platforms, the character `/' is treated as a
9006
     comment character, which means that it cannot be used in
9007
     expressions.  The `--divide' option turns `/' into a normal
9008
     character.  This does not disable `/' at the beginning of a line
9009
     starting a comment, or affect using `#' for starting a comment.
9010
 
9011
`-march=CPU[+EXTENSION...]'
9012
     This option specifies the target processor.  The assembler will
9013
     issue an error message if an attempt is made to assemble an
9014
     instruction which will not execute on the target processor.  The
9015
     following processor names are recognized: `i8086', `i186', `i286',
9016
     `i386', `i486', `i586', `i686', `pentium', `pentiumpro',
9017
     `pentiumii', `pentiumiii', `pentium4', `prescott', `nocona',
9018
     `core', `core2', `k6', `k6_2', `athlon', `opteron', `k8',
9019
     `amdfam10', `generic32' and `generic64'.
9020
 
9021
     In addition to the basic instruction set, the assembler can be
9022
     told to accept various extension mnemonics.  For example,
9023
     `-march=i686+sse4+vmx' extends I686 with SSE4 and VMX.  The
9024
     following extensions are currently supported: `mmx', `sse', `sse2',
9025
     `sse3', `ssse3', `sse4.1', `sse4.2', `sse4', `avx', `vmx', `smx',
9026
     `xsave', `aes', `pclmul', `fma', `movbe', `ept', `3dnow', `3dnowa',
9027
     `sse4a', `sse5', `svme', `abm' and `padlock'.
9028
 
9029
     When the `.arch' directive is used with `-march', the `.arch'
9030
     directive will take precedent.
9031
 
9032
`-mtune=CPU'
9033
     This option specifies a processor to optimize for. When used in
9034
     conjunction with the `-march' option, only instructions of the
9035
     processor specified by the `-march' option will be generated.
9036
 
9037
     Valid CPU values are identical to the processor list of
9038
     `-march=CPU'.
9039
 
9040
`-msse2avx'
9041
     This option specifies that the assembler should encode SSE
9042
     instructions with VEX prefix.
9043
 
9044
`-msse-check=NONE'
9045
 
9046
`-msse-check=WARNING'
9047
 
9048
`-msse-check=ERROR'
9049
     These options control if the assembler should check SSE
9050
     intructions.  `-msse-check=NONE' will make the assembler not to
9051
     check SSE instructions,  which is the default.
9052
     `-msse-check=WARNING' will make the assembler issue a warning for
9053
     any SSE intruction.  `-msse-check=ERROR' will make the assembler
9054
     issue an error for any SSE intruction.
9055
 
9056
`-mmnemonic=ATT'
9057
 
9058
`-mmnemonic=INTEL'
9059
     This option specifies instruction mnemonic for matching
9060
     instructions.  The `.att_mnemonic' and `.intel_mnemonic'
9061
     directives will take precedent.
9062
 
9063
`-msyntax=ATT'
9064
 
9065
`-msyntax=INTEL'
9066
     This option specifies instruction syntax when processing
9067
     instructions.  The `.att_syntax' and `.intel_syntax' directives
9068
     will take precedent.
9069
 
9070
`-mnaked-reg'
9071
     This opetion specifies that registers don't require a `%' prefix.
9072
     The `.att_syntax' and `.intel_syntax' directives will take
9073
     precedent.
9074
 
9075
 
9076

9077
File: as.info,  Node: i386-Syntax,  Next: i386-Mnemonics,  Prev: i386-Options,  Up: i386-Dependent
9078
 
9079
9.13.2 AT&T Syntax versus Intel Syntax
9080
--------------------------------------
9081
 
9082
`as' now supports assembly using Intel assembler syntax.
9083
`.intel_syntax' selects Intel mode, and `.att_syntax' switches back to
9084
the usual AT&T mode for compatibility with the output of `gcc'.  Either
9085
of these directives may have an optional argument, `prefix', or
9086
`noprefix' specifying whether registers require a `%' prefix.  AT&T
9087
System V/386 assembler syntax is quite different from Intel syntax.  We
9088
mention these differences because almost all 80386 documents use Intel
9089
syntax.  Notable differences between the two syntaxes are:
9090
 
9091
   * AT&T immediate operands are preceded by `$'; Intel immediate
9092
     operands are undelimited (Intel `push 4' is AT&T `pushl $4').
9093
     AT&T register operands are preceded by `%'; Intel register operands
9094
     are undelimited.  AT&T absolute (as opposed to PC relative)
9095
     jump/call operands are prefixed by `*'; they are undelimited in
9096
     Intel syntax.
9097
 
9098
   * AT&T and Intel syntax use the opposite order for source and
9099
     destination operands.  Intel `add eax, 4' is `addl $4, %eax'.  The
9100
     `source, dest' convention is maintained for compatibility with
9101
     previous Unix assemblers.  Note that `bound', `invlpga', and
9102
     instructions with 2 immediate operands, such as the `enter'
9103
     instruction, do _not_ have reversed order.  *Note i386-Bugs::.
9104
 
9105
   * In AT&T syntax the size of memory operands is determined from the
9106
     last character of the instruction mnemonic.  Mnemonic suffixes of
9107
     `b', `w', `l' and `q' specify byte (8-bit), word (16-bit), long
9108
     (32-bit) and quadruple word (64-bit) memory references.  Intel
9109
     syntax accomplishes this by prefixing memory operands (_not_ the
9110
     instruction mnemonics) with `byte ptr', `word ptr', `dword ptr'
9111
     and `qword ptr'.  Thus, Intel `mov al, byte ptr FOO' is `movb FOO,
9112
     %al' in AT&T syntax.
9113
 
9114
   * Immediate form long jumps and calls are `lcall/ljmp $SECTION,
9115
     $OFFSET' in AT&T syntax; the Intel syntax is `call/jmp far
9116
     SECTION:OFFSET'.  Also, the far return instruction is `lret
9117
     $STACK-ADJUST' in AT&T syntax; Intel syntax is `ret far
9118
     STACK-ADJUST'.
9119
 
9120
   * The AT&T assembler does not provide support for multiple section
9121
     programs.  Unix style systems expect all programs to be single
9122
     sections.
9123
 
9124

9125
File: as.info,  Node: i386-Mnemonics,  Next: i386-Regs,  Prev: i386-Syntax,  Up: i386-Dependent
9126
 
9127
9.13.3 Instruction Naming
9128
-------------------------
9129
 
9130
Instruction mnemonics are suffixed with one character modifiers which
9131
specify the size of operands.  The letters `b', `w', `l' and `q'
9132
specify byte, word, long and quadruple word operands.  If no suffix is
9133
specified by an instruction then `as' tries to fill in the missing
9134
suffix based on the destination register operand (the last one by
9135
convention).  Thus, `mov %ax, %bx' is equivalent to `movw %ax, %bx';
9136
also, `mov $1, %bx' is equivalent to `movw $1, bx'.  Note that this is
9137
incompatible with the AT&T Unix assembler which assumes that a missing
9138
mnemonic suffix implies long operand size.  (This incompatibility does
9139
not affect compiler output since compilers always explicitly specify
9140
the mnemonic suffix.)
9141
 
9142
   Almost all instructions have the same names in AT&T and Intel format.
9143
There are a few exceptions.  The sign extend and zero extend
9144
instructions need two sizes to specify them.  They need a size to
9145
sign/zero extend _from_ and a size to zero extend _to_.  This is
9146
accomplished by using two instruction mnemonic suffixes in AT&T syntax.
9147
Base names for sign extend and zero extend are `movs...' and `movz...'
9148
in AT&T syntax (`movsx' and `movzx' in Intel syntax).  The instruction
9149
mnemonic suffixes are tacked on to this base name, the _from_ suffix
9150
before the _to_ suffix.  Thus, `movsbl %al, %edx' is AT&T syntax for
9151
"move sign extend _from_ %al _to_ %edx."  Possible suffixes, thus, are
9152
`bl' (from byte to long), `bw' (from byte to word), `wl' (from word to
9153
long), `bq' (from byte to quadruple word), `wq' (from word to quadruple
9154
word), and `lq' (from long to quadruple word).
9155
 
9156
   The Intel-syntax conversion instructions
9157
 
9158
   * `cbw' -- sign-extend byte in `%al' to word in `%ax',
9159
 
9160
   * `cwde' -- sign-extend word in `%ax' to long in `%eax',
9161
 
9162
   * `cwd' -- sign-extend word in `%ax' to long in `%dx:%ax',
9163
 
9164
   * `cdq' -- sign-extend dword in `%eax' to quad in `%edx:%eax',
9165
 
9166
   * `cdqe' -- sign-extend dword in `%eax' to quad in `%rax' (x86-64
9167
     only),
9168
 
9169
   * `cqo' -- sign-extend quad in `%rax' to octuple in `%rdx:%rax'
9170
     (x86-64 only),
9171
 
9172
are called `cbtw', `cwtl', `cwtd', `cltd', `cltq', and `cqto' in AT&T
9173
naming.  `as' accepts either naming for these instructions.
9174
 
9175
   Far call/jump instructions are `lcall' and `ljmp' in AT&T syntax,
9176
but are `call far' and `jump far' in Intel convention.
9177
 
9178
9.13.4 AT&T Mnemonic versus Intel Mnemonic
9179
------------------------------------------
9180
 
9181
`as' supports assembly using Intel mnemonic.  `.intel_mnemonic' selects
9182
Intel mnemonic with Intel syntax, and `.att_mnemonic' switches back to
9183
the usual AT&T mnemonic with AT&T syntax for compatibility with the
9184
output of `gcc'.  Several x87 instructions, `fadd', `fdiv', `fdivp',
9185
`fdivr', `fdivrp', `fmul', `fsub', `fsubp', `fsubr' and `fsubrp',  are
9186
implemented in AT&T System V/386 assembler with different mnemonics
9187
from those in Intel IA32 specification.  `gcc' generates those
9188
instructions with AT&T mnemonic.
9189
 
9190

9191
File: as.info,  Node: i386-Regs,  Next: i386-Prefixes,  Prev: i386-Mnemonics,  Up: i386-Dependent
9192
 
9193
9.13.5 Register Naming
9194
----------------------
9195
 
9196
Register operands are always prefixed with `%'.  The 80386 registers
9197
consist of
9198
 
9199
   * the 8 32-bit registers `%eax' (the accumulator), `%ebx', `%ecx',
9200
     `%edx', `%edi', `%esi', `%ebp' (the frame pointer), and `%esp'
9201
     (the stack pointer).
9202
 
9203
   * the 8 16-bit low-ends of these: `%ax', `%bx', `%cx', `%dx', `%di',
9204
     `%si', `%bp', and `%sp'.
9205
 
9206
   * the 8 8-bit registers: `%ah', `%al', `%bh', `%bl', `%ch', `%cl',
9207
     `%dh', and `%dl' (These are the high-bytes and low-bytes of `%ax',
9208
     `%bx', `%cx', and `%dx')
9209
 
9210
   * the 6 section registers `%cs' (code section), `%ds' (data
9211
     section), `%ss' (stack section), `%es', `%fs', and `%gs'.
9212
 
9213
   * the 3 processor control registers `%cr0', `%cr2', and `%cr3'.
9214
 
9215
   * the 6 debug registers `%db0', `%db1', `%db2', `%db3', `%db6', and
9216
     `%db7'.
9217
 
9218
   * the 2 test registers `%tr6' and `%tr7'.
9219
 
9220
   * the 8 floating point register stack `%st' or equivalently
9221
     `%st(0)', `%st(1)', `%st(2)', `%st(3)', `%st(4)', `%st(5)',
9222
     `%st(6)', and `%st(7)'.  These registers are overloaded by 8 MMX
9223
     registers `%mm0', `%mm1', `%mm2', `%mm3', `%mm4', `%mm5', `%mm6'
9224
     and `%mm7'.
9225
 
9226
   * the 8 SSE registers registers `%xmm0', `%xmm1', `%xmm2', `%xmm3',
9227
     `%xmm4', `%xmm5', `%xmm6' and `%xmm7'.
9228
 
9229
   The AMD x86-64 architecture extends the register set by:
9230
 
9231
   * enhancing the 8 32-bit registers to 64-bit: `%rax' (the
9232
     accumulator), `%rbx', `%rcx', `%rdx', `%rdi', `%rsi', `%rbp' (the
9233
     frame pointer), `%rsp' (the stack pointer)
9234
 
9235
   * the 8 extended registers `%r8'-`%r15'.
9236
 
9237
   * the 8 32-bit low ends of the extended registers: `%r8d'-`%r15d'
9238
 
9239
   * the 8 16-bit low ends of the extended registers: `%r8w'-`%r15w'
9240
 
9241
   * the 8 8-bit low ends of the extended registers: `%r8b'-`%r15b'
9242
 
9243
   * the 4 8-bit registers: `%sil', `%dil', `%bpl', `%spl'.
9244
 
9245
   * the 8 debug registers: `%db8'-`%db15'.
9246
 
9247
   * the 8 SSE registers: `%xmm8'-`%xmm15'.
9248
 
9249

9250
File: as.info,  Node: i386-Prefixes,  Next: i386-Memory,  Prev: i386-Regs,  Up: i386-Dependent
9251
 
9252
9.13.6 Instruction Prefixes
9253
---------------------------
9254
 
9255
Instruction prefixes are used to modify the following instruction.  They
9256
are used to repeat string instructions, to provide section overrides, to
9257
perform bus lock operations, and to change operand and address sizes.
9258
(Most instructions that normally operate on 32-bit operands will use
9259
16-bit operands if the instruction has an "operand size" prefix.)
9260
Instruction prefixes are best written on the same line as the
9261
instruction they act upon. For example, the `scas' (scan string)
9262
instruction is repeated with:
9263
 
9264
             repne scas %es:(%edi),%al
9265
 
9266
   You may also place prefixes on the lines immediately preceding the
9267
instruction, but this circumvents checks that `as' does with prefixes,
9268
and will not work with all prefixes.
9269
 
9270
   Here is a list of instruction prefixes:
9271
 
9272
   * Section override prefixes `cs', `ds', `ss', `es', `fs', `gs'.
9273
     These are automatically added by specifying using the
9274
     SECTION:MEMORY-OPERAND form for memory references.
9275
 
9276
   * Operand/Address size prefixes `data16' and `addr16' change 32-bit
9277
     operands/addresses into 16-bit operands/addresses, while `data32'
9278
     and `addr32' change 16-bit ones (in a `.code16' section) into
9279
     32-bit operands/addresses.  These prefixes _must_ appear on the
9280
     same line of code as the instruction they modify. For example, in
9281
     a 16-bit `.code16' section, you might write:
9282
 
9283
                  addr32 jmpl *(%ebx)
9284
 
9285
   * The bus lock prefix `lock' inhibits interrupts during execution of
9286
     the instruction it precedes.  (This is only valid with certain
9287
     instructions; see a 80386 manual for details).
9288
 
9289
   * The wait for coprocessor prefix `wait' waits for the coprocessor to
9290
     complete the current instruction.  This should never be needed for
9291
     the 80386/80387 combination.
9292
 
9293
   * The `rep', `repe', and `repne' prefixes are added to string
9294
     instructions to make them repeat `%ecx' times (`%cx' times if the
9295
     current address size is 16-bits).
9296
 
9297
   * The `rex' family of prefixes is used by x86-64 to encode
9298
     extensions to i386 instruction set.  The `rex' prefix has four
9299
     bits -- an operand size overwrite (`64') used to change operand
9300
     size from 32-bit to 64-bit and X, Y and Z extensions bits used to
9301
     extend the register set.
9302
 
9303
     You may write the `rex' prefixes directly. The `rex64xyz'
9304
     instruction emits `rex' prefix with all the bits set.  By omitting
9305
     the `64', `x', `y' or `z' you may write other prefixes as well.
9306
     Normally, there is no need to write the prefixes explicitly, since
9307
     gas will automatically generate them based on the instruction
9308
     operands.
9309
 
9310

9311
File: as.info,  Node: i386-Memory,  Next: i386-Jumps,  Prev: i386-Prefixes,  Up: i386-Dependent
9312
 
9313
9.13.7 Memory References
9314
------------------------
9315
 
9316
An Intel syntax indirect memory reference of the form
9317
 
9318
     SECTION:[BASE + INDEX*SCALE + DISP]
9319
 
9320
is translated into the AT&T syntax
9321
 
9322
     SECTION:DISP(BASE, INDEX, SCALE)
9323
 
9324
where BASE and INDEX are the optional 32-bit base and index registers,
9325
DISP is the optional displacement, and SCALE, taking the values 1, 2,
9326
4, and 8, multiplies INDEX to calculate the address of the operand.  If
9327
no SCALE is specified, SCALE is taken to be 1.  SECTION specifies the
9328
optional section register for the memory operand, and may override the
9329
default section register (see a 80386 manual for section register
9330
defaults). Note that section overrides in AT&T syntax _must_ be
9331
preceded by a `%'.  If you specify a section override which coincides
9332
with the default section register, `as' does _not_ output any section
9333
register override prefixes to assemble the given instruction.  Thus,
9334
section overrides can be specified to emphasize which section register
9335
is used for a given memory operand.
9336
 
9337
   Here are some examples of Intel and AT&T style memory references:
9338
 
9339
AT&T: `-4(%ebp)', Intel:  `[ebp - 4]'
9340
     BASE is `%ebp'; DISP is `-4'. SECTION is missing, and the default
9341
     section is used (`%ss' for addressing with `%ebp' as the base
9342
     register).  INDEX, SCALE are both missing.
9343
 
9344
AT&T: `foo(,%eax,4)', Intel: `[foo + eax*4]'
9345
     INDEX is `%eax' (scaled by a SCALE 4); DISP is `foo'.  All other
9346
     fields are missing.  The section register here defaults to `%ds'.
9347
 
9348
AT&T: `foo(,1)'; Intel `[foo]'
9349
     This uses the value pointed to by `foo' as a memory operand.  Note
9350
     that BASE and INDEX are both missing, but there is only _one_ `,'.
9351
     This is a syntactic exception.
9352
 
9353
AT&T: `%gs:foo'; Intel `gs:foo'
9354
     This selects the contents of the variable `foo' with section
9355
     register SECTION being `%gs'.
9356
 
9357
   Absolute (as opposed to PC relative) call and jump operands must be
9358
prefixed with `*'.  If no `*' is specified, `as' always chooses PC
9359
relative addressing for jump/call labels.
9360
 
9361
   Any instruction that has a memory operand, but no register operand,
9362
_must_ specify its size (byte, word, long, or quadruple) with an
9363
instruction mnemonic suffix (`b', `w', `l' or `q', respectively).
9364
 
9365
   The x86-64 architecture adds an RIP (instruction pointer relative)
9366
addressing.  This addressing mode is specified by using `rip' as a base
9367
register.  Only constant offsets are valid. For example:
9368
 
9369
AT&T: `1234(%rip)', Intel: `[rip + 1234]'
9370
     Points to the address 1234 bytes past the end of the current
9371
     instruction.
9372
 
9373
AT&T: `symbol(%rip)', Intel: `[rip + symbol]'
9374
     Points to the `symbol' in RIP relative way, this is shorter than
9375
     the default absolute addressing.
9376
 
9377
   Other addressing modes remain unchanged in x86-64 architecture,
9378
except registers used are 64-bit instead of 32-bit.
9379
 
9380

9381
File: as.info,  Node: i386-Jumps,  Next: i386-Float,  Prev: i386-Memory,  Up: i386-Dependent
9382
 
9383
9.13.8 Handling of Jump Instructions
9384
------------------------------------
9385
 
9386
Jump instructions are always optimized to use the smallest possible
9387
displacements.  This is accomplished by using byte (8-bit) displacement
9388
jumps whenever the target is sufficiently close.  If a byte displacement
9389
is insufficient a long displacement is used.  We do not support word
9390
(16-bit) displacement jumps in 32-bit mode (i.e. prefixing the jump
9391
instruction with the `data16' instruction prefix), since the 80386
9392
insists upon masking `%eip' to 16 bits after the word displacement is
9393
added. (See also *note i386-Arch::)
9394
 
9395
   Note that the `jcxz', `jecxz', `loop', `loopz', `loope', `loopnz'
9396
and `loopne' instructions only come in byte displacements, so that if
9397
you use these instructions (`gcc' does not use them) you may get an
9398
error message (and incorrect code).  The AT&T 80386 assembler tries to
9399
get around this problem by expanding `jcxz foo' to
9400
 
9401
              jcxz cx_zero
9402
              jmp cx_nonzero
9403
     cx_zero: jmp foo
9404
     cx_nonzero:
9405
 
9406

9407
File: as.info,  Node: i386-Float,  Next: i386-SIMD,  Prev: i386-Jumps,  Up: i386-Dependent
9408
 
9409
9.13.9 Floating Point
9410
---------------------
9411
 
9412
All 80387 floating point types except packed BCD are supported.  (BCD
9413
support may be added without much difficulty).  These data types are
9414
16-, 32-, and 64- bit integers, and single (32-bit), double (64-bit),
9415
and extended (80-bit) precision floating point.  Each supported type
9416
has an instruction mnemonic suffix and a constructor associated with
9417
it.  Instruction mnemonic suffixes specify the operand's data type.
9418
Constructors build these data types into memory.
9419
 
9420
   * Floating point constructors are `.float' or `.single', `.double',
9421
     and `.tfloat' for 32-, 64-, and 80-bit formats.  These correspond
9422
     to instruction mnemonic suffixes `s', `l', and `t'. `t' stands for
9423
     80-bit (ten byte) real.  The 80387 only supports this format via
9424
     the `fldt' (load 80-bit real to stack top) and `fstpt' (store
9425
     80-bit real and pop stack) instructions.
9426
 
9427
   * Integer constructors are `.word', `.long' or `.int', and `.quad'
9428
     for the 16-, 32-, and 64-bit integer formats.  The corresponding
9429
     instruction mnemonic suffixes are `s' (single), `l' (long), and
9430
     `q' (quad).  As with the 80-bit real format, the 64-bit `q' format
9431
     is only present in the `fildq' (load quad integer to stack top)
9432
     and `fistpq' (store quad integer and pop stack) instructions.
9433
 
9434
   Register to register operations should not use instruction mnemonic
9435
suffixes.  `fstl %st, %st(1)' will give a warning, and be assembled as
9436
if you wrote `fst %st, %st(1)', since all register to register
9437
operations use 80-bit floating point operands. (Contrast this with
9438
`fstl %st, mem', which converts `%st' from 80-bit to 64-bit floating
9439
point format, then stores the result in the 4 byte location `mem')
9440
 
9441

9442
File: as.info,  Node: i386-SIMD,  Next: i386-16bit,  Prev: i386-Float,  Up: i386-Dependent
9443
 
9444
9.13.10 Intel's MMX and AMD's 3DNow! SIMD Operations
9445
----------------------------------------------------
9446
 
9447
`as' supports Intel's MMX instruction set (SIMD instructions for
9448
integer data), available on Intel's Pentium MMX processors and Pentium
9449
II processors, AMD's K6 and K6-2 processors, Cyrix' M2 processor, and
9450
probably others.  It also supports AMD's 3DNow!  instruction set (SIMD
9451
instructions for 32-bit floating point data) available on AMD's K6-2
9452
processor and possibly others in the future.
9453
 
9454
   Currently, `as' does not support Intel's floating point SIMD, Katmai
9455
(KNI).
9456
 
9457
   The eight 64-bit MMX operands, also used by 3DNow!, are called
9458
`%mm0', `%mm1', ... `%mm7'.  They contain eight 8-bit integers, four
9459
16-bit integers, two 32-bit integers, one 64-bit integer, or two 32-bit
9460
floating point values.  The MMX registers cannot be used at the same
9461
time as the floating point stack.
9462
 
9463
   See Intel and AMD documentation, keeping in mind that the operand
9464
order in instructions is reversed from the Intel syntax.
9465
 
9466

9467
File: as.info,  Node: i386-16bit,  Next: i386-Arch,  Prev: i386-SIMD,  Up: i386-Dependent
9468
 
9469
9.13.11 Writing 16-bit Code
9470
---------------------------
9471
 
9472
While `as' normally writes only "pure" 32-bit i386 code or 64-bit
9473
x86-64 code depending on the default configuration, it also supports
9474
writing code to run in real mode or in 16-bit protected mode code
9475
segments.  To do this, put a `.code16' or `.code16gcc' directive before
9476
the assembly language instructions to be run in 16-bit mode.  You can
9477
switch `as' back to writing normal 32-bit code with the `.code32'
9478
directive.
9479
 
9480
   `.code16gcc' provides experimental support for generating 16-bit
9481
code from gcc, and differs from `.code16' in that `call', `ret',
9482
`enter', `leave', `push', `pop', `pusha', `popa', `pushf', and `popf'
9483
instructions default to 32-bit size.  This is so that the stack pointer
9484
is manipulated in the same way over function calls, allowing access to
9485
function parameters at the same stack offsets as in 32-bit mode.
9486
`.code16gcc' also automatically adds address size prefixes where
9487
necessary to use the 32-bit addressing modes that gcc generates.
9488
 
9489
   The code which `as' generates in 16-bit mode will not necessarily
9490
run on a 16-bit pre-80386 processor.  To write code that runs on such a
9491
processor, you must refrain from using _any_ 32-bit constructs which
9492
require `as' to output address or operand size prefixes.
9493
 
9494
   Note that writing 16-bit code instructions by explicitly specifying a
9495
prefix or an instruction mnemonic suffix within a 32-bit code section
9496
generates different machine instructions than those generated for a
9497
16-bit code segment.  In a 32-bit code section, the following code
9498
generates the machine opcode bytes `66 6a 04', which pushes the value
9499
`4' onto the stack, decrementing `%esp' by 2.
9500
 
9501
             pushw $4
9502
 
9503
   The same code in a 16-bit code section would generate the machine
9504
opcode bytes `6a 04' (i.e., without the operand size prefix), which is
9505
correct since the processor default operand size is assumed to be 16
9506
bits in a 16-bit code section.
9507
 
9508

9509
File: as.info,  Node: i386-Bugs,  Next: i386-Notes,  Prev: i386-Arch,  Up: i386-Dependent
9510
 
9511
9.13.12 AT&T Syntax bugs
9512
------------------------
9513
 
9514
The UnixWare assembler, and probably other AT&T derived ix86 Unix
9515
assemblers, generate floating point instructions with reversed source
9516
and destination registers in certain cases.  Unfortunately, gcc and
9517
possibly many other programs use this reversed syntax, so we're stuck
9518
with it.
9519
 
9520
   For example
9521
 
9522
             fsub %st,%st(3)
9523
   results in `%st(3)' being updated to `%st - %st(3)' rather than the
9524
expected `%st(3) - %st'.  This happens with all the non-commutative
9525
arithmetic floating point operations with two register operands where
9526
the source register is `%st' and the destination register is `%st(i)'.
9527
 
9528

9529
File: as.info,  Node: i386-Arch,  Next: i386-Bugs,  Prev: i386-16bit,  Up: i386-Dependent
9530
 
9531
9.13.13 Specifying CPU Architecture
9532
-----------------------------------
9533
 
9534
`as' may be told to assemble for a particular CPU (sub-)architecture
9535
with the `.arch CPU_TYPE' directive.  This directive enables a warning
9536
when gas detects an instruction that is not supported on the CPU
9537
specified.  The choices for CPU_TYPE are:
9538
 
9539
`i8086'        `i186'         `i286'         `i386'
9540
`i486'         `i586'         `i686'         `pentium'
9541
`pentiumpro'   `pentiumii'    `pentiumiii'   `pentium4'
9542
`prescott'     `nocona'       `core'         `core2'
9543
`k6'           `k6_2'         `athlon'       `k8'
9544
`amdfam10'
9545
`generic32'    `generic64'
9546
`.mmx'         `.sse'         `.sse2'        `.sse3'
9547
`.ssse3'       `.sse4.1'      `.sse4.2'      `.sse4'
9548
`.avx'         `.vmx'         `.smx'         `.xsave'
9549
`.aes'         `.pclmul'      `.fma'         `.movbe'
9550
`.ept'
9551
`.3dnow'       `.3dnowa'      `.sse4a'       `.sse5'
9552
`.svme'        `.abm'
9553
`.padlock'
9554
 
9555
   Apart from the warning, there are only two other effects on `as'
9556
operation;  Firstly, if you specify a CPU other than `i486', then shift
9557
by one instructions such as `sarl $1, %eax' will automatically use a
9558
two byte opcode sequence.  The larger three byte opcode sequence is
9559
used on the 486 (and when no architecture is specified) because it
9560
executes faster on the 486.  Note that you can explicitly request the
9561
two byte opcode by writing `sarl %eax'.  Secondly, if you specify
9562
`i8086', `i186', or `i286', _and_ `.code16' or `.code16gcc' then byte
9563
offset conditional jumps will be promoted when necessary to a two
9564
instruction sequence consisting of a conditional jump of the opposite
9565
sense around an unconditional jump to the target.
9566
 
9567
   Following the CPU architecture (but not a sub-architecture, which
9568
are those starting with a dot), you may specify `jumps' or `nojumps' to
9569
control automatic promotion of conditional jumps. `jumps' is the
9570
default, and enables jump promotion;  All external jumps will be of the
9571
long variety, and file-local jumps will be promoted as necessary.
9572
(*note i386-Jumps::)  `nojumps' leaves external conditional jumps as
9573
byte offset jumps, and warns about file-local conditional jumps that
9574
`as' promotes.  Unconditional jumps are treated as for `jumps'.
9575
 
9576
   For example
9577
 
9578
      .arch i8086,nojumps
9579
 
9580

9581
File: as.info,  Node: i386-Notes,  Prev: i386-Bugs,  Up: i386-Dependent
9582
 
9583
9.13.14 Notes
9584
-------------
9585
 
9586
There is some trickery concerning the `mul' and `imul' instructions
9587
that deserves mention.  The 16-, 32-, 64- and 128-bit expanding
9588
multiplies (base opcode `0xf6'; extension 4 for `mul' and 5 for `imul')
9589
can be output only in the one operand form.  Thus, `imul %ebx, %eax'
9590
does _not_ select the expanding multiply; the expanding multiply would
9591
clobber the `%edx' register, and this would confuse `gcc' output.  Use
9592
`imul %ebx' to get the 64-bit product in `%edx:%eax'.
9593
 
9594
   We have added a two operand form of `imul' when the first operand is
9595
an immediate mode expression and the second operand is a register.
9596
This is just a shorthand, so that, multiplying `%eax' by 69, for
9597
example, can be done with `imul $69, %eax' rather than `imul $69, %eax,
9598
%eax'.
9599
 
9600

9601
File: as.info,  Node: i860-Dependent,  Next: i960-Dependent,  Prev: i386-Dependent,  Up: Machine Dependencies
9602
 
9603
9.14 Intel i860 Dependent Features
9604
==================================
9605
 
9606
* Menu:
9607
 
9608
* Notes-i860::                  i860 Notes
9609
* Options-i860::                i860 Command-line Options
9610
* Directives-i860::             i860 Machine Directives
9611
* Opcodes for i860::            i860 Opcodes
9612
 
9613

9614
File: as.info,  Node: Notes-i860,  Next: Options-i860,  Up: i860-Dependent
9615
 
9616
9.14.1 i860 Notes
9617
-----------------
9618
 
9619
This is a fairly complete i860 assembler which is compatible with the
9620
UNIX System V/860 Release 4 assembler. However, it does not currently
9621
support SVR4 PIC (i.e., `@GOT, @GOTOFF, @PLT').
9622
 
9623
   Like the SVR4/860 assembler, the output object format is ELF32.
9624
Currently, this is the only supported object format. If there is
9625
sufficient interest, other formats such as COFF may be implemented.
9626
 
9627
   Both the Intel and AT&T/SVR4 syntaxes are supported, with the latter
9628
being the default.  One difference is that AT&T syntax requires the '%'
9629
prefix on register names while Intel syntax does not.  Another
9630
difference is in the specification of relocatable expressions.  The
9631
Intel syntax is `ha%expression' whereas the SVR4 syntax is
9632
`[expression]@ha' (and similarly for the "l" and "h" selectors).
9633
 
9634

9635
File: as.info,  Node: Options-i860,  Next: Directives-i860,  Prev: Notes-i860,  Up: i860-Dependent
9636
 
9637
9.14.2 i860 Command-line Options
9638
--------------------------------
9639
 
9640
9.14.2.1 SVR4 compatibility options
9641
...................................
9642
 
9643
`-V'
9644
     Print assembler version.
9645
 
9646
`-Qy'
9647
     Ignored.
9648
 
9649
`-Qn'
9650
     Ignored.
9651
 
9652
9.14.2.2 Other options
9653
......................
9654
 
9655
`-EL'
9656
     Select little endian output (this is the default).
9657
 
9658
`-EB'
9659
     Select big endian output. Note that the i860 always reads
9660
     instructions as little endian data, so this option only effects
9661
     data and not instructions.
9662
 
9663
`-mwarn-expand'
9664
     Emit a warning message if any pseudo-instruction expansions
9665
     occurred.  For example, a `or' instruction with an immediate
9666
     larger than 16-bits will be expanded into two instructions. This
9667
     is a very undesirable feature to rely on, so this flag can help
9668
     detect any code where it happens. One use of it, for instance, has
9669
     been to find and eliminate any place where `gcc' may emit these
9670
     pseudo-instructions.
9671
 
9672
`-mxp'
9673
     Enable support for the i860XP instructions and control registers.
9674
     By default, this option is disabled so that only the base
9675
     instruction set (i.e., i860XR) is supported.
9676
 
9677
`-mintel-syntax'
9678
     The i860 assembler defaults to AT&T/SVR4 syntax.  This option
9679
     enables the Intel syntax.
9680
 
9681

9682
File: as.info,  Node: Directives-i860,  Next: Opcodes for i860,  Prev: Options-i860,  Up: i860-Dependent
9683
 
9684
9.14.3 i860 Machine Directives
9685
------------------------------
9686
 
9687
`.dual'
9688
     Enter dual instruction mode. While this directive is supported, the
9689
     preferred way to use dual instruction mode is to explicitly code
9690
     the dual bit with the `d.' prefix.
9691
 
9692
`.enddual'
9693
     Exit dual instruction mode. While this directive is supported, the
9694
     preferred way to use dual instruction mode is to explicitly code
9695
     the dual bit with the `d.' prefix.
9696
 
9697
`.atmp'
9698
     Change the temporary register used when expanding pseudo
9699
     operations. The default register is `r31'.
9700
 
9701
   The `.dual', `.enddual', and `.atmp' directives are available only
9702
in the Intel syntax mode.
9703
 
9704
   Both syntaxes allow for the standard `.align' directive.  However,
9705
the Intel syntax additionally allows keywords for the alignment
9706
parameter: "`.align type'", where `type' is one of `.short', `.long',
9707
`.quad', `.single', `.double' representing alignments of 2, 4, 16, 4,
9708
and 8, respectively.
9709
 
9710

9711
File: as.info,  Node: Opcodes for i860,  Prev: Directives-i860,  Up: i860-Dependent
9712
 
9713
9.14.4 i860 Opcodes
9714
-------------------
9715
 
9716
All of the Intel i860XR and i860XP machine instructions are supported.
9717
Please see either _i860 Microprocessor Programmer's Reference Manual_
9718
or _i860 Microprocessor Architecture_ for more information.
9719
 
9720
9.14.4.1 Other instruction support (pseudo-instructions)
9721
........................................................
9722
 
9723
For compatibility with some other i860 assemblers, a number of
9724
pseudo-instructions are supported. While these are supported, they are
9725
a very undesirable feature that should be avoided - in particular, when
9726
they result in an expansion to multiple actual i860 instructions. Below
9727
are the pseudo-instructions that result in expansions.
9728
   * Load large immediate into general register:
9729
 
9730
     The pseudo-instruction `mov imm,%rn' (where the immediate does not
9731
     fit within a signed 16-bit field) will be expanded into:
9732
          orh large_imm@h,%r0,%rn
9733
          or large_imm@l,%rn,%rn
9734
 
9735
   * Load/store with relocatable address expression:
9736
 
9737
     For example, the pseudo-instruction `ld.b addr_exp(%rx),%rn' will
9738
     be expanded into:
9739
          orh addr_exp@ha,%rx,%r31
9740
          ld.l addr_exp@l(%r31),%rn
9741
 
9742
     The analogous expansions apply to `ld.x, st.x, fld.x, pfld.x,
9743
     fst.x', and `pst.x' as well.
9744
 
9745
   * Signed large immediate with add/subtract:
9746
 
9747
     If any of the arithmetic operations `adds, addu, subs, subu' are
9748
     used with an immediate larger than 16-bits (signed), then they
9749
     will be expanded.  For instance, the pseudo-instruction `adds
9750
     large_imm,%rx,%rn' expands to:
9751
          orh large_imm@h,%r0,%r31
9752
          or large_imm@l,%r31,%r31
9753
          adds %r31,%rx,%rn
9754
 
9755
   * Unsigned large immediate with logical operations:
9756
 
9757
     Logical operations (`or, andnot, or, xor') also result in
9758
     expansions.  The pseudo-instruction `or large_imm,%rx,%rn' results
9759
     in:
9760
          orh large_imm@h,%rx,%r31
9761
          or large_imm@l,%r31,%rn
9762
 
9763
     Similarly for the others, except for `and' which expands to:
9764
          andnot (-1 - large_imm)@h,%rx,%r31
9765
          andnot (-1 - large_imm)@l,%r31,%rn
9766
 
9767

9768
File: as.info,  Node: i960-Dependent,  Next: IA-64-Dependent,  Prev: i860-Dependent,  Up: Machine Dependencies
9769
 
9770
9.15 Intel 80960 Dependent Features
9771
===================================
9772
 
9773
* Menu:
9774
 
9775
* Options-i960::                i960 Command-line Options
9776
* Floating Point-i960::         Floating Point
9777
* Directives-i960::             i960 Machine Directives
9778
* Opcodes for i960::            i960 Opcodes
9779
 
9780

9781
File: as.info,  Node: Options-i960,  Next: Floating Point-i960,  Up: i960-Dependent
9782
 
9783
9.15.1 i960 Command-line Options
9784
--------------------------------
9785
 
9786
`-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC'
9787
     Select the 80960 architecture.  Instructions or features not
9788
     supported by the selected architecture cause fatal errors.
9789
 
9790
     `-ACA' is equivalent to `-ACA_A'; `-AKC' is equivalent to `-AMC'.
9791
     Synonyms are provided for compatibility with other tools.
9792
 
9793
     If you do not specify any of these options, `as' generates code
9794
     for any instruction or feature that is supported by _some_ version
9795
     of the 960 (even if this means mixing architectures!).  In
9796
     principle, `as' attempts to deduce the minimal sufficient
9797
     processor type if none is specified; depending on the object code
9798
     format, the processor type may be recorded in the object file.  If
9799
     it is critical that the `as' output match a specific architecture,
9800
     specify that architecture explicitly.
9801
 
9802
`-b'
9803
     Add code to collect information about conditional branches taken,
9804
     for later optimization using branch prediction bits.  (The
9805
     conditional branch instructions have branch prediction bits in the
9806
     CA, CB, and CC architectures.)  If BR represents a conditional
9807
     branch instruction, the following represents the code generated by
9808
     the assembler when `-b' is specified:
9809
 
9810
                  call    INCREMENT ROUTINE
9811
                  .word   0       # pre-counter
9812
          Label:  BR
9813
                  call    INCREMENT ROUTINE
9814
                  .word   0       # post-counter
9815
 
9816
     The counter following a branch records the number of times that
9817
     branch was _not_ taken; the difference between the two counters is
9818
     the number of times the branch _was_ taken.
9819
 
9820
     A table of every such `Label' is also generated, so that the
9821
     external postprocessor `gbr960' (supplied by Intel) can locate all
9822
     the counters.  This table is always labeled `__BRANCH_TABLE__';
9823
     this is a local symbol to permit collecting statistics for many
9824
     separate object files.  The table is word aligned, and begins with
9825
     a two-word header.  The first word, initialized to 0, is used in
9826
     maintaining linked lists of branch tables.  The second word is a
9827
     count of the number of entries in the table, which follow
9828
     immediately: each is a word, pointing to one of the labels
9829
     illustrated above.
9830
 
9831
           +------------+------------+------------+ ... +------------+
9832
           |            |            |            |     |            |
9833
           |  *NEXT     |  COUNT: N  | *BRLAB 1   |     | *BRLAB N   |
9834
           |            |            |            |     |            |
9835
           +------------+------------+------------+ ... +------------+
9836
 
9837
                         __BRANCH_TABLE__ layout
9838
 
9839
     The first word of the header is used to locate multiple branch
9840
     tables, since each object file may contain one. Normally the links
9841
     are maintained with a call to an initialization routine, placed at
9842
     the beginning of each function in the file.  The GNU C compiler
9843
     generates these calls automatically when you give it a `-b' option.
9844
     For further details, see the documentation of `gbr960'.
9845
 
9846
`-no-relax'
9847
     Normally, Compare-and-Branch instructions with targets that require
9848
     displacements greater than 13 bits (or that have external targets)
9849
     are replaced with the corresponding compare (or `chkbit') and
9850
     branch instructions.  You can use the `-no-relax' option to
9851
     specify that `as' should generate errors instead, if the target
9852
     displacement is larger than 13 bits.
9853
 
9854
     This option does not affect the Compare-and-Jump instructions; the
9855
     code emitted for them is _always_ adjusted when necessary
9856
     (depending on displacement size), regardless of whether you use
9857
     `-no-relax'.
9858
 
9859

9860
File: as.info,  Node: Floating Point-i960,  Next: Directives-i960,  Prev: Options-i960,  Up: i960-Dependent
9861
 
9862
9.15.2 Floating Point
9863
---------------------
9864
 
9865
`as' generates IEEE floating-point numbers for the directives `.float',
9866
`.double', `.extended', and `.single'.
9867
 
9868

9869
File: as.info,  Node: Directives-i960,  Next: Opcodes for i960,  Prev: Floating Point-i960,  Up: i960-Dependent
9870
 
9871
9.15.3 i960 Machine Directives
9872
------------------------------
9873
 
9874
`.bss SYMBOL, LENGTH, ALIGN'
9875
     Reserve LENGTH bytes in the bss section for a local SYMBOL,
9876
     aligned to the power of two specified by ALIGN.  LENGTH and ALIGN
9877
     must be positive absolute expressions.  This directive differs
9878
     from `.lcomm' only in that it permits you to specify an alignment.
9879
     *Note `.lcomm': Lcomm.
9880
 
9881
`.extended FLONUMS'
9882
     `.extended' expects zero or more flonums, separated by commas; for
9883
     each flonum, `.extended' emits an IEEE extended-format (80-bit)
9884
     floating-point number.
9885
 
9886
`.leafproc CALL-LAB, BAL-LAB'
9887
     You can use the `.leafproc' directive in conjunction with the
9888
     optimized `callj' instruction to enable faster calls of leaf
9889
     procedures.  If a procedure is known to call no other procedures,
9890
     you may define an entry point that skips procedure prolog code
9891
     (and that does not depend on system-supplied saved context), and
9892
     declare it as the BAL-LAB using `.leafproc'.  If the procedure
9893
     also has an entry point that goes through the normal prolog, you
9894
     can specify that entry point as CALL-LAB.
9895
 
9896
     A `.leafproc' declaration is meant for use in conjunction with the
9897
     optimized call instruction `callj'; the directive records the data
9898
     needed later to choose between converting the `callj' into a `bal'
9899
     or a `call'.
9900
 
9901
     CALL-LAB is optional; if only one argument is present, or if the
9902
     two arguments are identical, the single argument is assumed to be
9903
     the `bal' entry point.
9904
 
9905
`.sysproc NAME, INDEX'
9906
     The `.sysproc' directive defines a name for a system procedure.
9907
     After you define it using `.sysproc', you can use NAME to refer to
9908
     the system procedure identified by INDEX when calling procedures
9909
     with the optimized call instruction `callj'.
9910
 
9911
     Both arguments are required; INDEX must be between 0 and 31
9912
     (inclusive).
9913
 
9914

9915
File: as.info,  Node: Opcodes for i960,  Prev: Directives-i960,  Up: i960-Dependent
9916
 
9917
9.15.4 i960 Opcodes
9918
-------------------
9919
 
9920
All Intel 960 machine instructions are supported; *note i960
9921
Command-line Options: Options-i960. for a discussion of selecting the
9922
instruction subset for a particular 960 architecture.
9923
 
9924
   Some opcodes are processed beyond simply emitting a single
9925
corresponding instruction: `callj', and Compare-and-Branch or
9926
Compare-and-Jump instructions with target displacements larger than 13
9927
bits.
9928
 
9929
* Menu:
9930
 
9931
* callj-i960::                  `callj'
9932
* Compare-and-branch-i960::     Compare-and-Branch
9933
 
9934

9935
File: as.info,  Node: callj-i960,  Next: Compare-and-branch-i960,  Up: Opcodes for i960
9936
 
9937
9.15.4.1 `callj'
9938
................
9939
 
9940
You can write `callj' to have the assembler or the linker determine the
9941
most appropriate form of subroutine call: `call', `bal', or `calls'.
9942
If the assembly source contains enough information--a `.leafproc' or
9943
`.sysproc' directive defining the operand--then `as' translates the
9944
`callj'; if not, it simply emits the `callj', leaving it for the linker
9945
to resolve.
9946
 
9947

9948
File: as.info,  Node: Compare-and-branch-i960,  Prev: callj-i960,  Up: Opcodes for i960
9949
 
9950
9.15.4.2 Compare-and-Branch
9951
...........................
9952
 
9953
The 960 architectures provide combined Compare-and-Branch instructions
9954
that permit you to store the branch target in the lower 13 bits of the
9955
instruction word itself.  However, if you specify a branch target far
9956
enough away that its address won't fit in 13 bits, the assembler can
9957
either issue an error, or convert your Compare-and-Branch instruction
9958
into separate instructions to do the compare and the branch.
9959
 
9960
   Whether `as' gives an error or expands the instruction depends on
9961
two choices you can make: whether you use the `-no-relax' option, and
9962
whether you use a "Compare and Branch" instruction or a "Compare and
9963
Jump" instruction.  The "Jump" instructions are _always_ expanded if
9964
necessary; the "Branch" instructions are expanded when necessary
9965
_unless_ you specify `-no-relax'--in which case `as' gives an error
9966
instead.
9967
 
9968
   These are the Compare-and-Branch instructions, their "Jump" variants,
9969
and the instruction pairs they may expand into:
9970
 
9971
             Compare and
9972
          Branch      Jump       Expanded to
9973
          ------    ------       ------------
9974
             bbc                 chkbit; bno
9975
             bbs                 chkbit; bo
9976
          cmpibe    cmpije       cmpi; be
9977
          cmpibg    cmpijg       cmpi; bg
9978
         cmpibge   cmpijge       cmpi; bge
9979
          cmpibl    cmpijl       cmpi; bl
9980
         cmpible   cmpijle       cmpi; ble
9981
         cmpibno   cmpijno       cmpi; bno
9982
         cmpibne   cmpijne       cmpi; bne
9983
          cmpibo    cmpijo       cmpi; bo
9984
          cmpobe    cmpoje       cmpo; be
9985
          cmpobg    cmpojg       cmpo; bg
9986
         cmpobge   cmpojge       cmpo; bge
9987
          cmpobl    cmpojl       cmpo; bl
9988
         cmpoble   cmpojle       cmpo; ble
9989
         cmpobne   cmpojne       cmpo; bne
9990
 
9991

9992
File: as.info,  Node: IA-64-Dependent,  Next: IP2K-Dependent,  Prev: i960-Dependent,  Up: Machine Dependencies
9993
 
9994
9.16 IA-64 Dependent Features
9995
=============================
9996
 
9997
* Menu:
9998
 
9999
* IA-64 Options::              Options
10000
* IA-64 Syntax::               Syntax
10001
* IA-64 Opcodes::              Opcodes
10002
 
10003

10004
File: as.info,  Node: IA-64 Options,  Next: IA-64 Syntax,  Up: IA-64-Dependent
10005
 
10006
9.16.1 Options
10007
--------------
10008
 
10009
`-mconstant-gp'
10010
     This option instructs the assembler to mark the resulting object
10011
     file as using the "constant GP" model.  With this model, it is
10012
     assumed that the entire program uses a single global pointer (GP)
10013
     value.  Note that this option does not in any fashion affect the
10014
     machine code emitted by the assembler.  All it does is turn on the
10015
     EF_IA_64_CONS_GP flag in the ELF file header.
10016
 
10017
`-mauto-pic'
10018
     This option instructs the assembler to mark the resulting object
10019
     file as using the "constant GP without function descriptor" data
10020
     model.  This model is like the "constant GP" model, except that it
10021
     additionally does away with function descriptors.  What this means
10022
     is that the address of a function refers directly to the
10023
     function's code entry-point.  Normally, such an address would
10024
     refer to a function descriptor, which contains both the code
10025
     entry-point and the GP-value needed by the function.  Note that
10026
     this option does not in any fashion affect the machine code
10027
     emitted by the assembler.  All it does is turn on the
10028
     EF_IA_64_NOFUNCDESC_CONS_GP flag in the ELF file header.
10029
 
10030
`-milp32'
10031
 
10032
`-milp64'
10033
 
10034
`-mlp64'
10035
 
10036
`-mp64'
10037
     These options select the data model.  The assembler defaults to
10038
     `-mlp64' (LP64 data model).
10039
 
10040
`-mle'
10041
 
10042
`-mbe'
10043
     These options select the byte order.  The `-mle' option selects
10044
     little-endian byte order (default) and `-mbe' selects big-endian
10045
     byte order.  Note that IA-64 machine code always uses
10046
     little-endian byte order.
10047
 
10048
`-mtune=itanium1'
10049
 
10050
`-mtune=itanium2'
10051
     Tune for a particular IA-64 CPU, ITANIUM1 or ITANIUM2. The default
10052
     is ITANIUM2.
10053
 
10054
`-munwind-check=warning'
10055
 
10056
`-munwind-check=error'
10057
     These options control what the assembler will do when performing
10058
     consistency checks on unwind directives.  `-munwind-check=warning'
10059
     will make the assembler issue a warning when an unwind directive
10060
     check fails.  This is the default.  `-munwind-check=error' will
10061
     make the assembler issue an error when an unwind directive check
10062
     fails.
10063
 
10064
`-mhint.b=ok'
10065
 
10066
`-mhint.b=warning'
10067
 
10068
`-mhint.b=error'
10069
     These options control what the assembler will do when the `hint.b'
10070
     instruction is used.  `-mhint.b=ok' will make the assembler accept
10071
     `hint.b'.  `-mint.b=warning' will make the assembler issue a
10072
     warning when `hint.b' is used.  `-mhint.b=error' will make the
10073
     assembler treat `hint.b' as an error, which is the default.
10074
 
10075
`-x'
10076
 
10077
`-xexplicit'
10078
     These options turn on dependency violation checking.
10079
 
10080
`-xauto'
10081
     This option instructs the assembler to automatically insert stop
10082
     bits where necessary to remove dependency violations.  This is the
10083
     default mode.
10084
 
10085
`-xnone'
10086
     This option turns off dependency violation checking.
10087
 
10088
`-xdebug'
10089
     This turns on debug output intended to help tracking down bugs in
10090
     the dependency violation checker.
10091
 
10092
`-xdebugn'
10093
     This is a shortcut for -xnone -xdebug.
10094
 
10095
`-xdebugx'
10096
     This is a shortcut for -xexplicit -xdebug.
10097
 
10098
 
10099

10100
File: as.info,  Node: IA-64 Syntax,  Next: IA-64 Opcodes,  Prev: IA-64 Options,  Up: IA-64-Dependent
10101
 
10102
9.16.2 Syntax
10103
-------------
10104
 
10105
The assembler syntax closely follows the IA-64 Assembly Language
10106
Reference Guide.
10107
 
10108
* Menu:
10109
 
10110
* IA-64-Chars::                Special Characters
10111
* IA-64-Regs::                 Register Names
10112
* IA-64-Bits::                 Bit Names
10113
 
10114

10115
File: as.info,  Node: IA-64-Chars,  Next: IA-64-Regs,  Up: IA-64 Syntax
10116
 
10117
9.16.2.1 Special Characters
10118
...........................
10119
 
10120
`//' is the line comment token.
10121
 
10122
   `;' can be used instead of a newline to separate statements.
10123
 
10124

10125
File: as.info,  Node: IA-64-Regs,  Next: IA-64-Bits,  Prev: IA-64-Chars,  Up: IA-64 Syntax
10126
 
10127
9.16.2.2 Register Names
10128
.......................
10129
 
10130
The 128 integer registers are referred to as `rN'.  The 128
10131
floating-point registers are referred to as `fN'.  The 128 application
10132
registers are referred to as `arN'.  The 128 control registers are
10133
referred to as `crN'.  The 64 one-bit predicate registers are referred
10134
to as `pN'.  The 8 branch registers are referred to as `bN'.  In
10135
addition, the assembler defines a number of aliases: `gp' (`r1'), `sp'
10136
(`r12'), `rp' (`b0'), `ret0' (`r8'), `ret1' (`r9'), `ret2' (`r10'),
10137
`ret3' (`r9'), `fargN' (`f8+N'), and `fretN' (`f8+N').
10138
 
10139
   For convenience, the assembler also defines aliases for all named
10140
application and control registers.  For example, `ar.bsp' refers to the
10141
register backing store pointer (`ar17').  Similarly, `cr.eoi' refers to
10142
the end-of-interrupt register (`cr67').
10143
 
10144

10145
File: as.info,  Node: IA-64-Bits,  Prev: IA-64-Regs,  Up: IA-64 Syntax
10146
 
10147
9.16.2.3 IA-64 Processor-Status-Register (PSR) Bit Names
10148
........................................................
10149
 
10150
The assembler defines bit masks for each of the bits in the IA-64
10151
processor status register.  For example, `psr.ic' corresponds to a
10152
value of 0x2000.  These masks are primarily intended for use with the
10153
`ssm'/`sum' and `rsm'/`rum' instructions, but they can be used anywhere
10154
else where an integer constant is expected.
10155
 
10156

10157
File: as.info,  Node: IA-64 Opcodes,  Prev: IA-64 Syntax,  Up: IA-64-Dependent
10158
 
10159
9.16.3 Opcodes
10160
--------------
10161
 
10162
For detailed information on the IA-64 machine instruction set, see the
10163
IA-64 Architecture Handbook
10164
(http://developer.intel.com/design/itanium/arch_spec.htm).
10165
 
10166

10167
File: as.info,  Node: IP2K-Dependent,  Next: M32C-Dependent,  Prev: IA-64-Dependent,  Up: Machine Dependencies
10168
 
10169
9.17 IP2K Dependent Features
10170
============================
10171
 
10172
* Menu:
10173
 
10174
* IP2K-Opts::                   IP2K Options
10175
 
10176

10177
File: as.info,  Node: IP2K-Opts,  Up: IP2K-Dependent
10178
 
10179
9.17.1 IP2K Options
10180
-------------------
10181
 
10182
The Ubicom IP2K version of `as' has a few machine dependent options:
10183
 
10184
`-mip2022ext'
10185
     `as' can assemble the extended IP2022 instructions, but it will
10186
     only do so if this is specifically allowed via this command line
10187
     option.
10188
 
10189
`-mip2022'
10190
     This option restores the assembler's default behaviour of not
10191
     permitting the extended IP2022 instructions to be assembled.
10192
 
10193
 
10194

10195
File: as.info,  Node: M32C-Dependent,  Next: M32R-Dependent,  Prev: IP2K-Dependent,  Up: Machine Dependencies
10196
 
10197
9.18 M32C Dependent Features
10198
============================
10199
 
10200
   `as' can assemble code for several different members of the Renesas
10201
M32C family.  Normally the default is to assemble code for the M16C
10202
microprocessor.  The `-m32c' option may be used to change the default
10203
to the M32C microprocessor.
10204
 
10205
* Menu:
10206
 
10207
* M32C-Opts::                   M32C Options
10208
* M32C-Modifiers::              Symbolic Operand Modifiers
10209
 
10210

10211
File: as.info,  Node: M32C-Opts,  Next: M32C-Modifiers,  Up: M32C-Dependent
10212
 
10213
9.18.1 M32C Options
10214
-------------------
10215
 
10216
The Renesas M32C version of `as' has two machine-dependent options:
10217
 
10218
`-m32c'
10219
     Assemble M32C instructions.
10220
 
10221
`-m16c'
10222
     Assemble M16C instructions (default).
10223
 
10224
 
10225

10226
File: as.info,  Node: M32C-Modifiers,  Prev: M32C-Opts,  Up: M32C-Dependent
10227
 
10228
9.18.2 Symbolic Operand Modifiers
10229
---------------------------------
10230
 
10231
The assembler supports several modifiers when using symbol addresses in
10232
M32C instruction operands.  The general syntax is the following:
10233
 
10234
     %modifier(symbol)
10235
 
10236
`%dsp8'
10237
`%dsp16'
10238
     These modifiers override the assembler's assumptions about how big
10239
     a symbol's address is.  Normally, when it sees an operand like
10240
     `sym[a0]' it assumes `sym' may require the widest displacement
10241
     field (16 bits for `-m16c', 24 bits for `-m32c').  These modifiers
10242
     tell it to assume the address will fit in an 8 or 16 bit
10243
     (respectively) unsigned displacement.  Note that, of course, if it
10244
     doesn't actually fit you will get linker errors.  Example:
10245
 
10246
          mov.w %dsp8(sym)[a0],r1
10247
          mov.b #0,%dsp8(sym)[a0]
10248
 
10249
`%hi8'
10250
     This modifier allows you to load bits 16 through 23 of a 24 bit
10251
     address into an 8 bit register.  This is useful with, for example,
10252
     the M16C `smovf' instruction, which expects a 20 bit address in
10253
     `r1h' and `a0'.  Example:
10254
 
10255
          mov.b #%hi8(sym),r1h
10256
          mov.w #%lo16(sym),a0
10257
          smovf.b
10258
 
10259
`%lo16'
10260
     Likewise, this modifier allows you to load bits 0 through 15 of a
10261
     24 bit address into a 16 bit register.
10262
 
10263
`%hi16'
10264
     This modifier allows you to load bits 16 through 31 of a 32 bit
10265
     address into a 16 bit register.  While the M32C family only has 24
10266
     bits of address space, it does support addresses in pairs of 16 bit
10267
     registers (like `a1a0' for the `lde' instruction).  This modifier
10268
     is for loading the upper half in such cases.  Example:
10269
 
10270
          mov.w #%hi16(sym),a1
10271
          mov.w #%lo16(sym),a0
10272
          ...
10273
          lde.w [a1a0],r1
10274
 
10275
 
10276

10277
File: as.info,  Node: M32R-Dependent,  Next: M68K-Dependent,  Prev: M32C-Dependent,  Up: Machine Dependencies
10278
 
10279
9.19 M32R Dependent Features
10280
============================
10281
 
10282
* Menu:
10283
 
10284
* M32R-Opts::                   M32R Options
10285
* M32R-Directives::             M32R Directives
10286
* M32R-Warnings::               M32R Warnings
10287
 
10288

10289
File: as.info,  Node: M32R-Opts,  Next: M32R-Directives,  Up: M32R-Dependent
10290
 
10291
9.19.1 M32R Options
10292
-------------------
10293
 
10294
The Renease M32R version of `as' has a few machine dependent options:
10295
 
10296
`-m32rx'
10297
     `as' can assemble code for several different members of the
10298
     Renesas M32R family.  Normally the default is to assemble code for
10299
     the M32R microprocessor.  This option may be used to change the
10300
     default to the M32RX microprocessor, which adds some more
10301
     instructions to the basic M32R instruction set, and some
10302
     additional parameters to some of the original instructions.
10303
 
10304
`-m32r2'
10305
     This option changes the target processor to the the M32R2
10306
     microprocessor.
10307
 
10308
`-m32r'
10309
     This option can be used to restore the assembler's default
10310
     behaviour of assembling for the M32R microprocessor.  This can be
10311
     useful if the default has been changed by a previous command line
10312
     option.
10313
 
10314
`-little'
10315
     This option tells the assembler to produce little-endian code and
10316
     data.  The default is dependent upon how the toolchain was
10317
     configured.
10318
 
10319
`-EL'
10320
     This is a synonym for _-little_.
10321
 
10322
`-big'
10323
     This option tells the assembler to produce big-endian code and
10324
     data.
10325
 
10326
`-EB'
10327
     This is a synonum for _-big_.
10328
 
10329
`-KPIC'
10330
     This option specifies that the output of the assembler should be
10331
     marked as position-independent code (PIC).
10332
 
10333
`-parallel'
10334
     This option tells the assembler to attempts to combine two
10335
     sequential instructions into a single, parallel instruction, where
10336
     it is legal to do so.
10337
 
10338
`-no-parallel'
10339
     This option disables a previously enabled _-parallel_ option.
10340
 
10341
`-no-bitinst'
10342
     This option disables the support for the extended bit-field
10343
     instructions provided by the M32R2.  If this support needs to be
10344
     re-enabled the _-bitinst_ switch can be used to restore it.
10345
 
10346
`-O'
10347
     This option tells the assembler to attempt to optimize the
10348
     instructions that it produces.  This includes filling delay slots
10349
     and converting sequential instructions into parallel ones.  This
10350
     option implies _-parallel_.
10351
 
10352
`-warn-explicit-parallel-conflicts'
10353
     Instructs `as' to produce warning messages when questionable
10354
     parallel instructions are encountered.  This option is enabled by
10355
     default, but `gcc' disables it when it invokes `as' directly.
10356
     Questionable instructions are those whose behaviour would be
10357
     different if they were executed sequentially.  For example the
10358
     code fragment `mv r1, r2 || mv r3, r1' produces a different result
10359
     from `mv r1, r2 \n mv r3, r1' since the former moves r1 into r3
10360
     and then r2 into r1, whereas the later moves r2 into r1 and r3.
10361
 
10362
`-Wp'
10363
     This is a shorter synonym for the
10364
     _-warn-explicit-parallel-conflicts_ option.
10365
 
10366
`-no-warn-explicit-parallel-conflicts'
10367
     Instructs `as' not to produce warning messages when questionable
10368
     parallel instructions are encountered.
10369
 
10370
`-Wnp'
10371
     This is a shorter synonym for the
10372
     _-no-warn-explicit-parallel-conflicts_ option.
10373
 
10374
`-ignore-parallel-conflicts'
10375
     This option tells the assembler's to stop checking parallel
10376
     instructions for constraint violations.  This ability is provided
10377
     for hardware vendors testing chip designs and should not be used
10378
     under normal circumstances.
10379
 
10380
`-no-ignore-parallel-conflicts'
10381
     This option restores the assembler's default behaviour of checking
10382
     parallel instructions to detect constraint violations.
10383
 
10384
`-Ip'
10385
     This is a shorter synonym for the _-ignore-parallel-conflicts_
10386
     option.
10387
 
10388
`-nIp'
10389
     This is a shorter synonym for the _-no-ignore-parallel-conflicts_
10390
     option.
10391
 
10392
`-warn-unmatched-high'
10393
     This option tells the assembler to produce a warning message if a
10394
     `.high' pseudo op is encountered without a matching `.low' pseudo
10395
     op.  The presence of such an unmatched pseudo op usually indicates
10396
     a programming error.
10397
 
10398
`-no-warn-unmatched-high'
10399
     Disables a previously enabled _-warn-unmatched-high_ option.
10400
 
10401
`-Wuh'
10402
     This is a shorter synonym for the _-warn-unmatched-high_ option.
10403
 
10404
`-Wnuh'
10405
     This is a shorter synonym for the _-no-warn-unmatched-high_ option.
10406
 
10407
 
10408

10409
File: as.info,  Node: M32R-Directives,  Next: M32R-Warnings,  Prev: M32R-Opts,  Up: M32R-Dependent
10410
 
10411
9.19.2 M32R Directives
10412
----------------------
10413
 
10414
The Renease M32R version of `as' has a few architecture specific
10415
directives:
10416
 
10417
`low EXPRESSION'
10418
     The `low' directive computes the value of its expression and
10419
     places the lower 16-bits of the result into the immediate-field of
10420
     the instruction.  For example:
10421
 
10422
             or3   r0, r0, #low(0x12345678) ; compute r0 = r0 | 0x5678
10423
             add3, r0, r0, #low(fred)   ; compute r0 = r0 + low 16-bits of address of fred
10424
 
10425
`high EXPRESSION'
10426
     The `high' directive computes the value of its expression and
10427
     places the upper 16-bits of the result into the immediate-field of
10428
     the instruction.  For example:
10429
 
10430
             seth  r0, #high(0x12345678) ; compute r0 = 0x12340000
10431
             seth, r0, #high(fred)       ; compute r0 = upper 16-bits of address of fred
10432
 
10433
`shigh EXPRESSION'
10434
     The `shigh' directive is very similar to the `high' directive.  It
10435
     also computes the value of its expression and places the upper
10436
     16-bits of the result into the immediate-field of the instruction.
10437
     The difference is that `shigh' also checks to see if the lower
10438
     16-bits could be interpreted as a signed number, and if so it
10439
     assumes that a borrow will occur from the upper-16 bits.  To
10440
     compensate for this the `shigh' directive pre-biases the upper 16
10441
     bit value by adding one to it.  For example:
10442
 
10443
     For example:
10444
 
10445
             seth  r0, #shigh(0x12345678) ; compute r0 = 0x12340000
10446
             seth  r0, #shigh(0x00008000) ; compute r0 = 0x00010000
10447
 
10448
     In the second example the lower 16-bits are 0x8000.  If these are
10449
     treated as a signed value and sign extended to 32-bits then the
10450
     value becomes 0xffff8000.  If this value is then added to
10451
     0x00010000 then the result is 0x00008000.
10452
 
10453
     This behaviour is to allow for the different semantics of the
10454
     `or3' and `add3' instructions.  The `or3' instruction treats its
10455
     16-bit immediate argument as unsigned whereas the `add3' treats
10456
     its 16-bit immediate as a signed value.  So for example:
10457
 
10458
             seth  r0, #shigh(0x00008000)
10459
             add3  r0, r0, #low(0x00008000)
10460
 
10461
     Produces the correct result in r0, whereas:
10462
 
10463
             seth  r0, #shigh(0x00008000)
10464
             or3   r0, r0, #low(0x00008000)
10465
 
10466
     Stores 0xffff8000 into r0.
10467
 
10468
     Note - the `shigh' directive does not know where in the assembly
10469
     source code the lower 16-bits of the value are going set, so it
10470
     cannot check to make sure that an `or3' instruction is being used
10471
     rather than an `add3' instruction.  It is up to the programmer to
10472
     make sure that correct directives are used.
10473
 
10474
`.m32r'
10475
     The directive performs a similar thing as the _-m32r_ command line
10476
     option.  It tells the assembler to only accept M32R instructions
10477
     from now on.  An instructions from later M32R architectures are
10478
     refused.
10479
 
10480
`.m32rx'
10481
     The directive performs a similar thing as the _-m32rx_ command
10482
     line option.  It tells the assembler to start accepting the extra
10483
     instructions in the M32RX ISA as well as the ordinary M32R ISA.
10484
 
10485
`.m32r2'
10486
     The directive performs a similar thing as the _-m32r2_ command
10487
     line option.  It tells the assembler to start accepting the extra
10488
     instructions in the M32R2 ISA as well as the ordinary M32R ISA.
10489
 
10490
`.little'
10491
     The directive performs a similar thing as the _-little_ command
10492
     line option.  It tells the assembler to start producing
10493
     little-endian code and data.  This option should be used with care
10494
     as producing mixed-endian binary files is fraught with danger.
10495
 
10496
`.big'
10497
     The directive performs a similar thing as the _-big_ command line
10498
     option.  It tells the assembler to start producing big-endian code
10499
     and data.  This option should be used with care as producing
10500
     mixed-endian binary files is fraught with danger.
10501
 
10502
 
10503

10504
File: as.info,  Node: M32R-Warnings,  Prev: M32R-Directives,  Up: M32R-Dependent
10505
 
10506
9.19.3 M32R Warnings
10507
--------------------
10508
 
10509
There are several warning and error messages that can be produced by
10510
`as' which are specific to the M32R:
10511
 
10512
`output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?'
10513
     This message is only produced if warnings for explicit parallel
10514
     conflicts have been enabled.  It indicates that the assembler has
10515
     encountered a parallel instruction in which the destination
10516
     register of the left hand instruction is used as an input register
10517
     in the right hand instruction.  For example in this code fragment
10518
     `mv r1, r2 || neg r3, r1' register r1 is the destination of the
10519
     move instruction and the input to the neg instruction.
10520
 
10521
`output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?'
10522
     This message is only produced if warnings for explicit parallel
10523
     conflicts have been enabled.  It indicates that the assembler has
10524
     encountered a parallel instruction in which the destination
10525
     register of the right hand instruction is used as an input
10526
     register in the left hand instruction.  For example in this code
10527
     fragment `mv r1, r2 || neg r2, r3' register r2 is the destination
10528
     of the neg instruction and the input to the move instruction.
10529
 
10530
`instruction `...' is for the M32RX only'
10531
     This message is produced when the assembler encounters an
10532
     instruction which is only supported by the M32Rx processor, and
10533
     the `-m32rx' command line flag has not been specified to allow
10534
     assembly of such instructions.
10535
 
10536
`unknown instruction `...''
10537
     This message is produced when the assembler encounters an
10538
     instruction which it does not recognize.
10539
 
10540
`only the NOP instruction can be issued in parallel on the m32r'
10541
     This message is produced when the assembler encounters a parallel
10542
     instruction which does not involve a NOP instruction and the
10543
     `-m32rx' command line flag has not been specified.  Only the M32Rx
10544
     processor is able to execute two instructions in parallel.
10545
 
10546
`instruction `...' cannot be executed in parallel.'
10547
     This message is produced when the assembler encounters a parallel
10548
     instruction which is made up of one or two instructions which
10549
     cannot be executed in parallel.
10550
 
10551
`Instructions share the same execution pipeline'
10552
     This message is produced when the assembler encounters a parallel
10553
     instruction whoes components both use the same execution pipeline.
10554
 
10555
`Instructions write to the same destination register.'
10556
     This message is produced when the assembler encounters a parallel
10557
     instruction where both components attempt to modify the same
10558
     register.  For example these code fragments will produce this
10559
     message: `mv r1, r2 || neg r1, r3' `jl r0 || mv r14, r1' `st r2,
10560
     @-r1 || mv r1, r3' `mv r1, r2 || ld r0, @r1+' `cmp r1, r2 || addx
10561
     r3, r4' (Both write to the condition bit)
10562
 
10563
 
10564

10565
File: as.info,  Node: M68K-Dependent,  Next: M68HC11-Dependent,  Prev: M32R-Dependent,  Up: Machine Dependencies
10566
 
10567
9.20 M680x0 Dependent Features
10568
==============================
10569
 
10570
* Menu:
10571
 
10572
* M68K-Opts::                   M680x0 Options
10573
* M68K-Syntax::                 Syntax
10574
* M68K-Moto-Syntax::            Motorola Syntax
10575
* M68K-Float::                  Floating Point
10576
* M68K-Directives::             680x0 Machine Directives
10577
* M68K-opcodes::                Opcodes
10578
 
10579

10580
File: as.info,  Node: M68K-Opts,  Next: M68K-Syntax,  Up: M68K-Dependent
10581
 
10582
9.20.1 M680x0 Options
10583
---------------------
10584
 
10585
The Motorola 680x0 version of `as' has a few machine dependent options:
10586
 
10587
`-march=ARCHITECTURE'
10588
     This option specifies a target architecture.  The following
10589
     architectures are recognized: `68000', `68010', `68020', `68030',
10590
     `68040', `68060', `cpu32', `isaa', `isaaplus', `isab', `isac' and
10591
     `cfv4e'.
10592
 
10593
`-mcpu=CPU'
10594
     This option specifies a target cpu.  When used in conjunction with
10595
     the `-march' option, the cpu must be within the specified
10596
     architecture.  Also, the generic features of the architecture are
10597
     used for instruction generation, rather than those of the specific
10598
     chip.
10599
 
10600
`-m[no-]68851'
10601
 
10602
`-m[no-]68881'
10603
 
10604
`-m[no-]div'
10605
 
10606
`-m[no-]usp'
10607
 
10608
`-m[no-]float'
10609
 
10610
`-m[no-]mac'
10611
 
10612
`-m[no-]emac'
10613
     Enable or disable various architecture specific features.  If a
10614
     chip or architecture by default supports an option (for instance
10615
     `-march=isaaplus' includes the `-mdiv' option), explicitly
10616
     disabling the option will override the default.
10617
 
10618
`-l'
10619
     You can use the `-l' option to shorten the size of references to
10620
     undefined symbols.  If you do not use the `-l' option, references
10621
     to undefined symbols are wide enough for a full `long' (32 bits).
10622
     (Since `as' cannot know where these symbols end up, `as' can only
10623
     allocate space for the linker to fill in later.  Since `as' does
10624
     not know how far away these symbols are, it allocates as much
10625
     space as it can.)  If you use this option, the references are only
10626
     one word wide (16 bits).  This may be useful if you want the
10627
     object file to be as small as possible, and you know that the
10628
     relevant symbols are always less than 17 bits away.
10629
 
10630
`--register-prefix-optional'
10631
     For some configurations, especially those where the compiler
10632
     normally does not prepend an underscore to the names of user
10633
     variables, the assembler requires a `%' before any use of a
10634
     register name.  This is intended to let the assembler distinguish
10635
     between C variables and functions named `a0' through `a7', and so
10636
     on.  The `%' is always accepted, but is not required for certain
10637
     configurations, notably `sun3'.  The `--register-prefix-optional'
10638
     option may be used to permit omitting the `%' even for
10639
     configurations for which it is normally required.  If this is
10640
     done, it will generally be impossible to refer to C variables and
10641
     functions with the same names as register names.
10642
 
10643
`--bitwise-or'
10644
     Normally the character `|' is treated as a comment character, which
10645
     means that it can not be used in expressions.  The `--bitwise-or'
10646
     option turns `|' into a normal character.  In this mode, you must
10647
     either use C style comments, or start comments with a `#' character
10648
     at the beginning of a line.
10649
 
10650
`--base-size-default-16  --base-size-default-32'
10651
     If you use an addressing mode with a base register without
10652
     specifying the size, `as' will normally use the full 32 bit value.
10653
     For example, the addressing mode `%a0@(%d0)' is equivalent to
10654
     `%a0@(%d0:l)'.  You may use the `--base-size-default-16' option to
10655
     tell `as' to default to using the 16 bit value.  In this case,
10656
     `%a0@(%d0)' is equivalent to `%a0@(%d0:w)'.  You may use the
10657
     `--base-size-default-32' option to restore the default behaviour.
10658
 
10659
`--disp-size-default-16  --disp-size-default-32'
10660
     If you use an addressing mode with a displacement, and the value
10661
     of the displacement is not known, `as' will normally assume that
10662
     the value is 32 bits.  For example, if the symbol `disp' has not
10663
     been defined, `as' will assemble the addressing mode
10664
     `%a0@(disp,%d0)' as though `disp' is a 32 bit value.  You may use
10665
     the `--disp-size-default-16' option to tell `as' to instead assume
10666
     that the displacement is 16 bits.  In this case, `as' will
10667
     assemble `%a0@(disp,%d0)' as though `disp' is a 16 bit value.  You
10668
     may use the `--disp-size-default-32' option to restore the default
10669
     behaviour.
10670
 
10671
`--pcrel'
10672
     Always keep branches PC-relative.  In the M680x0 architecture all
10673
     branches are defined as PC-relative.  However, on some processors
10674
     they are limited to word displacements maximum.  When `as' needs a
10675
     long branch that is not available, it normally emits an absolute
10676
     jump instead.  This option disables this substitution.  When this
10677
     option is given and no long branches are available, only word
10678
     branches will be emitted.  An error message will be generated if a
10679
     word branch cannot reach its target.  This option has no effect on
10680
     68020 and other processors that have long branches.  *note Branch
10681
     Improvement: M68K-Branch.
10682
 
10683
`-m68000'
10684
     `as' can assemble code for several different members of the
10685
     Motorola 680x0 family.  The default depends upon how `as' was
10686
     configured when it was built; normally, the default is to assemble
10687
     code for the 68020 microprocessor.  The following options may be
10688
     used to change the default.  These options control which
10689
     instructions and addressing modes are permitted.  The members of
10690
     the 680x0 family are very similar.  For detailed information about
10691
     the differences, see the Motorola manuals.
10692
 
10693
    `-m68000'
10694
    `-m68ec000'
10695
    `-m68hc000'
10696
    `-m68hc001'
10697
    `-m68008'
10698
    `-m68302'
10699
    `-m68306'
10700
    `-m68307'
10701
    `-m68322'
10702
    `-m68356'
10703
          Assemble for the 68000. `-m68008', `-m68302', and so on are
10704
          synonyms for `-m68000', since the chips are the same from the
10705
          point of view of the assembler.
10706
 
10707
    `-m68010'
10708
          Assemble for the 68010.
10709
 
10710
    `-m68020'
10711
    `-m68ec020'
10712
          Assemble for the 68020.  This is normally the default.
10713
 
10714
    `-m68030'
10715
    `-m68ec030'
10716
          Assemble for the 68030.
10717
 
10718
    `-m68040'
10719
    `-m68ec040'
10720
          Assemble for the 68040.
10721
 
10722
    `-m68060'
10723
    `-m68ec060'
10724
          Assemble for the 68060.
10725
 
10726
    `-mcpu32'
10727
    `-m68330'
10728
    `-m68331'
10729
    `-m68332'
10730
    `-m68333'
10731
    `-m68334'
10732
    `-m68336'
10733
    `-m68340'
10734
    `-m68341'
10735
    `-m68349'
10736
    `-m68360'
10737
          Assemble for the CPU32 family of chips.
10738
 
10739
    `-m5200'
10740
 
10741
    `-m5202'
10742
 
10743
    `-m5204'
10744
 
10745
    `-m5206'
10746
 
10747
    `-m5206e'
10748
 
10749
    `-m521x'
10750
 
10751
    `-m5249'
10752
 
10753
    `-m528x'
10754
 
10755
    `-m5307'
10756
 
10757
    `-m5407'
10758
 
10759
    `-m547x'
10760
 
10761
    `-m548x'
10762
 
10763
    `-mcfv4'
10764
 
10765
    `-mcfv4e'
10766
          Assemble for the ColdFire family of chips.
10767
 
10768
    `-m68881'
10769
    `-m68882'
10770
          Assemble 68881 floating point instructions.  This is the
10771
          default for the 68020, 68030, and the CPU32.  The 68040 and
10772
          68060 always support floating point instructions.
10773
 
10774
    `-mno-68881'
10775
          Do not assemble 68881 floating point instructions.  This is
10776
          the default for 68000 and the 68010.  The 68040 and 68060
10777
          always support floating point instructions, even if this
10778
          option is used.
10779
 
10780
    `-m68851'
10781
          Assemble 68851 MMU instructions.  This is the default for the
10782
          68020, 68030, and 68060.  The 68040 accepts a somewhat
10783
          different set of MMU instructions; `-m68851' and `-m68040'
10784
          should not be used together.
10785
 
10786
    `-mno-68851'
10787
          Do not assemble 68851 MMU instructions.  This is the default
10788
          for the 68000, 68010, and the CPU32.  The 68040 accepts a
10789
          somewhat different set of MMU instructions.
10790
 
10791

10792
File: as.info,  Node: M68K-Syntax,  Next: M68K-Moto-Syntax,  Prev: M68K-Opts,  Up: M68K-Dependent
10793
 
10794
9.20.2 Syntax
10795
-------------
10796
 
10797
This syntax for the Motorola 680x0 was developed at MIT.
10798
 
10799
   The 680x0 version of `as' uses instructions names and syntax
10800
compatible with the Sun assembler.  Intervening periods are ignored;
10801
for example, `movl' is equivalent to `mov.l'.
10802
 
10803
   In the following table APC stands for any of the address registers
10804
(`%a0' through `%a7'), the program counter (`%pc'), the zero-address
10805
relative to the program counter (`%zpc'), a suppressed address register
10806
(`%za0' through `%za7'), or it may be omitted entirely.  The use of
10807
SIZE means one of `w' or `l', and it may be omitted, along with the
10808
leading colon, unless a scale is also specified.  The use of SCALE
10809
means one of `1', `2', `4', or `8', and it may always be omitted along
10810
with the leading colon.
10811
 
10812
   The following addressing modes are understood:
10813
"Immediate"
10814
     `#NUMBER'
10815
 
10816
"Data Register"
10817
     `%d0' through `%d7'
10818
 
10819
"Address Register"
10820
     `%a0' through `%a7'
10821
     `%a7' is also known as `%sp', i.e., the Stack Pointer.  `%a6' is
10822
     also known as `%fp', the Frame Pointer.
10823
 
10824
"Address Register Indirect"
10825
     `%a0@' through `%a7@'
10826
 
10827
"Address Register Postincrement"
10828
     `%a0@+' through `%a7@+'
10829
 
10830
"Address Register Predecrement"
10831
     `%a0@-' through `%a7@-'
10832
 
10833
"Indirect Plus Offset"
10834
     `APC@(NUMBER)'
10835
 
10836
"Index"
10837
     `APC@(NUMBER,REGISTER:SIZE:SCALE)'
10838
 
10839
     The NUMBER may be omitted.
10840
 
10841
"Postindex"
10842
     `APC@(NUMBER)@(ONUMBER,REGISTER:SIZE:SCALE)'
10843
 
10844
     The ONUMBER or the REGISTER, but not both, may be omitted.
10845
 
10846
"Preindex"
10847
     `APC@(NUMBER,REGISTER:SIZE:SCALE)@(ONUMBER)'
10848
 
10849
     The NUMBER may be omitted.  Omitting the REGISTER produces the
10850
     Postindex addressing mode.
10851
 
10852
"Absolute"
10853
     `SYMBOL', or `DIGITS', optionally followed by `:b', `:w', or `:l'.
10854
 
10855

10856
File: as.info,  Node: M68K-Moto-Syntax,  Next: M68K-Float,  Prev: M68K-Syntax,  Up: M68K-Dependent
10857
 
10858
9.20.3 Motorola Syntax
10859
----------------------
10860
 
10861
The standard Motorola syntax for this chip differs from the syntax
10862
already discussed (*note Syntax: M68K-Syntax.).  `as' can accept
10863
Motorola syntax for operands, even if MIT syntax is used for other
10864
operands in the same instruction.  The two kinds of syntax are fully
10865
compatible.
10866
 
10867
   In the following table APC stands for any of the address registers
10868
(`%a0' through `%a7'), the program counter (`%pc'), the zero-address
10869
relative to the program counter (`%zpc'), or a suppressed address
10870
register (`%za0' through `%za7').  The use of SIZE means one of `w' or
10871
`l', and it may always be omitted along with the leading dot.  The use
10872
of SCALE means one of `1', `2', `4', or `8', and it may always be
10873
omitted along with the leading asterisk.
10874
 
10875
   The following additional addressing modes are understood:
10876
 
10877
"Address Register Indirect"
10878
     `(%a0)' through `(%a7)'
10879
     `%a7' is also known as `%sp', i.e., the Stack Pointer.  `%a6' is
10880
     also known as `%fp', the Frame Pointer.
10881
 
10882
"Address Register Postincrement"
10883
     `(%a0)+' through `(%a7)+'
10884
 
10885
"Address Register Predecrement"
10886
     `-(%a0)' through `-(%a7)'
10887
 
10888
"Indirect Plus Offset"
10889
     `NUMBER(%A0)' through `NUMBER(%A7)', or `NUMBER(%PC)'.
10890
 
10891
     The NUMBER may also appear within the parentheses, as in
10892
     `(NUMBER,%A0)'.  When used with the PC, the NUMBER may be omitted
10893
     (with an address register, omitting the NUMBER produces Address
10894
     Register Indirect mode).
10895
 
10896
"Index"
10897
     `NUMBER(APC,REGISTER.SIZE*SCALE)'
10898
 
10899
     The NUMBER may be omitted, or it may appear within the
10900
     parentheses.  The APC may be omitted.  The REGISTER and the APC
10901
     may appear in either order.  If both APC and REGISTER are address
10902
     registers, and the SIZE and SCALE are omitted, then the first
10903
     register is taken as the base register, and the second as the
10904
     index register.
10905
 
10906
"Postindex"
10907
     `([NUMBER,APC],REGISTER.SIZE*SCALE,ONUMBER)'
10908
 
10909
     The ONUMBER, or the REGISTER, or both, may be omitted.  Either the
10910
     NUMBER or the APC may be omitted, but not both.
10911
 
10912
"Preindex"
10913
     `([NUMBER,APC,REGISTER.SIZE*SCALE],ONUMBER)'
10914
 
10915
     The NUMBER, or the APC, or the REGISTER, or any two of them, may
10916
     be omitted.  The ONUMBER may be omitted.  The REGISTER and the APC
10917
     may appear in either order.  If both APC and REGISTER are address
10918
     registers, and the SIZE and SCALE are omitted, then the first
10919
     register is taken as the base register, and the second as the
10920
     index register.
10921
 
10922

10923
File: as.info,  Node: M68K-Float,  Next: M68K-Directives,  Prev: M68K-Moto-Syntax,  Up: M68K-Dependent
10924
 
10925
9.20.4 Floating Point
10926
---------------------
10927
 
10928
Packed decimal (P) format floating literals are not supported.  Feel
10929
free to add the code!
10930
 
10931
   The floating point formats generated by directives are these.
10932
 
10933
`.float'
10934
     `Single' precision floating point constants.
10935
 
10936
`.double'
10937
     `Double' precision floating point constants.
10938
 
10939
`.extend'
10940
`.ldouble'
10941
     `Extended' precision (`long double') floating point constants.
10942
 
10943

10944
File: as.info,  Node: M68K-Directives,  Next: M68K-opcodes,  Prev: M68K-Float,  Up: M68K-Dependent
10945
 
10946
9.20.5 680x0 Machine Directives
10947
-------------------------------
10948
 
10949
In order to be compatible with the Sun assembler the 680x0 assembler
10950
understands the following directives.
10951
 
10952
`.data1'
10953
     This directive is identical to a `.data 1' directive.
10954
 
10955
`.data2'
10956
     This directive is identical to a `.data 2' directive.
10957
 
10958
`.even'
10959
     This directive is a special case of the `.align' directive; it
10960
     aligns the output to an even byte boundary.
10961
 
10962
`.skip'
10963
     This directive is identical to a `.space' directive.
10964
 
10965
`.arch NAME'
10966
     Select the target architecture and extension features.  Valid
10967
     values for NAME are the same as for the `-march' command line
10968
     option.  This directive cannot be specified after any instructions
10969
     have been assembled.  If it is given multiple times, or in
10970
     conjunction with the `-march' option, all uses must be for the
10971
     same architecture and extension set.
10972
 
10973
`.cpu NAME'
10974
     Select the target cpu.  Valid valuse for NAME are the same as for
10975
     the `-mcpu' command line option.  This directive cannot be
10976
     specified after any instructions have been assembled.  If it is
10977
     given multiple times, or in conjunction with the `-mopt' option,
10978
     all uses must be for the same cpu.
10979
 
10980
 
10981

10982
File: as.info,  Node: M68K-opcodes,  Prev: M68K-Directives,  Up: M68K-Dependent
10983
 
10984
9.20.6 Opcodes
10985
--------------
10986
 
10987
* Menu:
10988
 
10989
* M68K-Branch::                 Branch Improvement
10990
* M68K-Chars::                  Special Characters
10991
 
10992

10993
File: as.info,  Node: M68K-Branch,  Next: M68K-Chars,  Up: M68K-opcodes
10994
 
10995
9.20.6.1 Branch Improvement
10996
...........................
10997
 
10998
Certain pseudo opcodes are permitted for branch instructions.  They
10999
expand to the shortest branch instruction that reach the target.
11000
Generally these mnemonics are made by substituting `j' for `b' at the
11001
start of a Motorola mnemonic.
11002
 
11003
   The following table summarizes the pseudo-operations.  A `*' flags
11004
cases that are more fully described after the table:
11005
 
11006
               Displacement
11007
               +------------------------------------------------------------
11008
               |                68020           68000/10, not PC-relative OK
11009
     Pseudo-Op |BYTE    WORD    LONG            ABSOLUTE LONG JUMP    **
11010
               +------------------------------------------------------------
11011
          jbsr |bsrs    bsrw    bsrl            jsr
11012
           jra |bras    braw    bral            jmp
11013
     *     jXX |bXXs    bXXw    bXXl            bNXs;jmp
11014
     *    dbXX | N/A    dbXXw   dbXX;bras;bral  dbXX;bras;jmp
11015
          fjXX | N/A    fbXXw   fbXXl            N/A
11016
 
11017
     XX: condition
11018
     NX: negative of condition XX
11019
                       `*'--see full description below
11020
         `**'--this expansion mode is disallowed by `--pcrel'
11021
 
11022
`jbsr'
11023
`jra'
11024
     These are the simplest jump pseudo-operations; they always map to
11025
     one particular machine instruction, depending on the displacement
11026
     to the branch target.  This instruction will be a byte or word
11027
     branch is that is sufficient.  Otherwise, a long branch will be
11028
     emitted if available.  If no long branches are available and the
11029
     `--pcrel' option is not given, an absolute long jump will be
11030
     emitted instead.  If no long branches are available, the `--pcrel'
11031
     option is given, and a word branch cannot reach the target, an
11032
     error message is generated.
11033
 
11034
     In addition to standard branch operands, `as' allows these
11035
     pseudo-operations to have all operands that are allowed for jsr
11036
     and jmp, substituting these instructions if the operand given is
11037
     not valid for a branch instruction.
11038
 
11039
`jXX'
11040
     Here, `jXX' stands for an entire family of pseudo-operations,
11041
     where XX is a conditional branch or condition-code test.  The full
11042
     list of pseudo-ops in this family is:
11043
           jhi   jls   jcc   jcs   jne   jeq   jvc
11044
           jvs   jpl   jmi   jge   jlt   jgt   jle
11045
 
11046
     Usually, each of these pseudo-operations expands to a single branch
11047
     instruction.  However, if a word branch is not sufficient, no long
11048
     branches are available, and the `--pcrel' option is not given, `as'
11049
     issues a longer code fragment in terms of NX, the opposite
11050
     condition to XX.  For example, under these conditions:
11051
              jXX foo
11052
     gives
11053
               bNXs oof
11054
               jmp foo
11055
           oof:
11056
 
11057
`dbXX'
11058
     The full family of pseudo-operations covered here is
11059
           dbhi   dbls   dbcc   dbcs   dbne   dbeq   dbvc
11060
           dbvs   dbpl   dbmi   dbge   dblt   dbgt   dble
11061
           dbf    dbra   dbt
11062
 
11063
     Motorola `dbXX' instructions allow word displacements only.  When
11064
     a word displacement is sufficient, each of these pseudo-operations
11065
     expands to the corresponding Motorola instruction.  When a word
11066
     displacement is not sufficient and long branches are available,
11067
     when the source reads `dbXX foo', `as' emits
11068
               dbXX oo1
11069
               bras oo2
11070
           oo1:bral foo
11071
           oo2:
11072
 
11073
     If, however, long branches are not available and the `--pcrel'
11074
     option is not given, `as' emits
11075
               dbXX oo1
11076
               bras oo2
11077
           oo1:jmp foo
11078
           oo2:
11079
 
11080
`fjXX'
11081
     This family includes
11082
           fjne   fjeq   fjge   fjlt   fjgt   fjle   fjf
11083
           fjt    fjgl   fjgle  fjnge  fjngl  fjngle fjngt
11084
           fjnle  fjnlt  fjoge  fjogl  fjogt  fjole  fjolt
11085
           fjor   fjseq  fjsf   fjsne  fjst   fjueq  fjuge
11086
           fjugt  fjule  fjult  fjun
11087
 
11088
     Each of these pseudo-operations always expands to a single Motorola
11089
     coprocessor branch instruction, word or long.  All Motorola
11090
     coprocessor branch instructions allow both word and long
11091
     displacements.
11092
 
11093
 
11094

11095
File: as.info,  Node: M68K-Chars,  Prev: M68K-Branch,  Up: M68K-opcodes
11096
 
11097
9.20.6.2 Special Characters
11098
...........................
11099
 
11100
The immediate character is `#' for Sun compatibility.  The line-comment
11101
character is `|' (unless the `--bitwise-or' option is used).  If a `#'
11102
appears at the beginning of a line, it is treated as a comment unless
11103
it looks like `# line file', in which case it is treated normally.
11104
 
11105

11106
File: as.info,  Node: M68HC11-Dependent,  Next: MIPS-Dependent,  Prev: M68K-Dependent,  Up: Machine Dependencies
11107
 
11108
9.21 M68HC11 and M68HC12 Dependent Features
11109
===========================================
11110
 
11111
* Menu:
11112
 
11113
* M68HC11-Opts::                   M68HC11 and M68HC12 Options
11114
* M68HC11-Syntax::                 Syntax
11115
* M68HC11-Modifiers::              Symbolic Operand Modifiers
11116
* M68HC11-Directives::             Assembler Directives
11117
* M68HC11-Float::                  Floating Point
11118
* M68HC11-opcodes::                Opcodes
11119
 
11120

11121
File: as.info,  Node: M68HC11-Opts,  Next: M68HC11-Syntax,  Up: M68HC11-Dependent
11122
 
11123
9.21.1 M68HC11 and M68HC12 Options
11124
----------------------------------
11125
 
11126
The Motorola 68HC11 and 68HC12 version of `as' have a few machine
11127
dependent options.
11128
 
11129
`-m68hc11'
11130
     This option switches the assembler in the M68HC11 mode. In this
11131
     mode, the assembler only accepts 68HC11 operands and mnemonics. It
11132
     produces code for the 68HC11.
11133
 
11134
`-m68hc12'
11135
     This option switches the assembler in the M68HC12 mode. In this
11136
     mode, the assembler also accepts 68HC12 operands and mnemonics. It
11137
     produces code for the 68HC12. A few 68HC11 instructions are
11138
     replaced by some 68HC12 instructions as recommended by Motorola
11139
     specifications.
11140
 
11141
`-m68hcs12'
11142
     This option switches the assembler in the M68HCS12 mode.  This
11143
     mode is similar to `-m68hc12' but specifies to assemble for the
11144
     68HCS12 series.  The only difference is on the assembling of the
11145
     `movb' and `movw' instruction when a PC-relative operand is used.
11146
 
11147
`-mshort'
11148
     This option controls the ABI and indicates to use a 16-bit integer
11149
     ABI.  It has no effect on the assembled instructions.  This is the
11150
     default.
11151
 
11152
`-mlong'
11153
     This option controls the ABI and indicates to use a 32-bit integer
11154
     ABI.
11155
 
11156
`-mshort-double'
11157
     This option controls the ABI and indicates to use a 32-bit float
11158
     ABI.  This is the default.
11159
 
11160
`-mlong-double'
11161
     This option controls the ABI and indicates to use a 64-bit float
11162
     ABI.
11163
 
11164
`--strict-direct-mode'
11165
     You can use the `--strict-direct-mode' option to disable the
11166
     automatic translation of direct page mode addressing into extended
11167
     mode when the instruction does not support direct mode.  For
11168
     example, the `clr' instruction does not support direct page mode
11169
     addressing. When it is used with the direct page mode, `as' will
11170
     ignore it and generate an absolute addressing.  This option
11171
     prevents `as' from doing this, and the wrong usage of the direct
11172
     page mode will raise an error.
11173
 
11174
`--short-branches'
11175
     The `--short-branches' option turns off the translation of
11176
     relative branches into absolute branches when the branch offset is
11177
     out of range. By default `as' transforms the relative branch
11178
     (`bsr', `bgt', `bge', `beq', `bne', `ble', `blt', `bhi', `bcc',
11179
     `bls', `bcs', `bmi', `bvs', `bvs', `bra') into an absolute branch
11180
     when the offset is out of the -128 .. 127 range.  In that case,
11181
     the `bsr' instruction is translated into a `jsr', the `bra'
11182
     instruction is translated into a `jmp' and the conditional
11183
     branches instructions are inverted and followed by a `jmp'. This
11184
     option disables these translations and `as' will generate an error
11185
     if a relative branch is out of range. This option does not affect
11186
     the optimization associated to the `jbra', `jbsr' and `jbXX'
11187
     pseudo opcodes.
11188
 
11189
`--force-long-branches'
11190
     The `--force-long-branches' option forces the translation of
11191
     relative branches into absolute branches. This option does not
11192
     affect the optimization associated to the `jbra', `jbsr' and
11193
     `jbXX' pseudo opcodes.
11194
 
11195
`--print-insn-syntax'
11196
     You can use the `--print-insn-syntax' option to obtain the syntax
11197
     description of the instruction when an error is detected.
11198
 
11199
`--print-opcodes'
11200
     The `--print-opcodes' option prints the list of all the
11201
     instructions with their syntax. The first item of each line
11202
     represents the instruction name and the rest of the line indicates
11203
     the possible operands for that instruction. The list is printed in
11204
     alphabetical order. Once the list is printed `as' exits.
11205
 
11206
`--generate-example'
11207
     The `--generate-example' option is similar to `--print-opcodes'
11208
     but it generates an example for each instruction instead.
11209
 
11210

11211
File: as.info,  Node: M68HC11-Syntax,  Next: M68HC11-Modifiers,  Prev: M68HC11-Opts,  Up: M68HC11-Dependent
11212
 
11213
9.21.2 Syntax
11214
-------------
11215
 
11216
In the M68HC11 syntax, the instruction name comes first and it may be
11217
followed by one or several operands (up to three). Operands are
11218
separated by comma (`,'). In the normal mode, `as' will complain if too
11219
many operands are specified for a given instruction. In the MRI mode
11220
(turned on with `-M' option), it will treat them as comments. Example:
11221
 
11222
     inx
11223
     lda  #23
11224
     bset 2,x #4
11225
     brclr *bot #8 foo
11226
 
11227
   The following addressing modes are understood for 68HC11 and 68HC12:
11228
"Immediate"
11229
     `#NUMBER'
11230
 
11231
"Address Register"
11232
     `NUMBER,X', `NUMBER,Y'
11233
 
11234
     The NUMBER may be omitted in which case 0 is assumed.
11235
 
11236
"Direct Addressing mode"
11237
     `*SYMBOL', or `*DIGITS'
11238
 
11239
"Absolute"
11240
     `SYMBOL', or `DIGITS'
11241
 
11242
   The M68HC12 has other more complex addressing modes. All of them are
11243
supported and they are represented below:
11244
 
11245
"Constant Offset Indexed Addressing Mode"
11246
     `NUMBER,REG'
11247
 
11248
     The NUMBER may be omitted in which case 0 is assumed.  The
11249
     register can be either `X', `Y', `SP' or `PC'.  The assembler will
11250
     use the smaller post-byte definition according to the constant
11251
     value (5-bit constant offset, 9-bit constant offset or 16-bit
11252
     constant offset).  If the constant is not known by the assembler
11253
     it will use the 16-bit constant offset post-byte and the value
11254
     will be resolved at link time.
11255
 
11256
"Offset Indexed Indirect"
11257
     `[NUMBER,REG]'
11258
 
11259
     The register can be either `X', `Y', `SP' or `PC'.
11260
 
11261
"Auto Pre-Increment/Pre-Decrement/Post-Increment/Post-Decrement"
11262
     `NUMBER,-REG' `NUMBER,+REG' `NUMBER,REG-' `NUMBER,REG+'
11263
 
11264
     The number must be in the range `-8'..`+8' and must not be 0.  The
11265
     register can be either `X', `Y', `SP' or `PC'.
11266
 
11267
"Accumulator Offset"
11268
     `ACC,REG'
11269
 
11270
     The accumulator register can be either `A', `B' or `D'.  The
11271
     register can be either `X', `Y', `SP' or `PC'.
11272
 
11273
"Accumulator D offset indexed-indirect"
11274
     `[D,REG]'
11275
 
11276
     The register can be either `X', `Y', `SP' or `PC'.
11277
 
11278
 
11279
   For example:
11280
 
11281
     ldab 1024,sp
11282
     ldd [10,x]
11283
     orab 3,+x
11284
     stab -2,y-
11285
     ldx a,pc
11286
     sty [d,sp]
11287
 
11288

11289
File: as.info,  Node: M68HC11-Modifiers,  Next: M68HC11-Directives,  Prev: M68HC11-Syntax,  Up: M68HC11-Dependent
11290
 
11291
9.21.3 Symbolic Operand Modifiers
11292
---------------------------------
11293
 
11294
The assembler supports several modifiers when using symbol addresses in
11295
68HC11 and 68HC12 instruction operands.  The general syntax is the
11296
following:
11297
 
11298
     %modifier(symbol)
11299
 
11300
`%addr'
11301
     This modifier indicates to the assembler and linker to use the
11302
     16-bit physical address corresponding to the symbol.  This is
11303
     intended to be used on memory window systems to map a symbol in
11304
     the memory bank window.  If the symbol is in a memory expansion
11305
     part, the physical address corresponds to the symbol address
11306
     within the memory bank window.  If the symbol is not in a memory
11307
     expansion part, this is the symbol address (using or not using the
11308
     %addr modifier has no effect in that case).
11309
 
11310
`%page'
11311
     This modifier indicates to use the memory page number corresponding
11312
     to the symbol.  If the symbol is in a memory expansion part, its
11313
     page number is computed by the linker as a number used to map the
11314
     page containing the symbol in the memory bank window.  If the
11315
     symbol is not in a memory expansion part, the page number is 0.
11316
 
11317
`%hi'
11318
     This modifier indicates to use the 8-bit high part of the physical
11319
     address of the symbol.
11320
 
11321
`%lo'
11322
     This modifier indicates to use the 8-bit low part of the physical
11323
     address of the symbol.
11324
 
11325
 
11326
   For example a 68HC12 call to a function `foo_example' stored in
11327
memory expansion part could be written as follows:
11328
 
11329
     call %addr(foo_example),%page(foo_example)
11330
 
11331
   and this is equivalent to
11332
 
11333
     call foo_example
11334
 
11335
   And for 68HC11 it could be written as follows:
11336
 
11337
     ldab #%page(foo_example)
11338
     stab _page_switch
11339
     jsr  %addr(foo_example)
11340
 
11341

11342
File: as.info,  Node: M68HC11-Directives,  Next: M68HC11-Float,  Prev: M68HC11-Modifiers,  Up: M68HC11-Dependent
11343
 
11344
9.21.4 Assembler Directives
11345
---------------------------
11346
 
11347
The 68HC11 and 68HC12 version of `as' have the following specific
11348
assembler directives:
11349
 
11350
`.relax'
11351
     The relax directive is used by the `GNU Compiler' to emit a
11352
     specific relocation to mark a group of instructions for linker
11353
     relaxation.  The sequence of instructions within the group must be
11354
     known to the linker so that relaxation can be performed.
11355
 
11356
`.mode [mshort|mlong|mshort-double|mlong-double]'
11357
     This directive specifies the ABI.  It overrides the `-mshort',
11358
     `-mlong', `-mshort-double' and `-mlong-double' options.
11359
 
11360
`.far SYMBOL'
11361
     This directive marks the symbol as a `far' symbol meaning that it
11362
     uses a `call/rtc' calling convention as opposed to `jsr/rts'.
11363
     During a final link, the linker will identify references to the
11364
     `far' symbol and will verify the proper calling convention.
11365
 
11366
`.interrupt SYMBOL'
11367
     This directive marks the symbol as an interrupt entry point.  This
11368
     information is then used by the debugger to correctly unwind the
11369
     frame across interrupts.
11370
 
11371
`.xrefb SYMBOL'
11372
     This directive is defined for compatibility with the
11373
     `Specification for Motorola 8 and 16-Bit Assembly Language Input
11374
     Standard' and is ignored.
11375
 
11376
 
11377

11378
File: as.info,  Node: M68HC11-Float,  Next: M68HC11-opcodes,  Prev: M68HC11-Directives,  Up: M68HC11-Dependent
11379
 
11380
9.21.5 Floating Point
11381
---------------------
11382
 
11383
Packed decimal (P) format floating literals are not supported.  Feel
11384
free to add the code!
11385
 
11386
   The floating point formats generated by directives are these.
11387
 
11388
`.float'
11389
     `Single' precision floating point constants.
11390
 
11391
`.double'
11392
     `Double' precision floating point constants.
11393
 
11394
`.extend'
11395
`.ldouble'
11396
     `Extended' precision (`long double') floating point constants.
11397
 
11398

11399
File: as.info,  Node: M68HC11-opcodes,  Prev: M68HC11-Float,  Up: M68HC11-Dependent
11400
 
11401
9.21.6 Opcodes
11402
--------------
11403
 
11404
* Menu:
11405
 
11406
* M68HC11-Branch::                 Branch Improvement
11407
 
11408

11409
File: as.info,  Node: M68HC11-Branch,  Up: M68HC11-opcodes
11410
 
11411
9.21.6.1 Branch Improvement
11412
...........................
11413
 
11414
Certain pseudo opcodes are permitted for branch instructions.  They
11415
expand to the shortest branch instruction that reach the target.
11416
Generally these mnemonics are made by prepending `j' to the start of
11417
Motorola mnemonic. These pseudo opcodes are not affected by the
11418
`--short-branches' or `--force-long-branches' options.
11419
 
11420
   The following table summarizes the pseudo-operations.
11421
 
11422
                             Displacement Width
11423
          +-------------------------------------------------------------+
11424
          |                     Options                                 |
11425
          |    --short-branches           --force-long-branches         |
11426
          +--------------------------+----------------------------------+
11427
       Op |BYTE             WORD     | BYTE          WORD               |
11428
          +--------------------------+----------------------------------+
11429
      bsr | bsr       |               jsr           |
11430
      bra | bra       |               jmp           |
11431
     jbsr | bsr    jsr  | bsr   jsr           |
11432
     jbra | bra    jmp  | bra   jmp           |
11433
      bXX | bXX       |               bNX +3; jmp   |
11434
     jbXX | bXX    bNX +3;   | bXX   bNX +3; jmp   |
11435
          |                jmp  |                                  |
11436
          +--------------------------+----------------------------------+
11437
     XX: condition
11438
     NX: negative of condition XX
11439
 
11440
`jbsr'
11441
`jbra'
11442
     These are the simplest jump pseudo-operations; they always map to
11443
     one particular machine instruction, depending on the displacement
11444
     to the branch target.
11445
 
11446
`jbXX'
11447
     Here, `jbXX' stands for an entire family of pseudo-operations,
11448
     where XX is a conditional branch or condition-code test.  The full
11449
     list of pseudo-ops in this family is:
11450
           jbcc   jbeq   jbge   jbgt   jbhi   jbvs   jbpl  jblo
11451
           jbcs   jbne   jblt   jble   jbls   jbvc   jbmi
11452
 
11453
     For the cases of non-PC relative displacements and long
11454
     displacements, `as' issues a longer code fragment in terms of NX,
11455
     the opposite condition to XX.  For example, for the non-PC
11456
     relative case:
11457
              jbXX foo
11458
     gives
11459
               bNXs oof
11460
               jmp foo
11461
           oof:
11462
 
11463
 
11464

11465
File: as.info,  Node: MIPS-Dependent,  Next: MMIX-Dependent,  Prev: M68HC11-Dependent,  Up: Machine Dependencies
11466
 
11467
9.22 MIPS Dependent Features
11468
============================
11469
 
11470
   GNU `as' for MIPS architectures supports several different MIPS
11471
processors, and MIPS ISA levels I through V, MIPS32, and MIPS64.  For
11472
information about the MIPS instruction set, see `MIPS RISC
11473
Architecture', by Kane and Heindrich (Prentice-Hall).  For an overview
11474
of MIPS assembly conventions, see "Appendix D: Assembly Language
11475
Programming" in the same work.
11476
 
11477
* Menu:
11478
 
11479
* MIPS Opts::           Assembler options
11480
* MIPS Object::         ECOFF object code
11481
* MIPS Stabs::          Directives for debugging information
11482
* MIPS ISA::            Directives to override the ISA level
11483
* MIPS symbol sizes::   Directives to override the size of symbols
11484
* MIPS autoextend::     Directives for extending MIPS 16 bit instructions
11485
* MIPS insn::           Directive to mark data as an instruction
11486
* MIPS option stack::   Directives to save and restore options
11487
* MIPS ASE instruction generation overrides:: Directives to control
11488
                        generation of MIPS ASE instructions
11489
* MIPS floating-point:: Directives to override floating-point options
11490
 
11491

11492
File: as.info,  Node: MIPS Opts,  Next: MIPS Object,  Up: MIPS-Dependent
11493
 
11494
9.22.1 Assembler options
11495
------------------------
11496
 
11497
The MIPS configurations of GNU `as' support these special options:
11498
 
11499
`-G NUM'
11500
     This option sets the largest size of an object that can be
11501
     referenced implicitly with the `gp' register.  It is only accepted
11502
     for targets that use ECOFF format.  The default value is 8.
11503
 
11504
`-EB'
11505
`-EL'
11506
     Any MIPS configuration of `as' can select big-endian or
11507
     little-endian output at run time (unlike the other GNU development
11508
     tools, which must be configured for one or the other).  Use `-EB'
11509
     to select big-endian output, and `-EL' for little-endian.
11510
 
11511
`-KPIC'
11512
     Generate SVR4-style PIC.  This option tells the assembler to
11513
     generate SVR4-style position-independent macro expansions.  It
11514
     also tells the assembler to mark the output file as PIC.
11515
 
11516
`-mvxworks-pic'
11517
     Generate VxWorks PIC.  This option tells the assembler to generate
11518
     VxWorks-style position-independent macro expansions.
11519
 
11520
`-mips1'
11521
`-mips2'
11522
`-mips3'
11523
`-mips4'
11524
`-mips5'
11525
`-mips32'
11526
`-mips32r2'
11527
`-mips64'
11528
`-mips64r2'
11529
     Generate code for a particular MIPS Instruction Set Architecture
11530
     level.  `-mips1' corresponds to the R2000 and R3000 processors,
11531
     `-mips2' to the R6000 processor, `-mips3' to the R4000 processor,
11532
     and `-mips4' to the R8000 and R10000 processors.  `-mips5',
11533
     `-mips32', `-mips32r2', `-mips64', and `-mips64r2' correspond to
11534
     generic MIPS V, MIPS32, MIPS32 RELEASE 2, MIPS64, and MIPS64
11535
     RELEASE 2 ISA processors, respectively.  You can also switch
11536
     instruction sets during the assembly; see *Note Directives to
11537
     override the ISA level: MIPS ISA.
11538
 
11539
`-mgp32'
11540
`-mfp32'
11541
     Some macros have different expansions for 32-bit and 64-bit
11542
     registers.  The register sizes are normally inferred from the ISA
11543
     and ABI, but these flags force a certain group of registers to be
11544
     treated as 32 bits wide at all times.  `-mgp32' controls the size
11545
     of general-purpose registers and `-mfp32' controls the size of
11546
     floating-point registers.
11547
 
11548
     The `.set gp=32' and `.set fp=32' directives allow the size of
11549
     registers to be changed for parts of an object. The default value
11550
     is restored by `.set gp=default' and `.set fp=default'.
11551
 
11552
     On some MIPS variants there is a 32-bit mode flag; when this flag
11553
     is set, 64-bit instructions generate a trap.  Also, some 32-bit
11554
     OSes only save the 32-bit registers on a context switch, so it is
11555
     essential never to use the 64-bit registers.
11556
 
11557
`-mgp64'
11558
`-mfp64'
11559
     Assume that 64-bit registers are available.  This is provided in
11560
     the interests of symmetry with `-mgp32' and `-mfp32'.
11561
 
11562
     The `.set gp=64' and `.set fp=64' directives allow the size of
11563
     registers to be changed for parts of an object. The default value
11564
     is restored by `.set gp=default' and `.set fp=default'.
11565
 
11566
`-mips16'
11567
`-no-mips16'
11568
     Generate code for the MIPS 16 processor.  This is equivalent to
11569
     putting `.set mips16' at the start of the assembly file.
11570
     `-no-mips16' turns off this option.
11571
 
11572
`-msmartmips'
11573
`-mno-smartmips'
11574
     Enables the SmartMIPS extensions to the MIPS32 instruction set,
11575
     which provides a number of new instructions which target smartcard
11576
     and cryptographic applications.  This is equivalent to putting
11577
     `.set smartmips' at the start of the assembly file.
11578
     `-mno-smartmips' turns off this option.
11579
 
11580
`-mips3d'
11581
`-no-mips3d'
11582
     Generate code for the MIPS-3D Application Specific Extension.
11583
     This tells the assembler to accept MIPS-3D instructions.
11584
     `-no-mips3d' turns off this option.
11585
 
11586
`-mdmx'
11587
`-no-mdmx'
11588
     Generate code for the MDMX Application Specific Extension.  This
11589
     tells the assembler to accept MDMX instructions.  `-no-mdmx' turns
11590
     off this option.
11591
 
11592
`-mdsp'
11593
`-mno-dsp'
11594
     Generate code for the DSP Release 1 Application Specific Extension.
11595
     This tells the assembler to accept DSP Release 1 instructions.
11596
     `-mno-dsp' turns off this option.
11597
 
11598
`-mdspr2'
11599
`-mno-dspr2'
11600
     Generate code for the DSP Release 2 Application Specific Extension.
11601
     This option implies -mdsp.  This tells the assembler to accept DSP
11602
     Release 2 instructions.  `-mno-dspr2' turns off this option.
11603
 
11604
`-mmt'
11605
`-mno-mt'
11606
     Generate code for the MT Application Specific Extension.  This
11607
     tells the assembler to accept MT instructions.  `-mno-mt' turns
11608
     off this option.
11609
 
11610
`-mfix7000'
11611
`-mno-fix7000'
11612
     Cause nops to be inserted if the read of the destination register
11613
     of an mfhi or mflo instruction occurs in the following two
11614
     instructions.
11615
 
11616
`-mfix-vr4120'
11617
`-no-mfix-vr4120'
11618
     Insert nops to work around certain VR4120 errata.  This option is
11619
     intended to be used on GCC-generated code: it is not designed to
11620
     catch all problems in hand-written assembler code.
11621
 
11622
`-mfix-vr4130'
11623
`-no-mfix-vr4130'
11624
     Insert nops to work around the VR4130 `mflo'/`mfhi' errata.
11625
 
11626
`-m4010'
11627
`-no-m4010'
11628
     Generate code for the LSI R4010 chip.  This tells the assembler to
11629
     accept the R4010 specific instructions (`addciu', `ffc', etc.),
11630
     and to not schedule `nop' instructions around accesses to the `HI'
11631
     and `LO' registers.  `-no-m4010' turns off this option.
11632
 
11633
`-m4650'
11634
`-no-m4650'
11635
     Generate code for the MIPS R4650 chip.  This tells the assembler
11636
     to accept the `mad' and `madu' instruction, and to not schedule
11637
     `nop' instructions around accesses to the `HI' and `LO' registers.
11638
     `-no-m4650' turns off this option.
11639
 
11640
`-m3900'
11641
`-no-m3900'
11642
`-m4100'
11643
`-no-m4100'
11644
     For each option `-mNNNN', generate code for the MIPS RNNNN chip.
11645
     This tells the assembler to accept instructions specific to that
11646
     chip, and to schedule for that chip's hazards.
11647
 
11648
`-march=CPU'
11649
     Generate code for a particular MIPS cpu.  It is exactly equivalent
11650
     to `-mCPU', except that there are more value of CPU understood.
11651
     Valid CPU value are:
11652
 
11653
          2000, 3000, 3900, 4000, 4010, 4100, 4111, vr4120, vr4130,
11654
          vr4181, 4300, 4400, 4600, 4650, 5000, rm5200, rm5230, rm5231,
11655
          rm5261, rm5721, vr5400, vr5500, 6000, rm7000, 8000, rm9000,
11656
          10000, 12000, 4kc, 4km, 4kp, 4ksc, 4kec, 4kem, 4kep, 4ksd,
11657
          m4k, m4kp, 24kc, 24kf2_1, 24kf, 24kf1_1, 24kec, 24kef2_1,
11658
          24kef, 24kef1_1, 34kc, 34kf2_1, 34kf, 34kf1_1, 74kc, 74kf2_1,
11659
          74kf, 74kf1_1, 74kf3_2, 5kc, 5kf, 20kc, 25kf, sb1, sb1a,
11660
          loongson2e, loongson2f, octeon
11661
 
11662
     For compatibility reasons, `Nx' and `Bfx' are accepted as synonyms
11663
     for `Nf1_1'.  These values are deprecated.
11664
 
11665
`-mtune=CPU'
11666
     Schedule and tune for a particular MIPS cpu.  Valid CPU values are
11667
     identical to `-march=CPU'.
11668
 
11669
`-mabi=ABI'
11670
     Record which ABI the source code uses.  The recognized arguments
11671
     are: `32', `n32', `o64', `64' and `eabi'.
11672
 
11673
`-msym32'
11674
`-mno-sym32'
11675
     Equivalent to adding `.set sym32' or `.set nosym32' to the
11676
     beginning of the assembler input.  *Note MIPS symbol sizes::.
11677
 
11678
`-nocpp'
11679
     This option is ignored.  It is accepted for command-line
11680
     compatibility with other assemblers, which use it to turn off C
11681
     style preprocessing.  With GNU `as', there is no need for
11682
     `-nocpp', because the GNU assembler itself never runs the C
11683
     preprocessor.
11684
 
11685
`-msoft-float'
11686
`-mhard-float'
11687
     Disable or enable floating-point instructions.  Note that by
11688
     default floating-point instructions are always allowed even with
11689
     CPU targets that don't have support for these instructions.
11690
 
11691
`-msingle-float'
11692
`-mdouble-float'
11693
     Disable or enable double-precision floating-point operations.  Note
11694
     that by default double-precision floating-point operations are
11695
     always allowed even with CPU targets that don't have support for
11696
     these operations.
11697
 
11698
`--construct-floats'
11699
`--no-construct-floats'
11700
     The `--no-construct-floats' option disables the construction of
11701
     double width floating point constants by loading the two halves of
11702
     the value into the two single width floating point registers that
11703
     make up the double width register.  This feature is useful if the
11704
     processor support the FR bit in its status  register, and this bit
11705
     is known (by the programmer) to be set.  This bit prevents the
11706
     aliasing of the double width register by the single width
11707
     registers.
11708
 
11709
     By default `--construct-floats' is selected, allowing construction
11710
     of these floating point constants.
11711
 
11712
`--trap'
11713
`--no-break'
11714
     `as' automatically macro expands certain division and
11715
     multiplication instructions to check for overflow and division by
11716
     zero.  This option causes `as' to generate code to take a trap
11717
     exception rather than a break exception when an error is detected.
11718
     The trap instructions are only supported at Instruction Set
11719
     Architecture level 2 and higher.
11720
 
11721
`--break'
11722
`--no-trap'
11723
     Generate code to take a break exception rather than a trap
11724
     exception when an error is detected.  This is the default.
11725
 
11726
`-mpdr'
11727
`-mno-pdr'
11728
     Control generation of `.pdr' sections.  Off by default on IRIX, on
11729
     elsewhere.
11730
 
11731
`-mshared'
11732
`-mno-shared'
11733
     When generating code using the Unix calling conventions (selected
11734
     by `-KPIC' or `-mcall_shared'), gas will normally generate code
11735
     which can go into a shared library.  The `-mno-shared' option
11736
     tells gas to generate code which uses the calling convention, but
11737
     can not go into a shared library.  The resulting code is slightly
11738
     more efficient.  This option only affects the handling of the
11739
     `.cpload' and `.cpsetup' pseudo-ops.
11740
 
11741

11742
File: as.info,  Node: MIPS Object,  Next: MIPS Stabs,  Prev: MIPS Opts,  Up: MIPS-Dependent
11743
 
11744
9.22.2 MIPS ECOFF object code
11745
-----------------------------
11746
 
11747
Assembling for a MIPS ECOFF target supports some additional sections
11748
besides the usual `.text', `.data' and `.bss'.  The additional sections
11749
are `.rdata', used for read-only data, `.sdata', used for small data,
11750
and `.sbss', used for small common objects.
11751
 
11752
   When assembling for ECOFF, the assembler uses the `$gp' (`$28')
11753
register to form the address of a "small object".  Any object in the
11754
`.sdata' or `.sbss' sections is considered "small" in this sense.  For
11755
external objects, or for objects in the `.bss' section, you can use the
11756
`gcc' `-G' option to control the size of objects addressed via `$gp';
11757
the default value is 8, meaning that a reference to any object eight
11758
bytes or smaller uses `$gp'.  Passing `-G 0' to `as' prevents it from
11759
using the `$gp' register on the basis of object size (but the assembler
11760
uses `$gp' for objects in `.sdata' or `sbss' in any case).  The size of
11761
an object in the `.bss' section is set by the `.comm' or `.lcomm'
11762
directive that defines it.  The size of an external object may be set
11763
with the `.extern' directive.  For example, `.extern sym,4' declares
11764
that the object at `sym' is 4 bytes in length, whie leaving `sym'
11765
otherwise undefined.
11766
 
11767
   Using small ECOFF objects requires linker support, and assumes that
11768
the `$gp' register is correctly initialized (normally done
11769
automatically by the startup code).  MIPS ECOFF assembly code must not
11770
modify the `$gp' register.
11771
 
11772

11773
File: as.info,  Node: MIPS Stabs,  Next: MIPS ISA,  Prev: MIPS Object,  Up: MIPS-Dependent
11774
 
11775
9.22.3 Directives for debugging information
11776
-------------------------------------------
11777
 
11778
MIPS ECOFF `as' supports several directives used for generating
11779
debugging information which are not support by traditional MIPS
11780
assemblers.  These are `.def', `.endef', `.dim', `.file', `.scl',
11781
`.size', `.tag', `.type', `.val', `.stabd', `.stabn', and `.stabs'.
11782
The debugging information generated by the three `.stab' directives can
11783
only be read by GDB, not by traditional MIPS debuggers (this
11784
enhancement is required to fully support C++ debugging).  These
11785
directives are primarily used by compilers, not assembly language
11786
programmers!
11787
 
11788

11789
File: as.info,  Node: MIPS symbol sizes,  Next: MIPS autoextend,  Prev: MIPS ISA,  Up: MIPS-Dependent
11790
 
11791
9.22.4 Directives to override the size of symbols
11792
-------------------------------------------------
11793
 
11794
The n64 ABI allows symbols to have any 64-bit value.  Although this
11795
provides a great deal of flexibility, it means that some macros have
11796
much longer expansions than their 32-bit counterparts.  For example,
11797
the non-PIC expansion of `dla $4,sym' is usually:
11798
 
11799
     lui     $4,%highest(sym)
11800
     lui     $1,%hi(sym)
11801
     daddiu  $4,$4,%higher(sym)
11802
     daddiu  $1,$1,%lo(sym)
11803
     dsll32  $4,$4,0
11804
     daddu   $4,$4,$1
11805
 
11806
   whereas the 32-bit expansion is simply:
11807
 
11808
     lui     $4,%hi(sym)
11809
     daddiu  $4,$4,%lo(sym)
11810
 
11811
   n64 code is sometimes constructed in such a way that all symbolic
11812
constants are known to have 32-bit values, and in such cases, it's
11813
preferable to use the 32-bit expansion instead of the 64-bit expansion.
11814
 
11815
   You can use the `.set sym32' directive to tell the assembler that,
11816
from this point on, all expressions of the form `SYMBOL' or `SYMBOL +
11817
OFFSET' have 32-bit values.  For example:
11818
 
11819
     .set sym32
11820
     dla     $4,sym
11821
     lw      $4,sym+16
11822
     sw      $4,sym+0x8000($4)
11823
 
11824
   will cause the assembler to treat `sym', `sym+16' and `sym+0x8000'
11825
as 32-bit values.  The handling of non-symbolic addresses is not
11826
affected.
11827
 
11828
   The directive `.set nosym32' ends a `.set sym32' block and reverts
11829
to the normal behavior.  It is also possible to change the symbol size
11830
using the command-line options `-msym32' and `-mno-sym32'.
11831
 
11832
   These options and directives are always accepted, but at present,
11833
they have no effect for anything other than n64.
11834
 
11835

11836
File: as.info,  Node: MIPS ISA,  Next: MIPS symbol sizes,  Prev: MIPS Stabs,  Up: MIPS-Dependent
11837
 
11838
9.22.5 Directives to override the ISA level
11839
-------------------------------------------
11840
 
11841
GNU `as' supports an additional directive to change the MIPS
11842
Instruction Set Architecture level on the fly: `.set mipsN'.  N should
11843
be a number from 0 to 5, or 32, 32r2, 64 or 64r2.  The values other
11844
than 0 make the assembler accept instructions for the corresponding ISA
11845
level, from that point on in the assembly.  `.set mipsN' affects not
11846
only which instructions are permitted, but also how certain macros are
11847
expanded.  `.set mips0' restores the ISA level to its original level:
11848
either the level you selected with command line options, or the default
11849
for your configuration.  You can use this feature to permit specific
11850
MIPS3 instructions while assembling in 32 bit mode.  Use this directive
11851
with care!
11852
 
11853
   The `.set arch=CPU' directive provides even finer control.  It
11854
changes the effective CPU target and allows the assembler to use
11855
instructions specific to a particular CPU.  All CPUs supported by the
11856
`-march' command line option are also selectable by this directive.
11857
The original value is restored by `.set arch=default'.
11858
 
11859
   The directive `.set mips16' puts the assembler into MIPS 16 mode, in
11860
which it will assemble instructions for the MIPS 16 processor.  Use
11861
`.set nomips16' to return to normal 32 bit mode.
11862
 
11863
   Traditional MIPS assemblers do not support this directive.
11864
 
11865

11866
File: as.info,  Node: MIPS autoextend,  Next: MIPS insn,  Prev: MIPS symbol sizes,  Up: MIPS-Dependent
11867
 
11868
9.22.6 Directives for extending MIPS 16 bit instructions
11869
--------------------------------------------------------
11870
 
11871
By default, MIPS 16 instructions are automatically extended to 32 bits
11872
when necessary.  The directive `.set noautoextend' will turn this off.
11873
When `.set noautoextend' is in effect, any 32 bit instruction must be
11874
explicitly extended with the `.e' modifier (e.g., `li.e $4,1000').  The
11875
directive `.set autoextend' may be used to once again automatically
11876
extend instructions when necessary.
11877
 
11878
   This directive is only meaningful when in MIPS 16 mode.  Traditional
11879
MIPS assemblers do not support this directive.
11880
 
11881

11882
File: as.info,  Node: MIPS insn,  Next: MIPS option stack,  Prev: MIPS autoextend,  Up: MIPS-Dependent
11883
 
11884
9.22.7 Directive to mark data as an instruction
11885
-----------------------------------------------
11886
 
11887
The `.insn' directive tells `as' that the following data is actually
11888
instructions.  This makes a difference in MIPS 16 mode: when loading
11889
the address of a label which precedes instructions, `as' automatically
11890
adds 1 to the value, so that jumping to the loaded address will do the
11891
right thing.
11892
 
11893

11894
File: as.info,  Node: MIPS option stack,  Next: MIPS ASE instruction generation overrides,  Prev: MIPS insn,  Up: MIPS-Dependent
11895
 
11896
9.22.8 Directives to save and restore options
11897
---------------------------------------------
11898
 
11899
The directives `.set push' and `.set pop' may be used to save and
11900
restore the current settings for all the options which are controlled
11901
by `.set'.  The `.set push' directive saves the current settings on a
11902
stack.  The `.set pop' directive pops the stack and restores the
11903
settings.
11904
 
11905
   These directives can be useful inside an macro which must change an
11906
option such as the ISA level or instruction reordering but does not want
11907
to change the state of the code which invoked the macro.
11908
 
11909
   Traditional MIPS assemblers do not support these directives.
11910
 
11911

11912
File: as.info,  Node: MIPS ASE instruction generation overrides,  Next: MIPS floating-point,  Prev: MIPS option stack,  Up: MIPS-Dependent
11913
 
11914
9.22.9 Directives to control generation of MIPS ASE instructions
11915
----------------------------------------------------------------
11916
 
11917
The directive `.set mips3d' makes the assembler accept instructions
11918
from the MIPS-3D Application Specific Extension from that point on in
11919
the assembly.  The `.set nomips3d' directive prevents MIPS-3D
11920
instructions from being accepted.
11921
 
11922
   The directive `.set smartmips' makes the assembler accept
11923
instructions from the SmartMIPS Application Specific Extension to the
11924
MIPS32 ISA from that point on in the assembly.  The `.set nosmartmips'
11925
directive prevents SmartMIPS instructions from being accepted.
11926
 
11927
   The directive `.set mdmx' makes the assembler accept instructions
11928
from the MDMX Application Specific Extension from that point on in the
11929
assembly.  The `.set nomdmx' directive prevents MDMX instructions from
11930
being accepted.
11931
 
11932
   The directive `.set dsp' makes the assembler accept instructions
11933
from the DSP Release 1 Application Specific Extension from that point
11934
on in the assembly.  The `.set nodsp' directive prevents DSP Release 1
11935
instructions from being accepted.
11936
 
11937
   The directive `.set dspr2' makes the assembler accept instructions
11938
from the DSP Release 2 Application Specific Extension from that point
11939
on in the assembly.  This dirctive implies `.set dsp'.  The `.set
11940
nodspr2' directive prevents DSP Release 2 instructions from being
11941
accepted.
11942
 
11943
   The directive `.set mt' makes the assembler accept instructions from
11944
the MT Application Specific Extension from that point on in the
11945
assembly.  The `.set nomt' directive prevents MT instructions from
11946
being accepted.
11947
 
11948
   Traditional MIPS assemblers do not support these directives.
11949
 
11950

11951
File: as.info,  Node: MIPS floating-point,  Prev: MIPS ASE instruction generation overrides,  Up: MIPS-Dependent
11952
 
11953
9.22.10 Directives to override floating-point options
11954
-----------------------------------------------------
11955
 
11956
The directives `.set softfloat' and `.set hardfloat' provide finer
11957
control of disabling and enabling float-point instructions.  These
11958
directives always override the default (that hard-float instructions
11959
are accepted) or the command-line options (`-msoft-float' and
11960
`-mhard-float').
11961
 
11962
   The directives `.set singlefloat' and `.set doublefloat' provide
11963
finer control of disabling and enabling double-precision float-point
11964
operations.  These directives always override the default (that
11965
double-precision operations are accepted) or the command-line options
11966
(`-msingle-float' and `-mdouble-float').
11967
 
11968
   Traditional MIPS assemblers do not support these directives.
11969
 
11970

11971
File: as.info,  Node: MMIX-Dependent,  Next: MSP430-Dependent,  Prev: MIPS-Dependent,  Up: Machine Dependencies
11972
 
11973
9.23 MMIX Dependent Features
11974
============================
11975
 
11976
* Menu:
11977
 
11978
* MMIX-Opts::              Command-line Options
11979
* MMIX-Expand::            Instruction expansion
11980
* MMIX-Syntax::            Syntax
11981
* MMIX-mmixal::            Differences to `mmixal' syntax and semantics
11982
 
11983

11984
File: as.info,  Node: MMIX-Opts,  Next: MMIX-Expand,  Up: MMIX-Dependent
11985
 
11986
9.23.1 Command-line Options
11987
---------------------------
11988
 
11989
The MMIX version of `as' has some machine-dependent options.
11990
 
11991
   When `--fixed-special-register-names' is specified, only the register
11992
names specified in *Note MMIX-Regs:: are recognized in the instructions
11993
`PUT' and `GET'.
11994
 
11995
   You can use the `--globalize-symbols' to make all symbols global.
11996
This option is useful when splitting up a `mmixal' program into several
11997
files.
11998
 
11999
   The `--gnu-syntax' turns off most syntax compatibility with
12000
`mmixal'.  Its usability is currently doubtful.
12001
 
12002
   The `--relax' option is not fully supported, but will eventually make
12003
the object file prepared for linker relaxation.
12004
 
12005
   If you want to avoid inadvertently calling a predefined symbol and
12006
would rather get an error, for example when using `as' with a compiler
12007
or other machine-generated code, specify `--no-predefined-syms'.  This
12008
turns off built-in predefined definitions of all such symbols,
12009
including rounding-mode symbols, segment symbols, `BIT' symbols, and
12010
`TRAP' symbols used in `mmix' "system calls".  It also turns off
12011
predefined special-register names, except when used in `PUT' and `GET'
12012
instructions.
12013
 
12014
   By default, some instructions are expanded to fit the size of the
12015
operand or an external symbol (*note MMIX-Expand::).  By passing
12016
`--no-expand', no such expansion will be done, instead causing errors
12017
at link time if the operand does not fit.
12018
 
12019
   The `mmixal' documentation (*note mmixsite::) specifies that global
12020
registers allocated with the `GREG' directive (*note MMIX-greg::) and
12021
initialized to the same non-zero value, will refer to the same global
12022
register.  This isn't strictly enforceable in `as' since the final
12023
addresses aren't known until link-time, but it will do an effort unless
12024
the `--no-merge-gregs' option is specified.  (Register merging isn't
12025
yet implemented in `ld'.)
12026
 
12027
   `as' will warn every time it expands an instruction to fit an
12028
operand unless the option `-x' is specified.  It is believed that this
12029
behaviour is more useful than just mimicking `mmixal''s behaviour, in
12030
which instructions are only expanded if the `-x' option is specified,
12031
and assembly fails otherwise, when an instruction needs to be expanded.
12032
It needs to be kept in mind that `mmixal' is both an assembler and
12033
linker, while `as' will expand instructions that at link stage can be
12034
contracted.  (Though linker relaxation isn't yet implemented in `ld'.)
12035
The option `-x' also imples `--linker-allocated-gregs'.
12036
 
12037
   If instruction expansion is enabled, `as' can expand a `PUSHJ'
12038
instruction into a series of instructions.  The shortest expansion is
12039
to not expand it, but just mark the call as redirectable to a stub,
12040
which `ld' creates at link-time, but only if the original `PUSHJ'
12041
instruction is found not to reach the target.  The stub consists of the
12042
necessary instructions to form a jump to the target.  This happens if
12043
`as' can assert that the `PUSHJ' instruction can reach such a stub.
12044
The option `--no-pushj-stubs' disables this shorter expansion, and the
12045
longer series of instructions is then created at assembly-time.  The
12046
option `--no-stubs' is a synonym, intended for compatibility with
12047
future releases, where generation of stubs for other instructions may
12048
be implemented.
12049
 
12050
   Usually a two-operand-expression (*note GREG-base::) without a
12051
matching `GREG' directive is treated as an error by `as'.  When the
12052
option `--linker-allocated-gregs' is in effect, they are instead passed
12053
through to the linker, which will allocate as many global registers as
12054
is needed.
12055
 
12056

12057
File: as.info,  Node: MMIX-Expand,  Next: MMIX-Syntax,  Prev: MMIX-Opts,  Up: MMIX-Dependent
12058
 
12059
9.23.2 Instruction expansion
12060
----------------------------
12061
 
12062
When `as' encounters an instruction with an operand that is either not
12063
known or does not fit the operand size of the instruction, `as' (and
12064
`ld') will expand the instruction into a sequence of instructions
12065
semantically equivalent to the operand fitting the instruction.
12066
Expansion will take place for the following instructions:
12067
 
12068
`GETA'
12069
     Expands to a sequence of four instructions: `SETL', `INCML',
12070
     `INCMH' and `INCH'.  The operand must be a multiple of four.
12071
 
12072
Conditional branches
12073
     A branch instruction is turned into a branch with the complemented
12074
     condition and prediction bit over five instructions; four
12075
     instructions setting `$255' to the operand value, which like with
12076
     `GETA' must be a multiple of four, and a final `GO $255,$255,0'.
12077
 
12078
`PUSHJ'
12079
     Similar to expansion for conditional branches; four instructions
12080
     set `$255' to the operand value, followed by a `PUSHGO
12081
     $255,$255,0'.
12082
 
12083
`JMP'
12084
     Similar to conditional branches and `PUSHJ'.  The final instruction
12085
     is `GO $255,$255,0'.
12086
 
12087
   The linker `ld' is expected to shrink these expansions for code
12088
assembled with `--relax' (though not currently implemented).
12089
 
12090

12091
File: as.info,  Node: MMIX-Syntax,  Next: MMIX-mmixal,  Prev: MMIX-Expand,  Up: MMIX-Dependent
12092
 
12093
9.23.3 Syntax
12094
-------------
12095
 
12096
The assembly syntax is supposed to be upward compatible with that
12097
described in Sections 1.3 and 1.4 of `The Art of Computer Programming,
12098
Volume 1'.  Draft versions of those chapters as well as other MMIX
12099
information is located at
12100
`http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html'.  Most code
12101
examples from the mmixal package located there should work unmodified
12102
when assembled and linked as single files, with a few noteworthy
12103
exceptions (*note MMIX-mmixal::).
12104
 
12105
   Before an instruction is emitted, the current location is aligned to
12106
the next four-byte boundary.  If a label is defined at the beginning of
12107
the line, its value will be the aligned value.
12108
 
12109
   In addition to the traditional hex-prefix `0x', a hexadecimal number
12110
can also be specified by the prefix character `#'.
12111
 
12112
   After all operands to an MMIX instruction or directive have been
12113
specified, the rest of the line is ignored, treated as a comment.
12114
 
12115
* Menu:
12116
 
12117
* MMIX-Chars::                  Special Characters
12118
* MMIX-Symbols::                Symbols
12119
* MMIX-Regs::                   Register Names
12120
* MMIX-Pseudos::                Assembler Directives
12121
 
12122

12123
File: as.info,  Node: MMIX-Chars,  Next: MMIX-Symbols,  Up: MMIX-Syntax
12124
 
12125
9.23.3.1 Special Characters
12126
...........................
12127
 
12128
The characters `*' and `#' are line comment characters; each start a
12129
comment at the beginning of a line, but only at the beginning of a
12130
line.  A `#' prefixes a hexadecimal number if found elsewhere on a line.
12131
 
12132
   Two other characters, `%' and `!', each start a comment anywhere on
12133
the line.  Thus you can't use the `modulus' and `not' operators in
12134
expressions normally associated with these two characters.
12135
 
12136
   A `;' is a line separator, treated as a new-line, so separate
12137
instructions can be specified on a single line.
12138
 
12139

12140
File: as.info,  Node: MMIX-Symbols,  Next: MMIX-Regs,  Prev: MMIX-Chars,  Up: MMIX-Syntax
12141
 
12142
9.23.3.2 Symbols
12143
................
12144
 
12145
The character `:' is permitted in identifiers.  There are two
12146
exceptions to it being treated as any other symbol character: if a
12147
symbol begins with `:', it means that the symbol is in the global
12148
namespace and that the current prefix should not be prepended to that
12149
symbol (*note MMIX-prefix::).  The `:' is then not considered part of
12150
the symbol.  For a symbol in the label position (first on a line), a `:'
12151
at the end of a symbol is silently stripped off.  A label is permitted,
12152
but not required, to be followed by a `:', as with many other assembly
12153
formats.
12154
 
12155
   The character `@' in an expression, is a synonym for `.', the
12156
current location.
12157
 
12158
   In addition to the common forward and backward local symbol formats
12159
(*note Symbol Names::), they can be specified with upper-case `B' and
12160
`F', as in `8B' and `9F'.  A local label defined for the current
12161
position is written with a `H' appended to the number:
12162
     3H LDB $0,$1,2
12163
   This and traditional local-label formats cannot be mixed: a label
12164
must be defined and referred to using the same format.
12165
 
12166
   There's a minor caveat: just as for the ordinary local symbols, the
12167
local symbols are translated into ordinary symbols using control
12168
characters are to hide the ordinal number of the symbol.
12169
Unfortunately, these symbols are not translated back in error messages.
12170
Thus you may see confusing error messages when local symbols are used.
12171
Control characters `\003' (control-C) and `\004' (control-D) are used
12172
for the MMIX-specific local-symbol syntax.
12173
 
12174
   The symbol `Main' is handled specially; it is always global.
12175
 
12176
   By defining the symbols `__.MMIX.start..text' and
12177
`__.MMIX.start..data', the address of respectively the `.text' and
12178
`.data' segments of the final program can be defined, though when
12179
linking more than one object file, the code or data in the object file
12180
containing the symbol is not guaranteed to be start at that position;
12181
just the final executable.  *Note MMIX-loc::.
12182
 
12183

12184
File: as.info,  Node: MMIX-Regs,  Next: MMIX-Pseudos,  Prev: MMIX-Symbols,  Up: MMIX-Syntax
12185
 
12186
9.23.3.3 Register names
12187
.......................
12188
 
12189
Local and global registers are specified as `$0' to `$255'.  The
12190
recognized special register names are `rJ', `rA', `rB', `rC', `rD',
12191
`rE', `rF', `rG', `rH', `rI', `rK', `rL', `rM', `rN', `rO', `rP', `rQ',
12192
`rR', `rS', `rT', `rU', `rV', `rW', `rX', `rY', `rZ', `rBB', `rTT',
12193
`rWW', `rXX', `rYY' and `rZZ'.  A leading `:' is optional for special
12194
register names.
12195
 
12196
   Local and global symbols can be equated to register names and used in
12197
place of ordinary registers.
12198
 
12199
   Similarly for special registers, local and global symbols can be
12200
used.  Also, symbols equated from numbers and constant expressions are
12201
allowed in place of a special register, except when either of the
12202
options `--no-predefined-syms' and `--fixed-special-register-names' are
12203
specified.  Then only the special register names above are allowed for
12204
the instructions having a special register operand; `GET' and `PUT'.
12205
 
12206

12207
File: as.info,  Node: MMIX-Pseudos,  Prev: MMIX-Regs,  Up: MMIX-Syntax
12208
 
12209
9.23.3.4 Assembler Directives
12210
.............................
12211
 
12212
`LOC'
12213
     The `LOC' directive sets the current location to the value of the
12214
     operand field, which may include changing sections.  If the
12215
     operand is a constant, the section is set to either `.data' if the
12216
     value is `0x2000000000000000' or larger, else it is set to `.text'.
12217
     Within a section, the current location may only be changed to
12218
     monotonically higher addresses.  A LOC expression must be a
12219
     previously defined symbol or a "pure" constant.
12220
 
12221
     An example, which sets the label PREV to the current location, and
12222
     updates the current location to eight bytes forward:
12223
          prev LOC @+8
12224
 
12225
     When a LOC has a constant as its operand, a symbol
12226
     `__.MMIX.start..text' or `__.MMIX.start..data' is defined
12227
     depending on the address as mentioned above.  Each such symbol is
12228
     interpreted as special by the linker, locating the section at that
12229
     address.  Note that if multiple files are linked, the first object
12230
     file with that section will be mapped to that address (not
12231
     necessarily the file with the LOC definition).
12232
 
12233
`LOCAL'
12234
     Example:
12235
           LOCAL external_symbol
12236
           LOCAL 42
12237
           .local asymbol
12238
 
12239
     This directive-operation generates a link-time assertion that the
12240
     operand does not correspond to a global register.  The operand is
12241
     an expression that at link-time resolves to a register symbol or a
12242
     number.  A number is treated as the register having that number.
12243
     There is one restriction on the use of this directive: the
12244
     pseudo-directive must be placed in a section with contents, code
12245
     or data.
12246
 
12247
`IS'
12248
     The `IS' directive:
12249
          asymbol IS an_expression
12250
     sets the symbol `asymbol' to `an_expression'.  A symbol may not be
12251
     set more than once using this directive.  Local labels may be set
12252
     using this directive, for example:
12253
          5H IS @+4
12254
 
12255
`GREG'
12256
     This directive reserves a global register, gives it an initial
12257
     value and optionally gives it a symbolic name.  Some examples:
12258
 
12259
          areg GREG
12260
          breg GREG data_value
12261
               GREG data_buffer
12262
               .greg creg, another_data_value
12263
 
12264
     The symbolic register name can be used in place of a (non-special)
12265
     register.  If a value isn't provided, it defaults to zero.  Unless
12266
     the option `--no-merge-gregs' is specified, non-zero registers
12267
     allocated with this directive may be eliminated by `as'; another
12268
     register with the same value used in its place.  Any of the
12269
     instructions `CSWAP', `GO', `LDA', `LDBU', `LDB', `LDHT', `LDOU',
12270
     `LDO', `LDSF', `LDTU', `LDT', `LDUNC', `LDVTS', `LDWU', `LDW',
12271
     `PREGO', `PRELD', `PREST', `PUSHGO', `STBU', `STB', `STCO', `STHT',
12272
     `STOU', `STSF', `STTU', `STT', `STUNC', `SYNCD', `SYNCID', can
12273
     have a value nearby an initial value in place of its second and
12274
     third operands.  Here, "nearby" is defined as within the range
12275
     0...255 from the initial value of such an allocated register.
12276
 
12277
          buffer1 BYTE 0,0,0,0,0
12278
          buffer2 BYTE 0,0,0,0,0
12279
           ...
12280
           GREG buffer1
12281
           LDOU $42,buffer2
12282
     In the example above, the `Y' field of the `LDOUI' instruction
12283
     (LDOU with a constant Z) will be replaced with the global register
12284
     allocated for `buffer1', and the `Z' field will have the value 5,
12285
     the offset from `buffer1' to `buffer2'.  The result is equivalent
12286
     to this code:
12287
          buffer1 BYTE 0,0,0,0,0
12288
          buffer2 BYTE 0,0,0,0,0
12289
           ...
12290
          tmpreg GREG buffer1
12291
           LDOU $42,tmpreg,(buffer2-buffer1)
12292
 
12293
     Global registers allocated with this directive are allocated in
12294
     order higher-to-lower within a file.  Other than that, the exact
12295
     order of register allocation and elimination is undefined.  For
12296
     example, the order is undefined when more than one file with such
12297
     directives are linked together.  With the options `-x' and
12298
     `--linker-allocated-gregs', `GREG' directives for two-operand
12299
     cases like the one mentioned above can be omitted.  Sufficient
12300
     global registers will then be allocated by the linker.
12301
 
12302
`BYTE'
12303
     The `BYTE' directive takes a series of operands separated by a
12304
     comma.  If an operand is a string (*note Strings::), each
12305
     character of that string is emitted as a byte.  Other operands
12306
     must be constant expressions without forward references, in the
12307
     range 0...255.  If you need operands having expressions with
12308
     forward references, use `.byte' (*note Byte::).  An operand can be
12309
     omitted, defaulting to a zero value.
12310
 
12311
`WYDE'
12312
`TETRA'
12313
`OCTA'
12314
     The directives `WYDE', `TETRA' and `OCTA' emit constants of two,
12315
     four and eight bytes size respectively.  Before anything else
12316
     happens for the directive, the current location is aligned to the
12317
     respective constant-size boundary.  If a label is defined at the
12318
     beginning of the line, its value will be that after the alignment.
12319
     A single operand can be omitted, defaulting to a zero value
12320
     emitted for the directive.  Operands can be expressed as strings
12321
     (*note Strings::), in which case each character in the string is
12322
     emitted as a separate constant of the size indicated by the
12323
     directive.
12324
 
12325
`PREFIX'
12326
     The `PREFIX' directive sets a symbol name prefix to be prepended to
12327
     all symbols (except local symbols, *note MMIX-Symbols::), that are
12328
     not prefixed with `:', until the next `PREFIX' directive.  Such
12329
     prefixes accumulate.  For example,
12330
           PREFIX a
12331
           PREFIX b
12332
          c IS 0
12333
     defines a symbol `abc' with the value 0.
12334
 
12335
`BSPEC'
12336
`ESPEC'
12337
     A pair of `BSPEC' and `ESPEC' directives delimit a section of
12338
     special contents (without specified semantics).  Example:
12339
           BSPEC 42
12340
           TETRA 1,2,3
12341
           ESPEC
12342
     The single operand to `BSPEC' must be number in the range 0...255.
12343
     The `BSPEC' number 80 is used by the GNU binutils implementation.
12344
 
12345

12346
File: as.info,  Node: MMIX-mmixal,  Prev: MMIX-Syntax,  Up: MMIX-Dependent
12347
 
12348
9.23.4 Differences to `mmixal'
12349
------------------------------
12350
 
12351
The binutils `as' and `ld' combination has a few differences in
12352
function compared to `mmixal' (*note mmixsite::).
12353
 
12354
   The replacement of a symbol with a GREG-allocated register (*note
12355
GREG-base::) is not handled the exactly same way in `as' as in
12356
`mmixal'.  This is apparent in the `mmixal' example file `inout.mms',
12357
where different registers with different offsets, eventually yielding
12358
the same address, are used in the first instruction.  This type of
12359
difference should however not affect the function of any program unless
12360
it has specific assumptions about the allocated register number.
12361
 
12362
   Line numbers (in the `mmo' object format) are currently not
12363
supported.
12364
 
12365
   Expression operator precedence is not that of mmixal: operator
12366
precedence is that of the C programming language.  It's recommended to
12367
use parentheses to explicitly specify wanted operator precedence
12368
whenever more than one type of operators are used.
12369
 
12370
   The serialize unary operator `&', the fractional division operator
12371
`//', the logical not operator `!' and the modulus operator `%' are not
12372
available.
12373
 
12374
   Symbols are not global by default, unless the option
12375
`--globalize-symbols' is passed.  Use the `.global' directive to
12376
globalize symbols (*note Global::).
12377
 
12378
   Operand syntax is a bit stricter with `as' than `mmixal'.  For
12379
example, you can't say `addu 1,2,3', instead you must write `addu
12380
$1,$2,3'.
12381
 
12382
   You can't LOC to a lower address than those already visited (i.e.,
12383
"backwards").
12384
 
12385
   A LOC directive must come before any emitted code.
12386
 
12387
   Predefined symbols are visible as file-local symbols after use.  (In
12388
the ELF file, that is--the linked mmo file has no notion of a file-local
12389
symbol.)
12390
 
12391
   Some mapping of constant expressions to sections in LOC expressions
12392
is attempted, but that functionality is easily confused and should be
12393
avoided unless compatibility with `mmixal' is required.  A LOC
12394
expression to `0x2000000000000000' or higher, maps to the `.data'
12395
section and lower addresses map to the `.text' section (*note
12396
MMIX-loc::).
12397
 
12398
   The code and data areas are each contiguous.  Sparse programs with
12399
far-away LOC directives will take up the same amount of space as a
12400
contiguous program with zeros filled in the gaps between the LOC
12401
directives.  If you need sparse programs, you might try and get the
12402
wanted effect with a linker script and splitting up the code parts into
12403
sections (*note Section::).  Assembly code for this, to be compatible
12404
with `mmixal', would look something like:
12405
      .if 0
12406
      LOC away_expression
12407
      .else
12408
      .section away,"ax"
12409
      .fi
12410
   `as' will not execute the LOC directive and `mmixal' ignores the
12411
lines with `.'.  This construct can be used generally to help
12412
compatibility.
12413
 
12414
   Symbols can't be defined twice-not even to the same value.
12415
 
12416
   Instruction mnemonics are recognized case-insensitive, though the
12417
`IS' and `GREG' pseudo-operations must be specified in upper-case
12418
characters.
12419
 
12420
   There's no unicode support.
12421
 
12422
   The following is a list of programs in `mmix.tar.gz', available at
12423
`http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html', last
12424
checked with the version dated 2001-08-25 (md5sum
12425
c393470cfc86fac040487d22d2bf0172) that assemble with `mmixal' but do
12426
not assemble with `as':
12427
 
12428
`silly.mms'
12429
     LOC to a previous address.
12430
 
12431
`sim.mms'
12432
     Redefines symbol `Done'.
12433
 
12434
`test.mms'
12435
     Uses the serial operator `&'.
12436
 
12437

12438
File: as.info,  Node: MSP430-Dependent,  Next: SH-Dependent,  Prev: MMIX-Dependent,  Up: Machine Dependencies
12439
 
12440
9.24 MSP 430 Dependent Features
12441
===============================
12442
 
12443
* Menu:
12444
 
12445
* MSP430 Options::              Options
12446
* MSP430 Syntax::               Syntax
12447
* MSP430 Floating Point::       Floating Point
12448
* MSP430 Directives::           MSP 430 Machine Directives
12449
* MSP430 Opcodes::              Opcodes
12450
* MSP430 Profiling Capability:: Profiling Capability
12451
 
12452

12453
File: as.info,  Node: MSP430 Options,  Next: MSP430 Syntax,  Up: MSP430-Dependent
12454
 
12455
9.24.1 Options
12456
--------------
12457
 
12458
`-m'
12459
     select the mpu arch. Currently has no effect.
12460
 
12461
`-mP'
12462
     enables polymorph instructions handler.
12463
 
12464
`-mQ'
12465
     enables relaxation at assembly time. DANGEROUS!
12466
 
12467
 
12468

12469
File: as.info,  Node: MSP430 Syntax,  Next: MSP430 Floating Point,  Prev: MSP430 Options,  Up: MSP430-Dependent
12470
 
12471
9.24.2 Syntax
12472
-------------
12473
 
12474
* Menu:
12475
 
12476
* MSP430-Macros::               Macros
12477
* MSP430-Chars::                Special Characters
12478
* MSP430-Regs::                 Register Names
12479
* MSP430-Ext::                  Assembler Extensions
12480
 
12481

12482
File: as.info,  Node: MSP430-Macros,  Next: MSP430-Chars,  Up: MSP430 Syntax
12483
 
12484
9.24.2.1 Macros
12485
...............
12486
 
12487
The macro syntax used on the MSP 430 is like that described in the MSP
12488
430 Family Assembler Specification.  Normal `as' macros should still
12489
work.
12490
 
12491
   Additional built-in macros are:
12492
 
12493
`llo(exp)'
12494
     Extracts least significant word from 32-bit expression 'exp'.
12495
 
12496
`lhi(exp)'
12497
     Extracts most significant word from 32-bit expression 'exp'.
12498
 
12499
`hlo(exp)'
12500
     Extracts 3rd word from 64-bit expression 'exp'.
12501
 
12502
`hhi(exp)'
12503
     Extracts 4rd word from 64-bit expression 'exp'.
12504
 
12505
 
12506
   They normally being used as an immediate source operand.
12507
         mov    #llo(1), r10    ;       == mov  #1, r10
12508
         mov    #lhi(1), r10    ;       == mov  #0, r10
12509
 
12510

12511
File: as.info,  Node: MSP430-Chars,  Next: MSP430-Regs,  Prev: MSP430-Macros,  Up: MSP430 Syntax
12512
 
12513
9.24.2.2 Special Characters
12514
...........................
12515
 
12516
`;' is the line comment character.
12517
 
12518
   The character `$' in jump instructions indicates current location and
12519
implemented only for TI syntax compatibility.
12520
 
12521

12522
File: as.info,  Node: MSP430-Regs,  Next: MSP430-Ext,  Prev: MSP430-Chars,  Up: MSP430 Syntax
12523
 
12524
9.24.2.3 Register Names
12525
.......................
12526
 
12527
General-purpose registers are represented by predefined symbols of the
12528
form `rN' (for global registers), where N represents a number between
12529
`0' and `15'.  The leading letters may be in either upper or lower
12530
case; for example, `r13' and `R7' are both valid register names.
12531
 
12532
   Register names `PC', `SP' and `SR' cannot be used as register names
12533
and will be treated as variables. Use `r0', `r1', and `r2' instead.
12534
 
12535

12536
File: as.info,  Node: MSP430-Ext,  Prev: MSP430-Regs,  Up: MSP430 Syntax
12537
 
12538
9.24.2.4 Assembler Extensions
12539
.............................
12540
 
12541
`@rN'
12542
     As destination operand being treated as `0(rn)'
12543
 
12544
`0(rN)'
12545
     As source operand being treated as `@rn'
12546
 
12547
`jCOND +N'
12548
     Skips next N bytes followed by jump instruction and equivalent to
12549
     `jCOND $+N+2'
12550
 
12551
 
12552
   Also, there are some instructions, which cannot be found in other
12553
assemblers.  These are branch instructions, which has different opcodes
12554
upon jump distance.  They all got PC relative addressing mode.
12555
 
12556
`beq label'
12557
     A polymorph instruction which is `jeq label' in case if jump
12558
     distance within allowed range for cpu's jump instruction. If not,
12559
     this unrolls into a sequence of
12560
            jne $+6
12561
            br  label
12562
 
12563
`bne label'
12564
     A polymorph instruction which is `jne label' or `jeq +4; br label'
12565
 
12566
`blt label'
12567
     A polymorph instruction which is `jl label' or `jge +4; br label'
12568
 
12569
`bltn label'
12570
     A polymorph instruction which is `jn label' or `jn +2; jmp +4; br
12571
     label'
12572
 
12573
`bltu label'
12574
     A polymorph instruction which is `jlo label' or `jhs +2; br label'
12575
 
12576
`bge label'
12577
     A polymorph instruction which is `jge label' or `jl +4; br label'
12578
 
12579
`bgeu label'
12580
     A polymorph instruction which is `jhs label' or `jlo +4; br label'
12581
 
12582
`bgt label'
12583
     A polymorph instruction which is `jeq +2; jge label' or `jeq +6;
12584
     jl  +4; br label'
12585
 
12586
`bgtu label'
12587
     A polymorph instruction which is `jeq +2; jhs label' or `jeq +6;
12588
     jlo +4; br label'
12589
 
12590
`bleu label'
12591
     A polymorph instruction which is `jeq label; jlo label' or `jeq
12592
     +2; jhs +4; br label'
12593
 
12594
`ble label'
12595
     A polymorph instruction which is `jeq label; jl  label' or `jeq
12596
     +2; jge +4; br label'
12597
 
12598
`jump label'
12599
     A polymorph instruction which is `jmp label' or `br label'
12600
 
12601

12602
File: as.info,  Node: MSP430 Floating Point,  Next: MSP430 Directives,  Prev: MSP430 Syntax,  Up: MSP430-Dependent
12603
 
12604
9.24.3 Floating Point
12605
---------------------
12606
 
12607
The MSP 430 family uses IEEE 32-bit floating-point numbers.
12608
 
12609

12610
File: as.info,  Node: MSP430 Directives,  Next: MSP430 Opcodes,  Prev: MSP430 Floating Point,  Up: MSP430-Dependent
12611
 
12612
9.24.4 MSP 430 Machine Directives
12613
---------------------------------
12614
 
12615
`.file'
12616
     This directive is ignored; it is accepted for compatibility with
12617
     other MSP 430 assemblers.
12618
 
12619
          _Warning:_ in other versions of the GNU assembler, `.file' is
12620
          used for the directive called `.app-file' in the MSP 430
12621
          support.
12622
 
12623
`.line'
12624
     This directive is ignored; it is accepted for compatibility with
12625
     other MSP 430 assemblers.
12626
 
12627
`.arch'
12628
     Currently this directive is ignored; it is accepted for
12629
     compatibility with other MSP 430 assemblers.
12630
 
12631
`.profiler'
12632
     This directive instructs assembler to add new profile entry to the
12633
     object file.
12634
 
12635
 
12636

12637
File: as.info,  Node: MSP430 Opcodes,  Next: MSP430 Profiling Capability,  Prev: MSP430 Directives,  Up: MSP430-Dependent
12638
 
12639
9.24.5 Opcodes
12640
--------------
12641
 
12642
`as' implements all the standard MSP 430 opcodes.  No additional
12643
pseudo-instructions are needed on this family.
12644
 
12645
   For information on the 430 machine instruction set, see `MSP430
12646
User's Manual, document slau049d', Texas Instrument, Inc.
12647
 
12648

12649
File: as.info,  Node: MSP430 Profiling Capability,  Prev: MSP430 Opcodes,  Up: MSP430-Dependent
12650
 
12651
9.24.6 Profiling Capability
12652
---------------------------
12653
 
12654
It is a performance hit to use gcc's profiling approach for this tiny
12655
target.  Even more - jtag hardware facility does not perform any
12656
profiling functions.  However we've got gdb's built-in simulator where
12657
we can do anything.
12658
 
12659
   We define new section `.profiler' which holds all profiling
12660
information.  We define new pseudo operation `.profiler' which will
12661
instruct assembler to add new profile entry to the object file. Profile
12662
should take place at the present address.
12663
 
12664
   Pseudo operation format:
12665
 
12666
   `.profiler flags,function_to_profile [, cycle_corrector, extra]'
12667
 
12668
   where:
12669
 
12670
          `flags' is a combination of the following characters:
12671
 
12672
    `s'
12673
          function entry
12674
 
12675
    `x'
12676
          function exit
12677
 
12678
    `i'
12679
          function is in init section
12680
 
12681
    `f'
12682
          function is in fini section
12683
 
12684
    `l'
12685
          library call
12686
 
12687
    `c'
12688
          libc standard call
12689
 
12690
    `d'
12691
          stack value demand
12692
 
12693
    `I'
12694
          interrupt service routine
12695
 
12696
    `P'
12697
          prologue start
12698
 
12699
    `p'
12700
          prologue end
12701
 
12702
    `E'
12703
          epilogue start
12704
 
12705
    `e'
12706
          epilogue end
12707
 
12708
    `j'
12709
          long jump / sjlj unwind
12710
 
12711
    `a'
12712
          an arbitrary code fragment
12713
 
12714
    `t'
12715
          extra parameter saved (a constant value like frame size)
12716
 
12717
`function_to_profile'
12718
     a function address
12719
 
12720
`cycle_corrector'
12721
     a value which should be added to the cycle counter, zero if
12722
     omitted.
12723
 
12724
`extra'
12725
     any extra parameter, zero if omitted.
12726
 
12727
 
12728
   For example:
12729
     .global fxx
12730
     .type fxx,@function
12731
     fxx:
12732
     .LFrameOffset_fxx=0x08
12733
     .profiler "scdP", fxx     ; function entry.
12734
                          ; we also demand stack value to be saved
12735
       push r11
12736
       push r10
12737
       push r9
12738
       push r8
12739
     .profiler "cdpt",fxx,0, .LFrameOffset_fxx  ; check stack value at this point
12740
                                          ; (this is a prologue end)
12741
                                          ; note, that spare var filled with
12742
                                          ; the farme size
12743
       mov r15,r8
12744
     ...
12745
     .profiler cdE,fxx         ; check stack
12746
       pop r8
12747
       pop r9
12748
       pop r10
12749
       pop r11
12750
     .profiler xcde,fxx,3      ; exit adds 3 to the cycle counter
12751
       ret                     ; cause 'ret' insn takes 3 cycles
12752
 
12753

12754
File: as.info,  Node: PDP-11-Dependent,  Next: PJ-Dependent,  Prev: SH64-Dependent,  Up: Machine Dependencies
12755
 
12756
9.25 PDP-11 Dependent Features
12757
==============================
12758
 
12759
* Menu:
12760
 
12761
* PDP-11-Options::              Options
12762
* PDP-11-Pseudos::              Assembler Directives
12763
* PDP-11-Syntax::               DEC Syntax versus BSD Syntax
12764
* PDP-11-Mnemonics::            Instruction Naming
12765
* PDP-11-Synthetic::            Synthetic Instructions
12766
 
12767

12768
File: as.info,  Node: PDP-11-Options,  Next: PDP-11-Pseudos,  Up: PDP-11-Dependent
12769
 
12770
9.25.1 Options
12771
--------------
12772
 
12773
The PDP-11 version of `as' has a rich set of machine dependent options.
12774
 
12775
9.25.1.1 Code Generation Options
12776
................................
12777
 
12778
`-mpic | -mno-pic'
12779
     Generate position-independent (or position-dependent) code.
12780
 
12781
     The default is to generate position-independent code.
12782
 
12783
9.25.1.2 Instruction Set Extension Options
12784
..........................................
12785
 
12786
These options enables or disables the use of extensions over the base
12787
line instruction set as introduced by the first PDP-11 CPU: the KA11.
12788
Most options come in two variants: a `-m'EXTENSION that enables
12789
EXTENSION, and a `-mno-'EXTENSION that disables EXTENSION.
12790
 
12791
   The default is to enable all extensions.
12792
 
12793
`-mall | -mall-extensions'
12794
     Enable all instruction set extensions.
12795
 
12796
`-mno-extensions'
12797
     Disable all instruction set extensions.
12798
 
12799
`-mcis | -mno-cis'
12800
     Enable (or disable) the use of the commercial instruction set,
12801
     which consists of these instructions: `ADDNI', `ADDN', `ADDPI',
12802
     `ADDP', `ASHNI', `ASHN', `ASHPI', `ASHP', `CMPCI', `CMPC',
12803
     `CMPNI', `CMPN', `CMPPI', `CMPP', `CVTLNI', `CVTLN', `CVTLPI',
12804
     `CVTLP', `CVTNLI', `CVTNL', `CVTNPI', `CVTNP', `CVTPLI', `CVTPL',
12805
     `CVTPNI', `CVTPN', `DIVPI', `DIVP', `L2DR', `L3DR', `LOCCI',
12806
     `LOCC', `MATCI', `MATC', `MOVCI', `MOVC', `MOVRCI', `MOVRC',
12807
     `MOVTCI', `MOVTC', `MULPI', `MULP', `SCANCI', `SCANC', `SKPCI',
12808
     `SKPC', `SPANCI', `SPANC', `SUBNI', `SUBN', `SUBPI', and `SUBP'.
12809
 
12810
`-mcsm | -mno-csm'
12811
     Enable (or disable) the use of the `CSM' instruction.
12812
 
12813
`-meis | -mno-eis'
12814
     Enable (or disable) the use of the extended instruction set, which
12815
     consists of these instructions: `ASHC', `ASH', `DIV', `MARK',
12816
     `MUL', `RTT', `SOB' `SXT', and `XOR'.
12817
 
12818
`-mfis | -mkev11'
12819
`-mno-fis | -mno-kev11'
12820
     Enable (or disable) the use of the KEV11 floating-point
12821
     instructions: `FADD', `FDIV', `FMUL', and `FSUB'.
12822
 
12823
`-mfpp | -mfpu | -mfp-11'
12824
`-mno-fpp | -mno-fpu | -mno-fp-11'
12825
     Enable (or disable) the use of FP-11 floating-point instructions:
12826
     `ABSF', `ADDF', `CFCC', `CLRF', `CMPF', `DIVF', `LDCFF', `LDCIF',
12827
     `LDEXP', `LDF', `LDFPS', `MODF', `MULF', `NEGF', `SETD', `SETF',
12828
     `SETI', `SETL', `STCFF', `STCFI', `STEXP', `STF', `STFPS', `STST',
12829
     `SUBF', and `TSTF'.
12830
 
12831
`-mlimited-eis | -mno-limited-eis'
12832
     Enable (or disable) the use of the limited extended instruction
12833
     set: `MARK', `RTT', `SOB', `SXT', and `XOR'.
12834
 
12835
     The -mno-limited-eis options also implies -mno-eis.
12836
 
12837
`-mmfpt | -mno-mfpt'
12838
     Enable (or disable) the use of the `MFPT' instruction.
12839
 
12840
`-mmultiproc | -mno-multiproc'
12841
     Enable (or disable) the use of multiprocessor instructions:
12842
     `TSTSET' and `WRTLCK'.
12843
 
12844
`-mmxps | -mno-mxps'
12845
     Enable (or disable) the use of the `MFPS' and `MTPS' instructions.
12846
 
12847
`-mspl | -mno-spl'
12848
     Enable (or disable) the use of the `SPL' instruction.
12849
 
12850
     Enable (or disable) the use of the microcode instructions: `LDUB',
12851
     `MED', and `XFC'.
12852
 
12853
9.25.1.3 CPU Model Options
12854
..........................
12855
 
12856
These options enable the instruction set extensions supported by a
12857
particular CPU, and disables all other extensions.
12858
 
12859
`-mka11'
12860
     KA11 CPU.  Base line instruction set only.
12861
 
12862
`-mkb11'
12863
     KB11 CPU.  Enable extended instruction set and `SPL'.
12864
 
12865
`-mkd11a'
12866
     KD11-A CPU.  Enable limited extended instruction set.
12867
 
12868
`-mkd11b'
12869
     KD11-B CPU.  Base line instruction set only.
12870
 
12871
`-mkd11d'
12872
     KD11-D CPU.  Base line instruction set only.
12873
 
12874
`-mkd11e'
12875
     KD11-E CPU.  Enable extended instruction set, `MFPS', and `MTPS'.
12876
 
12877
`-mkd11f | -mkd11h | -mkd11q'
12878
     KD11-F, KD11-H, or KD11-Q CPU.  Enable limited extended
12879
     instruction set, `MFPS', and `MTPS'.
12880
 
12881
`-mkd11k'
12882
     KD11-K CPU.  Enable extended instruction set, `LDUB', `MED',
12883
     `MFPS', `MFPT', `MTPS', and `XFC'.
12884
 
12885
`-mkd11z'
12886
     KD11-Z CPU.  Enable extended instruction set, `CSM', `MFPS',
12887
     `MFPT', `MTPS', and `SPL'.
12888
 
12889
`-mf11'
12890
     F11 CPU.  Enable extended instruction set, `MFPS', `MFPT', and
12891
     `MTPS'.
12892
 
12893
`-mj11'
12894
     J11 CPU.  Enable extended instruction set, `CSM', `MFPS', `MFPT',
12895
     `MTPS', `SPL', `TSTSET', and `WRTLCK'.
12896
 
12897
`-mt11'
12898
     T11 CPU.  Enable limited extended instruction set, `MFPS', and
12899
     `MTPS'.
12900
 
12901
9.25.1.4 Machine Model Options
12902
..............................
12903
 
12904
These options enable the instruction set extensions supported by a
12905
particular machine model, and disables all other extensions.
12906
 
12907
`-m11/03'
12908
     Same as `-mkd11f'.
12909
 
12910
`-m11/04'
12911
     Same as `-mkd11d'.
12912
 
12913
`-m11/05 | -m11/10'
12914
     Same as `-mkd11b'.
12915
 
12916
`-m11/15 | -m11/20'
12917
     Same as `-mka11'.
12918
 
12919
`-m11/21'
12920
     Same as `-mt11'.
12921
 
12922
`-m11/23 | -m11/24'
12923
     Same as `-mf11'.
12924
 
12925
`-m11/34'
12926
     Same as `-mkd11e'.
12927
 
12928
`-m11/34a'
12929
     Ame as `-mkd11e' `-mfpp'.
12930
 
12931
`-m11/35 | -m11/40'
12932
     Same as `-mkd11a'.
12933
 
12934
`-m11/44'
12935
     Same as `-mkd11z'.
12936
 
12937
`-m11/45 | -m11/50 | -m11/55 | -m11/70'
12938
     Same as `-mkb11'.
12939
 
12940
`-m11/53 | -m11/73 | -m11/83 | -m11/84 | -m11/93 | -m11/94'
12941
     Same as `-mj11'.
12942
 
12943
`-m11/60'
12944
     Same as `-mkd11k'.
12945
 
12946

12947
File: as.info,  Node: PDP-11-Pseudos,  Next: PDP-11-Syntax,  Prev: PDP-11-Options,  Up: PDP-11-Dependent
12948
 
12949
9.25.2 Assembler Directives
12950
---------------------------
12951
 
12952
The PDP-11 version of `as' has a few machine dependent assembler
12953
directives.
12954
 
12955
`.bss'
12956
     Switch to the `bss' section.
12957
 
12958
`.even'
12959
     Align the location counter to an even number.
12960
 
12961

12962
File: as.info,  Node: PDP-11-Syntax,  Next: PDP-11-Mnemonics,  Prev: PDP-11-Pseudos,  Up: PDP-11-Dependent
12963
 
12964
9.25.3 PDP-11 Assembly Language Syntax
12965
--------------------------------------
12966
 
12967
`as' supports both DEC syntax and BSD syntax.  The only difference is
12968
that in DEC syntax, a `#' character is used to denote an immediate
12969
constants, while in BSD syntax the character for this purpose is `$'.
12970
 
12971
   general-purpose registers are named `r0' through `r7'.  Mnemonic
12972
alternatives for `r6' and `r7' are `sp' and `pc', respectively.
12973
 
12974
   Floating-point registers are named `ac0' through `ac3', or
12975
alternatively `fr0' through `fr3'.
12976
 
12977
   Comments are started with a `#' or a `/' character, and extend to
12978
the end of the line.  (FIXME: clash with immediates?)
12979
 
12980

12981
File: as.info,  Node: PDP-11-Mnemonics,  Next: PDP-11-Synthetic,  Prev: PDP-11-Syntax,  Up: PDP-11-Dependent
12982
 
12983
9.25.4 Instruction Naming
12984
-------------------------
12985
 
12986
Some instructions have alternative names.
12987
 
12988
`BCC'
12989
     `BHIS'
12990
 
12991
`BCS'
12992
     `BLO'
12993
 
12994
`L2DR'
12995
     `L2D'
12996
 
12997
`L3DR'
12998
     `L3D'
12999
 
13000
`SYS'
13001
     `TRAP'
13002
 
13003

13004
File: as.info,  Node: PDP-11-Synthetic,  Prev: PDP-11-Mnemonics,  Up: PDP-11-Dependent
13005
 
13006
9.25.5 Synthetic Instructions
13007
-----------------------------
13008
 
13009
The `JBR' and `J'CC synthetic instructions are not supported yet.
13010
 
13011

13012
File: as.info,  Node: PJ-Dependent,  Next: PPC-Dependent,  Prev: PDP-11-Dependent,  Up: Machine Dependencies
13013
 
13014
9.26 picoJava Dependent Features
13015
================================
13016
 
13017
* Menu:
13018
 
13019
* PJ Options::              Options
13020
 
13021

13022
File: as.info,  Node: PJ Options,  Up: PJ-Dependent
13023
 
13024
9.26.1 Options
13025
--------------
13026
 
13027
`as' has two additional command-line options for the picoJava
13028
architecture.
13029
`-ml'
13030
     This option selects little endian data output.
13031
 
13032
`-mb'
13033
     This option selects big endian data output.
13034
 
13035

13036
File: as.info,  Node: PPC-Dependent,  Next: Sparc-Dependent,  Prev: PJ-Dependent,  Up: Machine Dependencies
13037
 
13038
9.27 PowerPC Dependent Features
13039
===============================
13040
 
13041
* Menu:
13042
 
13043
* PowerPC-Opts::                Options
13044
* PowerPC-Pseudo::              PowerPC Assembler Directives
13045
 
13046

13047
File: as.info,  Node: PowerPC-Opts,  Next: PowerPC-Pseudo,  Up: PPC-Dependent
13048
 
13049
9.27.1 Options
13050
--------------
13051
 
13052
The PowerPC chip family includes several successive levels, using the
13053
same core instruction set, but including a few additional instructions
13054
at each level.  There are exceptions to this however.  For details on
13055
what instructions each variant supports, please see the chip's
13056
architecture reference manual.
13057
 
13058
   The following table lists all available PowerPC options.
13059
 
13060
`-mpwrx | -mpwr2'
13061
     Generate code for POWER/2 (RIOS2).
13062
 
13063
`-mpwr'
13064
     Generate code for POWER (RIOS1)
13065
 
13066
`-m601'
13067
     Generate code for PowerPC 601.
13068
 
13069
`-mppc, -mppc32, -m603, -m604'
13070
     Generate code for PowerPC 603/604.
13071
 
13072
`-m403, -m405'
13073
     Generate code for PowerPC 403/405.
13074
 
13075
`-m440'
13076
     Generate code for PowerPC 440.  BookE and some 405 instructions.
13077
 
13078
`-m7400, -m7410, -m7450, -m7455'
13079
     Generate code for PowerPC 7400/7410/7450/7455.
13080
 
13081
`-m750cl'
13082
     Generate code for PowerPC 750CL.
13083
 
13084
`-mppc64, -m620'
13085
     Generate code for PowerPC 620/625/630.
13086
 
13087
`-me500, -me500x2'
13088
     Generate code for Motorola e500 core complex.
13089
 
13090
`-mspe'
13091
     Generate code for Motorola SPE instructions.
13092
 
13093
`-mppc64bridge'
13094
     Generate code for PowerPC 64, including bridge insns.
13095
 
13096
`-mbooke64'
13097
     Generate code for 64-bit BookE.
13098
 
13099
`-mbooke, mbooke32'
13100
     Generate code for 32-bit BookE.
13101
 
13102
`-me300'
13103
     Generate code for PowerPC e300 family.
13104
 
13105
`-maltivec'
13106
     Generate code for processors with AltiVec instructions.
13107
 
13108
`-mpower4'
13109
     Generate code for Power4 architecture.
13110
 
13111
`-mpower5'
13112
     Generate code for Power5 architecture.
13113
 
13114
`-mpower6'
13115
     Generate code for Power6 architecture.
13116
 
13117
`-mcell'
13118
     Generate code for Cell Broadband Engine architecture.
13119
 
13120
`-mcom'
13121
     Generate code Power/PowerPC common instructions.
13122
 
13123
`-many'
13124
     Generate code for any architecture (PWR/PWRX/PPC).
13125
 
13126
`-mregnames'
13127
     Allow symbolic names for registers.
13128
 
13129
`-mno-regnames'
13130
     Do not allow symbolic names for registers.
13131
 
13132
`-mrelocatable'
13133
     Support for GCC's -mrelocatable option.
13134
 
13135
`-mrelocatable-lib'
13136
     Support for GCC's -mrelocatable-lib option.
13137
 
13138
`-memb'
13139
     Set PPC_EMB bit in ELF flags.
13140
 
13141
`-mlittle, -mlittle-endian'
13142
     Generate code for a little endian machine.
13143
 
13144
`-mbig, -mbig-endian'
13145
     Generate code for a big endian machine.
13146
 
13147
`-msolaris'
13148
     Generate code for Solaris.
13149
 
13150
`-mno-solaris'
13151
     Do not generate code for Solaris.
13152
 
13153

13154
File: as.info,  Node: PowerPC-Pseudo,  Prev: PowerPC-Opts,  Up: PPC-Dependent
13155
 
13156
9.27.2 PowerPC Assembler Directives
13157
-----------------------------------
13158
 
13159
A number of assembler directives are available for PowerPC.  The
13160
following table is far from complete.
13161
 
13162
`.machine "string"'
13163
     This directive allows you to change the machine for which code is
13164
     generated.  `"string"' may be any of the -m cpu selection options
13165
     (without the -m) enclosed in double quotes, `"push"', or `"pop"'.
13166
     `.machine "push"' saves the currently selected cpu, which may be
13167
     restored with `.machine "pop"'.
13168
 
13169

13170
File: as.info,  Node: SH-Dependent,  Next: SH64-Dependent,  Prev: MSP430-Dependent,  Up: Machine Dependencies
13171
 
13172
9.28 Renesas / SuperH SH Dependent Features
13173
===========================================
13174
 
13175
* Menu:
13176
 
13177
* SH Options::              Options
13178
* SH Syntax::               Syntax
13179
* SH Floating Point::       Floating Point
13180
* SH Directives::           SH Machine Directives
13181
* SH Opcodes::              Opcodes
13182
 
13183

13184
File: as.info,  Node: SH Options,  Next: SH Syntax,  Up: SH-Dependent
13185
 
13186
9.28.1 Options
13187
--------------
13188
 
13189
`as' has following command-line options for the Renesas (formerly
13190
Hitachi) / SuperH SH family.
13191
 
13192
`--little'
13193
     Generate little endian code.
13194
 
13195
`--big'
13196
     Generate big endian code.
13197
 
13198
`--relax'
13199
     Alter jump instructions for long displacements.
13200
 
13201
`--small'
13202
     Align sections to 4 byte boundaries, not 16.
13203
 
13204
`--dsp'
13205
     Enable sh-dsp insns, and disable sh3e / sh4 insns.
13206
 
13207
`--renesas'
13208
     Disable optimization with section symbol for compatibility with
13209
     Renesas assembler.
13210
 
13211
`--allow-reg-prefix'
13212
     Allow '$' as a register name prefix.
13213
 
13214
`--isa=sh4 | sh4a'
13215
     Specify the sh4 or sh4a instruction set.
13216
 
13217
`--isa=dsp'
13218
     Enable sh-dsp insns, and disable sh3e / sh4 insns.
13219
 
13220
`--isa=fp'
13221
     Enable sh2e, sh3e, sh4, and sh4a insn sets.
13222
 
13223
`--isa=all'
13224
     Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets.
13225
 
13226
 
13227

13228
File: as.info,  Node: SH Syntax,  Next: SH Floating Point,  Prev: SH Options,  Up: SH-Dependent
13229
 
13230
9.28.2 Syntax
13231
-------------
13232
 
13233
* Menu:
13234
 
13235
* SH-Chars::                Special Characters
13236
* SH-Regs::                 Register Names
13237
* SH-Addressing::           Addressing Modes
13238
 
13239

13240
File: as.info,  Node: SH-Chars,  Next: SH-Regs,  Up: SH Syntax
13241
 
13242
9.28.2.1 Special Characters
13243
...........................
13244
 
13245
`!' is the line comment character.
13246
 
13247
   You can use `;' instead of a newline to separate statements.
13248
 
13249
   Since `$' has no special meaning, you may use it in symbol names.
13250
 
13251

13252
File: as.info,  Node: SH-Regs,  Next: SH-Addressing,  Prev: SH-Chars,  Up: SH Syntax
13253
 
13254
9.28.2.2 Register Names
13255
.......................
13256
 
13257
You can use the predefined symbols `r0', `r1', `r2', `r3', `r4', `r5',
13258
`r6', `r7', `r8', `r9', `r10', `r11', `r12', `r13', `r14', and `r15' to
13259
refer to the SH registers.
13260
 
13261
   The SH also has these control registers:
13262
 
13263
`pr'
13264
     procedure register (holds return address)
13265
 
13266
`pc'
13267
     program counter
13268
 
13269
`mach'
13270
`macl'
13271
     high and low multiply accumulator registers
13272
 
13273
`sr'
13274
     status register
13275
 
13276
`gbr'
13277
     global base register
13278
 
13279
`vbr'
13280
     vector base register (for interrupt vectors)
13281
 
13282

13283
File: as.info,  Node: SH-Addressing,  Prev: SH-Regs,  Up: SH Syntax
13284
 
13285
9.28.2.3 Addressing Modes
13286
.........................
13287
 
13288
`as' understands the following addressing modes for the SH.  `RN' in
13289
the following refers to any of the numbered registers, but _not_ the
13290
control registers.
13291
 
13292
`RN'
13293
     Register direct
13294
 
13295
`@RN'
13296
     Register indirect
13297
 
13298
`@-RN'
13299
     Register indirect with pre-decrement
13300
 
13301
`@RN+'
13302
     Register indirect with post-increment
13303
 
13304
`@(DISP, RN)'
13305
     Register indirect with displacement
13306
 
13307
`@(R0, RN)'
13308
     Register indexed
13309
 
13310
`@(DISP, GBR)'
13311
     `GBR' offset
13312
 
13313
`@(R0, GBR)'
13314
     GBR indexed
13315
 
13316
`ADDR'
13317
`@(DISP, PC)'
13318
     PC relative address (for branch or for addressing memory).  The
13319
     `as' implementation allows you to use the simpler form ADDR
13320
     anywhere a PC relative address is called for; the alternate form
13321
     is supported for compatibility with other assemblers.
13322
 
13323
`#IMM'
13324
     Immediate data
13325
 
13326

13327
File: as.info,  Node: SH Floating Point,  Next: SH Directives,  Prev: SH Syntax,  Up: SH-Dependent
13328
 
13329
9.28.3 Floating Point
13330
---------------------
13331
 
13332
SH2E, SH3E and SH4 groups have on-chip floating-point unit (FPU). Other
13333
SH groups can use `.float' directive to generate IEEE floating-point
13334
numbers.
13335
 
13336
   SH2E and SH3E support single-precision floating point calculations as
13337
well as entirely PCAPI compatible emulation of double-precision
13338
floating point calculations. SH2E and SH3E instructions are a subset of
13339
the floating point calculations conforming to the IEEE754 standard.
13340
 
13341
   In addition to single-precision and double-precision floating-point
13342
operation capability, the on-chip FPU of SH4 has a 128-bit graphic
13343
engine that enables 32-bit floating-point data to be processed 128 bits
13344
at a time. It also supports 4 * 4 array operations and inner product
13345
operations. Also, a superscalar architecture is employed that enables
13346
simultaneous execution of two instructions (including FPU
13347
instructions), providing performance of up to twice that of
13348
conventional architectures at the same frequency.
13349
 
13350

13351
File: as.info,  Node: SH Directives,  Next: SH Opcodes,  Prev: SH Floating Point,  Up: SH-Dependent
13352
 
13353
9.28.4 SH Machine Directives
13354
----------------------------
13355
 
13356
`uaword'
13357
`ualong'
13358
     `as' will issue a warning when a misaligned `.word' or `.long'
13359
     directive is used.  You may use `.uaword' or `.ualong' to indicate
13360
     that the value is intentionally misaligned.
13361
 
13362

13363
File: as.info,  Node: SH Opcodes,  Prev: SH Directives,  Up: SH-Dependent
13364
 
13365
9.28.5 Opcodes
13366
--------------
13367
 
13368
For detailed information on the SH machine instruction set, see
13369
`SH-Microcomputer User's Manual' (Renesas) or `SH-4 32-bit CPU Core
13370
Architecture' (SuperH) and `SuperH (SH) 64-Bit RISC Series' (SuperH).
13371
 
13372
   `as' implements all the standard SH opcodes.  No additional
13373
pseudo-instructions are needed on this family.  Note, however, that
13374
because `as' supports a simpler form of PC-relative addressing, you may
13375
simply write (for example)
13376
 
13377
     mov.l  bar,r0
13378
 
13379
where other assemblers might require an explicit displacement to `bar'
13380
from the program counter:
13381
 
13382
     mov.l  @(DISP, PC)
13383
 
13384
   Here is a summary of SH opcodes:
13385
 
13386
     Legend:
13387
     Rn        a numbered register
13388
     Rm        another numbered register
13389
     #imm      immediate data
13390
     disp      displacement
13391
     disp8     8-bit displacement
13392
     disp12    12-bit displacement
13393
 
13394
     add #imm,Rn                    lds.l @Rn+,PR
13395
     add Rm,Rn                      mac.w @Rm+,@Rn+
13396
     addc Rm,Rn                     mov #imm,Rn
13397
     addv Rm,Rn                     mov Rm,Rn
13398
     and #imm,R0                    mov.b Rm,@(R0,Rn)
13399
     and Rm,Rn                      mov.b Rm,@-Rn
13400
     and.b #imm,@(R0,GBR)           mov.b Rm,@Rn
13401
     bf disp8                       mov.b @(disp,Rm),R0
13402
     bra disp12                     mov.b @(disp,GBR),R0
13403
     bsr disp12                     mov.b @(R0,Rm),Rn
13404
     bt disp8                       mov.b @Rm+,Rn
13405
     clrmac                         mov.b @Rm,Rn
13406
     clrt                           mov.b R0,@(disp,Rm)
13407
     cmp/eq #imm,R0                 mov.b R0,@(disp,GBR)
13408
     cmp/eq Rm,Rn                   mov.l Rm,@(disp,Rn)
13409
     cmp/ge Rm,Rn                   mov.l Rm,@(R0,Rn)
13410
     cmp/gt Rm,Rn                   mov.l Rm,@-Rn
13411
     cmp/hi Rm,Rn                   mov.l Rm,@Rn
13412
     cmp/hs Rm,Rn                   mov.l @(disp,Rn),Rm
13413
     cmp/pl Rn                      mov.l @(disp,GBR),R0
13414
     cmp/pz Rn                      mov.l @(disp,PC),Rn
13415
     cmp/str Rm,Rn                  mov.l @(R0,Rm),Rn
13416
     div0s Rm,Rn                    mov.l @Rm+,Rn
13417
     div0u                          mov.l @Rm,Rn
13418
     div1 Rm,Rn                     mov.l R0,@(disp,GBR)
13419
     exts.b Rm,Rn                   mov.w Rm,@(R0,Rn)
13420
     exts.w Rm,Rn                   mov.w Rm,@-Rn
13421
     extu.b Rm,Rn                   mov.w Rm,@Rn
13422
     extu.w Rm,Rn                   mov.w @(disp,Rm),R0
13423
     jmp @Rn                        mov.w @(disp,GBR),R0
13424
     jsr @Rn                        mov.w @(disp,PC),Rn
13425
     ldc Rn,GBR                     mov.w @(R0,Rm),Rn
13426
     ldc Rn,SR                      mov.w @Rm+,Rn
13427
     ldc Rn,VBR                     mov.w @Rm,Rn
13428
     ldc.l @Rn+,GBR                 mov.w R0,@(disp,Rm)
13429
     ldc.l @Rn+,SR                  mov.w R0,@(disp,GBR)
13430
     ldc.l @Rn+,VBR                 mova @(disp,PC),R0
13431
     lds Rn,MACH                    movt Rn
13432
     lds Rn,MACL                    muls Rm,Rn
13433
     lds Rn,PR                      mulu Rm,Rn
13434
     lds.l @Rn+,MACH                neg Rm,Rn
13435
     lds.l @Rn+,MACL                negc Rm,Rn
13436
 
13437
     nop                            stc VBR,Rn
13438
     not Rm,Rn                      stc.l GBR,@-Rn
13439
     or #imm,R0                     stc.l SR,@-Rn
13440
     or Rm,Rn                       stc.l VBR,@-Rn
13441
     or.b #imm,@(R0,GBR)            sts MACH,Rn
13442
     rotcl Rn                       sts MACL,Rn
13443
     rotcr Rn                       sts PR,Rn
13444
     rotl Rn                        sts.l MACH,@-Rn
13445
     rotr Rn                        sts.l MACL,@-Rn
13446
     rte                            sts.l PR,@-Rn
13447
     rts                            sub Rm,Rn
13448
     sett                           subc Rm,Rn
13449
     shal Rn                        subv Rm,Rn
13450
     shar Rn                        swap.b Rm,Rn
13451
     shll Rn                        swap.w Rm,Rn
13452
     shll16 Rn                      tas.b @Rn
13453
     shll2 Rn                       trapa #imm
13454
     shll8 Rn                       tst #imm,R0
13455
     shlr Rn                        tst Rm,Rn
13456
     shlr16 Rn                      tst.b #imm,@(R0,GBR)
13457
     shlr2 Rn                       xor #imm,R0
13458
     shlr8 Rn                       xor Rm,Rn
13459
     sleep                          xor.b #imm,@(R0,GBR)
13460
     stc GBR,Rn                     xtrct Rm,Rn
13461
     stc SR,Rn
13462
 
13463

13464
File: as.info,  Node: SH64-Dependent,  Next: PDP-11-Dependent,  Prev: SH-Dependent,  Up: Machine Dependencies
13465
 
13466
9.29 SuperH SH64 Dependent Features
13467
===================================
13468
 
13469
* Menu:
13470
 
13471
* SH64 Options::              Options
13472
* SH64 Syntax::               Syntax
13473
* SH64 Directives::           SH64 Machine Directives
13474
* SH64 Opcodes::              Opcodes
13475
 
13476

13477
File: as.info,  Node: SH64 Options,  Next: SH64 Syntax,  Up: SH64-Dependent
13478
 
13479
9.29.1 Options
13480
--------------
13481
 
13482
`-isa=sh4 | sh4a'
13483
     Specify the sh4 or sh4a instruction set.
13484
 
13485
`-isa=dsp'
13486
     Enable sh-dsp insns, and disable sh3e / sh4 insns.
13487
 
13488
`-isa=fp'
13489
     Enable sh2e, sh3e, sh4, and sh4a insn sets.
13490
 
13491
`-isa=all'
13492
     Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets.
13493
 
13494
`-isa=shmedia | -isa=shcompact'
13495
     Specify the default instruction set.  `SHmedia' specifies the
13496
     32-bit opcodes, and `SHcompact' specifies the 16-bit opcodes
13497
     compatible with previous SH families.  The default depends on the
13498
     ABI selected; the default for the 64-bit ABI is SHmedia, and the
13499
     default for the 32-bit ABI is SHcompact.  If neither the ABI nor
13500
     the ISA is specified, the default is 32-bit SHcompact.
13501
 
13502
     Note that the `.mode' pseudo-op is not permitted if the ISA is not
13503
     specified on the command line.
13504
 
13505
`-abi=32 | -abi=64'
13506
     Specify the default ABI.  If the ISA is specified and the ABI is
13507
     not, the default ABI depends on the ISA, with SHmedia defaulting
13508
     to 64-bit and SHcompact defaulting to 32-bit.
13509
 
13510
     Note that the `.abi' pseudo-op is not permitted if the ABI is not
13511
     specified on the command line.  When the ABI is specified on the
13512
     command line, any `.abi' pseudo-ops in the source must match it.
13513
 
13514
`-shcompact-const-crange'
13515
     Emit code-range descriptors for constants in SHcompact code
13516
     sections.
13517
 
13518
`-no-mix'
13519
     Disallow SHmedia code in the same section as constants and
13520
     SHcompact code.
13521
 
13522
`-no-expand'
13523
     Do not expand MOVI, PT, PTA or PTB instructions.
13524
 
13525
`-expand-pt32'
13526
     With -abi=64, expand PT, PTA and PTB instructions to 32 bits only.
13527
 
13528
 
13529

13530
File: as.info,  Node: SH64 Syntax,  Next: SH64 Directives,  Prev: SH64 Options,  Up: SH64-Dependent
13531
 
13532
9.29.2 Syntax
13533
-------------
13534
 
13535
* Menu:
13536
 
13537
* SH64-Chars::                Special Characters
13538
* SH64-Regs::                 Register Names
13539
* SH64-Addressing::           Addressing Modes
13540
 
13541

13542
File: as.info,  Node: SH64-Chars,  Next: SH64-Regs,  Up: SH64 Syntax
13543
 
13544
9.29.2.1 Special Characters
13545
...........................
13546
 
13547
`!' is the line comment character.
13548
 
13549
   You can use `;' instead of a newline to separate statements.
13550
 
13551
   Since `$' has no special meaning, you may use it in symbol names.
13552
 
13553

13554
File: as.info,  Node: SH64-Regs,  Next: SH64-Addressing,  Prev: SH64-Chars,  Up: SH64 Syntax
13555
 
13556
9.29.2.2 Register Names
13557
.......................
13558
 
13559
You can use the predefined symbols `r0' through `r63' to refer to the
13560
SH64 general registers, `cr0' through `cr63' for control registers,
13561
`tr0' through `tr7' for target address registers, `fr0' through `fr63'
13562
for single-precision floating point registers, `dr0' through `dr62'
13563
(even numbered registers only) for double-precision floating point
13564
registers, `fv0' through `fv60' (multiples of four only) for
13565
single-precision floating point vectors, `fp0' through `fp62' (even
13566
numbered registers only) for single-precision floating point pairs,
13567
`mtrx0' through `mtrx48' (multiples of 16 only) for 4x4 matrices of
13568
single-precision floating point registers, `pc' for the program
13569
counter, and `fpscr' for the floating point status and control register.
13570
 
13571
   You can also refer to the control registers by the mnemonics `sr',
13572
`ssr', `pssr', `intevt', `expevt', `pexpevt', `tra', `spc', `pspc',
13573
`resvec', `vbr', `tea', `dcr', `kcr0', `kcr1', `ctc', and `usr'.
13574
 
13575

13576
File: as.info,  Node: SH64-Addressing,  Prev: SH64-Regs,  Up: SH64 Syntax
13577
 
13578
9.29.2.3 Addressing Modes
13579
.........................
13580
 
13581
SH64 operands consist of either a register or immediate value.  The
13582
immediate value can be a constant or label reference (or portion of a
13583
label reference), as in this example:
13584
 
13585
        movi    4,r2
13586
        pt      function, tr4
13587
        movi    (function >> 16) & 65535,r0
13588
        shori   function & 65535, r0
13589
        ld.l    r0,4,r0
13590
 
13591
   Instruction label references can reference labels in either SHmedia
13592
or SHcompact.  To differentiate between the two, labels in SHmedia
13593
sections will always have the least significant bit set (i.e. they will
13594
be odd), which SHcompact labels will have the least significant bit
13595
reset (i.e. they will be even).  If you need to reference the actual
13596
address of a label, you can use the `datalabel' modifier, as in this
13597
example:
13598
 
13599
        .long   function
13600
        .long   datalabel function
13601
 
13602
   In that example, the first longword may or may not have the least
13603
significant bit set depending on whether the label is an SHmedia label
13604
or an SHcompact label.  The second longword will be the actual address
13605
of the label, regardless of what type of label it is.
13606
 
13607

13608
File: as.info,  Node: SH64 Directives,  Next: SH64 Opcodes,  Prev: SH64 Syntax,  Up: SH64-Dependent
13609
 
13610
9.29.3 SH64 Machine Directives
13611
------------------------------
13612
 
13613
In addition to the SH directives, the SH64 provides the following
13614
directives:
13615
 
13616
`.mode [shmedia|shcompact]'
13617
`.isa [shmedia|shcompact]'
13618
     Specify the ISA for the following instructions (the two directives
13619
     are equivalent).  Note that programs such as `objdump' rely on
13620
     symbolic labels to determine when such mode switches occur (by
13621
     checking the least significant bit of the label's address), so
13622
     such mode/isa changes should always be followed by a label (in
13623
     practice, this is true anyway).  Note that you cannot use these
13624
     directives if you didn't specify an ISA on the command line.
13625
 
13626
`.abi [32|64]'
13627
     Specify the ABI for the following instructions.  Note that you
13628
     cannot use this directive unless you specified an ABI on the
13629
     command line, and the ABIs specified must match.
13630
 
13631
`.uaquad'
13632
     Like .uaword and .ualong, this allows you to specify an
13633
     intentionally unaligned quadword (64 bit word).
13634
 
13635
 
13636

13637
File: as.info,  Node: SH64 Opcodes,  Prev: SH64 Directives,  Up: SH64-Dependent
13638
 
13639
9.29.4 Opcodes
13640
--------------
13641
 
13642
For detailed information on the SH64 machine instruction set, see
13643
`SuperH 64 bit RISC Series Architecture Manual' (SuperH, Inc.).
13644
 
13645
   `as' implements all the standard SH64 opcodes.  In addition, the
13646
following pseudo-opcodes may be expanded into one or more alternate
13647
opcodes:
13648
 
13649
`movi'
13650
     If the value doesn't fit into a standard `movi' opcode, `as' will
13651
     replace the `movi' with a sequence of `movi' and `shori' opcodes.
13652
 
13653
`pt'
13654
     This expands to a sequence of `movi' and `shori' opcode, followed
13655
     by a `ptrel' opcode, or to a `pta' or `ptb' opcode, depending on
13656
     the label referenced.
13657
 
13658
 
13659

13660
File: as.info,  Node: Sparc-Dependent,  Next: TIC54X-Dependent,  Prev: PPC-Dependent,  Up: Machine Dependencies
13661
 
13662
9.30 SPARC Dependent Features
13663
=============================
13664
 
13665
* Menu:
13666
 
13667
* Sparc-Opts::                  Options
13668
* Sparc-Aligned-Data::          Option to enforce aligned data
13669
* Sparc-Syntax::                Syntax
13670
* Sparc-Float::                 Floating Point
13671
* Sparc-Directives::            Sparc Machine Directives
13672
 
13673

13674
File: as.info,  Node: Sparc-Opts,  Next: Sparc-Aligned-Data,  Up: Sparc-Dependent
13675
 
13676
9.30.1 Options
13677
--------------
13678
 
13679
The SPARC chip family includes several successive versions, using the
13680
same core instruction set, but including a few additional instructions
13681
at each version.  There are exceptions to this however.  For details on
13682
what instructions each variant supports, please see the chip's
13683
architecture reference manual.
13684
 
13685
   By default, `as' assumes the core instruction set (SPARC v6), but
13686
"bumps" the architecture level as needed: it switches to successively
13687
higher architectures as it encounters instructions that only exist in
13688
the higher levels.
13689
 
13690
   If not configured for SPARC v9 (`sparc64-*-*') GAS will not bump
13691
past sparclite by default, an option must be passed to enable the v9
13692
instructions.
13693
 
13694
   GAS treats sparclite as being compatible with v8, unless an
13695
architecture is explicitly requested.  SPARC v9 is always incompatible
13696
with sparclite.
13697
 
13698
`-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite'
13699
`-Av8plus | -Av8plusa | -Av9 | -Av9a'
13700
     Use one of the `-A' options to select one of the SPARC
13701
     architectures explicitly.  If you select an architecture
13702
     explicitly, `as' reports a fatal error if it encounters an
13703
     instruction or feature requiring an incompatible or higher level.
13704
 
13705
     `-Av8plus' and `-Av8plusa' select a 32 bit environment.
13706
 
13707
     `-Av9' and `-Av9a' select a 64 bit environment and are not
13708
     available unless GAS is explicitly configured with 64 bit
13709
     environment support.
13710
 
13711
     `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with
13712
     UltraSPARC extensions.
13713
 
13714
`-xarch=v8plus | -xarch=v8plusa'
13715
     For compatibility with the SunOS v9 assembler.  These options are
13716
     equivalent to -Av8plus and -Av8plusa, respectively.
13717
 
13718
`-bump'
13719
     Warn whenever it is necessary to switch to another level.  If an
13720
     architecture level is explicitly requested, GAS will not issue
13721
     warnings until that level is reached, and will then bump the level
13722
     as required (except between incompatible levels).
13723
 
13724
`-32 | -64'
13725
     Select the word size, either 32 bits or 64 bits.  These options
13726
     are only available with the ELF object file format, and require
13727
     that the necessary BFD support has been included.
13728
 
13729

13730
File: as.info,  Node: Sparc-Aligned-Data,  Next: Sparc-Syntax,  Prev: Sparc-Opts,  Up: Sparc-Dependent
13731
 
13732
9.30.2 Enforcing aligned data
13733
-----------------------------
13734
 
13735
SPARC GAS normally permits data to be misaligned.  For example, it
13736
permits the `.long' pseudo-op to be used on a byte boundary.  However,
13737
the native SunOS assemblers issue an error when they see misaligned
13738
data.
13739
 
13740
   You can use the `--enforce-aligned-data' option to make SPARC GAS
13741
also issue an error about misaligned data, just as the SunOS assemblers
13742
do.
13743
 
13744
   The `--enforce-aligned-data' option is not the default because gcc
13745
issues misaligned data pseudo-ops when it initializes certain packed
13746
data structures (structures defined using the `packed' attribute).  You
13747
may have to assemble with GAS in order to initialize packed data
13748
structures in your own code.
13749
 
13750

13751
File: as.info,  Node: Sparc-Syntax,  Next: Sparc-Float,  Prev: Sparc-Aligned-Data,  Up: Sparc-Dependent
13752
 
13753
9.30.3 Sparc Syntax
13754
-------------------
13755
 
13756
The assembler syntax closely follows The Sparc Architecture Manual,
13757
versions 8 and 9, as well as most extensions defined by Sun for their
13758
UltraSPARC and Niagara line of processors.
13759
 
13760
* Menu:
13761
 
13762
* Sparc-Chars::                Special Characters
13763
* Sparc-Regs::                 Register Names
13764
* Sparc-Constants::            Constant Names
13765
* Sparc-Relocs::               Relocations
13766
* Sparc-Size-Translations::    Size Translations
13767
 
13768

13769
File: as.info,  Node: Sparc-Chars,  Next: Sparc-Regs,  Up: Sparc-Syntax
13770
 
13771
9.30.3.1 Special Characters
13772
...........................
13773
 
13774
`#' is the line comment character.
13775
 
13776
   `;' can be used instead of a newline to separate statements.
13777
 
13778

13779
File: as.info,  Node: Sparc-Regs,  Next: Sparc-Constants,  Prev: Sparc-Chars,  Up: Sparc-Syntax
13780
 
13781
9.30.3.2 Register Names
13782
.......................
13783
 
13784
The Sparc integer register file is broken down into global, outgoing,
13785
local, and incoming.
13786
 
13787
   * The 8 global registers are referred to as `%gN'.
13788
 
13789
   * The 8 outgoing registers are referred to as `%oN'.
13790
 
13791
   * The 8 local registers are referred to as `%lN'.
13792
 
13793
   * The 8 incoming registers are referred to as `%iN'.
13794
 
13795
   * The frame pointer register `%i6' can be referenced using the alias
13796
     `%fp'.
13797
 
13798
   * The stack pointer register `%o6' can be referenced using the alias
13799
     `%sp'.
13800
 
13801
   Floating point registers are simply referred to as `%fN'.  When
13802
assembling for pre-V9, only 32 floating point registers are available.
13803
For V9 and later there are 64, but there are restrictions when
13804
referencing the upper 32 registers.  They can only be accessed as
13805
double or quad, and thus only even or quad numbered accesses are
13806
allowed.  For example, `%f34' is a legal floating point register, but
13807
`%f35' is not.
13808
 
13809
   Certain V9 instructions allow access to ancillary state registers.
13810
Most simply they can be referred to as `%asrN' where N can be from 16
13811
to 31.  However, there are some aliases defined to reference ASR
13812
registers defined for various UltraSPARC processors:
13813
 
13814
   * The tick compare register is referred to as `%tick_cmpr'.
13815
 
13816
   * The system tick register is referred to as `%stick'.  An alias,
13817
     `%sys_tick', exists but is deprecated and should not be used by
13818
     new software.
13819
 
13820
   * The system tick compare register is referred to as `%stick_cmpr'.
13821
     An alias, `%sys_tick_cmpr', exists but is deprecated and should
13822
     not be used by new software.
13823
 
13824
   * The software interrupt register is referred to as `%softint'.
13825
 
13826
   * The set software interrupt register is referred to as
13827
     `%set_softint'.  The mnemonic `%softint_set' is provided as an
13828
     alias.
13829
 
13830
   * The clear software interrupt register is referred to as
13831
     `%clear_softint'.  The mnemonic `%softint_clear' is provided as an
13832
     alias.
13833
 
13834
   * The performance instrumentation counters register is referred to as
13835
     `%pic'.
13836
 
13837
   * The performance control register is referred to as `%pcr'.
13838
 
13839
   * The graphics status register is referred to as `%gsr'.
13840
 
13841
   * The V9 dispatch control register is referred to as `%dcr'.
13842
 
13843
   Various V9 branch and conditional move instructions allow
13844
specification of which set of integer condition codes to test.  These
13845
are referred to as `%xcc' and `%icc'.
13846
 
13847
   In V9, there are 4 sets of floating point condition codes which are
13848
referred to as `%fccN'.
13849
 
13850
   Several special privileged and non-privileged registers exist:
13851
 
13852
   * The V9 address space identifier register is referred to as `%asi'.
13853
 
13854
   * The V9 restorable windows register is referred to as `%canrestore'.
13855
 
13856
   * The V9 savable windows register is referred to as `%cansave'.
13857
 
13858
   * The V9 clean windows register is referred to as `%cleanwin'.
13859
 
13860
   * The V9 current window pointer register is referred to as `%cwp'.
13861
 
13862
   * The floating-point queue register is referred to as `%fq'.
13863
 
13864
   * The V8 co-processor queue register is referred to as `%cq'.
13865
 
13866
   * The floating point status register is referred to as `%fsr'.
13867
 
13868
   * The other windows register is referred to as `%otherwin'.
13869
 
13870
   * The V9 program counter register is referred to as `%pc'.
13871
 
13872
   * The V9 next program counter register is referred to as `%npc'.
13873
 
13874
   * The V9 processor interrupt level register is referred to as `%pil'.
13875
 
13876
   * The V9 processor state register is referred to as `%pstate'.
13877
 
13878
   * The trap base address register is referred to as `%tba'.
13879
 
13880
   * The V9 tick register is referred to as `%tick'.
13881
 
13882
   * The V9 trap level is referred to as `%tl'.
13883
 
13884
   * The V9 trap program counter is referred to as `%tpc'.
13885
 
13886
   * The V9 trap next program counter is referred to as `%tnpc'.
13887
 
13888
   * The V9 trap state is referred to as `%tstate'.
13889
 
13890
   * The V9 trap type is referred to as `%tt'.
13891
 
13892
   * The V9 condition codes is referred to as `%ccr'.
13893
 
13894
   * The V9 floating-point registers state is referred to as `%fprs'.
13895
 
13896
   * The V9 version register is referred to as `%ver'.
13897
 
13898
   * The V9 window state register is referred to as `%wstate'.
13899
 
13900
   * The Y register is referred to as `%y'.
13901
 
13902
   * The V8 window invalid mask register is referred to as `%wim'.
13903
 
13904
   * The V8 processor state register is referred to as `%psr'.
13905
 
13906
   * The V9 global register level register is referred to as `%gl'.
13907
 
13908
   Several special register names exist for hypervisor mode code:
13909
 
13910
   * The hyperprivileged processor state register is referred to as
13911
     `%hpstate'.
13912
 
13913
   * The hyperprivileged trap state register is referred to as
13914
     `%htstate'.
13915
 
13916
   * The hyperprivileged interrupt pending register is referred to as
13917
     `%hintp'.
13918
 
13919
   * The hyperprivileged trap base address register is referred to as
13920
     `%htba'.
13921
 
13922
   * The hyperprivileged implementation version register is referred to
13923
     as `%hver'.
13924
 
13925
   * The hyperprivileged system tick compare register is referred to as
13926
     `%hstick_cmpr'.  Note that there is no `%hstick' register, the
13927
     normal `%stick' is used.
13928
 
13929

13930
File: as.info,  Node: Sparc-Constants,  Next: Sparc-Relocs,  Prev: Sparc-Regs,  Up: Sparc-Syntax
13931
 
13932
9.30.3.3 Constants
13933
..................
13934
 
13935
Several Sparc instructions take an immediate operand field for which
13936
mnemonic names exist.  Two such examples are `membar' and `prefetch'.
13937
Another example are the set of V9 memory access instruction that allow
13938
specification of an address space identifier.
13939
 
13940
   The `membar' instruction specifies a memory barrier that is the
13941
defined by the operand which is a bitmask.  The supported mask
13942
mnemonics are:
13943
 
13944
   * `#Sync' requests that all operations (including nonmemory
13945
     reference operations) appearing prior to the `membar' must have
13946
     been performed and the effects of any exceptions become visible
13947
     before any instructions after the `membar' may be initiated.  This
13948
     corresponds to `membar' cmask field bit 2.
13949
 
13950
   * `#MemIssue' requests that all memory reference operations
13951
     appearing prior to the `membar' must have been performed before
13952
     any memory operation after the `membar' may be initiated.  This
13953
     corresponds to `membar' cmask field bit 1.
13954
 
13955
   * `#Lookaside' requests that a store appearing prior to the `membar'
13956
     must complete before any load following the `membar' referencing
13957
     the same address can be initiated.  This corresponds to `membar'
13958
     cmask field bit 0.
13959
 
13960
   * `#StoreStore' defines that the effects of all stores appearing
13961
     prior to the `membar' instruction must be visible to all
13962
     processors before the effect of any stores following the `membar'.
13963
     Equivalent to the deprecated `stbar' instruction.  This
13964
     corresponds to `membar' mmask field bit 3.
13965
 
13966
   * `#LoadStore' defines all loads appearing prior to the `membar'
13967
     instruction must have been performed before the effect of any
13968
     stores following the `membar' is visible to any other processor.
13969
     This corresponds to `membar' mmask field bit 2.
13970
 
13971
   * `#StoreLoad' defines that the effects of all stores appearing
13972
     prior to the `membar' instruction must be visible to all
13973
     processors before loads following the `membar' may be performed.
13974
     This corresponds to `membar' mmask field bit 1.
13975
 
13976
   * `#LoadLoad' defines that all loads appearing prior to the `membar'
13977
     instruction must have been performed before any loads following
13978
     the `membar' may be performed.  This corresponds to `membar' mmask
13979
     field bit 0.
13980
 
13981
 
13982
   These values can be ored together, for example:
13983
 
13984
     membar #Sync
13985
     membar #StoreLoad | #LoadLoad
13986
     membar #StoreLoad | #StoreStore
13987
 
13988
   The `prefetch' and `prefetcha' instructions take a prefetch function
13989
code.  The following prefetch function code constant mnemonics are
13990
available:
13991
 
13992
   * `#n_reads' requests a prefetch for several reads, and corresponds
13993
     to a prefetch function code of 0.
13994
 
13995
     `#one_read' requests a prefetch for one read, and corresponds to a
13996
     prefetch function code of 1.
13997
 
13998
     `#n_writes' requests a prefetch for several writes (and possibly
13999
     reads), and corresponds to a prefetch function code of 2.
14000
 
14001
     `#one_write' requests a prefetch for one write, and corresponds to
14002
     a prefetch function code of 3.
14003
 
14004
     `#page' requests a prefetch page, and corresponds to a prefetch
14005
     function code of 4.
14006
 
14007
     `#invalidate' requests a prefetch invalidate, and corresponds to a
14008
     prefetch function code of 16.
14009
 
14010
     `#unified' requests a prefetch to the nearest unified cache, and
14011
     corresponds to a prefetch function code of 17.
14012
 
14013
     `#n_reads_strong' requests a strong prefetch for several reads,
14014
     and corresponds to a prefetch function code of 20.
14015
 
14016
     `#one_read_strong' requests a strong prefetch for one read, and
14017
     corresponds to a prefetch function code of 21.
14018
 
14019
     `#n_writes_strong' requests a strong prefetch for several writes,
14020
     and corresponds to a prefetch function code of 22.
14021
 
14022
     `#one_write_strong' requests a strong prefetch for one write, and
14023
     corresponds to a prefetch function code of 23.
14024
 
14025
     Onle one prefetch code may be specified.  Here are some examples:
14026
 
14027
          prefetch  [%l0 + %l2], #one_read
14028
          prefetch  [%g2 + 8], #n_writes
14029
          prefetcha [%g1] 0x8, #unified
14030
          prefetcha [%o0 + 0x10] %asi, #n_reads
14031
 
14032
     The actual behavior of a given prefetch function code is processor
14033
     specific.  If a processor does not implement a given prefetch
14034
     function code, it will treat the prefetch instruction as a nop.
14035
 
14036
     For instructions that accept an immediate address space identifier,
14037
     `as' provides many mnemonics corresponding to V9 defined as well
14038
     as UltraSPARC and Niagara extended values.  For example, `#ASI_P'
14039
     and `#ASI_BLK_INIT_QUAD_LDD_AIUS'.  See the V9 and processor
14040
     specific manuals for details.
14041
 
14042
 
14043

14044
File: as.info,  Node: Sparc-Relocs,  Next: Sparc-Size-Translations,  Prev: Sparc-Constants,  Up: Sparc-Syntax
14045
 
14046
9.30.3.4 Relocations
14047
....................
14048
 
14049
ELF relocations are available as defined in the 32-bit and 64-bit Sparc
14050
ELF specifications.
14051
 
14052
   `R_SPARC_HI22' is obtained using `%hi' and `R_SPARC_LO10' is
14053
obtained using `%lo'.  Likewise `R_SPARC_HIX22' is obtained from `%hix'
14054
and `R_SPARC_LOX10' is obtained using `%lox'.  For example:
14055
 
14056
     sethi %hi(symbol), %g1
14057
     or    %g1, %lo(symbol), %g1
14058
 
14059
     sethi %hix(symbol), %g1
14060
     xor   %g1, %lox(symbol), %g1
14061
 
14062
   These "high" mnemonics extract bits 31:10 of their operand, and the
14063
"low" mnemonics extract bits 9:0 of their operand.
14064
 
14065
   V9 code model relocations can be requested as follows:
14066
 
14067
   * `R_SPARC_HH22' is requested using `%hh'.  It can also be generated
14068
     using `%uhi'.
14069
 
14070
   * `R_SPARC_HM10' is requested using `%hm'.  It can also be generated
14071
     using `%ulo'.
14072
 
14073
   * `R_SPARC_LM22' is requested using `%lm'.
14074
 
14075
   * `R_SPARC_H44' is requested using `%h44'.
14076
 
14077
   * `R_SPARC_M44' is requested using `%m44'.
14078
 
14079
   * `R_SPARC_L44' is requested using `%l44'.
14080
 
14081
   The PC relative relocation `R_SPARC_PC22' can be obtained by
14082
enclosing an operand inside of `%pc22'.  Likewise, the `R_SPARC_PC10'
14083
relocation can be obtained using `%pc10'.  These are mostly used when
14084
assembling PIC code.  For example, the standard PIC sequence on Sparc
14085
to get the base of the global offset table, PC relative, into a
14086
register, can be performed as:
14087
 
14088
     sethi %pc22(_GLOBAL_OFFSET_TABLE_-4), %l7
14089
     add   %l7, %pc10(_GLOBAL_OFFSET_TABLE_+4), %l7
14090
 
14091
   Several relocations exist to allow the link editor to potentially
14092
optimize GOT data references.  The `R_SPARC_GOTDATA_OP_HIX22'
14093
relocation can obtained by enclosing an operand inside of
14094
`%gdop_hix22'.  The `R_SPARC_GOTDATA_OP_LOX10' relocation can obtained
14095
by enclosing an operand inside of `%gdop_lox10'.  Likewise,
14096
`R_SPARC_GOTDATA_OP' can be obtained by enclosing an operand inside of
14097
`%gdop'.  For example, assuming the GOT base is in register `%l7':
14098
 
14099
     sethi %gdop_hix22(symbol), %l1
14100
     xor   %l1, %gdop_lox10(symbol), %l1
14101
     ld    [%l7 + %l1], %l2, %gdop(symbol)
14102
 
14103
   There are many relocations that can be requested for access to
14104
thread local storage variables.  All of the Sparc TLS mnemonics are
14105
supported:
14106
 
14107
   * `R_SPARC_TLS_GD_HI22' is requested using `%tgd_hi22'.
14108
 
14109
   * `R_SPARC_TLS_GD_LO10' is requested using `%tgd_lo10'.
14110
 
14111
   * `R_SPARC_TLS_GD_ADD' is requested using `%tgd_add'.
14112
 
14113
   * `R_SPARC_TLS_GD_CALL' is requested using `%tgd_call'.
14114
 
14115
   * `R_SPARC_TLS_LDM_HI22' is requested using `%tldm_hi22'.
14116
 
14117
   * `R_SPARC_TLS_LDM_LO10' is requested using `%tldm_lo10'.
14118
 
14119
   * `R_SPARC_TLS_LDM_ADD' is requested using `%tldm_add'.
14120
 
14121
   * `R_SPARC_TLS_LDM_CALL' is requested using `%tldm_call'.
14122
 
14123
   * `R_SPARC_TLS_LDO_HIX22' is requested using `%tldo_hix22'.
14124
 
14125
   * `R_SPARC_TLS_LDO_LOX10' is requested using `%tldo_lox10'.
14126
 
14127
   * `R_SPARC_TLS_LDO_ADD' is requested using `%tldo_add'.
14128
 
14129
   * `R_SPARC_TLS_IE_HI22' is requested using `%tie_hi22'.
14130
 
14131
   * `R_SPARC_TLS_IE_LO10' is requested using `%tie_lo10'.
14132
 
14133
   * `R_SPARC_TLS_IE_LD' is requested using `%tie_ld'.
14134
 
14135
   * `R_SPARC_TLS_IE_LDX' is requested using `%tie_ldx'.
14136
 
14137
   * `R_SPARC_TLS_IE_ADD' is requested using `%tie_add'.
14138
 
14139
   * `R_SPARC_TLS_LE_HIX22' is requested using `%tle_hix22'.
14140
 
14141
   * `R_SPARC_TLS_LE_LOX10' is requested using `%tle_lox10'.
14142
 
14143
   Here are some example TLS model sequences.
14144
 
14145
   First, General Dynamic:
14146
 
14147
     sethi  %tgd_hi22(symbol), %l1
14148
     add    %l1, %tgd_lo10(symbol), %l1
14149
     add    %l7, %l1, %o0, %tgd_add(symbol)
14150
     call   __tls_get_addr, %tgd_call(symbol)
14151
     nop
14152
 
14153
   Local Dynamic:
14154
 
14155
     sethi  %tldm_hi22(symbol), %l1
14156
     add    %l1, %tldm_lo10(symbol), %l1
14157
     add    %l7, %l1, %o0, %tldm_add(symbol)
14158
     call   __tls_get_addr, %tldm_call(symbol)
14159
     nop
14160
 
14161
     sethi  %tldo_hix22(symbol), %l1
14162
     xor    %l1, %tldo_lox10(symbol), %l1
14163
     add    %o0, %l1, %l1, %tldo_add(symbol)
14164
 
14165
   Initial Exec:
14166
 
14167
     sethi  %tie_hi22(symbol), %l1
14168
     add    %l1, %tie_lo10(symbol), %l1
14169
     ld     [%l7 + %l1], %o0, %tie_ld(symbol)
14170
     add    %g7, %o0, %o0, %tie_add(symbol)
14171
 
14172
     sethi  %tie_hi22(symbol), %l1
14173
     add    %l1, %tie_lo10(symbol), %l1
14174
     ldx    [%l7 + %l1], %o0, %tie_ldx(symbol)
14175
     add    %g7, %o0, %o0, %tie_add(symbol)
14176
 
14177
   And finally, Local Exec:
14178
 
14179
     sethi  %tle_hix22(symbol), %l1
14180
     add    %l1, %tle_lox10(symbol), %l1
14181
     add    %g7, %l1, %l1
14182
 
14183
   When assembling for 64-bit, and a secondary constant addend is
14184
specified in an address expression that would normally generate an
14185
`R_SPARC_LO10' relocation, the assembler will emit an `R_SPARC_OLO10'
14186
instead.
14187
 
14188

14189
File: as.info,  Node: Sparc-Size-Translations,  Prev: Sparc-Relocs,  Up: Sparc-Syntax
14190
 
14191
9.30.3.5 Size Translations
14192
..........................
14193
 
14194
Often it is desirable to write code in an operand size agnostic manner.
14195
`as' provides support for this via operand size opcode translations.
14196
Translations are supported for loads, stores, shifts, compare-and-swap
14197
atomics, and the `clr' synthetic instruction.
14198
 
14199
   If generating 32-bit code, `as' will generate the 32-bit opcode.
14200
Whereas if 64-bit code is being generated, the 64-bit opcode will be
14201
emitted.  For example `ldn' will be transformed into `ld' for 32-bit
14202
code and `ldx' for 64-bit code.
14203
 
14204
   Here is an example meant to demonstrate all the supported opcode
14205
translations:
14206
 
14207
     ldn   [%o0], %o1
14208
     ldna  [%o0] %asi, %o2
14209
     stn   %o1, [%o0]
14210
     stna  %o2, [%o0] %asi
14211
     slln  %o3, 3, %o3
14212
     srln  %o4, 8, %o4
14213
     sran  %o5, 12, %o5
14214
     casn  [%o0], %o1, %o2
14215
     casna [%o0] %asi, %o1, %o2
14216
     clrn  %g1
14217
 
14218
   In 32-bit mode `as' will emit:
14219
 
14220
     ld   [%o0], %o1
14221
     lda  [%o0] %asi, %o2
14222
     st   %o1, [%o0]
14223
     sta  %o2, [%o0] %asi
14224
     sll  %o3, 3, %o3
14225
     srl  %o4, 8, %o4
14226
     sra  %o5, 12, %o5
14227
     cas  [%o0], %o1, %o2
14228
     casa [%o0] %asi, %o1, %o2
14229
     clr  %g1
14230
 
14231
   And in 64-bit mode `as' will emit:
14232
 
14233
     ldx   [%o0], %o1
14234
     ldxa  [%o0] %asi, %o2
14235
     stx   %o1, [%o0]
14236
     stxa  %o2, [%o0] %asi
14237
     sllx  %o3, 3, %o3
14238
     srlx  %o4, 8, %o4
14239
     srax  %o5, 12, %o5
14240
     casx  [%o0], %o1, %o2
14241
     casxa [%o0] %asi, %o1, %o2
14242
     clrx  %g1
14243
 
14244
   Finally, the `.nword' translating directive is supported as well.
14245
It is documented in the section on Sparc machine directives.
14246
 
14247

14248
File: as.info,  Node: Sparc-Float,  Next: Sparc-Directives,  Prev: Sparc-Syntax,  Up: Sparc-Dependent
14249
 
14250
9.30.4 Floating Point
14251
---------------------
14252
 
14253
The Sparc uses IEEE floating-point numbers.
14254
 
14255

14256
File: as.info,  Node: Sparc-Directives,  Prev: Sparc-Float,  Up: Sparc-Dependent
14257
 
14258
9.30.5 Sparc Machine Directives
14259
-------------------------------
14260
 
14261
The Sparc version of `as' supports the following additional machine
14262
directives:
14263
 
14264
`.align'
14265
     This must be followed by the desired alignment in bytes.
14266
 
14267
`.common'
14268
     This must be followed by a symbol name, a positive number, and
14269
     `"bss"'.  This behaves somewhat like `.comm', but the syntax is
14270
     different.
14271
 
14272
`.half'
14273
     This is functionally identical to `.short'.
14274
 
14275
`.nword'
14276
     On the Sparc, the `.nword' directive produces native word sized
14277
     value, ie. if assembling with -32 it is equivalent to `.word', if
14278
     assembling with -64 it is equivalent to `.xword'.
14279
 
14280
`.proc'
14281
     This directive is ignored.  Any text following it on the same line
14282
     is also ignored.
14283
 
14284
`.register'
14285
     This directive declares use of a global application or system
14286
     register.  It must be followed by a register name %g2, %g3, %g6 or
14287
     %g7, comma and the symbol name for that register.  If symbol name
14288
     is `#scratch', it is a scratch register, if it is `#ignore', it
14289
     just suppresses any errors about using undeclared global register,
14290
     but does not emit any information about it into the object file.
14291
     This can be useful e.g. if you save the register before use and
14292
     restore it after.
14293
 
14294
`.reserve'
14295
     This must be followed by a symbol name, a positive number, and
14296
     `"bss"'.  This behaves somewhat like `.lcomm', but the syntax is
14297
     different.
14298
 
14299
`.seg'
14300
     This must be followed by `"text"', `"data"', or `"data1"'.  It
14301
     behaves like `.text', `.data', or `.data 1'.
14302
 
14303
`.skip'
14304
     This is functionally identical to the `.space' directive.
14305
 
14306
`.word'
14307
     On the Sparc, the `.word' directive produces 32 bit values,
14308
     instead of the 16 bit values it produces on many other machines.
14309
 
14310
`.xword'
14311
     On the Sparc V9 processor, the `.xword' directive produces 64 bit
14312
     values.
14313
 
14314

14315
File: as.info,  Node: TIC54X-Dependent,  Next: V850-Dependent,  Prev: Sparc-Dependent,  Up: Machine Dependencies
14316
 
14317
9.31 TIC54X Dependent Features
14318
==============================
14319
 
14320
* Menu:
14321
 
14322
* TIC54X-Opts::              Command-line Options
14323
* TIC54X-Block::             Blocking
14324
* TIC54X-Env::               Environment Settings
14325
* TIC54X-Constants::         Constants Syntax
14326
* TIC54X-Subsyms::           String Substitution
14327
* TIC54X-Locals::            Local Label Syntax
14328
* TIC54X-Builtins::          Builtin Assembler Math Functions
14329
* TIC54X-Ext::               Extended Addressing Support
14330
* TIC54X-Directives::        Directives
14331
* TIC54X-Macros::            Macro Features
14332
* TIC54X-MMRegs::            Memory-mapped Registers
14333
 
14334

14335
File: as.info,  Node: TIC54X-Opts,  Next: TIC54X-Block,  Up: TIC54X-Dependent
14336
 
14337
9.31.1 Options
14338
--------------
14339
 
14340
The TMS320C54X version of `as' has a few machine-dependent options.
14341
 
14342
   You can use the `-mfar-mode' option to enable extended addressing
14343
mode.  All addresses will be assumed to be > 16 bits, and the
14344
appropriate relocation types will be used.  This option is equivalent
14345
to using the `.far_mode' directive in the assembly code.  If you do not
14346
use the `-mfar-mode' option, all references will be assumed to be 16
14347
bits.  This option may be abbreviated to `-mf'.
14348
 
14349
   You can use the `-mcpu' option to specify a particular CPU.  This
14350
option is equivalent to using the `.version' directive in the assembly
14351
code.  For recognized CPU codes, see *Note `.version':
14352
TIC54X-Directives.  The default CPU version is `542'.
14353
 
14354
   You can use the `-merrors-to-file' option to redirect error output
14355
to a file (this provided for those deficient environments which don't
14356
provide adequate output redirection).  This option may be abbreviated to
14357
`-me'.
14358
 
14359

14360
File: as.info,  Node: TIC54X-Block,  Next: TIC54X-Env,  Prev: TIC54X-Opts,  Up: TIC54X-Dependent
14361
 
14362
9.31.2 Blocking
14363
---------------
14364
 
14365
A blocked section or memory block is guaranteed not to cross the
14366
blocking boundary (usually a page, or 128 words) if it is smaller than
14367
the blocking size, or to start on a page boundary if it is larger than
14368
the blocking size.
14369
 
14370

14371
File: as.info,  Node: TIC54X-Env,  Next: TIC54X-Constants,  Prev: TIC54X-Block,  Up: TIC54X-Dependent
14372
 
14373
9.31.3 Environment Settings
14374
---------------------------
14375
 
14376
`C54XDSP_DIR' and `A_DIR' are semicolon-separated paths which are added
14377
to the list of directories normally searched for source and include
14378
files.  `C54XDSP_DIR' will override `A_DIR'.
14379
 
14380

14381
File: as.info,  Node: TIC54X-Constants,  Next: TIC54X-Subsyms,  Prev: TIC54X-Env,  Up: TIC54X-Dependent
14382
 
14383
9.31.4 Constants Syntax
14384
-----------------------
14385
 
14386
The TIC54X version of `as' allows the following additional constant
14387
formats, using a suffix to indicate the radix:
14388
 
14389
     Binary                  `000000B, 011000b'
14390
     Octal                   `10Q, 224q'
14391
     Hexadecimal             `45h, 0FH'
14392
 
14393

14394
File: as.info,  Node: TIC54X-Subsyms,  Next: TIC54X-Locals,  Prev: TIC54X-Constants,  Up: TIC54X-Dependent
14395
 
14396
9.31.5 String Substitution
14397
--------------------------
14398
 
14399
A subset of allowable symbols (which we'll call subsyms) may be assigned
14400
arbitrary string values.  This is roughly equivalent to C preprocessor
14401
#define macros.  When `as' encounters one of these symbols, the symbol
14402
is replaced in the input stream by its string value.  Subsym names
14403
*must* begin with a letter.
14404
 
14405
   Subsyms may be defined using the `.asg' and `.eval' directives
14406
(*Note `.asg': TIC54X-Directives, *Note `.eval': TIC54X-Directives.
14407
 
14408
   Expansion is recursive until a previously encountered symbol is
14409
seen, at which point substitution stops.
14410
 
14411
   In this example, x is replaced with SYM2; SYM2 is replaced with
14412
SYM1, and SYM1 is replaced with x.  At this point, x has already been
14413
encountered and the substitution stops.
14414
 
14415
      .asg   "x",SYM1
14416
      .asg   "SYM1",SYM2
14417
      .asg   "SYM2",x
14418
      add    x,a             ; final code assembled is "add  x, a"
14419
 
14420
   Macro parameters are converted to subsyms; a side effect of this is
14421
the normal `as' '\ARG' dereferencing syntax is unnecessary.  Subsyms
14422
defined within a macro will have global scope, unless the `.var'
14423
directive is used to identify the subsym as a local macro variable
14424
*note `.var': TIC54X-Directives.
14425
 
14426
   Substitution may be forced in situations where replacement might be
14427
ambiguous by placing colons on either side of the subsym.  The following
14428
code:
14429
 
14430
      .eval  "10",x
14431
     LAB:X:  add     #x, a
14432
 
14433
   When assembled becomes:
14434
 
14435
     LAB10  add     #10, a
14436
 
14437
   Smaller parts of the string assigned to a subsym may be accessed with
14438
the following syntax:
14439
 
14440
``:SYMBOL(CHAR_INDEX):''
14441
     Evaluates to a single-character string, the character at
14442
     CHAR_INDEX.
14443
 
14444
``:SYMBOL(START,LENGTH):''
14445
     Evaluates to a substring of SYMBOL beginning at START with length
14446
     LENGTH.
14447
 
14448

14449
File: as.info,  Node: TIC54X-Locals,  Next: TIC54X-Builtins,  Prev: TIC54X-Subsyms,  Up: TIC54X-Dependent
14450
 
14451
9.31.6 Local Labels
14452
-------------------
14453
 
14454
Local labels may be defined in two ways:
14455
 
14456
   * $N, where N is a decimal number between 0 and 9
14457
 
14458
   * LABEL?, where LABEL is any legal symbol name.
14459
 
14460
   Local labels thus defined may be redefined or automatically
14461
generated.  The scope of a local label is based on when it may be
14462
undefined or reset.  This happens when one of the following situations
14463
is encountered:
14464
 
14465
   * .newblock directive *note `.newblock': TIC54X-Directives.
14466
 
14467
   * The current section is changed (.sect, .text, or .data)
14468
 
14469
   * Entering or leaving an included file
14470
 
14471
   * The macro scope where the label was defined is exited
14472
 
14473

14474
File: as.info,  Node: TIC54X-Builtins,  Next: TIC54X-Ext,  Prev: TIC54X-Locals,  Up: TIC54X-Dependent
14475
 
14476
9.31.7 Math Builtins
14477
--------------------
14478
 
14479
The following built-in functions may be used to generate a
14480
floating-point value.  All return a floating-point value except `$cvi',
14481
`$int', and `$sgn', which return an integer value.
14482
 
14483
``$acos(EXPR)''
14484
     Returns the floating point arccosine of EXPR.
14485
 
14486
``$asin(EXPR)''
14487
     Returns the floating point arcsine of EXPR.
14488
 
14489
``$atan(EXPR)''
14490
     Returns the floating point arctangent of EXPR.
14491
 
14492
``$atan2(EXPR1,EXPR2)''
14493
     Returns the floating point arctangent of EXPR1 / EXPR2.
14494
 
14495
``$ceil(EXPR)''
14496
     Returns the smallest integer not less than EXPR as floating point.
14497
 
14498
``$cosh(EXPR)''
14499
     Returns the floating point hyperbolic cosine of EXPR.
14500
 
14501
``$cos(EXPR)''
14502
     Returns the floating point cosine of EXPR.
14503
 
14504
``$cvf(EXPR)''
14505
     Returns the integer value EXPR converted to floating-point.
14506
 
14507
``$cvi(EXPR)''
14508
     Returns the floating point value EXPR converted to integer.
14509
 
14510
``$exp(EXPR)''
14511
     Returns the floating point value e ^ EXPR.
14512
 
14513
``$fabs(EXPR)''
14514
     Returns the floating point absolute value of EXPR.
14515
 
14516
``$floor(EXPR)''
14517
     Returns the largest integer that is not greater than EXPR as
14518
     floating point.
14519
 
14520
``$fmod(EXPR1,EXPR2)''
14521
     Returns the floating point remainder of EXPR1 / EXPR2.
14522
 
14523
``$int(EXPR)''
14524
     Returns 1 if EXPR evaluates to an integer, zero otherwise.
14525
 
14526
``$ldexp(EXPR1,EXPR2)''
14527
     Returns the floating point value EXPR1 * 2 ^ EXPR2.
14528
 
14529
``$log10(EXPR)''
14530
     Returns the base 10 logarithm of EXPR.
14531
 
14532
``$log(EXPR)''
14533
     Returns the natural logarithm of EXPR.
14534
 
14535
``$max(EXPR1,EXPR2)''
14536
     Returns the floating point maximum of EXPR1 and EXPR2.
14537
 
14538
``$min(EXPR1,EXPR2)''
14539
     Returns the floating point minimum of EXPR1 and EXPR2.
14540
 
14541
``$pow(EXPR1,EXPR2)''
14542
     Returns the floating point value EXPR1 ^ EXPR2.
14543
 
14544
``$round(EXPR)''
14545
     Returns the nearest integer to EXPR as a floating point number.
14546
 
14547
``$sgn(EXPR)''
14548
     Returns -1, 0, or 1 based on the sign of EXPR.
14549
 
14550
``$sin(EXPR)''
14551
     Returns the floating point sine of EXPR.
14552
 
14553
``$sinh(EXPR)''
14554
     Returns the floating point hyperbolic sine of EXPR.
14555
 
14556
``$sqrt(EXPR)''
14557
     Returns the floating point square root of EXPR.
14558
 
14559
``$tan(EXPR)''
14560
     Returns the floating point tangent of EXPR.
14561
 
14562
``$tanh(EXPR)''
14563
     Returns the floating point hyperbolic tangent of EXPR.
14564
 
14565
``$trunc(EXPR)''
14566
     Returns the integer value of EXPR truncated towards zero as
14567
     floating point.
14568
 
14569
 
14570

14571
File: as.info,  Node: TIC54X-Ext,  Next: TIC54X-Directives,  Prev: TIC54X-Builtins,  Up: TIC54X-Dependent
14572
 
14573
9.31.8 Extended Addressing
14574
--------------------------
14575
 
14576
The `LDX' pseudo-op is provided for loading the extended addressing bits
14577
of a label or address.  For example, if an address `_label' resides in
14578
extended program memory, the value of `_label' may be loaded as follows:
14579
      ldx     #_label,16,a    ; loads extended bits of _label
14580
      or      #_label,a       ; loads lower 16 bits of _label
14581
      bacc    a               ; full address is in accumulator A
14582
 
14583

14584
File: as.info,  Node: TIC54X-Directives,  Next: TIC54X-Macros,  Prev: TIC54X-Ext,  Up: TIC54X-Dependent
14585
 
14586
9.31.9 Directives
14587
-----------------
14588
 
14589
`.align [SIZE]'
14590
`.even'
14591
     Align the section program counter on the next boundary, based on
14592
     SIZE.  SIZE may be any power of 2.  `.even' is equivalent to
14593
     `.align' with a SIZE of 2.
14594
    `1'
14595
          Align SPC to word boundary
14596
 
14597
    `2'
14598
          Align SPC to longword boundary (same as .even)
14599
 
14600
    `128'
14601
          Align SPC to page boundary
14602
 
14603
`.asg STRING, NAME'
14604
     Assign NAME the string STRING.  String replacement is performed on
14605
     STRING before assignment.
14606
 
14607
`.eval STRING, NAME'
14608
     Evaluate the contents of string STRING and assign the result as a
14609
     string to the subsym NAME.  String replacement is performed on
14610
     STRING before assignment.
14611
 
14612
`.bss SYMBOL, SIZE [, [BLOCKING_FLAG] [,ALIGNMENT_FLAG]]'
14613
     Reserve space for SYMBOL in the .bss section.  SIZE is in words.
14614
     If present, BLOCKING_FLAG indicates the allocated space should be
14615
     aligned on a page boundary if it would otherwise cross a page
14616
     boundary.  If present, ALIGNMENT_FLAG causes the assembler to
14617
     allocate SIZE on a long word boundary.
14618
 
14619
`.byte VALUE [,...,VALUE_N]'
14620
`.ubyte VALUE [,...,VALUE_N]'
14621
`.char VALUE [,...,VALUE_N]'
14622
`.uchar VALUE [,...,VALUE_N]'
14623
     Place one or more bytes into consecutive words of the current
14624
     section.  The upper 8 bits of each word is zero-filled.  If a
14625
     label is used, it points to the word allocated for the first byte
14626
     encountered.
14627
 
14628
`.clink ["SECTION_NAME"]'
14629
     Set STYP_CLINK flag for this section, which indicates to the
14630
     linker that if no symbols from this section are referenced, the
14631
     section should not be included in the link.  If SECTION_NAME is
14632
     omitted, the current section is used.
14633
 
14634
`.c_mode'
14635
     TBD.
14636
 
14637
`.copy "FILENAME" | FILENAME'
14638
`.include "FILENAME" | FILENAME'
14639
     Read source statements from FILENAME.  The normal include search
14640
     path is used.  Normally .copy will cause statements from the
14641
     included file to be printed in the assembly listing and .include
14642
     will not, but this distinction is not currently implemented.
14643
 
14644
`.data'
14645
     Begin assembling code into the .data section.
14646
 
14647
`.double VALUE [,...,VALUE_N]'
14648
`.ldouble VALUE [,...,VALUE_N]'
14649
`.float VALUE [,...,VALUE_N]'
14650
`.xfloat VALUE [,...,VALUE_N]'
14651
     Place an IEEE single-precision floating-point representation of
14652
     one or more floating-point values into the current section.  All
14653
     but `.xfloat' align the result on a longword boundary.  Values are
14654
     stored most-significant word first.
14655
 
14656
`.drlist'
14657
`.drnolist'
14658
     Control printing of directives to the listing file.  Ignored.
14659
 
14660
`.emsg STRING'
14661
`.mmsg STRING'
14662
`.wmsg STRING'
14663
     Emit a user-defined error, message, or warning, respectively.
14664
 
14665
`.far_mode'
14666
     Use extended addressing when assembling statements.  This should
14667
     appear only once per file, and is equivalent to the -mfar-mode
14668
     option *note `-mfar-mode': TIC54X-Opts.
14669
 
14670
`.fclist'
14671
`.fcnolist'
14672
     Control printing of false conditional blocks to the listing file.
14673
 
14674
`.field VALUE [,SIZE]'
14675
     Initialize a bitfield of SIZE bits in the current section.  If
14676
     VALUE is relocatable, then SIZE must be 16.  SIZE defaults to 16
14677
     bits.  If VALUE does not fit into SIZE bits, the value will be
14678
     truncated.  Successive `.field' directives will pack starting at
14679
     the current word, filling the most significant bits first, and
14680
     aligning to the start of the next word if the field size does not
14681
     fit into the space remaining in the current word.  A `.align'
14682
     directive with an operand of 1 will force the next `.field'
14683
     directive to begin packing into a new word.  If a label is used, it
14684
     points to the word that contains the specified field.
14685
 
14686
`.global SYMBOL [,...,SYMBOL_N]'
14687
`.def SYMBOL [,...,SYMBOL_N]'
14688
`.ref SYMBOL [,...,SYMBOL_N]'
14689
     `.def' nominally identifies a symbol defined in the current file
14690
     and available to other files.  `.ref' identifies a symbol used in
14691
     the current file but defined elsewhere.  Both map to the standard
14692
     `.global' directive.
14693
 
14694
`.half VALUE [,...,VALUE_N]'
14695
`.uhalf VALUE [,...,VALUE_N]'
14696
`.short VALUE [,...,VALUE_N]'
14697
`.ushort VALUE [,...,VALUE_N]'
14698
`.int VALUE [,...,VALUE_N]'
14699
`.uint VALUE [,...,VALUE_N]'
14700
`.word VALUE [,...,VALUE_N]'
14701
`.uword VALUE [,...,VALUE_N]'
14702
     Place one or more values into consecutive words of the current
14703
     section.  If a label is used, it points to the word allocated for
14704
     the first value encountered.
14705
 
14706
`.label SYMBOL'
14707
     Define a special SYMBOL to refer to the load time address of the
14708
     current section program counter.
14709
 
14710
`.length'
14711
`.width'
14712
     Set the page length and width of the output listing file.  Ignored.
14713
 
14714
`.list'
14715
`.nolist'
14716
     Control whether the source listing is printed.  Ignored.
14717
 
14718
`.long VALUE [,...,VALUE_N]'
14719
`.ulong VALUE [,...,VALUE_N]'
14720
`.xlong VALUE [,...,VALUE_N]'
14721
     Place one or more 32-bit values into consecutive words in the
14722
     current section.  The most significant word is stored first.
14723
     `.long' and `.ulong' align the result on a longword boundary;
14724
     `xlong' does not.
14725
 
14726
`.loop [COUNT]'
14727
`.break [CONDITION]'
14728
`.endloop'
14729
     Repeatedly assemble a block of code.  `.loop' begins the block, and
14730
     `.endloop' marks its termination.  COUNT defaults to 1024, and
14731
     indicates the number of times the block should be repeated.
14732
     `.break' terminates the loop so that assembly begins after the
14733
     `.endloop' directive.  The optional CONDITION will cause the loop
14734
     to terminate only if it evaluates to zero.
14735
 
14736
`MACRO_NAME .macro [PARAM1][,...PARAM_N]'
14737
`[.mexit]'
14738
`.endm'
14739
     See the section on macros for more explanation (*Note
14740
     TIC54X-Macros::.
14741
 
14742
`.mlib "FILENAME" | FILENAME'
14743
     Load the macro library FILENAME.  FILENAME must be an archived
14744
     library (BFD ar-compatible) of text files, expected to contain
14745
     only macro definitions.   The standard include search path is used.
14746
 
14747
`.mlist'
14748
 
14749
`.mnolist'
14750
     Control whether to include macro and loop block expansions in the
14751
     listing output.  Ignored.
14752
 
14753
`.mmregs'
14754
     Define global symbolic names for the 'c54x registers.  Supposedly
14755
     equivalent to executing `.set' directives for each register with
14756
     its memory-mapped value, but in reality is provided only for
14757
     compatibility and does nothing.
14758
 
14759
`.newblock'
14760
     This directive resets any TIC54X local labels currently defined.
14761
     Normal `as' local labels are unaffected.
14762
 
14763
`.option OPTION_LIST'
14764
     Set listing options.  Ignored.
14765
 
14766
`.sblock "SECTION_NAME" | SECTION_NAME [,"NAME_N" | NAME_N]'
14767
     Designate SECTION_NAME for blocking.  Blocking guarantees that a
14768
     section will start on a page boundary (128 words) if it would
14769
     otherwise cross a page boundary.  Only initialized sections may be
14770
     designated with this directive.  See also *Note TIC54X-Block::.
14771
 
14772
`.sect "SECTION_NAME"'
14773
     Define a named initialized section and make it the current section.
14774
 
14775
`SYMBOL .set "VALUE"'
14776
`SYMBOL .equ "VALUE"'
14777
     Equate a constant VALUE to a SYMBOL, which is placed in the symbol
14778
     table.  SYMBOL may not be previously defined.
14779
 
14780
`.space SIZE_IN_BITS'
14781
`.bes SIZE_IN_BITS'
14782
     Reserve the given number of bits in the current section and
14783
     zero-fill them.  If a label is used with `.space', it points to the
14784
     *first* word reserved.  With `.bes', the label points to the
14785
     *last* word reserved.
14786
 
14787
`.sslist'
14788
`.ssnolist'
14789
     Controls the inclusion of subsym replacement in the listing
14790
     output.  Ignored.
14791
 
14792
`.string "STRING" [,...,"STRING_N"]'
14793
`.pstring "STRING" [,...,"STRING_N"]'
14794
     Place 8-bit characters from STRING into the current section.
14795
     `.string' zero-fills the upper 8 bits of each word, while
14796
     `.pstring' puts two characters into each word, filling the
14797
     most-significant bits first.  Unused space is zero-filled.  If a
14798
     label is used, it points to the first word initialized.
14799
 
14800
`[STAG] .struct [OFFSET]'
14801
`[NAME_1] element [COUNT_1]'
14802
`[NAME_2] element [COUNT_2]'
14803
`[TNAME] .tag STAGX [TCOUNT]'
14804
`...'
14805
`[NAME_N] element [COUNT_N]'
14806
`[SSIZE] .endstruct'
14807
`LABEL .tag [STAG]'
14808
     Assign symbolic offsets to the elements of a structure.  STAG
14809
     defines a symbol to use to reference the structure.  OFFSET
14810
     indicates a starting value to use for the first element
14811
     encountered; otherwise it defaults to zero.  Each element can have
14812
     a named offset, NAME, which is a symbol assigned the value of the
14813
     element's offset into the structure.  If STAG is missing, these
14814
     become global symbols.  COUNT adjusts the offset that many times,
14815
     as if `element' were an array.  `element' may be one of `.byte',
14816
     `.word', `.long', `.float', or any equivalent of those, and the
14817
     structure offset is adjusted accordingly.  `.field' and `.string'
14818
     are also allowed; the size of `.field' is one bit, and `.string'
14819
     is considered to be one word in size.  Only element descriptors,
14820
     structure/union tags, `.align' and conditional assembly directives
14821
     are allowed within `.struct'/`.endstruct'.  `.align' aligns member
14822
     offsets to word boundaries only.  SSIZE, if provided, will always
14823
     be assigned the size of the structure.
14824
 
14825
     The `.tag' directive, in addition to being used to define a
14826
     structure/union element within a structure, may be used to apply a
14827
     structure to a symbol.  Once applied to LABEL, the individual
14828
     structure elements may be applied to LABEL to produce the desired
14829
     offsets using LABEL as the structure base.
14830
 
14831
`.tab'
14832
     Set the tab size in the output listing.  Ignored.
14833
 
14834
`[UTAG] .union'
14835
`[NAME_1] element [COUNT_1]'
14836
`[NAME_2] element [COUNT_2]'
14837
`[TNAME] .tag UTAGX[,TCOUNT]'
14838
`...'
14839
`[NAME_N] element [COUNT_N]'
14840
`[USIZE] .endstruct'
14841
`LABEL .tag [UTAG]'
14842
     Similar to `.struct', but the offset after each element is reset to
14843
     zero, and the USIZE is set to the maximum of all defined elements.
14844
     Starting offset for the union is always zero.
14845
 
14846
`[SYMBOL] .usect "SECTION_NAME", SIZE, [,[BLOCKING_FLAG] [,ALIGNMENT_FLAG]]'
14847
     Reserve space for variables in a named, uninitialized section
14848
     (similar to .bss).  `.usect' allows definitions sections
14849
     independent of .bss.  SYMBOL points to the first location reserved
14850
     by this allocation.  The symbol may be used as a variable name.
14851
     SIZE is the allocated size in words.  BLOCKING_FLAG indicates
14852
     whether to block this section on a page boundary (128 words)
14853
     (*note TIC54X-Block::).  ALIGNMENT FLAG indicates whether the
14854
     section should be longword-aligned.
14855
 
14856
`.var SYM[,..., SYM_N]'
14857
     Define a subsym to be a local variable within a macro.  See *Note
14858
     TIC54X-Macros::.
14859
 
14860
`.version VERSION'
14861
     Set which processor to build instructions for.  Though the
14862
     following values are accepted, the op is ignored.
14863
    `541'
14864
    `542'
14865
    `543'
14866
    `545'
14867
    `545LP'
14868
    `546LP'
14869
    `548'
14870
    `549'
14871
 
14872

14873
File: as.info,  Node: TIC54X-Macros,  Next: TIC54X-MMRegs,  Prev: TIC54X-Directives,  Up: TIC54X-Dependent
14874
 
14875
9.31.10 Macros
14876
--------------
14877
 
14878
Macros do not require explicit dereferencing of arguments (i.e., \ARG).
14879
 
14880
   During macro expansion, the macro parameters are converted to
14881
subsyms.  If the number of arguments passed the macro invocation
14882
exceeds the number of parameters defined, the last parameter is
14883
assigned the string equivalent of all remaining arguments.  If fewer
14884
arguments are given than parameters, the missing parameters are
14885
assigned empty strings.  To include a comma in an argument, you must
14886
enclose the argument in quotes.
14887
 
14888
   The following built-in subsym functions allow examination of the
14889
string value of subsyms (or ordinary strings).  The arguments are
14890
strings unless otherwise indicated (subsyms passed as args will be
14891
replaced by the strings they represent).
14892
``$symlen(STR)''
14893
     Returns the length of STR.
14894
 
14895
``$symcmp(STR1,STR2)''
14896
     Returns 0 if STR1 == STR2, non-zero otherwise.
14897
 
14898
``$firstch(STR,CH)''
14899
     Returns index of the first occurrence of character constant CH in
14900
     STR.
14901
 
14902
``$lastch(STR,CH)''
14903
     Returns index of the last occurrence of character constant CH in
14904
     STR.
14905
 
14906
``$isdefed(SYMBOL)''
14907
     Returns zero if the symbol SYMBOL is not in the symbol table,
14908
     non-zero otherwise.
14909
 
14910
``$ismember(SYMBOL,LIST)''
14911
     Assign the first member of comma-separated string LIST to SYMBOL;
14912
     LIST is reassigned the remainder of the list.  Returns zero if
14913
     LIST is a null string.  Both arguments must be subsyms.
14914
 
14915
``$iscons(EXPR)''
14916
     Returns 1 if string EXPR is binary, 2 if octal, 3 if hexadecimal,
14917
     4 if a character, 5 if decimal, and zero if not an integer.
14918
 
14919
``$isname(NAME)''
14920
     Returns 1 if NAME is a valid symbol name, zero otherwise.
14921
 
14922
``$isreg(REG)''
14923
     Returns 1 if REG is a valid predefined register name (AR0-AR7
14924
     only).
14925
 
14926
``$structsz(STAG)''
14927
     Returns the size of the structure or union represented by STAG.
14928
 
14929
``$structacc(STAG)''
14930
     Returns the reference point of the structure or union represented
14931
     by STAG.   Always returns zero.
14932
 
14933
 
14934

14935
File: as.info,  Node: TIC54X-MMRegs,  Prev: TIC54X-Macros,  Up: TIC54X-Dependent
14936
 
14937
9.31.11 Memory-mapped Registers
14938
-------------------------------
14939
 
14940
The following symbols are recognized as memory-mapped registers:
14941
 
14942
 
14943

14944
File: as.info,  Node: Z80-Dependent,  Next: Z8000-Dependent,  Prev: Xtensa-Dependent,  Up: Machine Dependencies
14945
 
14946
9.32 Z80 Dependent Features
14947
===========================
14948
 
14949
* Menu:
14950
 
14951
* Z80 Options::              Options
14952
* Z80 Syntax::               Syntax
14953
* Z80 Floating Point::       Floating Point
14954
* Z80 Directives::           Z80 Machine Directives
14955
* Z80 Opcodes::              Opcodes
14956
 
14957

14958
File: as.info,  Node: Z80 Options,  Next: Z80 Syntax,  Up: Z80-Dependent
14959
 
14960
9.32.1 Options
14961
--------------
14962
 
14963
The Zilog Z80 and Ascii R800 version of `as' have a few machine
14964
dependent options.
14965
`-z80'
14966
     Produce code for the Z80 processor. There are additional options to
14967
     request warnings and error messages for undocumented instructions.
14968
 
14969
`-ignore-undocumented-instructions'
14970
`-Wnud'
14971
     Silently assemble undocumented Z80-instructions that have been
14972
     adopted as documented R800-instructions.
14973
 
14974
`-ignore-unportable-instructions'
14975
`-Wnup'
14976
     Silently assemble all undocumented Z80-instructions.
14977
 
14978
`-warn-undocumented-instructions'
14979
`-Wud'
14980
     Issue warnings for undocumented Z80-instructions that work on
14981
     R800, do not assemble other undocumented instructions without
14982
     warning.
14983
 
14984
`-warn-unportable-instructions'
14985
`-Wup'
14986
     Issue warnings for other undocumented Z80-instructions, do not
14987
     treat any undocumented instructions as errors.
14988
 
14989
`-forbid-undocumented-instructions'
14990
`-Fud'
14991
     Treat all undocumented z80-instructions as errors.
14992
 
14993
`-forbid-unportable-instructions'
14994
`-Fup'
14995
     Treat undocumented z80-instructions that do not work on R800 as
14996
     errors.
14997
 
14998
`-r800'
14999
     Produce code for the R800 processor. The assembler does not support
15000
     undocumented instructions for the R800.  In line with common
15001
     practice, `as' uses Z80 instruction names for the R800 processor,
15002
     as far as they exist.
15003
 
15004

15005
File: as.info,  Node: Z80 Syntax,  Next: Z80 Floating Point,  Prev: Z80 Options,  Up: Z80-Dependent
15006
 
15007
9.32.2 Syntax
15008
-------------
15009
 
15010
The assembler syntax closely follows the 'Z80 family CPU User Manual' by
15011
Zilog.  In expressions a single `=' may be used as "is equal to"
15012
comparison operator.
15013
 
15014
   Suffices can be used to indicate the radix of integer constants; `H'
15015
or `h' for hexadecimal, `D' or `d' for decimal, `Q', `O', `q' or `o'
15016
for octal, and `B' for binary.
15017
 
15018
   The suffix `b' denotes a backreference to local label.
15019
 
15020
* Menu:
15021
 
15022
* Z80-Chars::                Special Characters
15023
* Z80-Regs::                 Register Names
15024
* Z80-Case::                 Case Sensitivity
15025
 
15026

15027
File: as.info,  Node: Z80-Chars,  Next: Z80-Regs,  Up: Z80 Syntax
15028
 
15029
9.32.2.1 Special Characters
15030
...........................
15031
 
15032
The semicolon `;' is the line comment character;
15033
 
15034
   The dollar sign `$' can be used as a prefix for hexadecimal numbers
15035
and as a symbol denoting the current location counter.
15036
 
15037
   A backslash `\' is an ordinary character for the Z80 assembler.
15038
 
15039
   The single quote `'' must be followed by a closing quote. If there
15040
is one character in between, it is a character constant, otherwise it is
15041
a string constant.
15042
 
15043

15044
File: as.info,  Node: Z80-Regs,  Next: Z80-Case,  Prev: Z80-Chars,  Up: Z80 Syntax
15045
 
15046
9.32.2.2 Register Names
15047
.......................
15048
 
15049
The registers are referred to with the letters assigned to them by
15050
Zilog. In addition `as' recognizes `ixl' and `ixh' as the least and
15051
most significant octet in `ix', and similarly `iyl' and  `iyh' as parts
15052
of `iy'.
15053
 
15054

15055
File: as.info,  Node: Z80-Case,  Prev: Z80-Regs,  Up: Z80 Syntax
15056
 
15057
9.32.2.3 Case Sensitivity
15058
.........................
15059
 
15060
Upper and lower case are equivalent in register names, opcodes,
15061
condition codes  and assembler directives.  The case of letters is
15062
significant in labels and symbol names. The case is also important to
15063
distinguish the suffix `b' for a backward reference to a local label
15064
from the suffix `B' for a number in binary notation.
15065
 
15066

15067
File: as.info,  Node: Z80 Floating Point,  Next: Z80 Directives,  Prev: Z80 Syntax,  Up: Z80-Dependent
15068
 
15069
9.32.3 Floating Point
15070
---------------------
15071
 
15072
Floating-point numbers are not supported.
15073
 
15074

15075
File: as.info,  Node: Z80 Directives,  Next: Z80 Opcodes,  Prev: Z80 Floating Point,  Up: Z80-Dependent
15076
 
15077
9.32.4 Z80 Assembler Directives
15078
-------------------------------
15079
 
15080
`as' for the Z80 supports some additional directives for compatibility
15081
with other assemblers.
15082
 
15083
   These are the additional directives in `as' for the Z80:
15084
 
15085
`db EXPRESSION|STRING[,EXPRESSION|STRING...]'
15086
`defb EXPRESSION|STRING[,EXPRESSION|STRING...]'
15087
     For each STRING the characters are copied to the object file, for
15088
     each other EXPRESSION the value is stored in one byte.  A warning
15089
     is issued in case of an overflow.
15090
 
15091
`dw EXPRESSION[,EXPRESSION...]'
15092
`defw EXPRESSION[,EXPRESSION...]'
15093
     For each EXPRESSION the value is stored in two bytes, ignoring
15094
     overflow.
15095
 
15096
`d24 EXPRESSION[,EXPRESSION...]'
15097
`def24 EXPRESSION[,EXPRESSION...]'
15098
     For each EXPRESSION the value is stored in three bytes, ignoring
15099
     overflow.
15100
 
15101
`d32 EXPRESSION[,EXPRESSION...]'
15102
`def32 EXPRESSION[,EXPRESSION...]'
15103
     For each EXPRESSION the value is stored in four bytes, ignoring
15104
     overflow.
15105
 
15106
`ds COUNT[, VALUE]'
15107
`defs COUNT[, VALUE]'
15108
     Fill COUNT bytes in the object file with VALUE, if VALUE is
15109
     omitted it defaults to zero.
15110
 
15111
`SYMBOL equ EXPRESSION'
15112
`SYMBOL defl EXPRESSION'
15113
     These directives set the value of SYMBOL to EXPRESSION. If `equ'
15114
     is used, it is an error if SYMBOL is already defined.  Symbols
15115
     defined with `equ' are not protected from redefinition.
15116
 
15117
`set'
15118
     This is a normal instruction on Z80, and not an assembler
15119
     directive.
15120
 
15121
`psect NAME'
15122
     A synonym for *Note Section::, no second argument should be given.
15123
 
15124
 
15125

15126
File: as.info,  Node: Z80 Opcodes,  Prev: Z80 Directives,  Up: Z80-Dependent
15127
 
15128
9.32.5 Opcodes
15129
--------------
15130
 
15131
In line with common practice, Z80 mnemonics are used for both the Z80
15132
and the R800.
15133
 
15134
   In many instructions it is possible to use one of the half index
15135
registers (`ixl',`ixh',`iyl',`iyh') in stead of an 8-bit general
15136
purpose register. This yields instructions that are documented on the
15137
R800 and undocumented on the Z80.  Similarly `in f,(c)' is documented
15138
on the R800 and undocumented on the Z80.
15139
 
15140
   The assembler also supports the following undocumented
15141
Z80-instructions, that have not been adopted in the R800 instruction
15142
set:
15143
`out (c),0'
15144
     Sends zero to the port pointed to by register c.
15145
 
15146
`sli M'
15147
     Equivalent to `M = (M<<1)+1', the operand M can be any operand
15148
     that is valid for `sla'. One can use `sll' as a synonym for `sli'.
15149
 
15150
`OP (ix+D), R'
15151
     This is equivalent to
15152
 
15153
          ld R, (ix+D)
15154
          OPC R
15155
          ld (ix+D), R
15156
 
15157
     The operation `OPC' may be any of `res B,', `set B,', `rl', `rlc',
15158
     `rr', `rrc', `sla', `sli', `sra' and `srl', and the register `R'
15159
     may be any of `a', `b', `c', `d', `e', `h' and `l'.
15160
 
15161
`OPC (iy+D), R'
15162
     As above, but with `iy' instead of `ix'.
15163
 
15164
   The web site at `http://www.z80.info' is a good starting place to
15165
find more information on programming the Z80.
15166
 
15167

15168
File: as.info,  Node: Z8000-Dependent,  Next: Vax-Dependent,  Prev: Z80-Dependent,  Up: Machine Dependencies
15169
 
15170
9.33 Z8000 Dependent Features
15171
=============================
15172
 
15173
   The Z8000 as supports both members of the Z8000 family: the
15174
unsegmented Z8002, with 16 bit addresses, and the segmented Z8001 with
15175
24 bit addresses.
15176
 
15177
   When the assembler is in unsegmented mode (specified with the
15178
`unsegm' directive), an address takes up one word (16 bit) sized
15179
register.  When the assembler is in segmented mode (specified with the
15180
`segm' directive), a 24-bit address takes up a long (32 bit) register.
15181
*Note Assembler Directives for the Z8000: Z8000 Directives, for a list
15182
of other Z8000 specific assembler directives.
15183
 
15184
* Menu:
15185
 
15186
* Z8000 Options::               Command-line options for the Z8000
15187
* Z8000 Syntax::                Assembler syntax for the Z8000
15188
* Z8000 Directives::            Special directives for the Z8000
15189
* Z8000 Opcodes::               Opcodes
15190
 
15191

15192
File: as.info,  Node: Z8000 Options,  Next: Z8000 Syntax,  Up: Z8000-Dependent
15193
 
15194
9.33.1 Options
15195
--------------
15196
 
15197
`-z8001'
15198
     Generate segmented code by default.
15199
 
15200
`-z8002'
15201
     Generate unsegmented code by default.
15202
 
15203

15204
File: as.info,  Node: Z8000 Syntax,  Next: Z8000 Directives,  Prev: Z8000 Options,  Up: Z8000-Dependent
15205
 
15206
9.33.2 Syntax
15207
-------------
15208
 
15209
* Menu:
15210
 
15211
* Z8000-Chars::                Special Characters
15212
* Z8000-Regs::                 Register Names
15213
* Z8000-Addressing::           Addressing Modes
15214
 
15215

15216
File: as.info,  Node: Z8000-Chars,  Next: Z8000-Regs,  Up: Z8000 Syntax
15217
 
15218
9.33.2.1 Special Characters
15219
...........................
15220
 
15221
`!' is the line comment character.
15222
 
15223
   You can use `;' instead of a newline to separate statements.
15224
 
15225

15226
File: as.info,  Node: Z8000-Regs,  Next: Z8000-Addressing,  Prev: Z8000-Chars,  Up: Z8000 Syntax
15227
 
15228
9.33.2.2 Register Names
15229
.......................
15230
 
15231
The Z8000 has sixteen 16 bit registers, numbered 0 to 15.  You can refer
15232
to different sized groups of registers by register number, with the
15233
prefix `r' for 16 bit registers, `rr' for 32 bit registers and `rq' for
15234
64 bit registers.  You can also refer to the contents of the first
15235
eight (of the sixteen 16 bit registers) by bytes.  They are named `rlN'
15236
and `rhN'.
15237
 
15238
_byte registers_
15239
     rl0 rh0 rl1 rh1 rl2 rh2 rl3 rh3
15240
     rl4 rh4 rl5 rh5 rl6 rh6 rl7 rh7
15241
 
15242
_word registers_
15243
     r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15
15244
 
15245
_long word registers_
15246
     rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14
15247
 
15248
_quad word registers_
15249
     rq0 rq4 rq8 rq12
15250
 
15251

15252
File: as.info,  Node: Z8000-Addressing,  Prev: Z8000-Regs,  Up: Z8000 Syntax
15253
 
15254
9.33.2.3 Addressing Modes
15255
.........................
15256
 
15257
as understands the following addressing modes for the Z8000:
15258
 
15259
`rlN'
15260
`rhN'
15261
`rN'
15262
`rrN'
15263
`rqN'
15264
     Register direct:  8bit, 16bit, 32bit, and 64bit registers.
15265
 
15266
`@rN'
15267
`@rrN'
15268
     Indirect register:  @rrN in segmented mode, @rN in unsegmented
15269
     mode.
15270
 
15271
`ADDR'
15272
     Direct: the 16 bit or 24 bit address (depending on whether the
15273
     assembler is in segmented or unsegmented mode) of the operand is
15274
     in the instruction.
15275
 
15276
`address(rN)'
15277
     Indexed: the 16 or 24 bit address is added to the 16 bit register
15278
     to produce the final address in memory of the operand.
15279
 
15280
`rN(#IMM)'
15281
`rrN(#IMM)'
15282
     Base Address: the 16 or 24 bit register is added to the 16 bit sign
15283
     extended immediate displacement to produce the final address in
15284
     memory of the operand.
15285
 
15286
`rN(rM)'
15287
`rrN(rM)'
15288
     Base Index: the 16 or 24 bit register rN or rrN is added to the
15289
     sign extended 16 bit index register rM to produce the final
15290
     address in memory of the operand.
15291
 
15292
`#XX'
15293
     Immediate data XX.
15294
 
15295

15296
File: as.info,  Node: Z8000 Directives,  Next: Z8000 Opcodes,  Prev: Z8000 Syntax,  Up: Z8000-Dependent
15297
 
15298
9.33.3 Assembler Directives for the Z8000
15299
-----------------------------------------
15300
 
15301
The Z8000 port of as includes additional assembler directives, for
15302
compatibility with other Z8000 assemblers.  These do not begin with `.'
15303
(unlike the ordinary as directives).
15304
 
15305
`segm'
15306
`.z8001'
15307
     Generate code for the segmented Z8001.
15308
 
15309
`unsegm'
15310
`.z8002'
15311
     Generate code for the unsegmented Z8002.
15312
 
15313
`name'
15314
     Synonym for `.file'
15315
 
15316
`global'
15317
     Synonym for `.global'
15318
 
15319
`wval'
15320
     Synonym for `.word'
15321
 
15322
`lval'
15323
     Synonym for `.long'
15324
 
15325
`bval'
15326
     Synonym for `.byte'
15327
 
15328
`sval'
15329
     Assemble a string.  `sval' expects one string literal, delimited by
15330
     single quotes.  It assembles each byte of the string into
15331
     consecutive addresses.  You can use the escape sequence `%XX'
15332
     (where XX represents a two-digit hexadecimal number) to represent
15333
     the character whose ASCII value is XX.  Use this feature to
15334
     describe single quote and other characters that may not appear in
15335
     string literals as themselves.  For example, the C statement
15336
     `char *a = "he said \"it's 50% off\"";' is represented in Z8000
15337
     assembly language (shown with the assembler output in hex at the
15338
     left) as
15339
 
15340
          68652073    sval    'he said %22it%27s 50%25 off%22%00'
15341
          61696420
15342
          22697427
15343
          73203530
15344
          25206F66
15345
          662200
15346
 
15347
`rsect'
15348
     synonym for `.section'
15349
 
15350
`block'
15351
     synonym for `.space'
15352
 
15353
`even'
15354
     special case of `.align'; aligns output to even byte boundary.
15355
 
15356

15357
File: as.info,  Node: Z8000 Opcodes,  Prev: Z8000 Directives,  Up: Z8000-Dependent
15358
 
15359
9.33.4 Opcodes
15360
--------------
15361
 
15362
For detailed information on the Z8000 machine instruction set, see
15363
`Z8000 Technical Manual'.
15364
 
15365
   The following table summarizes the opcodes and their arguments:
15366
 
15367
                 rs   16 bit source register
15368
                 rd   16 bit destination register
15369
                 rbs   8 bit source register
15370
                 rbd   8 bit destination register
15371
                 rrs   32 bit source register
15372
                 rrd   32 bit destination register
15373
                 rqs   64 bit source register
15374
                 rqd   64 bit destination register
15375
                 addr 16/24 bit address
15376
                 imm  immediate data
15377
 
15378
     adc rd,rs               clrb addr               cpsir @rd,@rs,rr,cc
15379
     adcb rbd,rbs            clrb addr(rd)           cpsirb @rd,@rs,rr,cc
15380
     add rd,@rs              clrb rbd                dab rbd
15381
     add rd,addr             com @rd                 dbjnz rbd,disp7
15382
     add rd,addr(rs)         com addr                dec @rd,imm4m1
15383
     add rd,imm16            com addr(rd)            dec addr(rd),imm4m1
15384
     add rd,rs               com rd                  dec addr,imm4m1
15385
     addb rbd,@rs            comb @rd                dec rd,imm4m1
15386
     addb rbd,addr           comb addr               decb @rd,imm4m1
15387
     addb rbd,addr(rs)       comb addr(rd)           decb addr(rd),imm4m1
15388
     addb rbd,imm8           comb rbd                decb addr,imm4m1
15389
     addb rbd,rbs            comflg flags            decb rbd,imm4m1
15390
     addl rrd,@rs            cp @rd,imm16            di i2
15391
     addl rrd,addr           cp addr(rd),imm16       div rrd,@rs
15392
     addl rrd,addr(rs)       cp addr,imm16           div rrd,addr
15393
     addl rrd,imm32          cp rd,@rs               div rrd,addr(rs)
15394
     addl rrd,rrs            cp rd,addr              div rrd,imm16
15395
     and rd,@rs              cp rd,addr(rs)          div rrd,rs
15396
     and rd,addr             cp rd,imm16             divl rqd,@rs
15397
     and rd,addr(rs)         cp rd,rs                divl rqd,addr
15398
     and rd,imm16            cpb @rd,imm8            divl rqd,addr(rs)
15399
     and rd,rs               cpb addr(rd),imm8       divl rqd,imm32
15400
     andb rbd,@rs            cpb addr,imm8           divl rqd,rrs
15401
     andb rbd,addr           cpb rbd,@rs             djnz rd,disp7
15402
     andb rbd,addr(rs)       cpb rbd,addr            ei i2
15403
     andb rbd,imm8           cpb rbd,addr(rs)        ex rd,@rs
15404
     andb rbd,rbs            cpb rbd,imm8            ex rd,addr
15405
     bit @rd,imm4            cpb rbd,rbs             ex rd,addr(rs)
15406
     bit addr(rd),imm4       cpd rd,@rs,rr,cc        ex rd,rs
15407
     bit addr,imm4           cpdb rbd,@rs,rr,cc      exb rbd,@rs
15408
     bit rd,imm4             cpdr rd,@rs,rr,cc       exb rbd,addr
15409
     bit rd,rs               cpdrb rbd,@rs,rr,cc     exb rbd,addr(rs)
15410
     bitb @rd,imm4           cpi rd,@rs,rr,cc        exb rbd,rbs
15411
     bitb addr(rd),imm4      cpib rbd,@rs,rr,cc      ext0e imm8
15412
     bitb addr,imm4          cpir rd,@rs,rr,cc       ext0f imm8
15413
     bitb rbd,imm4           cpirb rbd,@rs,rr,cc     ext8e imm8
15414
     bitb rbd,rs             cpl rrd,@rs             ext8f imm8
15415
     bpt                     cpl rrd,addr            exts rrd
15416
     call @rd                cpl rrd,addr(rs)        extsb rd
15417
     call addr               cpl rrd,imm32           extsl rqd
15418
     call addr(rd)           cpl rrd,rrs             halt
15419
     calr disp12             cpsd @rd,@rs,rr,cc      in rd,@rs
15420
     clr @rd                 cpsdb @rd,@rs,rr,cc     in rd,imm16
15421
     clr addr                cpsdr @rd,@rs,rr,cc     inb rbd,@rs
15422
     clr addr(rd)            cpsdrb @rd,@rs,rr,cc    inb rbd,imm16
15423
     clr rd                  cpsi @rd,@rs,rr,cc      inc @rd,imm4m1
15424
     clrb @rd                cpsib @rd,@rs,rr,cc     inc addr(rd),imm4m1
15425
     inc addr,imm4m1         ldb rbd,rs(rx)          mult rrd,addr(rs)
15426
     inc rd,imm4m1           ldb rd(imm16),rbs       mult rrd,imm16
15427
     incb @rd,imm4m1         ldb rd(rx),rbs          mult rrd,rs
15428
     incb addr(rd),imm4m1    ldctl ctrl,rs           multl rqd,@rs
15429
     incb addr,imm4m1        ldctl rd,ctrl           multl rqd,addr
15430
     incb rbd,imm4m1         ldd @rs,@rd,rr          multl rqd,addr(rs)
15431
     ind @rd,@rs,ra          lddb @rs,@rd,rr         multl rqd,imm32
15432
     indb @rd,@rs,rba        lddr @rs,@rd,rr         multl rqd,rrs
15433
     inib @rd,@rs,ra         lddrb @rs,@rd,rr        neg @rd
15434
     inibr @rd,@rs,ra        ldi @rd,@rs,rr          neg addr
15435
     iret                    ldib @rd,@rs,rr         neg addr(rd)
15436
     jp cc,@rd               ldir @rd,@rs,rr         neg rd
15437
     jp cc,addr              ldirb @rd,@rs,rr        negb @rd
15438
     jp cc,addr(rd)          ldk rd,imm4             negb addr
15439
     jr cc,disp8             ldl @rd,rrs             negb addr(rd)
15440
     ld @rd,imm16            ldl addr(rd),rrs        negb rbd
15441
     ld @rd,rs               ldl addr,rrs            nop
15442
     ld addr(rd),imm16       ldl rd(imm16),rrs       or rd,@rs
15443
     ld addr(rd),rs          ldl rd(rx),rrs          or rd,addr
15444
     ld addr,imm16           ldl rrd,@rs             or rd,addr(rs)
15445
     ld addr,rs              ldl rrd,addr            or rd,imm16
15446
     ld rd(imm16),rs         ldl rrd,addr(rs)        or rd,rs
15447
     ld rd(rx),rs            ldl rrd,imm32           orb rbd,@rs
15448
     ld rd,@rs               ldl rrd,rrs             orb rbd,addr
15449
     ld rd,addr              ldl rrd,rs(imm16)       orb rbd,addr(rs)
15450
     ld rd,addr(rs)          ldl rrd,rs(rx)          orb rbd,imm8
15451
     ld rd,imm16             ldm @rd,rs,n            orb rbd,rbs
15452
     ld rd,rs                ldm addr(rd),rs,n       out @rd,rs
15453
     ld rd,rs(imm16)         ldm addr,rs,n           out imm16,rs
15454
     ld rd,rs(rx)            ldm rd,@rs,n            outb @rd,rbs
15455
     lda rd,addr             ldm rd,addr(rs),n       outb imm16,rbs
15456
     lda rd,addr(rs)         ldm rd,addr,n           outd @rd,@rs,ra
15457
     lda rd,rs(imm16)        ldps @rs                outdb @rd,@rs,rba
15458
     lda rd,rs(rx)           ldps addr               outib @rd,@rs,ra
15459
     ldar rd,disp16          ldps addr(rs)           outibr @rd,@rs,ra
15460
     ldb @rd,imm8            ldr disp16,rs           pop @rd,@rs
15461
     ldb @rd,rbs             ldr rd,disp16           pop addr(rd),@rs
15462
     ldb addr(rd),imm8       ldrb disp16,rbs         pop addr,@rs
15463
     ldb addr(rd),rbs        ldrb rbd,disp16         pop rd,@rs
15464
     ldb addr,imm8           ldrl disp16,rrs         popl @rd,@rs
15465
     ldb addr,rbs            ldrl rrd,disp16         popl addr(rd),@rs
15466
     ldb rbd,@rs             mbit                    popl addr,@rs
15467
     ldb rbd,addr            mreq rd                 popl rrd,@rs
15468
     ldb rbd,addr(rs)        mres                    push @rd,@rs
15469
     ldb rbd,imm8            mset                    push @rd,addr
15470
     ldb rbd,rbs             mult rrd,@rs            push @rd,addr(rs)
15471
     ldb rbd,rs(imm16)       mult rrd,addr           push @rd,imm16
15472
     push @rd,rs             set addr,imm4           subl rrd,imm32
15473
     pushl @rd,@rs           set rd,imm4             subl rrd,rrs
15474
     pushl @rd,addr          set rd,rs               tcc cc,rd
15475
     pushl @rd,addr(rs)      setb @rd,imm4           tccb cc,rbd
15476
     pushl @rd,rrs           setb addr(rd),imm4      test @rd
15477
     res @rd,imm4            setb addr,imm4          test addr
15478
     res addr(rd),imm4       setb rbd,imm4           test addr(rd)
15479
     res addr,imm4           setb rbd,rs             test rd
15480
     res rd,imm4             setflg imm4             testb @rd
15481
     res rd,rs               sinb rbd,imm16          testb addr
15482
     resb @rd,imm4           sinb rd,imm16           testb addr(rd)
15483
     resb addr(rd),imm4      sind @rd,@rs,ra         testb rbd
15484
     resb addr,imm4          sindb @rd,@rs,rba       testl @rd
15485
     resb rbd,imm4           sinib @rd,@rs,ra        testl addr
15486
     resb rbd,rs             sinibr @rd,@rs,ra       testl addr(rd)
15487
     resflg imm4             sla rd,imm8             testl rrd
15488
     ret cc                  slab rbd,imm8           trdb @rd,@rs,rba
15489
     rl rd,imm1or2           slal rrd,imm8           trdrb @rd,@rs,rba
15490
     rlb rbd,imm1or2         sll rd,imm8             trib @rd,@rs,rbr
15491
     rlc rd,imm1or2          sllb rbd,imm8           trirb @rd,@rs,rbr
15492
     rlcb rbd,imm1or2        slll rrd,imm8           trtdrb @ra,@rb,rbr
15493
     rldb rbb,rba            sout imm16,rs           trtib @ra,@rb,rr
15494
     rr rd,imm1or2           soutb imm16,rbs         trtirb @ra,@rb,rbr
15495
     rrb rbd,imm1or2         soutd @rd,@rs,ra        trtrb @ra,@rb,rbr
15496
     rrc rd,imm1or2          soutdb @rd,@rs,rba      tset @rd
15497
     rrcb rbd,imm1or2        soutib @rd,@rs,ra       tset addr
15498
     rrdb rbb,rba            soutibr @rd,@rs,ra      tset addr(rd)
15499
     rsvd36                  sra rd,imm8             tset rd
15500
     rsvd38                  srab rbd,imm8           tsetb @rd
15501
     rsvd78                  sral rrd,imm8           tsetb addr
15502
     rsvd7e                  srl rd,imm8             tsetb addr(rd)
15503
     rsvd9d                  srlb rbd,imm8           tsetb rbd
15504
     rsvd9f                  srll rrd,imm8           xor rd,@rs
15505
     rsvdb9                  sub rd,@rs              xor rd,addr
15506
     rsvdbf                  sub rd,addr             xor rd,addr(rs)
15507
     sbc rd,rs               sub rd,addr(rs)         xor rd,imm16
15508
     sbcb rbd,rbs            sub rd,imm16            xor rd,rs
15509
     sc imm8                 sub rd,rs               xorb rbd,@rs
15510
     sda rd,rs               subb rbd,@rs            xorb rbd,addr
15511
     sdab rbd,rs             subb rbd,addr           xorb rbd,addr(rs)
15512
     sdal rrd,rs             subb rbd,addr(rs)       xorb rbd,imm8
15513
     sdl rd,rs               subb rbd,imm8           xorb rbd,rbs
15514
     sdlb rbd,rs             subb rbd,rbs            xorb rbd,rbs
15515
     sdll rrd,rs             subl rrd,@rs
15516
     set @rd,imm4            subl rrd,addr
15517
     set addr(rd),imm4       subl rrd,addr(rs)
15518
 
15519

15520
File: as.info,  Node: Vax-Dependent,  Prev: Z8000-Dependent,  Up: Machine Dependencies
15521
 
15522
9.34 VAX Dependent Features
15523
===========================
15524
 
15525
* Menu:
15526
 
15527
* VAX-Opts::                    VAX Command-Line Options
15528
* VAX-float::                   VAX Floating Point
15529
* VAX-directives::              Vax Machine Directives
15530
* VAX-opcodes::                 VAX Opcodes
15531
* VAX-branch::                  VAX Branch Improvement
15532
* VAX-operands::                VAX Operands
15533
* VAX-no::                      Not Supported on VAX
15534
 
15535

15536
File: as.info,  Node: VAX-Opts,  Next: VAX-float,  Up: Vax-Dependent
15537
 
15538
9.34.1 VAX Command-Line Options
15539
-------------------------------
15540
 
15541
The Vax version of `as' accepts any of the following options, gives a
15542
warning message that the option was ignored and proceeds.  These
15543
options are for compatibility with scripts designed for other people's
15544
assemblers.
15545
 
15546
``-D' (Debug)'
15547
``-S' (Symbol Table)'
15548
``-T' (Token Trace)'
15549
     These are obsolete options used to debug old assemblers.
15550
 
15551
``-d' (Displacement size for JUMPs)'
15552
     This option expects a number following the `-d'.  Like options
15553
     that expect filenames, the number may immediately follow the `-d'
15554
     (old standard) or constitute the whole of the command line
15555
     argument that follows `-d' (GNU standard).
15556
 
15557
``-V' (Virtualize Interpass Temporary File)'
15558
     Some other assemblers use a temporary file.  This option commanded
15559
     them to keep the information in active memory rather than in a
15560
     disk file.  `as' always does this, so this option is redundant.
15561
 
15562
``-J' (JUMPify Longer Branches)'
15563
     Many 32-bit computers permit a variety of branch instructions to
15564
     do the same job.  Some of these instructions are short (and fast)
15565
     but have a limited range; others are long (and slow) but can
15566
     branch anywhere in virtual memory.  Often there are 3 flavors of
15567
     branch: short, medium and long.  Some other assemblers would emit
15568
     short and medium branches, unless told by this option to emit
15569
     short and long branches.
15570
 
15571
``-t' (Temporary File Directory)'
15572
     Some other assemblers may use a temporary file, and this option
15573
     takes a filename being the directory to site the temporary file.
15574
     Since `as' does not use a temporary disk file, this option makes
15575
     no difference.  `-t' needs exactly one filename.
15576
 
15577
   The Vax version of the assembler accepts additional options when
15578
compiled for VMS:
15579
 
15580
`-h N'
15581
     External symbol or section (used for global variables) names are
15582
     not case sensitive on VAX/VMS and always mapped to upper case.
15583
     This is contrary to the C language definition which explicitly
15584
     distinguishes upper and lower case.  To implement a standard
15585
     conforming C compiler, names must be changed (mapped) to preserve
15586
     the case information.  The default mapping is to convert all lower
15587
     case characters to uppercase and adding an underscore followed by
15588
     a 6 digit hex value, representing a 24 digit binary value.  The
15589
     one digits in the binary value represent which characters are
15590
     uppercase in the original symbol name.
15591
 
15592
     The `-h N' option determines how we map names.  This takes several
15593
     values.  No `-h' switch at all allows case hacking as described
15594
     above.  A value of zero (`-h0') implies names should be upper
15595
     case, and inhibits the case hack.  A value of 2 (`-h2') implies
15596
     names should be all lower case, with no case hack.  A value of 3
15597
     (`-h3') implies that case should be preserved.  The value 1 is
15598
     unused.  The `-H' option directs `as' to display every mapped
15599
     symbol during assembly.
15600
 
15601
     Symbols whose names include a dollar sign `$' are exceptions to the
15602
     general name mapping.  These symbols are normally only used to
15603
     reference VMS library names.  Such symbols are always mapped to
15604
     upper case.
15605
 
15606
`-+'
15607
     The `-+' option causes `as' to truncate any symbol name larger
15608
     than 31 characters.  The `-+' option also prevents some code
15609
     following the `_main' symbol normally added to make the object
15610
     file compatible with Vax-11 "C".
15611
 
15612
`-1'
15613
     This option is ignored for backward compatibility with `as'
15614
     version 1.x.
15615
 
15616
`-H'
15617
     The `-H' option causes `as' to print every symbol which was
15618
     changed by case mapping.
15619
 
15620

15621
File: as.info,  Node: VAX-float,  Next: VAX-directives,  Prev: VAX-Opts,  Up: Vax-Dependent
15622
 
15623
9.34.2 VAX Floating Point
15624
-------------------------
15625
 
15626
Conversion of flonums to floating point is correct, and compatible with
15627
previous assemblers.  Rounding is towards zero if the remainder is
15628
exactly half the least significant bit.
15629
 
15630
   `D', `F', `G' and `H' floating point formats are understood.
15631
 
15632
   Immediate floating literals (_e.g._ `S`$6.9') are rendered
15633
correctly.  Again, rounding is towards zero in the boundary case.
15634
 
15635
   The `.float' directive produces `f' format numbers.  The `.double'
15636
directive produces `d' format numbers.
15637
 
15638

15639
File: as.info,  Node: VAX-directives,  Next: VAX-opcodes,  Prev: VAX-float,  Up: Vax-Dependent
15640
 
15641
9.34.3 Vax Machine Directives
15642
-----------------------------
15643
 
15644
The Vax version of the assembler supports four directives for
15645
generating Vax floating point constants.  They are described in the
15646
table below.
15647
 
15648
`.dfloat'
15649
     This expects zero or more flonums, separated by commas, and
15650
     assembles Vax `d' format 64-bit floating point constants.
15651
 
15652
`.ffloat'
15653
     This expects zero or more flonums, separated by commas, and
15654
     assembles Vax `f' format 32-bit floating point constants.
15655
 
15656
`.gfloat'
15657
     This expects zero or more flonums, separated by commas, and
15658
     assembles Vax `g' format 64-bit floating point constants.
15659
 
15660
`.hfloat'
15661
     This expects zero or more flonums, separated by commas, and
15662
     assembles Vax `h' format 128-bit floating point constants.
15663
 
15664
 
15665

15666
File: as.info,  Node: VAX-opcodes,  Next: VAX-branch,  Prev: VAX-directives,  Up: Vax-Dependent
15667
 
15668
9.34.4 VAX Opcodes
15669
------------------
15670
 
15671
All DEC mnemonics are supported.  Beware that `case...' instructions
15672
have exactly 3 operands.  The dispatch table that follows the `case...'
15673
instruction should be made with `.word' statements.  This is compatible
15674
with all unix assemblers we know of.
15675
 
15676

15677
File: as.info,  Node: VAX-branch,  Next: VAX-operands,  Prev: VAX-opcodes,  Up: Vax-Dependent
15678
 
15679
9.34.5 VAX Branch Improvement
15680
-----------------------------
15681
 
15682
Certain pseudo opcodes are permitted.  They are for branch
15683
instructions.  They expand to the shortest branch instruction that
15684
reaches the target.  Generally these mnemonics are made by substituting
15685
`j' for `b' at the start of a DEC mnemonic.  This feature is included
15686
both for compatibility and to help compilers.  If you do not need this
15687
feature, avoid these opcodes.  Here are the mnemonics, and the code
15688
they can expand into.
15689
 
15690
`jbsb'
15691
     `Jsb' is already an instruction mnemonic, so we chose `jbsb'.
15692
    (byte displacement)
15693
          `bsbb ...'
15694
 
15695
    (word displacement)
15696
          `bsbw ...'
15697
 
15698
    (long displacement)
15699
          `jsb ...'
15700
 
15701
`jbr'
15702
`jr'
15703
     Unconditional branch.
15704
    (byte displacement)
15705
          `brb ...'
15706
 
15707
    (word displacement)
15708
          `brw ...'
15709
 
15710
    (long displacement)
15711
          `jmp ...'
15712
 
15713
`jCOND'
15714
     COND may be any one of the conditional branches `neq', `nequ',
15715
     `eql', `eqlu', `gtr', `geq', `lss', `gtru', `lequ', `vc', `vs',
15716
     `gequ', `cc', `lssu', `cs'.  COND may also be one of the bit tests
15717
     `bs', `bc', `bss', `bcs', `bsc', `bcc', `bssi', `bcci', `lbs',
15718
     `lbc'.  NOTCOND is the opposite condition to COND.
15719
    (byte displacement)
15720
          `bCOND ...'
15721
 
15722
    (word displacement)
15723
          `bNOTCOND foo ; brw ... ; foo:'
15724
 
15725
    (long displacement)
15726
          `bNOTCOND foo ; jmp ... ; foo:'
15727
 
15728
`jacbX'
15729
     X may be one of `b d f g h l w'.
15730
    (word displacement)
15731
          `OPCODE ...'
15732
 
15733
    (long displacement)
15734
               OPCODE ..., foo ;
15735
               brb bar ;
15736
               foo: jmp ... ;
15737
               bar:
15738
 
15739
`jaobYYY'
15740
     YYY may be one of `lss leq'.
15741
 
15742
`jsobZZZ'
15743
     ZZZ may be one of `geq gtr'.
15744
    (byte displacement)
15745
          `OPCODE ...'
15746
 
15747
    (word displacement)
15748
               OPCODE ..., foo ;
15749
               brb bar ;
15750
               foo: brw DESTINATION ;
15751
               bar:
15752
 
15753
    (long displacement)
15754
               OPCODE ..., foo ;
15755
               brb bar ;
15756
               foo: jmp DESTINATION ;
15757
               bar:
15758
 
15759
`aobleq'
15760
`aoblss'
15761
`sobgeq'
15762
`sobgtr'
15763
 
15764
    (byte displacement)
15765
          `OPCODE ...'
15766
 
15767
    (word displacement)
15768
               OPCODE ..., foo ;
15769
               brb bar ;
15770
               foo: brw DESTINATION ;
15771
               bar:
15772
 
15773
    (long displacement)
15774
               OPCODE ..., foo ;
15775
               brb bar ;
15776
               foo: jmp DESTINATION ;
15777
               bar:
15778
 
15779

15780
File: as.info,  Node: VAX-operands,  Next: VAX-no,  Prev: VAX-branch,  Up: Vax-Dependent
15781
 
15782
9.34.6 VAX Operands
15783
-------------------
15784
 
15785
The immediate character is `$' for Unix compatibility, not `#' as DEC
15786
writes it.
15787
 
15788
   The indirect character is `*' for Unix compatibility, not `@' as DEC
15789
writes it.
15790
 
15791
   The displacement sizing character is ``' (an accent grave) for Unix
15792
compatibility, not `^' as DEC writes it.  The letter preceding ``' may
15793
have either case.  `G' is not understood, but all other letters (`b i l
15794
s w') are understood.
15795
 
15796
   Register names understood are `r0 r1 r2 ... r15 ap fp sp pc'.  Upper
15797
and lower case letters are equivalent.
15798
 
15799
   For instance
15800
     tstb *w`$4(r5)
15801
 
15802
   Any expression is permitted in an operand.  Operands are comma
15803
separated.
15804
 
15805

15806
File: as.info,  Node: VAX-no,  Prev: VAX-operands,  Up: Vax-Dependent
15807
 
15808
9.34.7 Not Supported on VAX
15809
---------------------------
15810
 
15811
Vax bit fields can not be assembled with `as'.  Someone can add the
15812
required code if they really need it.
15813
 
15814

15815
File: as.info,  Node: V850-Dependent,  Next: Xtensa-Dependent,  Prev: TIC54X-Dependent,  Up: Machine Dependencies
15816
 
15817
9.35 v850 Dependent Features
15818
============================
15819
 
15820
* Menu:
15821
 
15822
* V850 Options::              Options
15823
* V850 Syntax::               Syntax
15824
* V850 Floating Point::       Floating Point
15825
* V850 Directives::           V850 Machine Directives
15826
* V850 Opcodes::              Opcodes
15827
 
15828

15829
File: as.info,  Node: V850 Options,  Next: V850 Syntax,  Up: V850-Dependent
15830
 
15831
9.35.1 Options
15832
--------------
15833
 
15834
`as' supports the following additional command-line options for the
15835
V850 processor family:
15836
 
15837
`-wsigned_overflow'
15838
     Causes warnings to be produced when signed immediate values
15839
     overflow the space available for then within their opcodes.  By
15840
     default this option is disabled as it is possible to receive
15841
     spurious warnings due to using exact bit patterns as immediate
15842
     constants.
15843
 
15844
`-wunsigned_overflow'
15845
     Causes warnings to be produced when unsigned immediate values
15846
     overflow the space available for then within their opcodes.  By
15847
     default this option is disabled as it is possible to receive
15848
     spurious warnings due to using exact bit patterns as immediate
15849
     constants.
15850
 
15851
`-mv850'
15852
     Specifies that the assembled code should be marked as being
15853
     targeted at the V850 processor.  This allows the linker to detect
15854
     attempts to link such code with code assembled for other
15855
     processors.
15856
 
15857
`-mv850e'
15858
     Specifies that the assembled code should be marked as being
15859
     targeted at the V850E processor.  This allows the linker to detect
15860
     attempts to link such code with code assembled for other
15861
     processors.
15862
 
15863
`-mv850e1'
15864
     Specifies that the assembled code should be marked as being
15865
     targeted at the V850E1 processor.  This allows the linker to
15866
     detect attempts to link such code with code assembled for other
15867
     processors.
15868
 
15869
`-mv850any'
15870
     Specifies that the assembled code should be marked as being
15871
     targeted at the V850 processor but support instructions that are
15872
     specific to the extended variants of the process.  This allows the
15873
     production of binaries that contain target specific code, but
15874
     which are also intended to be used in a generic fashion.  For
15875
     example libgcc.a contains generic routines used by the code
15876
     produced by GCC for all versions of the v850 architecture,
15877
     together with support routines only used by the V850E architecture.
15878
 
15879
`-mrelax'
15880
     Enables relaxation.  This allows the .longcall and .longjump pseudo
15881
     ops to be used in the assembler source code.  These ops label
15882
     sections of code which are either a long function call or a long
15883
     branch.  The assembler will then flag these sections of code and
15884
     the linker will attempt to relax them.
15885
 
15886
 
15887

15888
File: as.info,  Node: V850 Syntax,  Next: V850 Floating Point,  Prev: V850 Options,  Up: V850-Dependent
15889
 
15890
9.35.2 Syntax
15891
-------------
15892
 
15893
* Menu:
15894
 
15895
* V850-Chars::                Special Characters
15896
* V850-Regs::                 Register Names
15897
 
15898

15899
File: as.info,  Node: V850-Chars,  Next: V850-Regs,  Up: V850 Syntax
15900
 
15901
9.35.2.1 Special Characters
15902
...........................
15903
 
15904
`#' is the line comment character.
15905
 
15906

15907
File: as.info,  Node: V850-Regs,  Prev: V850-Chars,  Up: V850 Syntax
15908
 
15909
9.35.2.2 Register Names
15910
.......................
15911
 
15912
`as' supports the following names for registers:
15913
`general register 0'
15914
     r0, zero
15915
 
15916
`general register 1'
15917
     r1
15918
 
15919
`general register 2'
15920
     r2, hp
15921
 
15922
`general register 3'
15923
     r3, sp
15924
 
15925
`general register 4'
15926
     r4, gp
15927
 
15928
`general register 5'
15929
     r5, tp
15930
 
15931
`general register 6'
15932
     r6
15933
 
15934
`general register 7'
15935
     r7
15936
 
15937
`general register 8'
15938
     r8
15939
 
15940
`general register 9'
15941
     r9
15942
 
15943
`general register 10'
15944
     r10
15945
 
15946
`general register 11'
15947
     r11
15948
 
15949
`general register 12'
15950
     r12
15951
 
15952
`general register 13'
15953
     r13
15954
 
15955
`general register 14'
15956
     r14
15957
 
15958
`general register 15'
15959
     r15
15960
 
15961
`general register 16'
15962
     r16
15963
 
15964
`general register 17'
15965
     r17
15966
 
15967
`general register 18'
15968
     r18
15969
 
15970
`general register 19'
15971
     r19
15972
 
15973
`general register 20'
15974
     r20
15975
 
15976
`general register 21'
15977
     r21
15978
 
15979
`general register 22'
15980
     r22
15981
 
15982
`general register 23'
15983
     r23
15984
 
15985
`general register 24'
15986
     r24
15987
 
15988
`general register 25'
15989
     r25
15990
 
15991
`general register 26'
15992
     r26
15993
 
15994
`general register 27'
15995
     r27
15996
 
15997
`general register 28'
15998
     r28
15999
 
16000
`general register 29'
16001
     r29
16002
 
16003
`general register 30'
16004
     r30, ep
16005
 
16006
`general register 31'
16007
     r31, lp
16008
 
16009
`system register 0'
16010
     eipc
16011
 
16012
`system register 1'
16013
     eipsw
16014
 
16015
`system register 2'
16016
     fepc
16017
 
16018
`system register 3'
16019
     fepsw
16020
 
16021
`system register 4'
16022
     ecr
16023
 
16024
`system register 5'
16025
     psw
16026
 
16027
`system register 16'
16028
     ctpc
16029
 
16030
`system register 17'
16031
     ctpsw
16032
 
16033
`system register 18'
16034
     dbpc
16035
 
16036
`system register 19'
16037
     dbpsw
16038
 
16039
`system register 20'
16040
     ctbp
16041
 
16042

16043
File: as.info,  Node: V850 Floating Point,  Next: V850 Directives,  Prev: V850 Syntax,  Up: V850-Dependent
16044
 
16045
9.35.3 Floating Point
16046
---------------------
16047
 
16048
The V850 family uses IEEE floating-point numbers.
16049
 
16050

16051
File: as.info,  Node: V850 Directives,  Next: V850 Opcodes,  Prev: V850 Floating Point,  Up: V850-Dependent
16052
 
16053
9.35.4 V850 Machine Directives
16054
------------------------------
16055
 
16056
`.offset '
16057
     Moves the offset into the current section to the specified amount.
16058
 
16059
`.section "name", '
16060
     This is an extension to the standard .section directive.  It sets
16061
     the current section to be  and creates an alias for this
16062
     section called "name".
16063
 
16064
`.v850'
16065
     Specifies that the assembled code should be marked as being
16066
     targeted at the V850 processor.  This allows the linker to detect
16067
     attempts to link such code with code assembled for other
16068
     processors.
16069
 
16070
`.v850e'
16071
     Specifies that the assembled code should be marked as being
16072
     targeted at the V850E processor.  This allows the linker to detect
16073
     attempts to link such code with code assembled for other
16074
     processors.
16075
 
16076
`.v850e1'
16077
     Specifies that the assembled code should be marked as being
16078
     targeted at the V850E1 processor.  This allows the linker to
16079
     detect attempts to link such code with code assembled for other
16080
     processors.
16081
 
16082
 
16083

16084
File: as.info,  Node: V850 Opcodes,  Prev: V850 Directives,  Up: V850-Dependent
16085
 
16086
9.35.5 Opcodes
16087
--------------
16088
 
16089
`as' implements all the standard V850 opcodes.
16090
 
16091
   `as' also implements the following pseudo ops:
16092
 
16093
`hi0()'
16094
     Computes the higher 16 bits of the given expression and stores it
16095
     into the immediate operand field of the given instruction.  For
16096
     example:
16097
 
16098
     `mulhi hi0(here - there), r5, r6'
16099
 
16100
     computes the difference between the address of labels 'here' and
16101
     'there', takes the upper 16 bits of this difference, shifts it
16102
     down 16 bits and then multiplies it by the lower 16 bits in
16103
     register 5, putting the result into register 6.
16104
 
16105
`lo()'
16106
     Computes the lower 16 bits of the given expression and stores it
16107
     into the immediate operand field of the given instruction.  For
16108
     example:
16109
 
16110
     `addi lo(here - there), r5, r6'
16111
 
16112
     computes the difference between the address of labels 'here' and
16113
     'there', takes the lower 16 bits of this difference and adds it to
16114
     register 5, putting the result into register 6.
16115
 
16116
`hi()'
16117
     Computes the higher 16 bits of the given expression and then adds
16118
     the value of the most significant bit of the lower 16 bits of the
16119
     expression and stores the result into the immediate operand field
16120
     of the given instruction.  For example the following code can be
16121
     used to compute the address of the label 'here' and store it into
16122
     register 6:
16123
 
16124
     `movhi hi(here), r0, r6'     `movea lo(here), r6, r6'
16125
 
16126
     The reason for this special behaviour is that movea performs a sign
16127
     extension on its immediate operand.  So for example if the address
16128
     of 'here' was 0xFFFFFFFF then without the special behaviour of the
16129
     hi() pseudo-op the movhi instruction would put 0xFFFF0000 into r6,
16130
     then the movea instruction would takes its immediate operand,
16131
     0xFFFF, sign extend it to 32 bits, 0xFFFFFFFF, and then add it
16132
     into r6 giving 0xFFFEFFFF which is wrong (the fifth nibble is E).
16133
     With the hi() pseudo op adding in the top bit of the lo() pseudo
16134
     op, the movhi instruction actually stores 0 into r6 (0xFFFF + 1 =
16135
     0x0000), so that the movea instruction stores 0xFFFFFFFF into r6 -
16136
     the right value.
16137
 
16138
`hilo()'
16139
     Computes the 32 bit value of the given expression and stores it
16140
     into the immediate operand field of the given instruction (which
16141
     must be a mov instruction).  For example:
16142
 
16143
     `mov hilo(here), r6'
16144
 
16145
     computes the absolute address of label 'here' and puts the result
16146
     into register 6.
16147
 
16148
`sdaoff()'
16149
     Computes the offset of the named variable from the start of the
16150
     Small Data Area (whoes address is held in register 4, the GP
16151
     register) and stores the result as a 16 bit signed value in the
16152
     immediate operand field of the given instruction.  For example:
16153
 
16154
     `ld.w sdaoff(_a_variable)[gp],r6'
16155
 
16156
     loads the contents of the location pointed to by the label
16157
     '_a_variable' into register 6, provided that the label is located
16158
     somewhere within +/- 32K of the address held in the GP register.
16159
     [Note the linker assumes that the GP register contains a fixed
16160
     address set to the address of the label called '__gp'.  This can
16161
     either be set up automatically by the linker, or specifically set
16162
     by using the `--defsym __gp=' command line option].
16163
 
16164
`tdaoff()'
16165
     Computes the offset of the named variable from the start of the
16166
     Tiny Data Area (whoes address is held in register 30, the EP
16167
     register) and stores the result as a 4,5, 7 or 8 bit unsigned
16168
     value in the immediate operand field of the given instruction.
16169
     For example:
16170
 
16171
     `sld.w tdaoff(_a_variable)[ep],r6'
16172
 
16173
     loads the contents of the location pointed to by the label
16174
     '_a_variable' into register 6, provided that the label is located
16175
     somewhere within +256 bytes of the address held in the EP
16176
     register.  [Note the linker assumes that the EP register contains
16177
     a fixed address set to the address of the label called '__ep'.
16178
     This can either be set up automatically by the linker, or
16179
     specifically set by using the `--defsym __ep=' command line
16180
     option].
16181
 
16182
`zdaoff()'
16183
     Computes the offset of the named variable from address 0 and
16184
     stores the result as a 16 bit signed value in the immediate
16185
     operand field of the given instruction.  For example:
16186
 
16187
     `movea zdaoff(_a_variable),zero,r6'
16188
 
16189
     puts the address of the label '_a_variable' into register 6,
16190
     assuming that the label is somewhere within the first 32K of
16191
     memory.  (Strictly speaking it also possible to access the last
16192
     32K of memory as well, as the offsets are signed).
16193
 
16194
`ctoff()'
16195
     Computes the offset of the named variable from the start of the
16196
     Call Table Area (whoes address is helg in system register 20, the
16197
     CTBP register) and stores the result a 6 or 16 bit unsigned value
16198
     in the immediate field of then given instruction or piece of data.
16199
     For example:
16200
 
16201
     `callt ctoff(table_func1)'
16202
 
16203
     will put the call the function whoes address is held in the call
16204
     table at the location labeled 'table_func1'.
16205
 
16206
`.longcall `name''
16207
     Indicates that the following sequence of instructions is a long
16208
     call to function `name'.  The linker will attempt to shorten this
16209
     call sequence if `name' is within a 22bit offset of the call.  Only
16210
     valid if the `-mrelax' command line switch has been enabled.
16211
 
16212
`.longjump `name''
16213
     Indicates that the following sequence of instructions is a long
16214
     jump to label `name'.  The linker will attempt to shorten this code
16215
     sequence if `name' is within a 22bit offset of the jump.  Only
16216
     valid if the `-mrelax' command line switch has been enabled.
16217
 
16218
 
16219
   For information on the V850 instruction set, see `V850 Family
16220
32-/16-Bit single-Chip Microcontroller Architecture Manual' from NEC.
16221
Ltd.
16222
 
16223

16224
File: as.info,  Node: Xtensa-Dependent,  Next: Z80-Dependent,  Prev: V850-Dependent,  Up: Machine Dependencies
16225
 
16226
9.36 Xtensa Dependent Features
16227
==============================
16228
 
16229
   This chapter covers features of the GNU assembler that are specific
16230
to the Xtensa architecture.  For details about the Xtensa instruction
16231
set, please consult the `Xtensa Instruction Set Architecture (ISA)
16232
Reference Manual'.
16233
 
16234
* Menu:
16235
 
16236
* Xtensa Options::              Command-line Options.
16237
* Xtensa Syntax::               Assembler Syntax for Xtensa Processors.
16238
* Xtensa Optimizations::        Assembler Optimizations.
16239
* Xtensa Relaxation::           Other Automatic Transformations.
16240
* Xtensa Directives::           Directives for Xtensa Processors.
16241
 
16242

16243
File: as.info,  Node: Xtensa Options,  Next: Xtensa Syntax,  Up: Xtensa-Dependent
16244
 
16245
9.36.1 Command Line Options
16246
---------------------------
16247
 
16248
The Xtensa version of the GNU assembler supports these special options:
16249
 
16250
`--text-section-literals | --no-text-section-literals'
16251
     Control the treatment of literal pools.  The default is
16252
     `--no-text-section-literals', which places literals in separate
16253
     sections in the output file.  This allows the literal pool to be
16254
     placed in a data RAM/ROM.  With `--text-section-literals', the
16255
     literals are interspersed in the text section in order to keep
16256
     them as close as possible to their references.  This may be
16257
     necessary for large assembly files, where the literals would
16258
     otherwise be out of range of the `L32R' instructions in the text
16259
     section.  These options only affect literals referenced via
16260
     PC-relative `L32R' instructions; literals for absolute mode `L32R'
16261
     instructions are handled separately.  *Note literal: Literal
16262
     Directive.
16263
 
16264
`--absolute-literals | --no-absolute-literals'
16265
     Indicate to the assembler whether `L32R' instructions use absolute
16266
     or PC-relative addressing.  If the processor includes the absolute
16267
     addressing option, the default is to use absolute `L32R'
16268
     relocations.  Otherwise, only the PC-relative `L32R' relocations
16269
     can be used.
16270
 
16271
`--target-align | --no-target-align'
16272
     Enable or disable automatic alignment to reduce branch penalties
16273
     at some expense in code size.  *Note Automatic Instruction
16274
     Alignment: Xtensa Automatic Alignment.  This optimization is
16275
     enabled by default.  Note that the assembler will always align
16276
     instructions like `LOOP' that have fixed alignment requirements.
16277
 
16278
`--longcalls | --no-longcalls'
16279
     Enable or disable transformation of call instructions to allow
16280
     calls across a greater range of addresses.  *Note Function Call
16281
     Relaxation: Xtensa Call Relaxation.  This option should be used
16282
     when call targets can potentially be out of range.  It may degrade
16283
     both code size and performance, but the linker can generally
16284
     optimize away the unnecessary overhead when a call ends up within
16285
     range.  The default is `--no-longcalls'.
16286
 
16287
`--transform | --no-transform'
16288
     Enable or disable all assembler transformations of Xtensa
16289
     instructions, including both relaxation and optimization.  The
16290
     default is `--transform'; `--no-transform' should only be used in
16291
     the rare cases when the instructions must be exactly as specified
16292
     in the assembly source.  Using `--no-transform' causes out of range
16293
     instruction operands to be errors.
16294
 
16295
`--rename-section OLDNAME=NEWNAME'
16296
     Rename the OLDNAME section to NEWNAME.  This option can be used
16297
     multiple times to rename multiple sections.
16298
 
16299

16300
File: as.info,  Node: Xtensa Syntax,  Next: Xtensa Optimizations,  Prev: Xtensa Options,  Up: Xtensa-Dependent
16301
 
16302
9.36.2 Assembler Syntax
16303
-----------------------
16304
 
16305
Block comments are delimited by `/*' and `*/'.  End of line comments
16306
may be introduced with either `#' or `//'.
16307
 
16308
   Instructions consist of a leading opcode or macro name followed by
16309
whitespace and an optional comma-separated list of operands:
16310
 
16311
     OPCODE [OPERAND, ...]
16312
 
16313
   Instructions must be separated by a newline or semicolon.
16314
 
16315
   FLIX instructions, which bundle multiple opcodes together in a single
16316
instruction, are specified by enclosing the bundled opcodes inside
16317
braces:
16318
 
16319
     {
16320
     [FORMAT]
16321
     OPCODE0 [OPERANDS]
16322
     OPCODE1 [OPERANDS]
16323
     OPCODE2 [OPERANDS]
16324
     ...
16325
     }
16326
 
16327
   The opcodes in a FLIX instruction are listed in the same order as the
16328
corresponding instruction slots in the TIE format declaration.
16329
Directives and labels are not allowed inside the braces of a FLIX
16330
instruction.  A particular TIE format name can optionally be specified
16331
immediately after the opening brace, but this is usually unnecessary.
16332
The assembler will automatically search for a format that can encode the
16333
specified opcodes, so the format name need only be specified in rare
16334
cases where there is more than one applicable format and where it
16335
matters which of those formats is used.  A FLIX instruction can also be
16336
specified on a single line by separating the opcodes with semicolons:
16337
 
16338
     { [FORMAT;] OPCODE0 [OPERANDS]; OPCODE1 [OPERANDS]; OPCODE2 [OPERANDS]; ... }
16339
 
16340
   If an opcode can only be encoded in a FLIX instruction but is not
16341
specified as part of a FLIX bundle, the assembler will choose the
16342
smallest format where the opcode can be encoded and will fill unused
16343
instruction slots with no-ops.
16344
 
16345
* Menu:
16346
 
16347
* Xtensa Opcodes::              Opcode Naming Conventions.
16348
* Xtensa Registers::            Register Naming.
16349
 
16350

16351
File: as.info,  Node: Xtensa Opcodes,  Next: Xtensa Registers,  Up: Xtensa Syntax
16352
 
16353
9.36.2.1 Opcode Names
16354
.....................
16355
 
16356
See the `Xtensa Instruction Set Architecture (ISA) Reference Manual'
16357
for a complete list of opcodes and descriptions of their semantics.
16358
 
16359
   If an opcode name is prefixed with an underscore character (`_'),
16360
`as' will not transform that instruction in any way.  The underscore
16361
prefix disables both optimization (*note Xtensa Optimizations: Xtensa
16362
Optimizations.) and relaxation (*note Xtensa Relaxation: Xtensa
16363
Relaxation.) for that particular instruction.  Only use the underscore
16364
prefix when it is essential to select the exact opcode produced by the
16365
assembler.  Using this feature unnecessarily makes the code less
16366
efficient by disabling assembler optimization and less flexible by
16367
disabling relaxation.
16368
 
16369
   Note that this special handling of underscore prefixes only applies
16370
to Xtensa opcodes, not to either built-in macros or user-defined macros.
16371
When an underscore prefix is used with a macro (e.g., `_MOV'), it
16372
refers to a different macro.  The assembler generally provides built-in
16373
macros both with and without the underscore prefix, where the underscore
16374
versions behave as if the underscore carries through to the instructions
16375
in the macros.  For example, `_MOV' may expand to `_MOV.N'.
16376
 
16377
   The underscore prefix only applies to individual instructions, not to
16378
series of instructions.  For example, if a series of instructions have
16379
underscore prefixes, the assembler will not transform the individual
16380
instructions, but it may insert other instructions between them (e.g.,
16381
to align a `LOOP' instruction).  To prevent the assembler from
16382
modifying a series of instructions as a whole, use the `no-transform'
16383
directive.  *Note transform: Transform Directive.
16384
 
16385

16386
File: as.info,  Node: Xtensa Registers,  Prev: Xtensa Opcodes,  Up: Xtensa Syntax
16387
 
16388
9.36.2.2 Register Names
16389
.......................
16390
 
16391
The assembly syntax for a register file entry is the "short" name for a
16392
TIE register file followed by the index into that register file.  For
16393
example, the general-purpose `AR' register file has a short name of
16394
`a', so these registers are named `a0'...`a15'.  As a special feature,
16395
`sp' is also supported as a synonym for `a1'.  Additional registers may
16396
be added by processor configuration options and by designer-defined TIE
16397
extensions.  An initial `$' character is optional in all register names.
16398
 
16399

16400
File: as.info,  Node: Xtensa Optimizations,  Next: Xtensa Relaxation,  Prev: Xtensa Syntax,  Up: Xtensa-Dependent
16401
 
16402
9.36.3 Xtensa Optimizations
16403
---------------------------
16404
 
16405
The optimizations currently supported by `as' are generation of density
16406
instructions where appropriate and automatic branch target alignment.
16407
 
16408
* Menu:
16409
 
16410
* Density Instructions::        Using Density Instructions.
16411
* Xtensa Automatic Alignment::  Automatic Instruction Alignment.
16412
 
16413

16414
File: as.info,  Node: Density Instructions,  Next: Xtensa Automatic Alignment,  Up: Xtensa Optimizations
16415
 
16416
9.36.3.1 Using Density Instructions
16417
...................................
16418
 
16419
The Xtensa instruction set has a code density option that provides
16420
16-bit versions of some of the most commonly used opcodes.  Use of these
16421
opcodes can significantly reduce code size.  When possible, the
16422
assembler automatically translates instructions from the core Xtensa
16423
instruction set into equivalent instructions from the Xtensa code
16424
density option.  This translation can be disabled by using underscore
16425
prefixes (*note Opcode Names: Xtensa Opcodes.), by using the
16426
`--no-transform' command-line option (*note Command Line Options:
16427
Xtensa Options.), or by using the `no-transform' directive (*note
16428
transform: Transform Directive.).
16429
 
16430
   It is a good idea _not_ to use the density instructions directly.
16431
The assembler will automatically select dense instructions where
16432
possible.  If you later need to use an Xtensa processor without the code
16433
density option, the same assembly code will then work without
16434
modification.
16435
 
16436

16437
File: as.info,  Node: Xtensa Automatic Alignment,  Prev: Density Instructions,  Up: Xtensa Optimizations
16438
 
16439
9.36.3.2 Automatic Instruction Alignment
16440
........................................
16441
 
16442
The Xtensa assembler will automatically align certain instructions, both
16443
to optimize performance and to satisfy architectural requirements.
16444
 
16445
   As an optimization to improve performance, the assembler attempts to
16446
align branch targets so they do not cross instruction fetch boundaries.
16447
(Xtensa processors can be configured with either 32-bit or 64-bit
16448
instruction fetch widths.)  An instruction immediately following a call
16449
is treated as a branch target in this context, because it will be the
16450
target of a return from the call.  This alignment has the potential to
16451
reduce branch penalties at some expense in code size.  This
16452
optimization is enabled by default.  You can disable it with the
16453
`--no-target-align' command-line option (*note Command Line Options:
16454
Xtensa Options.).
16455
 
16456
   The target alignment optimization is done without adding instructions
16457
that could increase the execution time of the program.  If there are
16458
density instructions in the code preceding a target, the assembler can
16459
change the target alignment by widening some of those instructions to
16460
the equivalent 24-bit instructions.  Extra bytes of padding can be
16461
inserted immediately following unconditional jump and return
16462
instructions.  This approach is usually successful in aligning many,
16463
but not all, branch targets.
16464
 
16465
   The `LOOP' family of instructions must be aligned such that the
16466
first instruction in the loop body does not cross an instruction fetch
16467
boundary (e.g., with a 32-bit fetch width, a `LOOP' instruction must be
16468
on either a 1 or 2 mod 4 byte boundary).  The assembler knows about
16469
this restriction and inserts the minimal number of 2 or 3 byte no-op
16470
instructions to satisfy it.  When no-op instructions are added, any
16471
label immediately preceding the original loop will be moved in order to
16472
refer to the loop instruction, not the newly generated no-op
16473
instruction.  To preserve binary compatibility across processors with
16474
different fetch widths, the assembler conservatively assumes a 32-bit
16475
fetch width when aligning `LOOP' instructions (except if the first
16476
instruction in the loop is a 64-bit instruction).
16477
 
16478
   Previous versions of the assembler automatically aligned `ENTRY'
16479
instructions to 4-byte boundaries, but that alignment is now the
16480
programmer's responsibility.
16481
 
16482

16483
File: as.info,  Node: Xtensa Relaxation,  Next: Xtensa Directives,  Prev: Xtensa Optimizations,  Up: Xtensa-Dependent
16484
 
16485
9.36.4 Xtensa Relaxation
16486
------------------------
16487
 
16488
When an instruction operand is outside the range allowed for that
16489
particular instruction field, `as' can transform the code to use a
16490
functionally-equivalent instruction or sequence of instructions.  This
16491
process is known as "relaxation".  This is typically done for branch
16492
instructions because the distance of the branch targets is not known
16493
until assembly-time.  The Xtensa assembler offers branch relaxation and
16494
also extends this concept to function calls, `MOVI' instructions and
16495
other instructions with immediate fields.
16496
 
16497
* Menu:
16498
 
16499
* Xtensa Branch Relaxation::        Relaxation of Branches.
16500
* Xtensa Call Relaxation::          Relaxation of Function Calls.
16501
* Xtensa Immediate Relaxation::     Relaxation of other Immediate Fields.
16502
 
16503

16504
File: as.info,  Node: Xtensa Branch Relaxation,  Next: Xtensa Call Relaxation,  Up: Xtensa Relaxation
16505
 
16506
9.36.4.1 Conditional Branch Relaxation
16507
......................................
16508
 
16509
When the target of a branch is too far away from the branch itself,
16510
i.e., when the offset from the branch to the target is too large to fit
16511
in the immediate field of the branch instruction, it may be necessary to
16512
replace the branch with a branch around a jump.  For example,
16513
 
16514
         beqz    a2, L
16515
 
16516
   may result in:
16517
 
16518
         bnez.n  a2, M
16519
         j L
16520
     M:
16521
 
16522
   (The `BNEZ.N' instruction would be used in this example only if the
16523
density option is available.  Otherwise, `BNEZ' would be used.)
16524
 
16525
   This relaxation works well because the unconditional jump instruction
16526
has a much larger offset range than the various conditional branches.
16527
However, an error will occur if a branch target is beyond the range of a
16528
jump instruction.  `as' cannot relax unconditional jumps.  Similarly,
16529
an error will occur if the original input contains an unconditional
16530
jump to a target that is out of range.
16531
 
16532
   Branch relaxation is enabled by default.  It can be disabled by using
16533
underscore prefixes (*note Opcode Names: Xtensa Opcodes.), the
16534
`--no-transform' command-line option (*note Command Line Options:
16535
Xtensa Options.), or the `no-transform' directive (*note transform:
16536
Transform Directive.).
16537
 
16538

16539
File: as.info,  Node: Xtensa Call Relaxation,  Next: Xtensa Immediate Relaxation,  Prev: Xtensa Branch Relaxation,  Up: Xtensa Relaxation
16540
 
16541
9.36.4.2 Function Call Relaxation
16542
.................................
16543
 
16544
Function calls may require relaxation because the Xtensa immediate call
16545
instructions (`CALL0', `CALL4', `CALL8' and `CALL12') provide a
16546
PC-relative offset of only 512 Kbytes in either direction.  For larger
16547
programs, it may be necessary to use indirect calls (`CALLX0',
16548
`CALLX4', `CALLX8' and `CALLX12') where the target address is specified
16549
in a register.  The Xtensa assembler can automatically relax immediate
16550
call instructions into indirect call instructions.  This relaxation is
16551
done by loading the address of the called function into the callee's
16552
return address register and then using a `CALLX' instruction.  So, for
16553
example:
16554
 
16555
         call8 func
16556
 
16557
   might be relaxed to:
16558
 
16559
         .literal .L1, func
16560
         l32r    a8, .L1
16561
         callx8  a8
16562
 
16563
   Because the addresses of targets of function calls are not generally
16564
known until link-time, the assembler must assume the worst and relax all
16565
the calls to functions in other source files, not just those that really
16566
will be out of range.  The linker can recognize calls that were
16567
unnecessarily relaxed, and it will remove the overhead introduced by the
16568
assembler for those cases where direct calls are sufficient.
16569
 
16570
   Call relaxation is disabled by default because it can have a negative
16571
effect on both code size and performance, although the linker can
16572
usually eliminate the unnecessary overhead.  If a program is too large
16573
and some of the calls are out of range, function call relaxation can be
16574
enabled using the `--longcalls' command-line option or the `longcalls'
16575
directive (*note longcalls: Longcalls Directive.).
16576
 
16577

16578
File: as.info,  Node: Xtensa Immediate Relaxation,  Prev: Xtensa Call Relaxation,  Up: Xtensa Relaxation
16579
 
16580
9.36.4.3 Other Immediate Field Relaxation
16581
.........................................
16582
 
16583
The assembler normally performs the following other relaxations.  They
16584
can be disabled by using underscore prefixes (*note Opcode Names:
16585
Xtensa Opcodes.), the `--no-transform' command-line option (*note
16586
Command Line Options: Xtensa Options.), or the `no-transform' directive
16587
(*note transform: Transform Directive.).
16588
 
16589
   The `MOVI' machine instruction can only materialize values in the
16590
range from -2048 to 2047.  Values outside this range are best
16591
materialized with `L32R' instructions.  Thus:
16592
 
16593
         movi a0, 100000
16594
 
16595
   is assembled into the following machine code:
16596
 
16597
         .literal .L1, 100000
16598
         l32r a0, .L1
16599
 
16600
   The `L8UI' machine instruction can only be used with immediate
16601
offsets in the range from 0 to 255. The `L16SI' and `L16UI' machine
16602
instructions can only be used with offsets from 0 to 510.  The `L32I'
16603
machine instruction can only be used with offsets from 0 to 1020.  A
16604
load offset outside these ranges can be materialized with an `L32R'
16605
instruction if the destination register of the load is different than
16606
the source address register.  For example:
16607
 
16608
         l32i a1, a0, 2040
16609
 
16610
   is translated to:
16611
 
16612
         .literal .L1, 2040
16613
         l32r a1, .L1
16614
         add a1, a0, a1
16615
         l32i a1, a1, 0
16616
 
16617
If the load destination and source address register are the same, an
16618
out-of-range offset causes an error.
16619
 
16620
   The Xtensa `ADDI' instruction only allows immediate operands in the
16621
range from -128 to 127.  There are a number of alternate instruction
16622
sequences for the `ADDI' operation.  First, if the immediate is 0, the
16623
`ADDI' will be turned into a `MOV.N' instruction (or the equivalent
16624
`OR' instruction if the code density option is not available).  If the
16625
`ADDI' immediate is outside of the range -128 to 127, but inside the
16626
range -32896 to 32639, an `ADDMI' instruction or `ADDMI'/`ADDI'
16627
sequence will be used.  Finally, if the immediate is outside of this
16628
range and a free register is available, an `L32R'/`ADD' sequence will
16629
be used with a literal allocated from the literal pool.
16630
 
16631
   For example:
16632
 
16633
         addi    a5, a6, 0
16634
         addi    a5, a6, 512
16635
         addi    a5, a6, 513
16636
         addi    a5, a6, 50000
16637
 
16638
   is assembled into the following:
16639
 
16640
         .literal .L1, 50000
16641
         mov.n   a5, a6
16642
         addmi   a5, a6, 0x200
16643
         addmi   a5, a6, 0x200
16644
         addi    a5, a5, 1
16645
         l32r    a5, .L1
16646
         add     a5, a6, a5
16647
 
16648

16649
File: as.info,  Node: Xtensa Directives,  Prev: Xtensa Relaxation,  Up: Xtensa-Dependent
16650
 
16651
9.36.5 Directives
16652
-----------------
16653
 
16654
The Xtensa assembler supports a region-based directive syntax:
16655
 
16656
         .begin DIRECTIVE [OPTIONS]
16657
         ...
16658
         .end DIRECTIVE
16659
 
16660
   All the Xtensa-specific directives that apply to a region of code use
16661
this syntax.
16662
 
16663
   The directive applies to code between the `.begin' and the `.end'.
16664
The state of the option after the `.end' reverts to what it was before
16665
the `.begin'.  A nested `.begin'/`.end' region can further change the
16666
state of the directive without having to be aware of its outer state.
16667
For example, consider:
16668
 
16669
         .begin no-transform
16670
     L:  add a0, a1, a2
16671
         .begin transform
16672
     M:  add a0, a1, a2
16673
         .end transform
16674
     N:  add a0, a1, a2
16675
         .end no-transform
16676
 
16677
   The `ADD' opcodes at `L' and `N' in the outer `no-transform' region
16678
both result in `ADD' machine instructions, but the assembler selects an
16679
`ADD.N' instruction for the `ADD' at `M' in the inner `transform'
16680
region.
16681
 
16682
   The advantage of this style is that it works well inside macros
16683
which can preserve the context of their callers.
16684
 
16685
   The following directives are available:
16686
 
16687
* Menu:
16688
 
16689
* Schedule Directive::         Enable instruction scheduling.
16690
* Longcalls Directive::        Use Indirect Calls for Greater Range.
16691
* Transform Directive::        Disable All Assembler Transformations.
16692
* Literal Directive::          Intermix Literals with Instructions.
16693
* Literal Position Directive:: Specify Inline Literal Pool Locations.
16694
* Literal Prefix Directive::   Specify Literal Section Name Prefix.
16695
* Absolute Literals Directive:: Control PC-Relative vs. Absolute Literals.
16696
 
16697

16698
File: as.info,  Node: Schedule Directive,  Next: Longcalls Directive,  Up: Xtensa Directives
16699
 
16700
9.36.5.1 schedule
16701
.................
16702
 
16703
The `schedule' directive is recognized only for compatibility with
16704
Tensilica's assembler.
16705
 
16706
         .begin [no-]schedule
16707
         .end [no-]schedule
16708
 
16709
   This directive is ignored and has no effect on `as'.
16710
 
16711

16712
File: as.info,  Node: Longcalls Directive,  Next: Transform Directive,  Prev: Schedule Directive,  Up: Xtensa Directives
16713
 
16714
9.36.5.2 longcalls
16715
..................
16716
 
16717
The `longcalls' directive enables or disables function call relaxation.
16718
*Note Function Call Relaxation: Xtensa Call Relaxation.
16719
 
16720
         .begin [no-]longcalls
16721
         .end [no-]longcalls
16722
 
16723
   Call relaxation is disabled by default unless the `--longcalls'
16724
command-line option is specified.  The `longcalls' directive overrides
16725
the default determined by the command-line options.
16726
 
16727

16728
File: as.info,  Node: Transform Directive,  Next: Literal Directive,  Prev: Longcalls Directive,  Up: Xtensa Directives
16729
 
16730
9.36.5.3 transform
16731
..................
16732
 
16733
This directive enables or disables all assembler transformation,
16734
including relaxation (*note Xtensa Relaxation: Xtensa Relaxation.) and
16735
optimization (*note Xtensa Optimizations: Xtensa Optimizations.).
16736
 
16737
         .begin [no-]transform
16738
         .end [no-]transform
16739
 
16740
   Transformations are enabled by default unless the `--no-transform'
16741
option is used.  The `transform' directive overrides the default
16742
determined by the command-line options.  An underscore opcode prefix,
16743
disabling transformation of that opcode, always takes precedence over
16744
both directives and command-line flags.
16745
 
16746

16747
File: as.info,  Node: Literal Directive,  Next: Literal Position Directive,  Prev: Transform Directive,  Up: Xtensa Directives
16748
 
16749
9.36.5.4 literal
16750
................
16751
 
16752
The `.literal' directive is used to define literal pool data, i.e.,
16753
read-only 32-bit data accessed via `L32R' instructions.
16754
 
16755
         .literal LABEL, VALUE[, VALUE...]
16756
 
16757
   This directive is similar to the standard `.word' directive, except
16758
that the actual location of the literal data is determined by the
16759
assembler and linker, not by the position of the `.literal' directive.
16760
Using this directive gives the assembler freedom to locate the literal
16761
data in the most appropriate place and possibly to combine identical
16762
literals.  For example, the code:
16763
 
16764
         entry sp, 40
16765
         .literal .L1, sym
16766
         l32r    a4, .L1
16767
 
16768
   can be used to load a pointer to the symbol `sym' into register
16769
`a4'.  The value of `sym' will not be placed between the `ENTRY' and
16770
`L32R' instructions; instead, the assembler puts the data in a literal
16771
pool.
16772
 
16773
   Literal pools are placed by default in separate literal sections;
16774
however, when using the `--text-section-literals' option (*note Command
16775
Line Options: Xtensa Options.), the literal pools for PC-relative mode
16776
`L32R' instructions are placed in the current section.(1) These text
16777
section literal pools are created automatically before `ENTRY'
16778
instructions and manually after `.literal_position' directives (*note
16779
literal_position: Literal Position Directive.).  If there are no
16780
preceding `ENTRY' instructions, explicit `.literal_position' directives
16781
must be used to place the text section literal pools; otherwise, `as'
16782
will report an error.
16783
 
16784
   When literals are placed in separate sections, the literal section
16785
names are derived from the names of the sections where the literals are
16786
defined.  The base literal section names are `.literal' for PC-relative
16787
mode `L32R' instructions and `.lit4' for absolute mode `L32R'
16788
instructions (*note absolute-literals: Absolute Literals Directive.).
16789
These base names are used for literals defined in the default `.text'
16790
section.  For literals defined in other sections or within the scope of
16791
a `literal_prefix' directive (*note literal_prefix: Literal Prefix
16792
Directive.), the following rules determine the literal section name:
16793
 
16794
  1. If the current section is a member of a section group, the literal
16795
     section name includes the group name as a suffix to the base
16796
     `.literal' or `.lit4' name, with a period to separate the base
16797
     name and group name.  The literal section is also made a member of
16798
     the group.
16799
 
16800
  2. If the current section name (or `literal_prefix' value) begins with
16801
     "`.gnu.linkonce.KIND.'", the literal section name is formed by
16802
     replacing "`.KIND'" with the base `.literal' or `.lit4' name.  For
16803
     example, for literals defined in a section named
16804
     `.gnu.linkonce.t.func', the literal section will be
16805
     `.gnu.linkonce.literal.func' or `.gnu.linkonce.lit4.func'.
16806
 
16807
  3. If the current section name (or `literal_prefix' value) ends with
16808
     `.text', the literal section name is formed by replacing that
16809
     suffix with the base `.literal' or `.lit4' name.  For example, for
16810
     literals defined in a section named `.iram0.text', the literal
16811
     section will be `.iram0.literal' or `.iram0.lit4'.
16812
 
16813
  4. If none of the preceding conditions apply, the literal section
16814
     name is formed by adding the base `.literal' or `.lit4' name as a
16815
     suffix to the current section name (or `literal_prefix' value).
16816
 
16817
   ---------- Footnotes ----------
16818
 
16819
   (1) Literals for the `.init' and `.fini' sections are always placed
16820
in separate sections, even when `--text-section-literals' is enabled.
16821
 
16822

16823
File: as.info,  Node: Literal Position Directive,  Next: Literal Prefix Directive,  Prev: Literal Directive,  Up: Xtensa Directives
16824
 
16825
9.36.5.5 literal_position
16826
.........................
16827
 
16828
When using `--text-section-literals' to place literals inline in the
16829
section being assembled, the `.literal_position' directive can be used
16830
to mark a potential location for a literal pool.
16831
 
16832
         .literal_position
16833
 
16834
   The `.literal_position' directive is ignored when the
16835
`--text-section-literals' option is not used or when `L32R'
16836
instructions use the absolute addressing mode.
16837
 
16838
   The assembler will automatically place text section literal pools
16839
before `ENTRY' instructions, so the `.literal_position' directive is
16840
only needed to specify some other location for a literal pool.  You may
16841
need to add an explicit jump instruction to skip over an inline literal
16842
pool.
16843
 
16844
   For example, an interrupt vector does not begin with an `ENTRY'
16845
instruction so the assembler will be unable to automatically find a good
16846
place to put a literal pool.  Moreover, the code for the interrupt
16847
vector must be at a specific starting address, so the literal pool
16848
cannot come before the start of the code.  The literal pool for the
16849
vector must be explicitly positioned in the middle of the vector (before
16850
any uses of the literals, due to the negative offsets used by
16851
PC-relative `L32R' instructions).  The `.literal_position' directive
16852
can be used to do this.  In the following code, the literal for `M'
16853
will automatically be aligned correctly and is placed after the
16854
unconditional jump.
16855
 
16856
         .global M
16857
     code_start:
16858
         j continue
16859
         .literal_position
16860
         .align 4
16861
     continue:
16862
         movi    a4, M
16863
 
16864

16865
File: as.info,  Node: Literal Prefix Directive,  Next: Absolute Literals Directive,  Prev: Literal Position Directive,  Up: Xtensa Directives
16866
 
16867
9.36.5.6 literal_prefix
16868
.......................
16869
 
16870
The `literal_prefix' directive allows you to override the default
16871
literal section names, which are derived from the names of the sections
16872
where the literals are defined.
16873
 
16874
         .begin literal_prefix [NAME]
16875
         .end literal_prefix
16876
 
16877
   For literals defined within the delimited region, the literal section
16878
names are derived from the NAME argument instead of the name of the
16879
current section.  The rules used to derive the literal section names do
16880
not change.  *Note literal: Literal Directive.  If the NAME argument is
16881
omitted, the literal sections revert to the defaults.  This directive
16882
has no effect when using the `--text-section-literals' option (*note
16883
Command Line Options: Xtensa Options.).
16884
 
16885

16886
File: as.info,  Node: Absolute Literals Directive,  Prev: Literal Prefix Directive,  Up: Xtensa Directives
16887
 
16888
9.36.5.7 absolute-literals
16889
..........................
16890
 
16891
The `absolute-literals' and `no-absolute-literals' directives control
16892
the absolute vs. PC-relative mode for `L32R' instructions.  These are
16893
relevant only for Xtensa configurations that include the absolute
16894
addressing option for `L32R' instructions.
16895
 
16896
         .begin [no-]absolute-literals
16897
         .end [no-]absolute-literals
16898
 
16899
   These directives do not change the `L32R' mode--they only cause the
16900
assembler to emit the appropriate kind of relocation for `L32R'
16901
instructions and to place the literal values in the appropriate section.
16902
To change the `L32R' mode, the program must write the `LITBASE' special
16903
register.  It is the programmer's responsibility to keep track of the
16904
mode and indicate to the assembler which mode is used in each region of
16905
code.
16906
 
16907
   If the Xtensa configuration includes the absolute `L32R' addressing
16908
option, the default is to assume absolute `L32R' addressing unless the
16909
`--no-absolute-literals' command-line option is specified.  Otherwise,
16910
the default is to assume PC-relative `L32R' addressing.  The
16911
`absolute-literals' directive can then be used to override the default
16912
determined by the command-line options.
16913
 
16914

16915
File: as.info,  Node: Reporting Bugs,  Next: Acknowledgements,  Prev: Machine Dependencies,  Up: Top
16916
 
16917
10 Reporting Bugs
16918
*****************
16919
 
16920
Your bug reports play an essential role in making `as' reliable.
16921
 
16922
   Reporting a bug may help you by bringing a solution to your problem,
16923
or it may not.  But in any case the principal function of a bug report
16924
is to help the entire community by making the next version of `as' work
16925
better.  Bug reports are your contribution to the maintenance of `as'.
16926
 
16927
   In order for a bug report to serve its purpose, you must include the
16928
information that enables us to fix the bug.
16929
 
16930
* Menu:
16931
 
16932
* Bug Criteria::                Have you found a bug?
16933
* Bug Reporting::               How to report bugs
16934
 
16935

16936
File: as.info,  Node: Bug Criteria,  Next: Bug Reporting,  Up: Reporting Bugs
16937
 
16938
10.1 Have You Found a Bug?
16939
==========================
16940
 
16941
If you are not sure whether you have found a bug, here are some
16942
guidelines:
16943
 
16944
   * If the assembler gets a fatal signal, for any input whatever, that
16945
     is a `as' bug.  Reliable assemblers never crash.
16946
 
16947
   * If `as' produces an error message for valid input, that is a bug.
16948
 
16949
   * If `as' does not produce an error message for invalid input, that
16950
     is a bug.  However, you should note that your idea of "invalid
16951
     input" might be our idea of "an extension" or "support for
16952
     traditional practice".
16953
 
16954
   * If you are an experienced user of assemblers, your suggestions for
16955
     improvement of `as' are welcome in any case.
16956
 
16957

16958
File: as.info,  Node: Bug Reporting,  Prev: Bug Criteria,  Up: Reporting Bugs
16959
 
16960
10.2 How to Report Bugs
16961
=======================
16962
 
16963
A number of companies and individuals offer support for GNU products.
16964
If you obtained `as' from a support organization, we recommend you
16965
contact that organization first.
16966
 
16967
   You can find contact information for many support companies and
16968
individuals in the file `etc/SERVICE' in the GNU Emacs distribution.
16969
 
16970
   In any event, we also recommend that you send bug reports for `as'
16971
to `http://www.sourceware.org/bugzilla/'.
16972
 
16973
   The fundamental principle of reporting bugs usefully is this:
16974
*report all the facts*.  If you are not sure whether to state a fact or
16975
leave it out, state it!
16976
 
16977
   Often people omit facts because they think they know what causes the
16978
problem and assume that some details do not matter.  Thus, you might
16979
assume that the name of a symbol you use in an example does not matter.
16980
Well, probably it does not, but one cannot be sure.  Perhaps the bug
16981
is a stray memory reference which happens to fetch from the location
16982
where that name is stored in memory; perhaps, if the name were
16983
different, the contents of that location would fool the assembler into
16984
doing the right thing despite the bug.  Play it safe and give a
16985
specific, complete example.  That is the easiest thing for you to do,
16986
and the most helpful.
16987
 
16988
   Keep in mind that the purpose of a bug report is to enable us to fix
16989
the bug if it is new to us.  Therefore, always write your bug reports
16990
on the assumption that the bug has not been reported previously.
16991
 
16992
   Sometimes people give a few sketchy facts and ask, "Does this ring a
16993
bell?"  This cannot help us fix a bug, so it is basically useless.  We
16994
respond by asking for enough details to enable us to investigate.  You
16995
might as well expedite matters by sending them to begin with.
16996
 
16997
   To enable us to fix the bug, you should include all these things:
16998
 
16999
   * The version of `as'.  `as' announces it if you start it with the
17000
     `--version' argument.
17001
 
17002
     Without this, we will not know whether there is any point in
17003
     looking for the bug in the current version of `as'.
17004
 
17005
   * Any patches you may have applied to the `as' source.
17006
 
17007
   * The type of machine you are using, and the operating system name
17008
     and version number.
17009
 
17010
   * What compiler (and its version) was used to compile `as'--e.g.
17011
     "`gcc-2.7'".
17012
 
17013
   * The command arguments you gave the assembler to assemble your
17014
     example and observe the bug.  To guarantee you will not omit
17015
     something important, list them all.  A copy of the Makefile (or
17016
     the output from make) is sufficient.
17017
 
17018
     If we were to try to guess the arguments, we would probably guess
17019
     wrong and then we might not encounter the bug.
17020
 
17021
   * A complete input file that will reproduce the bug.  If the bug is
17022
     observed when the assembler is invoked via a compiler, send the
17023
     assembler source, not the high level language source.  Most
17024
     compilers will produce the assembler source when run with the `-S'
17025
     option.  If you are using `gcc', use the options `-v
17026
     --save-temps'; this will save the assembler source in a file with
17027
     an extension of `.s', and also show you exactly how `as' is being
17028
     run.
17029
 
17030
   * A description of what behavior you observe that you believe is
17031
     incorrect.  For example, "It gets a fatal signal."
17032
 
17033
     Of course, if the bug is that `as' gets a fatal signal, then we
17034
     will certainly notice it.  But if the bug is incorrect output, we
17035
     might not notice unless it is glaringly wrong.  You might as well
17036
     not give us a chance to make a mistake.
17037
 
17038
     Even if the problem you experience is a fatal signal, you should
17039
     still say so explicitly.  Suppose something strange is going on,
17040
     such as, your copy of `as' is out of sync, or you have encountered
17041
     a bug in the C library on your system.  (This has happened!)  Your
17042
     copy might crash and ours would not.  If you told us to expect a
17043
     crash, then when ours fails to crash, we would know that the bug
17044
     was not happening for us.  If you had not told us to expect a
17045
     crash, then we would not be able to draw any conclusion from our
17046
     observations.
17047
 
17048
   * If you wish to suggest changes to the `as' source, send us context
17049
     diffs, as generated by `diff' with the `-u', `-c', or `-p' option.
17050
     Always send diffs from the old file to the new file.  If you even
17051
     discuss something in the `as' source, refer to it by context, not
17052
     by line number.
17053
 
17054
     The line numbers in our development sources will not match those
17055
     in your sources.  Your line numbers would convey no useful
17056
     information to us.
17057
 
17058
   Here are some things that are not necessary:
17059
 
17060
   * A description of the envelope of the bug.
17061
 
17062
     Often people who encounter a bug spend a lot of time investigating
17063
     which changes to the input file will make the bug go away and which
17064
     changes will not affect it.
17065
 
17066
     This is often time consuming and not very useful, because the way
17067
     we will find the bug is by running a single example under the
17068
     debugger with breakpoints, not by pure deduction from a series of
17069
     examples.  We recommend that you save your time for something else.
17070
 
17071
     Of course, if you can find a simpler example to report _instead_
17072
     of the original one, that is a convenience for us.  Errors in the
17073
     output will be easier to spot, running under the debugger will take
17074
     less time, and so on.
17075
 
17076
     However, simplification is not vital; if you do not want to do
17077
     this, report the bug anyway and send us the entire test case you
17078
     used.
17079
 
17080
   * A patch for the bug.
17081
 
17082
     A patch for the bug does help us if it is a good one.  But do not
17083
     omit the necessary information, such as the test case, on the
17084
     assumption that a patch is all we need.  We might see problems
17085
     with your patch and decide to fix the problem another way, or we
17086
     might not understand it at all.
17087
 
17088
     Sometimes with a program as complicated as `as' it is very hard to
17089
     construct an example that will make the program follow a certain
17090
     path through the code.  If you do not send us the example, we will
17091
     not be able to construct one, so we will not be able to verify
17092
     that the bug is fixed.
17093
 
17094
     And if we cannot understand what bug you are trying to fix, or why
17095
     your patch should be an improvement, we will not install it.  A
17096
     test case will help us to understand.
17097
 
17098
   * A guess about what the bug is or what it depends on.
17099
 
17100
     Such guesses are usually wrong.  Even we cannot guess right about
17101
     such things without first using the debugger to find the facts.
17102
 
17103

17104
File: as.info,  Node: Acknowledgements,  Next: GNU Free Documentation License,  Prev: Reporting Bugs,  Up: Top
17105
 
17106
11 Acknowledgements
17107
*******************
17108
 
17109
If you have contributed to GAS and your name isn't listed here, it is
17110
not meant as a slight.  We just don't know about it.  Send mail to the
17111
maintainer, and we'll correct the situation.  Currently the maintainer
17112
is Ken Raeburn (email address `raeburn@cygnus.com').
17113
 
17114
   Dean Elsner wrote the original GNU assembler for the VAX.(1)
17115
 
17116
   Jay Fenlason maintained GAS for a while, adding support for
17117
GDB-specific debug information and the 68k series machines, most of the
17118
preprocessing pass, and extensive changes in `messages.c',
17119
`input-file.c', `write.c'.
17120
 
17121
   K. Richard Pixley maintained GAS for a while, adding various
17122
enhancements and many bug fixes, including merging support for several
17123
processors, breaking GAS up to handle multiple object file format back
17124
ends (including heavy rewrite, testing, an integration of the coff and
17125
b.out back ends), adding configuration including heavy testing and
17126
verification of cross assemblers and file splits and renaming,
17127
converted GAS to strictly ANSI C including full prototypes, added
17128
support for m680[34]0 and cpu32, did considerable work on i960
17129
including a COFF port (including considerable amounts of reverse
17130
engineering), a SPARC opcode file rewrite, DECstation, rs6000, and
17131
hp300hpux host ports, updated "know" assertions and made them work,
17132
much other reorganization, cleanup, and lint.
17133
 
17134
   Ken Raeburn wrote the high-level BFD interface code to replace most
17135
of the code in format-specific I/O modules.
17136
 
17137
   The original VMS support was contributed by David L. Kashtan.  Eric
17138
Youngdale has done much work with it since.
17139
 
17140
   The Intel 80386 machine description was written by Eliot Dresselhaus.
17141
 
17142
   Minh Tran-Le at IntelliCorp contributed some AIX 386 support.
17143
 
17144
   The Motorola 88k machine description was contributed by Devon Bowen
17145
of Buffalo University and Torbjorn Granlund of the Swedish Institute of
17146
Computer Science.
17147
 
17148
   Keith Knowles at the Open Software Foundation wrote the original
17149
MIPS back end (`tc-mips.c', `tc-mips.h'), and contributed Rose format
17150
support (which hasn't been merged in yet).  Ralph Campbell worked with
17151
the MIPS code to support a.out format.
17152
 
17153
   Support for the Zilog Z8k and Renesas H8/300 processors (tc-z8k,
17154
tc-h8300), and IEEE 695 object file format (obj-ieee), was written by
17155
Steve Chamberlain of Cygnus Support.  Steve also modified the COFF back
17156
end to use BFD for some low-level operations, for use with the H8/300
17157
and AMD 29k targets.
17158
 
17159
   John Gilmore built the AMD 29000 support, added `.include' support,
17160
and simplified the configuration of which versions accept which
17161
directives.  He updated the 68k machine description so that Motorola's
17162
opcodes always produced fixed-size instructions (e.g., `jsr'), while
17163
synthetic instructions remained shrinkable (`jbsr').  John fixed many
17164
bugs, including true tested cross-compilation support, and one bug in
17165
relaxation that took a week and required the proverbial one-bit fix.
17166
 
17167
   Ian Lance Taylor of Cygnus Support merged the Motorola and MIT
17168
syntax for the 68k, completed support for some COFF targets (68k, i386
17169
SVR3, and SCO Unix), added support for MIPS ECOFF and ELF targets,
17170
wrote the initial RS/6000 and PowerPC assembler, and made a few other
17171
minor patches.
17172
 
17173
   Steve Chamberlain made GAS able to generate listings.
17174
 
17175
   Hewlett-Packard contributed support for the HP9000/300.
17176
 
17177
   Jeff Law wrote GAS and BFD support for the native HPPA object format
17178
(SOM) along with a fairly extensive HPPA testsuite (for both SOM and
17179
ELF object formats).  This work was supported by both the Center for
17180
Software Science at the University of Utah and Cygnus Support.
17181
 
17182
   Support for ELF format files has been worked on by Mark Eichin of
17183
Cygnus Support (original, incomplete implementation for SPARC), Pete
17184
Hoogenboom and Jeff Law at the University of Utah (HPPA mainly),
17185
Michael Meissner of the Open Software Foundation (i386 mainly), and Ken
17186
Raeburn of Cygnus Support (sparc, and some initial 64-bit support).
17187
 
17188
   Linas Vepstas added GAS support for the ESA/390 "IBM 370"
17189
architecture.
17190
 
17191
   Richard Henderson rewrote the Alpha assembler. Klaus Kaempf wrote
17192
GAS and BFD support for openVMS/Alpha.
17193
 
17194
   Timothy Wall, Michael Hayes, and Greg Smart contributed to the
17195
various tic* flavors.
17196
 
17197
   David Heine, Sterling Augustine, Bob Wilson and John Ruttenberg from
17198
Tensilica, Inc. added support for Xtensa processors.
17199
 
17200
   Several engineers at Cygnus Support have also provided many small
17201
bug fixes and configuration enhancements.
17202
 
17203
   Many others have contributed large or small bugfixes and
17204
enhancements.  If you have contributed significant work and are not
17205
mentioned on this list, and want to be, let us know.  Some of the
17206
history has been lost; we are not intentionally leaving anyone out.
17207
 
17208
   ---------- Footnotes ----------
17209
 
17210
   (1) Any more details?
17211
 
17212

17213
File: as.info,  Node: GNU Free Documentation License,  Next: AS Index,  Prev: Acknowledgements,  Up: Top
17214
 
17215
Appendix A GNU Free Documentation License
17216
*****************************************
17217
 
17218
                        Version 1.1, March 2000
17219
 
17220
     Copyright (C) 2000, 2003 Free Software Foundation, Inc.
17221
     51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
17222
 
17223
     Everyone is permitted to copy and distribute verbatim copies
17224
     of this license document, but changing it is not allowed.
17225
 
17226
 
17227
  0. PREAMBLE
17228
 
17229
     The purpose of this License is to make a manual, textbook, or other
17230
     written document "free" in the sense of freedom: to assure everyone
17231
     the effective freedom to copy and redistribute it, with or without
17232
     modifying it, either commercially or noncommercially.  Secondarily,
17233
     this License preserves for the author and publisher a way to get
17234
     credit for their work, while not being considered responsible for
17235
     modifications made by others.
17236
 
17237
     This License is a kind of "copyleft", which means that derivative
17238
     works of the document must themselves be free in the same sense.
17239
     It complements the GNU General Public License, which is a copyleft
17240
     license designed for free software.
17241
 
17242
     We have designed this License in order to use it for manuals for
17243
     free software, because free software needs free documentation: a
17244
     free program should come with manuals providing the same freedoms
17245
     that the software does.  But this License is not limited to
17246
     software manuals; it can be used for any textual work, regardless
17247
     of subject matter or whether it is published as a printed book.
17248
     We recommend this License principally for works whose purpose is
17249
     instruction or reference.
17250
 
17251
 
17252
  1. APPLICABILITY AND DEFINITIONS
17253
 
17254
     This License applies to any manual or other work that contains a
17255
     notice placed by the copyright holder saying it can be distributed
17256
     under the terms of this License.  The "Document", below, refers to
17257
     any such manual or work.  Any member of the public is a licensee,
17258
     and is addressed as "you."
17259
 
17260
     A "Modified Version" of the Document means any work containing the
17261
     Document or a portion of it, either copied verbatim, or with
17262
     modifications and/or translated into another language.
17263
 
17264
     A "Secondary Section" is a named appendix or a front-matter
17265
     section of the Document that deals exclusively with the
17266
     relationship of the publishers or authors of the Document to the
17267
     Document's overall subject (or to related matters) and contains
17268
     nothing that could fall directly within that overall subject.
17269
     (For example, if the Document is in part a textbook of
17270
     mathematics, a Secondary Section may not explain any mathematics.)
17271
     The relationship could be a matter of historical connection with
17272
     the subject or with related matters, or of legal, commercial,
17273
     philosophical, ethical or political position regarding them.
17274
 
17275
     The "Invariant Sections" are certain Secondary Sections whose
17276
     titles are designated, as being those of Invariant Sections, in
17277
     the notice that says that the Document is released under this
17278
     License.
17279
 
17280
     The "Cover Texts" are certain short passages of text that are
17281
     listed, as Front-Cover Texts or Back-Cover Texts, in the notice
17282
     that says that the Document is released under this License.
17283
 
17284
     A "Transparent" copy of the Document means a machine-readable copy,
17285
     represented in a format whose specification is available to the
17286
     general public, whose contents can be viewed and edited directly
17287
     and straightforwardly with generic text editors or (for images
17288
     composed of pixels) generic paint programs or (for drawings) some
17289
     widely available drawing editor, and that is suitable for input to
17290
     text formatters or for automatic translation to a variety of
17291
     formats suitable for input to text formatters.  A copy made in an
17292
     otherwise Transparent file format whose markup has been designed
17293
     to thwart or discourage subsequent modification by readers is not
17294
     Transparent.  A copy that is not "Transparent" is called "Opaque."
17295
 
17296
     Examples of suitable formats for Transparent copies include plain
17297
     ASCII without markup, Texinfo input format, LaTeX input format,
17298
     SGML or XML using a publicly available DTD, and
17299
     standard-conforming simple HTML designed for human modification.
17300
     Opaque formats include PostScript, PDF, proprietary formats that
17301
     can be read and edited only by proprietary word processors, SGML
17302
     or XML for which the DTD and/or processing tools are not generally
17303
     available, and the machine-generated HTML produced by some word
17304
     processors for output purposes only.
17305
 
17306
     The "Title Page" means, for a printed book, the title page itself,
17307
     plus such following pages as are needed to hold, legibly, the
17308
     material this License requires to appear in the title page.  For
17309
     works in formats which do not have any title page as such, "Title
17310
     Page" means the text near the most prominent appearance of the
17311
     work's title, preceding the beginning of the body of the text.
17312
 
17313
  2. VERBATIM COPYING
17314
 
17315
     You may copy and distribute the Document in any medium, either
17316
     commercially or noncommercially, provided that this License, the
17317
     copyright notices, and the license notice saying this License
17318
     applies to the Document are reproduced in all copies, and that you
17319
     add no other conditions whatsoever to those of this License.  You
17320
     may not use technical measures to obstruct or control the reading
17321
     or further copying of the copies you make or distribute.  However,
17322
     you may accept compensation in exchange for copies.  If you
17323
     distribute a large enough number of copies you must also follow
17324
     the conditions in section 3.
17325
 
17326
     You may also lend copies, under the same conditions stated above,
17327
     and you may publicly display copies.
17328
 
17329
  3. COPYING IN QUANTITY
17330
 
17331
     If you publish printed copies of the Document numbering more than
17332
     100, and the Document's license notice requires Cover Texts, you
17333
     must enclose the copies in covers that carry, clearly and legibly,
17334
     all these Cover Texts: Front-Cover Texts on the front cover, and
17335
     Back-Cover Texts on the back cover.  Both covers must also clearly
17336
     and legibly identify you as the publisher of these copies.  The
17337
     front cover must present the full title with all words of the
17338
     title equally prominent and visible.  You may add other material
17339
     on the covers in addition.  Copying with changes limited to the
17340
     covers, as long as they preserve the title of the Document and
17341
     satisfy these conditions, can be treated as verbatim copying in
17342
     other respects.
17343
 
17344
     If the required texts for either cover are too voluminous to fit
17345
     legibly, you should put the first ones listed (as many as fit
17346
     reasonably) on the actual cover, and continue the rest onto
17347
     adjacent pages.
17348
 
17349
     If you publish or distribute Opaque copies of the Document
17350
     numbering more than 100, you must either include a
17351
     machine-readable Transparent copy along with each Opaque copy, or
17352
     state in or with each Opaque copy a publicly-accessible
17353
     computer-network location containing a complete Transparent copy
17354
     of the Document, free of added material, which the general
17355
     network-using public has access to download anonymously at no
17356
     charge using public-standard network protocols.  If you use the
17357
     latter option, you must take reasonably prudent steps, when you
17358
     begin distribution of Opaque copies in quantity, to ensure that
17359
     this Transparent copy will remain thus accessible at the stated
17360
     location until at least one year after the last time you
17361
     distribute an Opaque copy (directly or through your agents or
17362
     retailers) of that edition to the public.
17363
 
17364
     It is requested, but not required, that you contact the authors of
17365
     the Document well before redistributing any large number of
17366
     copies, to give them a chance to provide you with an updated
17367
     version of the Document.
17368
 
17369
  4. MODIFICATIONS
17370
 
17371
     You may copy and distribute a Modified Version of the Document
17372
     under the conditions of sections 2 and 3 above, provided that you
17373
     release the Modified Version under precisely this License, with
17374
     the Modified Version filling the role of the Document, thus
17375
     licensing distribution and modification of the Modified Version to
17376
     whoever possesses a copy of it.  In addition, you must do these
17377
     things in the Modified Version:
17378
 
17379
     A. Use in the Title Page (and on the covers, if any) a title
17380
     distinct    from that of the Document, and from those of previous
17381
     versions    (which should, if there were any, be listed in the
17382
     History section    of the Document).  You may use the same title
17383
     as a previous version    if the original publisher of that version
17384
     gives permission.
17385
     B. List on the Title Page, as authors, one or more persons or
17386
     entities    responsible for authorship of the modifications in the
17387
     Modified    Version, together with at least five of the principal
17388
     authors of the    Document (all of its principal authors, if it
17389
     has less than five).
17390
     C. State on the Title page the name of the publisher of the
17391
     Modified Version, as the publisher.
17392
     D. Preserve all the copyright notices of the Document.
17393
     E. Add an appropriate copyright notice for your modifications
17394
     adjacent to the other copyright notices.
17395
     F. Include, immediately after the copyright notices, a license
17396
     notice    giving the public permission to use the Modified Version
17397
     under the    terms of this License, in the form shown in the
17398
     Addendum below.
17399
     G. Preserve in that license notice the full lists of Invariant
17400
     Sections    and required Cover Texts given in the Document's
17401
     license notice.
17402
     H. Include an unaltered copy of this License.
17403
     I. Preserve the section entitled "History", and its title, and add
17404
     to    it an item stating at least the title, year, new authors, and
17405
       publisher of the Modified Version as given on the Title Page.
17406
     If    there is no section entitled "History" in the Document,
17407
     create one    stating the title, year, authors, and publisher of
17408
     the Document as    given on its Title Page, then add an item
17409
     describing the Modified    Version as stated in the previous
17410
     sentence.
17411
     J. Preserve the network location, if any, given in the Document for
17412
       public access to a Transparent copy of the Document, and
17413
     likewise    the network locations given in the Document for
17414
     previous versions    it was based on.  These may be placed in the
17415
     "History" section.     You may omit a network location for a work
17416
     that was published at    least four years before the Document
17417
     itself, or if the original    publisher of the version it refers
17418
     to gives permission.
17419
     K. In any section entitled "Acknowledgements" or "Dedications",
17420
     preserve the section's title, and preserve in the section all the
17421
      substance and tone of each of the contributor acknowledgements
17422
     and/or dedications given therein.
17423
     L. Preserve all the Invariant Sections of the Document,
17424
     unaltered in their text and in their titles.  Section numbers
17425
     or the equivalent are not considered part of the section titles.
17426
     M. Delete any section entitled "Endorsements."  Such a section
17427
     may not be included in the Modified Version.
17428
     N. Do not retitle any existing section as "Endorsements"    or to
17429
     conflict in title with any Invariant Section.
17430
 
17431
     If the Modified Version includes new front-matter sections or
17432
     appendices that qualify as Secondary Sections and contain no
17433
     material copied from the Document, you may at your option
17434
     designate some or all of these sections as invariant.  To do this,
17435
     add their titles to the list of Invariant Sections in the Modified
17436
     Version's license notice.  These titles must be distinct from any
17437
     other section titles.
17438
 
17439
     You may add a section entitled "Endorsements", provided it contains
17440
     nothing but endorsements of your Modified Version by various
17441
     parties-for example, statements of peer review or that the text has
17442
     been approved by an organization as the authoritative definition
17443
     of a standard.
17444
 
17445
     You may add a passage of up to five words as a Front-Cover Text,
17446
     and a passage of up to 25 words as a Back-Cover Text, to the end
17447
     of the list of Cover Texts in the Modified Version.  Only one
17448
     passage of Front-Cover Text and one of Back-Cover Text may be
17449
     added by (or through arrangements made by) any one entity.  If the
17450
     Document already includes a cover text for the same cover,
17451
     previously added by you or by arrangement made by the same entity
17452
     you are acting on behalf of, you may not add another; but you may
17453
     replace the old one, on explicit permission from the previous
17454
     publisher that added the old one.
17455
 
17456
     The author(s) and publisher(s) of the Document do not by this
17457
     License give permission to use their names for publicity for or to
17458
     assert or imply endorsement of any Modified Version.
17459
 
17460
  5. COMBINING DOCUMENTS
17461
 
17462
     You may combine the Document with other documents released under
17463
     this License, under the terms defined in section 4 above for
17464
     modified versions, provided that you include in the combination
17465
     all of the Invariant Sections of all of the original documents,
17466
     unmodified, and list them all as Invariant Sections of your
17467
     combined work in its license notice.
17468
 
17469
     The combined work need only contain one copy of this License, and
17470
     multiple identical Invariant Sections may be replaced with a single
17471
     copy.  If there are multiple Invariant Sections with the same name
17472
     but different contents, make the title of each such section unique
17473
     by adding at the end of it, in parentheses, the name of the
17474
     original author or publisher of that section if known, or else a
17475
     unique number.  Make the same adjustment to the section titles in
17476
     the list of Invariant Sections in the license notice of the
17477
     combined work.
17478
 
17479
     In the combination, you must combine any sections entitled
17480
     "History" in the various original documents, forming one section
17481
     entitled "History"; likewise combine any sections entitled
17482
     "Acknowledgements", and any sections entitled "Dedications."  You
17483
     must delete all sections entitled "Endorsements."
17484
 
17485
  6. COLLECTIONS OF DOCUMENTS
17486
 
17487
     You may make a collection consisting of the Document and other
17488
     documents released under this License, and replace the individual
17489
     copies of this License in the various documents with a single copy
17490
     that is included in the collection, provided that you follow the
17491
     rules of this License for verbatim copying of each of the
17492
     documents in all other respects.
17493
 
17494
     You may extract a single document from such a collection, and
17495
     distribute it individually under this License, provided you insert
17496
     a copy of this License into the extracted document, and follow
17497
     this License in all other respects regarding verbatim copying of
17498
     that document.
17499
 
17500
  7. AGGREGATION WITH INDEPENDENT WORKS
17501
 
17502
     A compilation of the Document or its derivatives with other
17503
     separate and independent documents or works, in or on a volume of
17504
     a storage or distribution medium, does not as a whole count as a
17505
     Modified Version of the Document, provided no compilation
17506
     copyright is claimed for the compilation.  Such a compilation is
17507
     called an "aggregate", and this License does not apply to the
17508
     other self-contained works thus compiled with the Document, on
17509
     account of their being thus compiled, if they are not themselves
17510
     derivative works of the Document.
17511
 
17512
     If the Cover Text requirement of section 3 is applicable to these
17513
     copies of the Document, then if the Document is less than one
17514
     quarter of the entire aggregate, the Document's Cover Texts may be
17515
     placed on covers that surround only the Document within the
17516
     aggregate.  Otherwise they must appear on covers around the whole
17517
     aggregate.
17518
 
17519
  8. TRANSLATION
17520
 
17521
     Translation is considered a kind of modification, so you may
17522
     distribute translations of the Document under the terms of section
17523
     4.  Replacing Invariant Sections with translations requires special
17524
     permission from their copyright holders, but you may include
17525
     translations of some or all Invariant Sections in addition to the
17526
     original versions of these Invariant Sections.  You may include a
17527
     translation of this License provided that you also include the
17528
     original English version of this License.  In case of a
17529
     disagreement between the translation and the original English
17530
     version of this License, the original English version will prevail.
17531
 
17532
  9. TERMINATION
17533
 
17534
     You may not copy, modify, sublicense, or distribute the Document
17535
     except as expressly provided for under this License.  Any other
17536
     attempt to copy, modify, sublicense or distribute the Document is
17537
     void, and will automatically terminate your rights under this
17538
     License.  However, parties who have received copies, or rights,
17539
     from you under this License will not have their licenses
17540
     terminated so long as such parties remain in full compliance.
17541
 
17542
 10. FUTURE REVISIONS OF THIS LICENSE
17543
 
17544
     The Free Software Foundation may publish new, revised versions of
17545
     the GNU Free Documentation License from time to time.  Such new
17546
     versions will be similar in spirit to the present version, but may
17547
     differ in detail to address new problems or concerns.  See
17548
     http://www.gnu.org/copyleft/.
17549
 
17550
     Each version of the License is given a distinguishing version
17551
     number.  If the Document specifies that a particular numbered
17552
     version of this License "or any later version" applies to it, you
17553
     have the option of following the terms and conditions either of
17554
     that specified version or of any later version that has been
17555
     published (not as a draft) by the Free Software Foundation.  If
17556
     the Document does not specify a version number of this License,
17557
     you may choose any version ever published (not as a draft) by the
17558
     Free Software Foundation.
17559
 
17560
 
17561
ADDENDUM: How to use this License for your documents
17562
====================================================
17563
 
17564
To use this License in a document you have written, include a copy of
17565
the License in the document and put the following copyright and license
17566
notices just after the title page:
17567
 
17568
     Copyright (C)  YEAR  YOUR NAME.
17569
     Permission is granted to copy, distribute and/or modify this document
17570
     under the terms of the GNU Free Documentation License, Version 1.1
17571
     or any later version published by the Free Software Foundation;
17572
     with the Invariant Sections being LIST THEIR TITLES, with the
17573
     Front-Cover Texts being LIST, and with the Back-Cover Texts being LIST.
17574
     A copy of the license is included in the section entitled "GNU
17575
     Free Documentation License."
17576
 
17577
   If you have no Invariant Sections, write "with no Invariant Sections"
17578
instead of saying which ones are invariant.  If you have no Front-Cover
17579
Texts, write "no Front-Cover Texts" instead of "Front-Cover Texts being
17580
LIST"; likewise for Back-Cover Texts.
17581
 
17582
   If your document contains nontrivial examples of program code, we
17583
recommend releasing these examples in parallel under your choice of
17584
free software license, such as the GNU General Public License, to
17585
permit their use in free software.
17586
 
17587

17588
File: as.info,  Node: AS Index,  Prev: GNU Free Documentation License,  Up: Top
17589
 
17590
AS Index
17591
********
17592
 
17593
 
17594
* Menu:
17595
17596
* #:                                     Comments.            (line  38)
17597
* #APP:                                  Preprocessing.       (line  27)
17598
* #NO_APP:                               Preprocessing.       (line  27)
17599
* $ in symbol names <1>:                 SH64-Chars.          (line  10)
17600
* $ in symbol names <2>:                 SH-Chars.            (line  10)
17601
* $ in symbol names <3>:                 D30V-Chars.          (line  63)
17602
* $ in symbol names:                     D10V-Chars.          (line  46)
17603
* $a:                                    ARM Mapping Symbols. (line   9)
17604
* $acos math builtin, TIC54X:            TIC54X-Builtins.     (line  10)
17605
* $asin math builtin, TIC54X:            TIC54X-Builtins.     (line  13)
17606
* $atan math builtin, TIC54X:            TIC54X-Builtins.     (line  16)
17607
* $atan2 math builtin, TIC54X:           TIC54X-Builtins.     (line  19)
17608
* $ceil math builtin, TIC54X:            TIC54X-Builtins.     (line  22)
17609
* $cos math builtin, TIC54X:             TIC54X-Builtins.     (line  28)
17610
* $cosh math builtin, TIC54X:            TIC54X-Builtins.     (line  25)
17611
* $cvf math builtin, TIC54X:             TIC54X-Builtins.     (line  31)
17612
* $cvi math builtin, TIC54X:             TIC54X-Builtins.     (line  34)
17613
* $d:                                    ARM Mapping Symbols. (line  15)
17614
* $exp math builtin, TIC54X:             TIC54X-Builtins.     (line  37)
17615
* $fabs math builtin, TIC54X:            TIC54X-Builtins.     (line  40)
17616
* $firstch subsym builtin, TIC54X:       TIC54X-Macros.       (line  26)
17617
* $floor math builtin, TIC54X:           TIC54X-Builtins.     (line  43)
17618
* $fmod math builtin, TIC54X:            TIC54X-Builtins.     (line  47)
17619
* $int math builtin, TIC54X:             TIC54X-Builtins.     (line  50)
17620
* $iscons subsym builtin, TIC54X:        TIC54X-Macros.       (line  43)
17621
* $isdefed subsym builtin, TIC54X:       TIC54X-Macros.       (line  34)
17622
* $ismember subsym builtin, TIC54X:      TIC54X-Macros.       (line  38)
17623
* $isname subsym builtin, TIC54X:        TIC54X-Macros.       (line  47)
17624
* $isreg subsym builtin, TIC54X:         TIC54X-Macros.       (line  50)
17625
* $lastch subsym builtin, TIC54X:        TIC54X-Macros.       (line  30)
17626
* $ldexp math builtin, TIC54X:           TIC54X-Builtins.     (line  53)
17627
* $log math builtin, TIC54X:             TIC54X-Builtins.     (line  59)
17628
* $log10 math builtin, TIC54X:           TIC54X-Builtins.     (line  56)
17629
* $max math builtin, TIC54X:             TIC54X-Builtins.     (line  62)
17630
* $min math builtin, TIC54X:             TIC54X-Builtins.     (line  65)
17631
* $pow math builtin, TIC54X:             TIC54X-Builtins.     (line  68)
17632
* $round math builtin, TIC54X:           TIC54X-Builtins.     (line  71)
17633
* $sgn math builtin, TIC54X:             TIC54X-Builtins.     (line  74)
17634
* $sin math builtin, TIC54X:             TIC54X-Builtins.     (line  77)
17635
* $sinh math builtin, TIC54X:            TIC54X-Builtins.     (line  80)
17636
* $sqrt math builtin, TIC54X:            TIC54X-Builtins.     (line  83)
17637
* $structacc subsym builtin, TIC54X:     TIC54X-Macros.       (line  57)
17638
* $structsz subsym builtin, TIC54X:      TIC54X-Macros.       (line  54)
17639
* $symcmp subsym builtin, TIC54X:        TIC54X-Macros.       (line  23)
17640
* $symlen subsym builtin, TIC54X:        TIC54X-Macros.       (line  20)
17641
* $t:                                    ARM Mapping Symbols. (line  12)
17642
* $tan math builtin, TIC54X:             TIC54X-Builtins.     (line  86)
17643
* $tanh math builtin, TIC54X:            TIC54X-Builtins.     (line  89)
17644
* $trunc math builtin, TIC54X:           TIC54X-Builtins.     (line  92)
17645
* -+ option, VAX/VMS:                    VAX-Opts.            (line  71)
17646
* --:                                    Command Line.        (line  10)
17647
* --32 option, i386:                     i386-Options.        (line   8)
17648
* --32 option, x86-64:                   i386-Options.        (line   8)
17649
* --64 option, i386:                     i386-Options.        (line   8)
17650
* --64 option, x86-64:                   i386-Options.        (line   8)
17651
* --absolute-literals:                   Xtensa Options.      (line  23)
17652
* --allow-reg-prefix:                    SH Options.          (line   9)
17653
* --alternate:                           alternate.           (line   6)
17654
* --base-size-default-16:                M68K-Opts.           (line  71)
17655
* --base-size-default-32:                M68K-Opts.           (line  71)
17656
* --big:                                 SH Options.          (line   9)
17657
* --bitwise-or option, M680x0:           M68K-Opts.           (line  64)
17658
* --disp-size-default-16:                M68K-Opts.           (line  80)
17659
* --disp-size-default-32:                M68K-Opts.           (line  80)
17660
* --divide option, i386:                 i386-Options.        (line  24)
17661
* --dsp:                                 SH Options.          (line   9)
17662
* --emulation=crisaout command line option, CRIS: CRIS-Opts.  (line   9)
17663
* --emulation=criself command line option, CRIS: CRIS-Opts.   (line   9)
17664
* --enforce-aligned-data:                Sparc-Aligned-Data.  (line  11)
17665
* --fatal-warnings:                      W.                   (line  16)
17666
* --fix-v4bx command line option, ARM:   ARM Options.         (line 124)
17667
* --fixed-special-register-names command line option, MMIX: MMIX-Opts.
17668
                                                              (line   8)
17669
* --force-long-branches:                 M68HC11-Opts.        (line  69)
17670
* --generate-example:                    M68HC11-Opts.        (line  86)
17671
* --globalize-symbols command line option, MMIX: MMIX-Opts.   (line  12)
17672
* --gnu-syntax command line option, MMIX: MMIX-Opts.          (line  16)
17673
* --hash-size=NUMBER:                    Overview.            (line 311)
17674
* --linker-allocated-gregs command line option, MMIX: MMIX-Opts.
17675
                                                              (line  67)
17676
* --listing-cont-lines:                  listing.             (line  34)
17677
* --listing-lhs-width:                   listing.             (line  16)
17678
* --listing-lhs-width2:                  listing.             (line  21)
17679
* --listing-rhs-width:                   listing.             (line  28)
17680
* --little:                              SH Options.          (line   9)
17681
* --longcalls:                           Xtensa Options.      (line  37)
17682
* --march=ARCHITECTURE command line option, CRIS: CRIS-Opts.  (line  33)
17683
* --MD:                                  MD.                  (line   6)
17684
* --mul-bug-abort command line option, CRIS: CRIS-Opts.       (line  61)
17685
* --no-absolute-literals:                Xtensa Options.      (line  23)
17686
* --no-expand command line option, MMIX: MMIX-Opts.           (line  31)
17687
* --no-longcalls:                        Xtensa Options.      (line  37)
17688
* --no-merge-gregs command line option, MMIX: MMIX-Opts.      (line  36)
17689
* --no-mul-bug-abort command line option, CRIS: CRIS-Opts.    (line  61)
17690
* --no-predefined-syms command line option, MMIX: MMIX-Opts.  (line  22)
17691
* --no-pushj-stubs command line option, MMIX: MMIX-Opts.      (line  54)
17692
* --no-stubs command line option, MMIX:  MMIX-Opts.           (line  54)
17693
* --no-target-align:                     Xtensa Options.      (line  30)
17694
* --no-text-section-literals:            Xtensa Options.      (line   9)
17695
* --no-transform:                        Xtensa Options.      (line  46)
17696
* --no-underscore command line option, CRIS: CRIS-Opts.       (line  15)
17697
* --no-warn:                             W.                   (line  11)
17698
* --pcrel:                               M68K-Opts.           (line  92)
17699
* --pic command line option, CRIS:       CRIS-Opts.           (line  27)
17700
* --print-insn-syntax:                   M68HC11-Opts.        (line  75)
17701
* --print-opcodes:                       M68HC11-Opts.        (line  79)
17702
* --register-prefix-optional option, M680x0: M68K-Opts.       (line  51)
17703
* --relax:                               SH Options.          (line   9)
17704
* --relax command line option, MMIX:     MMIX-Opts.           (line  19)
17705
* --rename-section:                      Xtensa Options.      (line  54)
17706
* --renesas:                             SH Options.          (line   9)
17707
* --short-branches:                      M68HC11-Opts.        (line  54)
17708
* --small:                               SH Options.          (line   9)
17709
* --statistics:                          statistics.          (line   6)
17710
* --strict-direct-mode:                  M68HC11-Opts.        (line  44)
17711
* --target-align:                        Xtensa Options.      (line  30)
17712
* --text-section-literals:               Xtensa Options.      (line   9)
17713
* --traditional-format:                  traditional-format.  (line   6)
17714
* --transform:                           Xtensa Options.      (line  46)
17715
* --underscore command line option, CRIS: CRIS-Opts.          (line  15)
17716
* --warn:                                W.                   (line  19)
17717
* -1 option, VAX/VMS:                    VAX-Opts.            (line  77)
17718
* -32addr command line option, Alpha:    Alpha Options.       (line  50)
17719
* -a:                                    a.                   (line   6)
17720
* -A options, i960:                      Options-i960.        (line   6)
17721
* -ac:                                   a.                   (line   6)
17722
* -ad:                                   a.                   (line   6)
17723
* -ag:                                   a.                   (line   6)
17724
* -ah:                                   a.                   (line   6)
17725
* -al:                                   a.                   (line   6)
17726
* -an:                                   a.                   (line   6)
17727
* -as:                                   a.                   (line   6)
17728
* -Asparclet:                            Sparc-Opts.          (line  25)
17729
* -Asparclite:                           Sparc-Opts.          (line  25)
17730
* -Av6:                                  Sparc-Opts.          (line  25)
17731
* -Av8:                                  Sparc-Opts.          (line  25)
17732
* -Av9:                                  Sparc-Opts.          (line  25)
17733
* -Av9a:                                 Sparc-Opts.          (line  25)
17734
* -b option, i960:                       Options-i960.        (line  22)
17735
* -big option, M32R:                     M32R-Opts.           (line  35)
17736
* -D:                                    D.                   (line   6)
17737
* -D, ignored on VAX:                    VAX-Opts.            (line  11)
17738
* -d, VAX option:                        VAX-Opts.            (line  16)
17739
* -eabi= command line option, ARM:       ARM Options.         (line 107)
17740
* -EB command line option, ARC:          ARC Options.         (line  31)
17741
* -EB command line option, ARM:          ARM Options.         (line 112)
17742
* -EB option (MIPS):                     MIPS Opts.           (line  13)
17743
* -EB option, M32R:                      M32R-Opts.           (line  39)
17744
* -EL command line option, ARC:          ARC Options.         (line  35)
17745
* -EL command line option, ARM:          ARM Options.         (line 116)
17746
* -EL option (MIPS):                     MIPS Opts.           (line  13)
17747
* -EL option, M32R:                      M32R-Opts.           (line  32)
17748
* -f:                                    f.                   (line   6)
17749
* -F command line option, Alpha:         Alpha Options.       (line  50)
17750
* -G command line option, Alpha:         Alpha Options.       (line  46)
17751
* -g command line option, Alpha:         Alpha Options.       (line  40)
17752
* -G option (MIPS):                      MIPS Opts.           (line   8)
17753
* -H option, VAX/VMS:                    VAX-Opts.            (line  81)
17754
* -h option, VAX/VMS:                    VAX-Opts.            (line  45)
17755
* -I PATH:                               I.                   (line   6)
17756
* -ignore-parallel-conflicts option, M32RX: M32R-Opts.        (line  87)
17757
* -Ip option, M32RX:                     M32R-Opts.           (line  97)
17758
* -J, ignored on VAX:                    VAX-Opts.            (line  27)
17759
* -K:                                    K.                   (line   6)
17760
* -k command line option, ARM:           ARM Options.         (line 120)
17761
* -KPIC option, M32R:                    M32R-Opts.           (line  42)
17762
* -KPIC option, MIPS:                    MIPS Opts.           (line  21)
17763
* -L:                                    L.                   (line   6)
17764
* -l option, M680x0:                     M68K-Opts.           (line  39)
17765
* -little option, M32R:                  M32R-Opts.           (line  27)
17766
* -M:                                    M.                   (line   6)
17767
* -m11/03:                               PDP-11-Options.      (line 140)
17768
* -m11/04:                               PDP-11-Options.      (line 143)
17769
* -m11/05:                               PDP-11-Options.      (line 146)
17770
* -m11/10:                               PDP-11-Options.      (line 146)
17771
* -m11/15:                               PDP-11-Options.      (line 149)
17772
* -m11/20:                               PDP-11-Options.      (line 149)
17773
* -m11/21:                               PDP-11-Options.      (line 152)
17774
* -m11/23:                               PDP-11-Options.      (line 155)
17775
* -m11/24:                               PDP-11-Options.      (line 155)
17776
* -m11/34:                               PDP-11-Options.      (line 158)
17777
* -m11/34a:                              PDP-11-Options.      (line 161)
17778
* -m11/35:                               PDP-11-Options.      (line 164)
17779
* -m11/40:                               PDP-11-Options.      (line 164)
17780
* -m11/44:                               PDP-11-Options.      (line 167)
17781
* -m11/45:                               PDP-11-Options.      (line 170)
17782
* -m11/50:                               PDP-11-Options.      (line 170)
17783
* -m11/53:                               PDP-11-Options.      (line 173)
17784
* -m11/55:                               PDP-11-Options.      (line 170)
17785
* -m11/60:                               PDP-11-Options.      (line 176)
17786
* -m11/70:                               PDP-11-Options.      (line 170)
17787
* -m11/73:                               PDP-11-Options.      (line 173)
17788
* -m11/83:                               PDP-11-Options.      (line 173)
17789
* -m11/84:                               PDP-11-Options.      (line 173)
17790
* -m11/93:                               PDP-11-Options.      (line 173)
17791
* -m11/94:                               PDP-11-Options.      (line 173)
17792
* -m16c option, M16C:                    M32C-Opts.           (line  12)
17793
* -m32c option, M32C:                    M32C-Opts.           (line   9)
17794
* -m32r option, M32R:                    M32R-Opts.           (line  21)
17795
* -m32rx option, M32R2:                  M32R-Opts.           (line  17)
17796
* -m32rx option, M32RX:                  M32R-Opts.           (line   9)
17797
* -m68000 and related options:           M68K-Opts.           (line 104)
17798
* -m68hc11:                              M68HC11-Opts.        (line   9)
17799
* -m68hc12:                              M68HC11-Opts.        (line  14)
17800
* -m68hcs12:                             M68HC11-Opts.        (line  21)
17801
* -m[no-]68851 command line option, M680x0: M68K-Opts.        (line  21)
17802
* -m[no-]68881 command line option, M680x0: M68K-Opts.        (line  21)
17803
* -m[no-]div command line option, M680x0: M68K-Opts.          (line  21)
17804
* -m[no-]emac command line option, M680x0: M68K-Opts.         (line  21)
17805
* -m[no-]float command line option, M680x0: M68K-Opts.        (line  21)
17806
* -m[no-]mac command line option, M680x0: M68K-Opts.          (line  21)
17807
* -m[no-]usp command line option, M680x0: M68K-Opts.          (line  21)
17808
* -mall:                                 PDP-11-Options.      (line  26)
17809
* -mall-extensions:                      PDP-11-Options.      (line  26)
17810
* -mall-opcodes command line option, AVR: AVR Options.        (line  46)
17811
* -mapcs command line option, ARM:       ARM Options.         (line  80)
17812
* -mapcs-float command line option, ARM: ARM Options.         (line  93)
17813
* -mapcs-reentrant command line option, ARM: ARM Options.     (line  98)
17814
* -marc[5|6|7|8] command line option, ARC: ARC Options.       (line   6)
17815
* -march= command line option, ARM:      ARM Options.         (line  37)
17816
* -march= command line option, M680x0:   M68K-Opts.           (line   8)
17817
* -march= option, i386:                  i386-Options.        (line  31)
17818
* -march= option, x86-64:                i386-Options.        (line  31)
17819
* -matpcs command line option, ARM:      ARM Options.         (line  85)
17820
* -mcis:                                 PDP-11-Options.      (line  32)
17821
* -mconstant-gp command line option, IA-64: IA-64 Options.    (line   6)
17822
* -mCPU command line option, Alpha:      Alpha Options.       (line   6)
17823
* -mcpu option, cpu:                     TIC54X-Opts.         (line  15)
17824
* -mcpu= command line option, ARM:       ARM Options.         (line   6)
17825
* -mcpu= command line option, M680x0:    M68K-Opts.           (line  14)
17826
* -mcsm:                                 PDP-11-Options.      (line  43)
17827
* -mdebug command line option, Alpha:    Alpha Options.       (line  25)
17828
* -me option, stderr redirect:           TIC54X-Opts.         (line  20)
17829
* -meis:                                 PDP-11-Options.      (line  46)
17830
* -merrors-to-file option, stderr redirect: TIC54X-Opts.      (line  20)
17831
* -mf option, far-mode:                  TIC54X-Opts.         (line   8)
17832
* -mf11:                                 PDP-11-Options.      (line 122)
17833
* -mfar-mode option, far-mode:           TIC54X-Opts.         (line   8)
17834
* -mfis:                                 PDP-11-Options.      (line  51)
17835
* -mfloat-abi= command line option, ARM: ARM Options.         (line 102)
17836
* -mfp-11:                               PDP-11-Options.      (line  56)
17837
* -mfpp:                                 PDP-11-Options.      (line  56)
17838
* -mfpu:                                 PDP-11-Options.      (line  56)
17839
* -mfpu= command line option, ARM:       ARM Options.         (line  52)
17840
* -mip2022 option, IP2K:                 IP2K-Opts.           (line  14)
17841
* -mip2022ext option, IP2022:            IP2K-Opts.           (line   9)
17842
* -mj11:                                 PDP-11-Options.      (line 126)
17843
* -mka11:                                PDP-11-Options.      (line  92)
17844
* -mkb11:                                PDP-11-Options.      (line  95)
17845
* -mkd11a:                               PDP-11-Options.      (line  98)
17846
* -mkd11b:                               PDP-11-Options.      (line 101)
17847
* -mkd11d:                               PDP-11-Options.      (line 104)
17848
* -mkd11e:                               PDP-11-Options.      (line 107)
17849
* -mkd11f:                               PDP-11-Options.      (line 110)
17850
* -mkd11h:                               PDP-11-Options.      (line 110)
17851
* -mkd11k:                               PDP-11-Options.      (line 114)
17852
* -mkd11q:                               PDP-11-Options.      (line 110)
17853
* -mkd11z:                               PDP-11-Options.      (line 118)
17854
* -mkev11:                               PDP-11-Options.      (line  51)
17855
* -mlimited-eis:                         PDP-11-Options.      (line  64)
17856
* -mlong:                                M68HC11-Opts.        (line  32)
17857
* -mlong-double:                         M68HC11-Opts.        (line  40)
17858
* -mmcu= command line option, AVR:       AVR Options.         (line   6)
17859
* -mmfpt:                                PDP-11-Options.      (line  70)
17860
* -mmicrocode:                           PDP-11-Options.      (line  83)
17861
* -mmnemonic= option, i386:              i386-Options.        (line  76)
17862
* -mmnemonic= option, x86-64:            i386-Options.        (line  76)
17863
* -mmutiproc:                            PDP-11-Options.      (line  73)
17864
* -mmxps:                                PDP-11-Options.      (line  77)
17865
* -mnaked-reg option, i386:              i386-Options.        (line  90)
17866
* -mnaked-reg option, x86-64:            i386-Options.        (line  90)
17867
* -mno-cis:                              PDP-11-Options.      (line  32)
17868
* -mno-csm:                              PDP-11-Options.      (line  43)
17869
* -mno-eis:                              PDP-11-Options.      (line  46)
17870
* -mno-extensions:                       PDP-11-Options.      (line  29)
17871
* -mno-fis:                              PDP-11-Options.      (line  51)
17872
* -mno-fp-11:                            PDP-11-Options.      (line  56)
17873
* -mno-fpp:                              PDP-11-Options.      (line  56)
17874
* -mno-fpu:                              PDP-11-Options.      (line  56)
17875
* -mno-kev11:                            PDP-11-Options.      (line  51)
17876
* -mno-limited-eis:                      PDP-11-Options.      (line  64)
17877
* -mno-mfpt:                             PDP-11-Options.      (line  70)
17878
* -mno-microcode:                        PDP-11-Options.      (line  83)
17879
* -mno-mutiproc:                         PDP-11-Options.      (line  73)
17880
* -mno-mxps:                             PDP-11-Options.      (line  77)
17881
* -mno-pic:                              PDP-11-Options.      (line  11)
17882
* -mno-skip-bug command line option, AVR: AVR Options.        (line  49)
17883
* -mno-spl:                              PDP-11-Options.      (line  80)
17884
* -mno-sym32:                            MIPS Opts.           (line 184)
17885
* -mno-wrap command line option, AVR:    AVR Options.         (line  52)
17886
* -mpic:                                 PDP-11-Options.      (line  11)
17887
* -mrelax command line option, V850:     V850 Options.        (line  51)
17888
* -mshort:                               M68HC11-Opts.        (line  27)
17889
* -mshort-double:                        M68HC11-Opts.        (line  36)
17890
* -mspl:                                 PDP-11-Options.      (line  80)
17891
* -msse-check= option, i386:             i386-Options.        (line  64)
17892
* -msse-check= option, x86-64:           i386-Options.        (line  64)
17893
* -msse2avx option, i386:                i386-Options.        (line  60)
17894
* -msse2avx option, x86-64:              i386-Options.        (line  60)
17895
* -msym32:                               MIPS Opts.           (line 184)
17896
* -msyntax= option, i386:                i386-Options.        (line  83)
17897
* -msyntax= option, x86-64:              i386-Options.        (line  83)
17898
* -mt11:                                 PDP-11-Options.      (line 130)
17899
* -mthumb command line option, ARM:      ARM Options.         (line  71)
17900
* -mthumb-interwork command line option, ARM: ARM Options.    (line  76)
17901
* -mtune= option, i386:                  i386-Options.        (line  52)
17902
* -mtune= option, x86-64:                i386-Options.        (line  52)
17903
* -mv850 command line option, V850:      V850 Options.        (line  23)
17904
* -mv850any command line option, V850:   V850 Options.        (line  41)
17905
* -mv850e command line option, V850:     V850 Options.        (line  29)
17906
* -mv850e1 command line option, V850:    V850 Options.        (line  35)
17907
* -mvxworks-pic option, MIPS:            MIPS Opts.           (line  26)
17908
* -N command line option, CRIS:          CRIS-Opts.           (line  57)
17909
* -nIp option, M32RX:                    M32R-Opts.           (line 101)
17910
* -no-bitinst, M32R2:                    M32R-Opts.           (line  54)
17911
* -no-ignore-parallel-conflicts option, M32RX: M32R-Opts.     (line  93)
17912
* -no-mdebug command line option, Alpha: Alpha Options.       (line  25)
17913
* -no-parallel option, M32RX:            M32R-Opts.           (line  51)
17914
* -no-relax option, i960:                Options-i960.        (line  66)
17915
* -no-warn-explicit-parallel-conflicts option, M32RX: M32R-Opts.
17916
                                                              (line  79)
17917
* -no-warn-unmatched-high option, M32R:  M32R-Opts.           (line 111)
17918
* -nocpp ignored (MIPS):                 MIPS Opts.           (line 187)
17919
* -o:                                    o.                   (line   6)
17920
* -O option, M32RX:                      M32R-Opts.           (line  59)
17921
* -parallel option, M32RX:               M32R-Opts.           (line  46)
17922
* -R:                                    R.                   (line   6)
17923
* -r800 command line option, Z80:        Z80 Options.         (line  41)
17924
* -relax command line option, Alpha:     Alpha Options.       (line  32)
17925
* -S, ignored on VAX:                    VAX-Opts.            (line  11)
17926
* -t, ignored on VAX:                    VAX-Opts.            (line  36)
17927
* -T, ignored on VAX:                    VAX-Opts.            (line  11)
17928
* -v:                                    v.                   (line   6)
17929
* -V, redundant on VAX:                  VAX-Opts.            (line  22)
17930
* -version:                              v.                   (line   6)
17931
* -W:                                    W.                   (line  11)
17932
* -warn-explicit-parallel-conflicts option, M32RX: M32R-Opts. (line  65)
17933
* -warn-unmatched-high option, M32R:     M32R-Opts.           (line 105)
17934
* -Wnp option, M32RX:                    M32R-Opts.           (line  83)
17935
* -Wnuh option, M32RX:                   M32R-Opts.           (line 117)
17936
* -Wp option, M32RX:                     M32R-Opts.           (line  75)
17937
* -wsigned_overflow command line option, V850: V850 Options.  (line   9)
17938
* -Wuh option, M32RX:                    M32R-Opts.           (line 114)
17939
* -wunsigned_overflow command line option, V850: V850 Options.
17940
                                                              (line  16)
17941
* -x command line option, MMIX:          MMIX-Opts.           (line  44)
17942
* -z80 command line option, Z80:         Z80 Options.         (line   8)
17943
* -z8001 command line option, Z8000:     Z8000 Options.       (line   6)
17944
* -z8002 command line option, Z8000:     Z8000 Options.       (line   9)
17945
* . (symbol):                            Dot.                 (line   6)
17946
* .arch directive, ARM:                  ARM Directives.      (line 210)
17947
* .big directive, M32RX:                 M32R-Directives.     (line  88)
17948
* .cantunwind directive, ARM:            ARM Directives.      (line 114)
17949
* .cpu directive, ARM:                   ARM Directives.      (line 206)
17950
* .eabi_attribute directive, ARM:        ARM Directives.      (line 224)
17951
* .fnend directive, ARM:                 ARM Directives.      (line 105)
17952
* .fnstart directive, ARM:               ARM Directives.      (line 102)
17953
* .fpu directive, ARM:                   ARM Directives.      (line 220)
17954
* .handlerdata directive, ARM:           ARM Directives.      (line 125)
17955
* .insn:                                 MIPS insn.           (line   6)
17956
* .little directive, M32RX:              M32R-Directives.     (line  82)
17957
* .ltorg directive, ARM:                 ARM Directives.      (line  85)
17958
* .m32r directive, M32R:                 M32R-Directives.     (line  66)
17959
* .m32r2 directive, M32R2:               M32R-Directives.     (line  77)
17960
* .m32rx directive, M32RX:               M32R-Directives.     (line  72)
17961
* .movsp directive, ARM:                 ARM Directives.      (line 180)
17962
* .o:                                    Object.              (line   6)
17963
* .object_arch directive, ARM:           ARM Directives.      (line 214)
17964
* .pad directive, ARM:                   ARM Directives.      (line 175)
17965
* .param on HPPA:                        HPPA Directives.     (line  19)
17966
* .personality directive, ARM:           ARM Directives.      (line 118)
17967
* .personalityindex directive, ARM:      ARM Directives.      (line 121)
17968
* .pool directive, ARM:                  ARM Directives.      (line  99)
17969
* .save directive, ARM:                  ARM Directives.      (line 134)
17970
* .set arch=CPU:                         MIPS ISA.            (line  18)
17971
* .set autoextend:                       MIPS autoextend.     (line   6)
17972
* .set dsp:                              MIPS ASE instruction generation overrides.
17973
                                                              (line  21)
17974
* .set dspr2:                            MIPS ASE instruction generation overrides.
17975
                                                              (line  26)
17976
* .set hardfloat:                        MIPS floating-point. (line   6)
17977
* .set mdmx:                             MIPS ASE instruction generation overrides.
17978
                                                              (line  16)
17979
* .set mips3d:                           MIPS ASE instruction generation overrides.
17980
                                                              (line   6)
17981
* .set mipsN:                            MIPS ISA.            (line   6)
17982
* .set mt:                               MIPS ASE instruction generation overrides.
17983
                                                              (line  32)
17984
* .set noautoextend:                     MIPS autoextend.     (line   6)
17985
* .set nodsp:                            MIPS ASE instruction generation overrides.
17986
                                                              (line  21)
17987
* .set nodspr2:                          MIPS ASE instruction generation overrides.
17988
                                                              (line  26)
17989
* .set nomdmx:                           MIPS ASE instruction generation overrides.
17990
                                                              (line  16)
17991
* .set nomips3d:                         MIPS ASE instruction generation overrides.
17992
                                                              (line   6)
17993
* .set nomt:                             MIPS ASE instruction generation overrides.
17994
                                                              (line  32)
17995
* .set nosmartmips:                      MIPS ASE instruction generation overrides.
17996
                                                              (line  11)
17997
* .set nosym32:                          MIPS symbol sizes.   (line   6)
17998
* .set pop:                              MIPS option stack.   (line   6)
17999
* .set push:                             MIPS option stack.   (line   6)
18000
* .set smartmips:                        MIPS ASE instruction generation overrides.
18001
                                                              (line  11)
18002
* .set softfloat:                        MIPS floating-point. (line   6)
18003
* .set sym32:                            MIPS symbol sizes.   (line   6)
18004
* .setfp directive, ARM:                 ARM Directives.      (line 185)
18005
* .unwind_raw directive, ARM:            ARM Directives.      (line 199)
18006
* .v850 directive, V850:                 V850 Directives.     (line  14)
18007
* .v850e directive, V850:                V850 Directives.     (line  20)
18008
* .v850e1 directive, V850:               V850 Directives.     (line  26)
18009
* .vsave directive, ARM:                 ARM Directives.      (line 158)
18010
* .z8001:                                Z8000 Directives.    (line  11)
18011
* .z8002:                                Z8000 Directives.    (line  15)
18012
* 16-bit code, i386:                     i386-16bit.          (line   6)
18013
* 2byte directive, ARC:                  ARC Directives.      (line   9)
18014
* 3byte directive, ARC:                  ARC Directives.      (line  12)
18015
* 3DNow!, i386:                          i386-SIMD.           (line   6)
18016
* 3DNow!, x86-64:                        i386-SIMD.           (line   6)
18017
* 430 support:                           MSP430-Dependent.    (line   6)
18018
* 4byte directive, ARC:                  ARC Directives.      (line  15)
18019
* : (label):                             Statements.          (line  30)
18020
* @word modifier, D10V:                  D10V-Word.           (line   6)
18021
* \" (doublequote character):            Strings.             (line  43)
18022
* \\ (\ character):                      Strings.             (line  40)
18023
* \b (backspace character):              Strings.             (line  15)
18024
* \DDD (octal character code):           Strings.             (line  30)
18025
* \f (formfeed character):               Strings.             (line  18)
18026
* \n (newline character):                Strings.             (line  21)
18027
* \r (carriage return character):        Strings.             (line  24)
18028
* \t (tab):                              Strings.             (line  27)
18029
* \XD... (hex character code):           Strings.             (line  36)
18030
* _ opcode prefix:                       Xtensa Opcodes.      (line   9)
18031
* a.out:                                 Object.              (line   6)
18032
* a.out symbol attributes:               a.out Symbols.       (line   6)
18033
* A_DIR environment variable, TIC54X:    TIC54X-Env.          (line   6)
18034
* ABI options, SH64:                     SH64 Options.        (line  29)
18035
* ABORT directive:                       ABORT (COFF).        (line   6)
18036
* abort directive:                       Abort.               (line   6)
18037
* absolute section:                      Ld Sections.         (line  29)
18038
* absolute-literals directive:           Absolute Literals Directive.
18039
                                                              (line   6)
18040
* ADDI instructions, relaxation:         Xtensa Immediate Relaxation.
18041
                                                              (line  43)
18042
* addition, permitted arguments:         Infix Ops.           (line  44)
18043
* addresses:                             Expressions.         (line   6)
18044
* addresses, format of:                  Secs Background.     (line  68)
18045
* addressing modes, D10V:                D10V-Addressing.     (line   6)
18046
* addressing modes, D30V:                D30V-Addressing.     (line   6)
18047
* addressing modes, H8/300:              H8/300-Addressing.   (line   6)
18048
* addressing modes, M680x0:              M68K-Syntax.         (line  21)
18049
* addressing modes, M68HC11:             M68HC11-Syntax.      (line  17)
18050
* addressing modes, SH:                  SH-Addressing.       (line   6)
18051
* addressing modes, SH64:                SH64-Addressing.     (line   6)
18052
* addressing modes, Z8000:               Z8000-Addressing.    (line   6)
18053
* ADR reg,
18054
* ADRL reg,
18055
* advancing location counter:            Org.                 (line   6)
18056
* align directive:                       Align.               (line   6)
18057
* align directive, ARM:                  ARM Directives.      (line   6)
18058
* align directive, SPARC:                Sparc-Directives.    (line   9)
18059
* align directive, TIC54X:               TIC54X-Directives.   (line   6)
18060
* alignment of branch targets:           Xtensa Automatic Alignment.
18061
                                                              (line   6)
18062
* alignment of LOOP instructions:        Xtensa Automatic Alignment.
18063
                                                              (line   6)
18064
* Alpha floating point (IEEE):           Alpha Floating Point.
18065
                                                              (line   6)
18066
* Alpha line comment character:          Alpha-Chars.         (line   6)
18067
* Alpha line separator:                  Alpha-Chars.         (line   8)
18068
* Alpha notes:                           Alpha Notes.         (line   6)
18069
* Alpha options:                         Alpha Options.       (line   6)
18070
* Alpha registers:                       Alpha-Regs.          (line   6)
18071
* Alpha relocations:                     Alpha-Relocs.        (line   6)
18072
* Alpha support:                         Alpha-Dependent.     (line   6)
18073
* Alpha Syntax:                          Alpha Options.       (line  54)
18074
* Alpha-only directives:                 Alpha Directives.    (line  10)
18075
* altered difference tables:             Word.                (line  12)
18076
* alternate syntax for the 680x0:        M68K-Moto-Syntax.    (line   6)
18077
* ARC floating point (IEEE):             ARC Floating Point.  (line   6)
18078
* ARC machine directives:                ARC Directives.      (line   6)
18079
* ARC opcodes:                           ARC Opcodes.         (line   6)
18080
* ARC options (none):                    ARC Options.         (line   6)
18081
* ARC register names:                    ARC-Regs.            (line   6)
18082
* ARC special characters:                ARC-Chars.           (line   6)
18083
* ARC support:                           ARC-Dependent.       (line   6)
18084
* arc5 arc5, ARC:                        ARC Options.         (line  10)
18085
* arc6 arc6, ARC:                        ARC Options.         (line  13)
18086
* arc7 arc7, ARC:                        ARC Options.         (line  21)
18087
* arc8 arc8, ARC:                        ARC Options.         (line  24)
18088
* arch directive, i386:                  i386-Arch.           (line   6)
18089
* arch directive, M680x0:                M68K-Directives.     (line  22)
18090
* arch directive, x86-64:                i386-Arch.           (line   6)
18091
* architecture options, i960:            Options-i960.        (line   6)
18092
* architecture options, IP2022:          IP2K-Opts.           (line   9)
18093
* architecture options, IP2K:            IP2K-Opts.           (line  14)
18094
* architecture options, M16C:            M32C-Opts.           (line  12)
18095
* architecture options, M32C:            M32C-Opts.           (line   9)
18096
* architecture options, M32R:            M32R-Opts.           (line  21)
18097
* architecture options, M32R2:           M32R-Opts.           (line  17)
18098
* architecture options, M32RX:           M32R-Opts.           (line   9)
18099
* architecture options, M680x0:          M68K-Opts.           (line 104)
18100
* Architecture variant option, CRIS:     CRIS-Opts.           (line  33)
18101
* architectures, PowerPC:                PowerPC-Opts.        (line   6)
18102
* architectures, SPARC:                  Sparc-Opts.          (line   6)
18103
* arguments for addition:                Infix Ops.           (line  44)
18104
* arguments for subtraction:             Infix Ops.           (line  49)
18105
* arguments in expressions:              Arguments.           (line   6)
18106
* arithmetic functions:                  Operators.           (line   6)
18107
* arithmetic operands:                   Arguments.           (line   6)
18108
* ARM data relocations:                  ARM-Relocations.     (line   6)
18109
* arm directive, ARM:                    ARM Directives.      (line  60)
18110
* ARM floating point (IEEE):             ARM Floating Point.  (line   6)
18111
* ARM identifiers:                       ARM-Chars.           (line  15)
18112
* ARM immediate character:               ARM-Chars.           (line  13)
18113
* ARM line comment character:            ARM-Chars.           (line   6)
18114
* ARM line separator:                    ARM-Chars.           (line  10)
18115
* ARM machine directives:                ARM Directives.      (line   6)
18116
* ARM opcodes:                           ARM Opcodes.         (line   6)
18117
* ARM options (none):                    ARM Options.         (line   6)
18118
* ARM register names:                    ARM-Regs.            (line   6)
18119
* ARM support:                           ARM-Dependent.       (line   6)
18120
* ascii directive:                       Ascii.               (line   6)
18121
* asciz directive:                       Asciz.               (line   6)
18122
* asg directive, TIC54X:                 TIC54X-Directives.   (line  20)
18123
* assembler bugs, reporting:             Bug Reporting.       (line   6)
18124
* assembler crash:                       Bug Criteria.        (line   9)
18125
* assembler directive .arch, CRIS:       CRIS-Pseudos.        (line  45)
18126
* assembler directive .dword, CRIS:      CRIS-Pseudos.        (line  12)
18127
* assembler directive .far, M68HC11:     M68HC11-Directives.  (line  20)
18128
* assembler directive .interrupt, M68HC11: M68HC11-Directives.
18129
                                                              (line  26)
18130
* assembler directive .mode, M68HC11:    M68HC11-Directives.  (line  16)
18131
* assembler directive .relax, M68HC11:   M68HC11-Directives.  (line  10)
18132
* assembler directive .syntax, CRIS:     CRIS-Pseudos.        (line  17)
18133
* assembler directive .xrefb, M68HC11:   M68HC11-Directives.  (line  31)
18134
* assembler directive BSPEC, MMIX:       MMIX-Pseudos.        (line 131)
18135
* assembler directive BYTE, MMIX:        MMIX-Pseudos.        (line  97)
18136
* assembler directive ESPEC, MMIX:       MMIX-Pseudos.        (line 131)
18137
* assembler directive GREG, MMIX:        MMIX-Pseudos.        (line  50)
18138
* assembler directive IS, MMIX:          MMIX-Pseudos.        (line  42)
18139
* assembler directive LOC, MMIX:         MMIX-Pseudos.        (line   7)
18140
* assembler directive LOCAL, MMIX:       MMIX-Pseudos.        (line  28)
18141
* assembler directive OCTA, MMIX:        MMIX-Pseudos.        (line 108)
18142
* assembler directive PREFIX, MMIX:      MMIX-Pseudos.        (line 120)
18143
* assembler directive TETRA, MMIX:       MMIX-Pseudos.        (line 108)
18144
* assembler directive WYDE, MMIX:        MMIX-Pseudos.        (line 108)
18145
* assembler directives, CRIS:            CRIS-Pseudos.        (line   6)
18146
* assembler directives, M68HC11:         M68HC11-Directives.  (line   6)
18147
* assembler directives, M68HC12:         M68HC11-Directives.  (line   6)
18148
* assembler directives, MMIX:            MMIX-Pseudos.        (line   6)
18149
* assembler internal logic error:        As Sections.         (line  13)
18150
* assembler version:                     v.                   (line   6)
18151
* assembler, and linker:                 Secs Background.     (line  10)
18152
* assembly listings, enabling:           a.                   (line   6)
18153
* assigning values to symbols <1>:       Equ.                 (line   6)
18154
* assigning values to symbols:           Setting Symbols.     (line   6)
18155
* atmp directive, i860:                  Directives-i860.     (line  16)
18156
* att_syntax pseudo op, i386:            i386-Syntax.         (line   6)
18157
* att_syntax pseudo op, x86-64:          i386-Syntax.         (line   6)
18158
* attributes, symbol:                    Symbol Attributes.   (line   6)
18159
* auxiliary attributes, COFF symbols:    COFF Symbols.        (line  19)
18160
* auxiliary symbol information, COFF:    Dim.                 (line   6)
18161
* Av7:                                   Sparc-Opts.          (line  25)
18162
* AVR line comment character:            AVR-Chars.           (line   6)
18163
* AVR line separator:                    AVR-Chars.           (line  10)
18164
* AVR modifiers:                         AVR-Modifiers.       (line   6)
18165
* AVR opcode summary:                    AVR Opcodes.         (line   6)
18166
* AVR options (none):                    AVR Options.         (line   6)
18167
* AVR register names:                    AVR-Regs.            (line   6)
18168
* AVR support:                           AVR-Dependent.       (line   6)
18169
* backslash (\\):                        Strings.             (line  40)
18170
* backspace (\b):                        Strings.             (line  15)
18171
* balign directive:                      Balign.              (line   6)
18172
* balignl directive:                     Balign.              (line  27)
18173
* balignw directive:                     Balign.              (line  27)
18174
* bes directive, TIC54X:                 TIC54X-Directives.   (line 197)
18175
* BFIN directives:                       BFIN Directives.     (line   6)
18176
* BFIN syntax:                           BFIN Syntax.         (line   6)
18177
* big endian output, MIPS:               Overview.            (line 620)
18178
* big endian output, PJ:                 Overview.            (line 527)
18179
* big-endian output, MIPS:               MIPS Opts.           (line  13)
18180
* bignums:                               Bignums.             (line   6)
18181
* binary constants, TIC54X:              TIC54X-Constants.    (line   8)
18182
* binary files, including:               Incbin.              (line   6)
18183
* binary integers:                       Integers.            (line   6)
18184
* bit names, IA-64:                      IA-64-Bits.          (line   6)
18185
* bitfields, not supported on VAX:       VAX-no.              (line   6)
18186
* Blackfin support:                      BFIN-Dependent.      (line   6)
18187
* block:                                 Z8000 Directives.    (line  55)
18188
* branch improvement, M680x0:            M68K-Branch.         (line   6)
18189
* branch improvement, M68HC11:           M68HC11-Branch.      (line   6)
18190
* branch improvement, VAX:               VAX-branch.          (line   6)
18191
* branch instructions, relaxation:       Xtensa Branch Relaxation.
18192
                                                              (line   6)
18193
* branch recording, i960:                Options-i960.        (line  22)
18194
* branch statistics table, i960:         Options-i960.        (line  40)
18195
* branch target alignment:               Xtensa Automatic Alignment.
18196
                                                              (line   6)
18197
* break directive, TIC54X:               TIC54X-Directives.   (line 143)
18198
* BSD syntax:                            PDP-11-Syntax.       (line   6)
18199
* bss directive, i960:                   Directives-i960.     (line   6)
18200
* bss directive, TIC54X:                 TIC54X-Directives.   (line  29)
18201
* bss section <1>:                       bss.                 (line   6)
18202
* bss section:                           Ld Sections.         (line  20)
18203
* bug criteria:                          Bug Criteria.        (line   6)
18204
* bug reports:                           Bug Reporting.       (line   6)
18205
* bugs in assembler:                     Reporting Bugs.      (line   6)
18206
* Built-in symbols, CRIS:                CRIS-Symbols.        (line   6)
18207
* builtin math functions, TIC54X:        TIC54X-Builtins.     (line   6)
18208
* builtin subsym functions, TIC54X:      TIC54X-Macros.       (line  16)
18209
* bus lock prefixes, i386:               i386-Prefixes.       (line  36)
18210
* bval:                                  Z8000 Directives.    (line  30)
18211
* byte directive:                        Byte.                (line   6)
18212
* byte directive, TIC54X:                TIC54X-Directives.   (line  36)
18213
* C54XDSP_DIR environment variable, TIC54X: TIC54X-Env.       (line   6)
18214
* c_mode directive, TIC54X:              TIC54X-Directives.   (line  51)
18215
* call instructions, i386:               i386-Mnemonics.      (line  51)
18216
* call instructions, relaxation:         Xtensa Call Relaxation.
18217
                                                              (line   6)
18218
* call instructions, x86-64:             i386-Mnemonics.      (line  51)
18219
* callj, i960 pseudo-opcode:             callj-i960.          (line   6)
18220
* carriage return (\r):                  Strings.             (line  24)
18221
* case sensitivity, Z80:                 Z80-Case.            (line   6)
18222
* cfi_endproc directive:                 CFI directives.      (line  16)
18223
* cfi_startproc directive:               CFI directives.      (line   6)
18224
* char directive, TIC54X:                TIC54X-Directives.   (line  36)
18225
* character constant, Z80:               Z80-Chars.           (line  13)
18226
* character constants:                   Characters.          (line   6)
18227
* character escape codes:                Strings.             (line  15)
18228
* character escapes, Z80:                Z80-Chars.           (line  11)
18229
* character, single:                     Chars.               (line   6)
18230
* characters used in symbols:            Symbol Intro.        (line   6)
18231
* clink directive, TIC54X:               TIC54X-Directives.   (line  45)
18232
* code directive, ARM:                   ARM Directives.      (line  53)
18233
* code16 directive, i386:                i386-16bit.          (line   6)
18234
* code16gcc directive, i386:             i386-16bit.          (line   6)
18235
* code32 directive, i386:                i386-16bit.          (line   6)
18236
* code64 directive, i386:                i386-16bit.          (line   6)
18237
* code64 directive, x86-64:              i386-16bit.          (line   6)
18238
* COFF auxiliary symbol information:     Dim.                 (line   6)
18239
* COFF structure debugging:              Tag.                 (line   6)
18240
* COFF symbol attributes:                COFF Symbols.        (line   6)
18241
* COFF symbol descriptor:                Desc.                (line   6)
18242
* COFF symbol storage class:             Scl.                 (line   6)
18243
* COFF symbol type:                      Type.                (line  11)
18244
* COFF symbols, debugging:               Def.                 (line   6)
18245
* COFF value attribute:                  Val.                 (line   6)
18246
* COMDAT:                                Linkonce.            (line   6)
18247
* comm directive:                        Comm.                (line   6)
18248
* command line conventions:              Command Line.        (line   6)
18249
* command line options, V850:            V850 Options.        (line   9)
18250
* command-line options ignored, VAX:     VAX-Opts.            (line   6)
18251
* comments:                              Comments.            (line   6)
18252
* comments, M680x0:                      M68K-Chars.          (line   6)
18253
* comments, removed by preprocessor:     Preprocessing.       (line  11)
18254
* common directive, SPARC:               Sparc-Directives.    (line  12)
18255
* common sections:                       Linkonce.            (line   6)
18256
* common variable storage:               bss.                 (line   6)
18257
* compare and jump expansions, i960:     Compare-and-branch-i960.
18258
                                                              (line  13)
18259
* compare/branch instructions, i960:     Compare-and-branch-i960.
18260
                                                              (line   6)
18261
* comparison expressions:                Infix Ops.           (line  55)
18262
* conditional assembly:                  If.                  (line   6)
18263
* constant, single character:            Chars.               (line   6)
18264
* constants:                             Constants.           (line   6)
18265
* constants, bignum:                     Bignums.             (line   6)
18266
* constants, character:                  Characters.          (line   6)
18267
* constants, converted by preprocessor:  Preprocessing.       (line  14)
18268
* constants, floating point:             Flonums.             (line   6)
18269
* constants, integer:                    Integers.            (line   6)
18270
* constants, number:                     Numbers.             (line   6)
18271
* constants, Sparc:                      Sparc-Constants.     (line   6)
18272
* constants, string:                     Strings.             (line   6)
18273
* constants, TIC54X:                     TIC54X-Constants.    (line   6)
18274
* conversion instructions, i386:         i386-Mnemonics.      (line  32)
18275
* conversion instructions, x86-64:       i386-Mnemonics.      (line  32)
18276
* coprocessor wait, i386:                i386-Prefixes.       (line  40)
18277
* copy directive, TIC54X:                TIC54X-Directives.   (line  54)
18278
* cpu directive, M680x0:                 M68K-Directives.     (line  30)
18279
* CR16 Operand Qualifiers:               CR16 Operand Qualifiers.
18280
                                                              (line   6)
18281
* CR16 support:                          CR16-Dependent.      (line   6)
18282
* crash of assembler:                    Bug Criteria.        (line   9)
18283
* CRIS --emulation=crisaout command line option: CRIS-Opts.   (line   9)
18284
* CRIS --emulation=criself command line option: CRIS-Opts.    (line   9)
18285
* CRIS --march=ARCHITECTURE command line option: CRIS-Opts.   (line  33)
18286
* CRIS --mul-bug-abort command line option: CRIS-Opts.        (line  61)
18287
* CRIS --no-mul-bug-abort command line option: CRIS-Opts.     (line  61)
18288
* CRIS --no-underscore command line option: CRIS-Opts.        (line  15)
18289
* CRIS --pic command line option:        CRIS-Opts.           (line  27)
18290
* CRIS --underscore command line option: CRIS-Opts.           (line  15)
18291
* CRIS -N command line option:           CRIS-Opts.           (line  57)
18292
* CRIS architecture variant option:      CRIS-Opts.           (line  33)
18293
* CRIS assembler directive .arch:        CRIS-Pseudos.        (line  45)
18294
* CRIS assembler directive .dword:       CRIS-Pseudos.        (line  12)
18295
* CRIS assembler directive .syntax:      CRIS-Pseudos.        (line  17)
18296
* CRIS assembler directives:             CRIS-Pseudos.        (line   6)
18297
* CRIS built-in symbols:                 CRIS-Symbols.        (line   6)
18298
* CRIS instruction expansion:            CRIS-Expand.         (line   6)
18299
* CRIS line comment characters:          CRIS-Chars.          (line   6)
18300
* CRIS options:                          CRIS-Opts.           (line   6)
18301
* CRIS position-independent code:        CRIS-Opts.           (line  27)
18302
* CRIS pseudo-op .arch:                  CRIS-Pseudos.        (line  45)
18303
* CRIS pseudo-op .dword:                 CRIS-Pseudos.        (line  12)
18304
* CRIS pseudo-op .syntax:                CRIS-Pseudos.        (line  17)
18305
* CRIS pseudo-ops:                       CRIS-Pseudos.        (line   6)
18306
* CRIS register names:                   CRIS-Regs.           (line   6)
18307
* CRIS support:                          CRIS-Dependent.      (line   6)
18308
* CRIS symbols in position-independent code: CRIS-Pic.        (line   6)
18309
* ctbp register, V850:                   V850-Regs.           (line 131)
18310
* ctoff pseudo-op, V850:                 V850 Opcodes.        (line 111)
18311
* ctpc register, V850:                   V850-Regs.           (line 119)
18312
* ctpsw register, V850:                  V850-Regs.           (line 122)
18313
* current address:                       Dot.                 (line   6)
18314
* current address, advancing:            Org.                 (line   6)
18315
* D10V @word modifier:                   D10V-Word.           (line   6)
18316
* D10V addressing modes:                 D10V-Addressing.     (line   6)
18317
* D10V floating point:                   D10V-Float.          (line   6)
18318
* D10V line comment character:           D10V-Chars.          (line   6)
18319
* D10V opcode summary:                   D10V-Opcodes.        (line   6)
18320
* D10V optimization:                     Overview.            (line 405)
18321
* D10V options:                          D10V-Opts.           (line   6)
18322
* D10V registers:                        D10V-Regs.           (line   6)
18323
* D10V size modifiers:                   D10V-Size.           (line   6)
18324
* D10V sub-instruction ordering:         D10V-Chars.          (line   6)
18325
* D10V sub-instructions:                 D10V-Subs.           (line   6)
18326
* D10V support:                          D10V-Dependent.      (line   6)
18327
* D10V syntax:                           D10V-Syntax.         (line   6)
18328
* D30V addressing modes:                 D30V-Addressing.     (line   6)
18329
* D30V floating point:                   D30V-Float.          (line   6)
18330
* D30V Guarded Execution:                D30V-Guarded.        (line   6)
18331
* D30V line comment character:           D30V-Chars.          (line   6)
18332
* D30V nops:                             Overview.            (line 413)
18333
* D30V nops after 32-bit multiply:       Overview.            (line 416)
18334
* D30V opcode summary:                   D30V-Opcodes.        (line   6)
18335
* D30V optimization:                     Overview.            (line 410)
18336
* D30V options:                          D30V-Opts.           (line   6)
18337
* D30V registers:                        D30V-Regs.           (line   6)
18338
* D30V size modifiers:                   D30V-Size.           (line   6)
18339
* D30V sub-instruction ordering:         D30V-Chars.          (line   6)
18340
* D30V sub-instructions:                 D30V-Subs.           (line   6)
18341
* D30V support:                          D30V-Dependent.      (line   6)
18342
* D30V syntax:                           D30V-Syntax.         (line   6)
18343
* data alignment on SPARC:               Sparc-Aligned-Data.  (line   6)
18344
* data and text sections, joining:       R.                   (line   6)
18345
* data directive:                        Data.                (line   6)
18346
* data directive, TIC54X:                TIC54X-Directives.   (line  61)
18347
* data relocations, ARM:                 ARM-Relocations.     (line   6)
18348
* data section:                          Ld Sections.         (line   9)
18349
* data1 directive, M680x0:               M68K-Directives.     (line   9)
18350
* data2 directive, M680x0:               M68K-Directives.     (line  12)
18351
* datalabel, SH64:                       SH64-Addressing.     (line  16)
18352
* dbpc register, V850:                   V850-Regs.           (line 125)
18353
* dbpsw register, V850:                  V850-Regs.           (line 128)
18354
* debuggers, and symbol order:           Symbols.             (line  10)
18355
* debugging COFF symbols:                Def.                 (line   6)
18356
* DEC syntax:                            PDP-11-Syntax.       (line   6)
18357
* decimal integers:                      Integers.            (line  12)
18358
* def directive:                         Def.                 (line   6)
18359
* def directive, TIC54X:                 TIC54X-Directives.   (line 103)
18360
* density instructions:                  Density Instructions.
18361
                                                              (line   6)
18362
* dependency tracking:                   MD.                  (line   6)
18363
* deprecated directives:                 Deprecated.          (line   6)
18364
* desc directive:                        Desc.                (line   6)
18365
* descriptor, of a.out symbol:           Symbol Desc.         (line   6)
18366
* dfloat directive, VAX:                 VAX-directives.      (line  10)
18367
* difference tables altered:             Word.                (line  12)
18368
* difference tables, warning:            K.                   (line   6)
18369
* differences, mmixal:                   MMIX-mmixal.         (line   6)
18370
* dim directive:                         Dim.                 (line   6)
18371
* directives and instructions:           Statements.          (line  19)
18372
* directives for PowerPC:                PowerPC-Pseudo.      (line   6)
18373
* directives, BFIN:                      BFIN Directives.     (line   6)
18374
* directives, M32R:                      M32R-Directives.     (line   6)
18375
* directives, M680x0:                    M68K-Directives.     (line   6)
18376
* directives, machine independent:       Pseudo Ops.          (line   6)
18377
* directives, Xtensa:                    Xtensa Directives.   (line   6)
18378
* directives, Z8000:                     Z8000 Directives.    (line   6)
18379
* Disable floating-point instructions:   MIPS floating-point. (line   6)
18380
* Disable single-precision floating-point operations: MIPS floating-point.
18381
                                                              (line  12)
18382
* displacement sizing character, VAX:    VAX-operands.        (line  12)
18383
* dn and qn directives, ARM:             ARM Directives.      (line  29)
18384
* dollar local symbols:                  Symbol Names.        (line 105)
18385
* dot (symbol):                          Dot.                 (line   6)
18386
* double directive:                      Double.              (line   6)
18387
* double directive, i386:                i386-Float.          (line  14)
18388
* double directive, M680x0:              M68K-Float.          (line  14)
18389
* double directive, M68HC11:             M68HC11-Float.       (line  14)
18390
* double directive, TIC54X:              TIC54X-Directives.   (line  64)
18391
* double directive, VAX:                 VAX-float.           (line  15)
18392
* double directive, x86-64:              i386-Float.          (line  14)
18393
* doublequote (\"):                      Strings.             (line  43)
18394
* drlist directive, TIC54X:              TIC54X-Directives.   (line  73)
18395
* drnolist directive, TIC54X:            TIC54X-Directives.   (line  73)
18396
* dual directive, i860:                  Directives-i860.     (line   6)
18397
* ECOFF sections:                        MIPS Object.         (line   6)
18398
* ecr register, V850:                    V850-Regs.           (line 113)
18399
* eight-byte integer:                    Quad.                (line   9)
18400
* eipc register, V850:                   V850-Regs.           (line 101)
18401
* eipsw register, V850:                  V850-Regs.           (line 104)
18402
* eject directive:                       Eject.               (line   6)
18403
* ELF symbol type:                       Type.                (line  22)
18404
* else directive:                        Else.                (line   6)
18405
* elseif directive:                      Elseif.              (line   6)
18406
* empty expressions:                     Empty Exprs.         (line   6)
18407
* emsg directive, TIC54X:                TIC54X-Directives.   (line  77)
18408
* emulation:                             Overview.            (line 723)
18409
* end directive:                         End.                 (line   6)
18410
* enddual directive, i860:               Directives-i860.     (line  11)
18411
* endef directive:                       Endef.               (line   6)
18412
* endfunc directive:                     Endfunc.             (line   6)
18413
* endianness, MIPS:                      Overview.            (line 620)
18414
* endianness, PJ:                        Overview.            (line 527)
18415
* endif directive:                       Endif.               (line   6)
18416
* endloop directive, TIC54X:             TIC54X-Directives.   (line 143)
18417
* endm directive:                        Macro.               (line 138)
18418
* endm directive, TIC54X:                TIC54X-Directives.   (line 153)
18419
* endstruct directive, TIC54X:           TIC54X-Directives.   (line 217)
18420
* endunion directive, TIC54X:            TIC54X-Directives.   (line 251)
18421
* environment settings, TIC54X:          TIC54X-Env.          (line   6)
18422
* EOF, newline must precede:             Statements.          (line  13)
18423
* ep register, V850:                     V850-Regs.           (line  95)
18424
* equ directive:                         Equ.                 (line   6)
18425
* equ directive, TIC54X:                 TIC54X-Directives.   (line 192)
18426
* equiv directive:                       Equiv.               (line   6)
18427
* eqv directive:                         Eqv.                 (line   6)
18428
* err directive:                         Err.                 (line   6)
18429
* error directive:                       Error.               (line   6)
18430
* error messages:                        Errors.              (line   6)
18431
* error on valid input:                  Bug Criteria.        (line  12)
18432
* errors, caused by warnings:            W.                   (line  16)
18433
* errors, continuing after:              Z.                   (line   6)
18434
* ESA/390 floating point (IEEE):         ESA/390 Floating Point.
18435
                                                              (line   6)
18436
* ESA/390 support:                       ESA/390-Dependent.   (line   6)
18437
* ESA/390 Syntax:                        ESA/390 Options.     (line   8)
18438
* ESA/390-only directives:               ESA/390 Directives.  (line  12)
18439
* escape codes, character:               Strings.             (line  15)
18440
* eval directive, TIC54X:                TIC54X-Directives.   (line  24)
18441
* even:                                  Z8000 Directives.    (line  58)
18442
* even directive, M680x0:                M68K-Directives.     (line  15)
18443
* even directive, TIC54X:                TIC54X-Directives.   (line   6)
18444
* exitm directive:                       Macro.               (line 141)
18445
* expr (internal section):               As Sections.         (line  17)
18446
* expression arguments:                  Arguments.           (line   6)
18447
* expressions:                           Expressions.         (line   6)
18448
* expressions, comparison:               Infix Ops.           (line  55)
18449
* expressions, empty:                    Empty Exprs.         (line   6)
18450
* expressions, integer:                  Integer Exprs.       (line   6)
18451
* extAuxRegister directive, ARC:         ARC Directives.      (line  18)
18452
* extCondCode directive, ARC:            ARC Directives.      (line  41)
18453
* extCoreRegister directive, ARC:        ARC Directives.      (line  53)
18454
* extend directive M680x0:               M68K-Float.          (line  17)
18455
* extend directive M68HC11:              M68HC11-Float.       (line  17)
18456
* extended directive, i960:              Directives-i960.     (line  13)
18457
* extern directive:                      Extern.              (line   6)
18458
* extInstruction directive, ARC:         ARC Directives.      (line  78)
18459
* fail directive:                        Fail.                (line   6)
18460
* far_mode directive, TIC54X:            TIC54X-Directives.   (line  82)
18461
* faster processing (-f):                f.                   (line   6)
18462
* fatal signal:                          Bug Criteria.        (line   9)
18463
* fclist directive, TIC54X:              TIC54X-Directives.   (line  87)
18464
* fcnolist directive, TIC54X:            TIC54X-Directives.   (line  87)
18465
* fepc register, V850:                   V850-Regs.           (line 107)
18466
* fepsw register, V850:                  V850-Regs.           (line 110)
18467
* ffloat directive, VAX:                 VAX-directives.      (line  14)
18468
* field directive, TIC54X:               TIC54X-Directives.   (line  91)
18469
* file directive <1>:                    File.                (line   6)
18470
* file directive:                        LNS directives.      (line   6)
18471
* file directive, MSP 430:               MSP430 Directives.   (line   6)
18472
* file name, logical:                    File.                (line   6)
18473
* files, including:                      Include.             (line   6)
18474
* files, input:                          Input Files.         (line   6)
18475
* fill directive:                        Fill.                (line   6)
18476
* filling memory <1>:                    Space.               (line   6)
18477
* filling memory:                        Skip.                (line   6)
18478
* FLIX syntax:                           Xtensa Syntax.       (line   6)
18479
* float directive:                       Float.               (line   6)
18480
* float directive, i386:                 i386-Float.          (line  14)
18481
* float directive, M680x0:               M68K-Float.          (line  11)
18482
* float directive, M68HC11:              M68HC11-Float.       (line  11)
18483
* float directive, TIC54X:               TIC54X-Directives.   (line  64)
18484
* float directive, VAX:                  VAX-float.           (line  15)
18485
* float directive, x86-64:               i386-Float.          (line  14)
18486
* floating point numbers:                Flonums.             (line   6)
18487
* floating point numbers (double):       Double.              (line   6)
18488
* floating point numbers (single) <1>:   Single.              (line   6)
18489
* floating point numbers (single):       Float.               (line   6)
18490
* floating point, Alpha (IEEE):          Alpha Floating Point.
18491
                                                              (line   6)
18492
* floating point, ARC (IEEE):            ARC Floating Point.  (line   6)
18493
* floating point, ARM (IEEE):            ARM Floating Point.  (line   6)
18494
* floating point, D10V:                  D10V-Float.          (line   6)
18495
* floating point, D30V:                  D30V-Float.          (line   6)
18496
* floating point, ESA/390 (IEEE):        ESA/390 Floating Point.
18497
                                                              (line   6)
18498
* floating point, H8/300 (IEEE):         H8/300 Floating Point.
18499
                                                              (line   6)
18500
* floating point, HPPA (IEEE):           HPPA Floating Point. (line   6)
18501
* floating point, i386:                  i386-Float.          (line   6)
18502
* floating point, i960 (IEEE):           Floating Point-i960. (line   6)
18503
* floating point, M680x0:                M68K-Float.          (line   6)
18504
* floating point, M68HC11:               M68HC11-Float.       (line   6)
18505
* floating point, MSP 430 (IEEE):        MSP430 Floating Point.
18506
                                                              (line   6)
18507
* floating point, SH (IEEE):             SH Floating Point.   (line   6)
18508
* floating point, SPARC (IEEE):          Sparc-Float.         (line   6)
18509
* floating point, V850 (IEEE):           V850 Floating Point. (line   6)
18510
* floating point, VAX:                   VAX-float.           (line   6)
18511
* floating point, x86-64:                i386-Float.          (line   6)
18512
* floating point, Z80:                   Z80 Floating Point.  (line   6)
18513
* flonums:                               Flonums.             (line   6)
18514
* force_thumb directive, ARM:            ARM Directives.      (line  63)
18515
* format of error messages:              Errors.              (line  24)
18516
* format of warning messages:            Errors.              (line  12)
18517
* formfeed (\f):                         Strings.             (line  18)
18518
* func directive:                        Func.                (line   6)
18519
* functions, in expressions:             Operators.           (line   6)
18520
* gbr960, i960 postprocessor:            Options-i960.        (line  40)
18521
* gfloat directive, VAX:                 VAX-directives.      (line  18)
18522
* global:                                Z8000 Directives.    (line  21)
18523
* global directive:                      Global.              (line   6)
18524
* global directive, TIC54X:              TIC54X-Directives.   (line 103)
18525
* gp register, MIPS:                     MIPS Object.         (line  11)
18526
* gp register, V850:                     V850-Regs.           (line  17)
18527
* grouping data:                         Sub-Sections.        (line   6)
18528
* H8/300 addressing modes:               H8/300-Addressing.   (line   6)
18529
* H8/300 floating point (IEEE):          H8/300 Floating Point.
18530
                                                              (line   6)
18531
* H8/300 line comment character:         H8/300-Chars.        (line   6)
18532
* H8/300 line separator:                 H8/300-Chars.        (line   8)
18533
* H8/300 machine directives (none):      H8/300 Directives.   (line   6)
18534
* H8/300 opcode summary:                 H8/300 Opcodes.      (line   6)
18535
* H8/300 options (none):                 H8/300 Options.      (line   6)
18536
* H8/300 registers:                      H8/300-Regs.         (line   6)
18537
* H8/300 size suffixes:                  H8/300 Opcodes.      (line 163)
18538
* H8/300 support:                        H8/300-Dependent.    (line   6)
18539
* H8/300H, assembling for:               H8/300 Directives.   (line   8)
18540
* half directive, ARC:                   ARC Directives.      (line 156)
18541
* half directive, SPARC:                 Sparc-Directives.    (line  17)
18542
* half directive, TIC54X:                TIC54X-Directives.   (line 111)
18543
* hex character code (\XD...):           Strings.             (line  36)
18544
* hexadecimal integers:                  Integers.            (line  15)
18545
* hexadecimal prefix, Z80:               Z80-Chars.           (line   8)
18546
* hfloat directive, VAX:                 VAX-directives.      (line  22)
18547
* hi pseudo-op, V850:                    V850 Opcodes.        (line  33)
18548
* hi0 pseudo-op, V850:                   V850 Opcodes.        (line  10)
18549
* hidden directive:                      Hidden.              (line   6)
18550
* high directive, M32R:                  M32R-Directives.     (line  18)
18551
* hilo pseudo-op, V850:                  V850 Opcodes.        (line  55)
18552
* HPPA directives not supported:         HPPA Directives.     (line  11)
18553
* HPPA floating point (IEEE):            HPPA Floating Point. (line   6)
18554
* HPPA Syntax:                           HPPA Options.        (line   8)
18555
* HPPA-only directives:                  HPPA Directives.     (line  24)
18556
* hword directive:                       hword.               (line   6)
18557
* i370 support:                          ESA/390-Dependent.   (line   6)
18558
* i386 16-bit code:                      i386-16bit.          (line   6)
18559
* i386 arch directive:                   i386-Arch.           (line   6)
18560
* i386 att_syntax pseudo op:             i386-Syntax.         (line   6)
18561
* i386 conversion instructions:          i386-Mnemonics.      (line  32)
18562
* i386 floating point:                   i386-Float.          (line   6)
18563
* i386 immediate operands:               i386-Syntax.         (line  15)
18564
* i386 instruction naming:               i386-Mnemonics.      (line   6)
18565
* i386 instruction prefixes:             i386-Prefixes.       (line   6)
18566
* i386 intel_syntax pseudo op:           i386-Syntax.         (line   6)
18567
* i386 jump optimization:                i386-Jumps.          (line   6)
18568
* i386 jump, call, return:               i386-Syntax.         (line  38)
18569
* i386 jump/call operands:               i386-Syntax.         (line  15)
18570
* i386 memory references:                i386-Memory.         (line   6)
18571
* i386 mnemonic compatibility:           i386-Mnemonics.      (line  57)
18572
* i386 mul, imul instructions:           i386-Notes.          (line   6)
18573
* i386 options:                          i386-Options.        (line   6)
18574
* i386 register operands:                i386-Syntax.         (line  15)
18575
* i386 registers:                        i386-Regs.           (line   6)
18576
* i386 sections:                         i386-Syntax.         (line  44)
18577
* i386 size suffixes:                    i386-Syntax.         (line  29)
18578
* i386 source, destination operands:     i386-Syntax.         (line  22)
18579
* i386 support:                          i386-Dependent.      (line   6)
18580
* i386 syntax compatibility:             i386-Syntax.         (line   6)
18581
* i80306 support:                        i386-Dependent.      (line   6)
18582
* i860 machine directives:               Directives-i860.     (line   6)
18583
* i860 opcodes:                          Opcodes for i860.    (line   6)
18584
* i860 support:                          i860-Dependent.      (line   6)
18585
* i960 architecture options:             Options-i960.        (line   6)
18586
* i960 branch recording:                 Options-i960.        (line  22)
18587
* i960 callj pseudo-opcode:              callj-i960.          (line   6)
18588
* i960 compare and jump expansions:      Compare-and-branch-i960.
18589
                                                              (line  13)
18590
* i960 compare/branch instructions:      Compare-and-branch-i960.
18591
                                                              (line   6)
18592
* i960 floating point (IEEE):            Floating Point-i960. (line   6)
18593
* i960 machine directives:               Directives-i960.     (line   6)
18594
* i960 opcodes:                          Opcodes for i960.    (line   6)
18595
* i960 options:                          Options-i960.        (line   6)
18596
* i960 support:                          i960-Dependent.      (line   6)
18597
* IA-64 line comment character:          IA-64-Chars.         (line   6)
18598
* IA-64 line separator:                  IA-64-Chars.         (line   8)
18599
* IA-64 options:                         IA-64 Options.       (line   6)
18600
* IA-64 Processor-status-Register bit names: IA-64-Bits.      (line   6)
18601
* IA-64 registers:                       IA-64-Regs.          (line   6)
18602
* IA-64 support:                         IA-64-Dependent.     (line   6)
18603
* IA-64 Syntax:                          IA-64 Options.       (line  96)
18604
* ident directive:                       Ident.               (line   6)
18605
* identifiers, ARM:                      ARM-Chars.           (line  15)
18606
* identifiers, MSP 430:                  MSP430-Chars.        (line   8)
18607
* if directive:                          If.                  (line   6)
18608
* ifb directive:                         If.                  (line  21)
18609
* ifc directive:                         If.                  (line  25)
18610
* ifdef directive:                       If.                  (line  16)
18611
* ifeq directive:                        If.                  (line  33)
18612
* ifeqs directive:                       If.                  (line  36)
18613
* ifge directive:                        If.                  (line  40)
18614
* ifgt directive:                        If.                  (line  44)
18615
* ifle directive:                        If.                  (line  48)
18616
* iflt directive:                        If.                  (line  52)
18617
* ifnb directive:                        If.                  (line  56)
18618
* ifnc directive:                        If.                  (line  61)
18619
* ifndef directive:                      If.                  (line  65)
18620
* ifne directive:                        If.                  (line  72)
18621
* ifnes directive:                       If.                  (line  76)
18622
* ifnotdef directive:                    If.                  (line  65)
18623
* immediate character, ARM:              ARM-Chars.           (line  13)
18624
* immediate character, M680x0:           M68K-Chars.          (line   6)
18625
* immediate character, VAX:              VAX-operands.        (line   6)
18626
* immediate fields, relaxation:          Xtensa Immediate Relaxation.
18627
                                                              (line   6)
18628
* immediate operands, i386:              i386-Syntax.         (line  15)
18629
* immediate operands, x86-64:            i386-Syntax.         (line  15)
18630
* imul instruction, i386:                i386-Notes.          (line   6)
18631
* imul instruction, x86-64:              i386-Notes.          (line   6)
18632
* incbin directive:                      Incbin.              (line   6)
18633
* include directive:                     Include.             (line   6)
18634
* include directive search path:         I.                   (line   6)
18635
* indirect character, VAX:               VAX-operands.        (line   9)
18636
* infix operators:                       Infix Ops.           (line   6)
18637
* inhibiting interrupts, i386:           i386-Prefixes.       (line  36)
18638
* input:                                 Input Files.         (line   6)
18639
* input file linenumbers:                Input Files.         (line  35)
18640
* instruction expansion, CRIS:           CRIS-Expand.         (line   6)
18641
* instruction expansion, MMIX:           MMIX-Expand.         (line   6)
18642
* instruction naming, i386:              i386-Mnemonics.      (line   6)
18643
* instruction naming, x86-64:            i386-Mnemonics.      (line   6)
18644
* instruction prefixes, i386:            i386-Prefixes.       (line   6)
18645
* instruction set, M680x0:               M68K-opcodes.        (line   6)
18646
* instruction set, M68HC11:              M68HC11-opcodes.     (line   6)
18647
* instruction summary, AVR:              AVR Opcodes.         (line   6)
18648
* instruction summary, D10V:             D10V-Opcodes.        (line   6)
18649
* instruction summary, D30V:             D30V-Opcodes.        (line   6)
18650
* instruction summary, H8/300:           H8/300 Opcodes.      (line   6)
18651
* instruction summary, SH:               SH Opcodes.          (line   6)
18652
* instruction summary, SH64:             SH64 Opcodes.        (line   6)
18653
* instruction summary, Z8000:            Z8000 Opcodes.       (line   6)
18654
* instructions and directives:           Statements.          (line  19)
18655
* int directive:                         Int.                 (line   6)
18656
* int directive, H8/300:                 H8/300 Directives.   (line   6)
18657
* int directive, i386:                   i386-Float.          (line  21)
18658
* int directive, TIC54X:                 TIC54X-Directives.   (line 111)
18659
* int directive, x86-64:                 i386-Float.          (line  21)
18660
* integer expressions:                   Integer Exprs.       (line   6)
18661
* integer, 16-byte:                      Octa.                (line   6)
18662
* integer, 8-byte:                       Quad.                (line   9)
18663
* integers:                              Integers.            (line   6)
18664
* integers, 16-bit:                      hword.               (line   6)
18665
* integers, 32-bit:                      Int.                 (line   6)
18666
* integers, binary:                      Integers.            (line   6)
18667
* integers, decimal:                     Integers.            (line  12)
18668
* integers, hexadecimal:                 Integers.            (line  15)
18669
* integers, octal:                       Integers.            (line   9)
18670
* integers, one byte:                    Byte.                (line   6)
18671
* intel_syntax pseudo op, i386:          i386-Syntax.         (line   6)
18672
* intel_syntax pseudo op, x86-64:        i386-Syntax.         (line   6)
18673
* internal assembler sections:           As Sections.         (line   6)
18674
* internal directive:                    Internal.            (line   6)
18675
* invalid input:                         Bug Criteria.        (line  14)
18676
* invocation summary:                    Overview.            (line   6)
18677
* IP2K architecture options:             IP2K-Opts.           (line   9)
18678
* IP2K options:                          IP2K-Opts.           (line   6)
18679
* IP2K support:                          IP2K-Dependent.      (line   6)
18680
* irp directive:                         Irp.                 (line   6)
18681
* irpc directive:                        Irpc.                (line   6)
18682
* ISA options, SH64:                     SH64 Options.        (line   6)
18683
* joining text and data sections:        R.                   (line   6)
18684
* jump instructions, i386:               i386-Mnemonics.      (line  51)
18685
* jump instructions, x86-64:             i386-Mnemonics.      (line  51)
18686
* jump optimization, i386:               i386-Jumps.          (line   6)
18687
* jump optimization, x86-64:             i386-Jumps.          (line   6)
18688
* jump/call operands, i386:              i386-Syntax.         (line  15)
18689
* jump/call operands, x86-64:            i386-Syntax.         (line  15)
18690
* L16SI instructions, relaxation:        Xtensa Immediate Relaxation.
18691
                                                              (line  23)
18692
* L16UI instructions, relaxation:        Xtensa Immediate Relaxation.
18693
                                                              (line  23)
18694
* L32I instructions, relaxation:         Xtensa Immediate Relaxation.
18695
                                                              (line  23)
18696
* L8UI instructions, relaxation:         Xtensa Immediate Relaxation.
18697
                                                              (line  23)
18698
* label (:):                             Statements.          (line  30)
18699
* label directive, TIC54X:               TIC54X-Directives.   (line 123)
18700
* labels:                                Labels.              (line   6)
18701
* lcomm directive:                       Lcomm.               (line   6)
18702
* ld:                                    Object.              (line  15)
18703
* ldouble directive M680x0:              M68K-Float.          (line  17)
18704
* ldouble directive M68HC11:             M68HC11-Float.       (line  17)
18705
* ldouble directive, TIC54X:             TIC54X-Directives.   (line  64)
18706
* LDR reg,=
18707
* leafproc directive, i960:              Directives-i960.     (line  18)
18708
* length directive, TIC54X:              TIC54X-Directives.   (line 127)
18709
* length of symbols:                     Symbol Intro.        (line  14)
18710
* lflags directive (ignored):            Lflags.              (line   6)
18711
* line comment character:                Comments.            (line  19)
18712
* line comment character, Alpha:         Alpha-Chars.         (line   6)
18713
* line comment character, ARM:           ARM-Chars.           (line   6)
18714
* line comment character, AVR:           AVR-Chars.           (line   6)
18715
* line comment character, D10V:          D10V-Chars.          (line   6)
18716
* line comment character, D30V:          D30V-Chars.          (line   6)
18717
* line comment character, H8/300:        H8/300-Chars.        (line   6)
18718
* line comment character, IA-64:         IA-64-Chars.         (line   6)
18719
* line comment character, M680x0:        M68K-Chars.          (line   6)
18720
* line comment character, MSP 430:       MSP430-Chars.        (line   6)
18721
* line comment character, SH:            SH-Chars.            (line   6)
18722
* line comment character, SH64:          SH64-Chars.          (line   6)
18723
* line comment character, Sparc:         Sparc-Chars.         (line   6)
18724
* line comment character, V850:          V850-Chars.          (line   6)
18725
* line comment character, Z80:           Z80-Chars.           (line   6)
18726
* line comment character, Z8000:         Z8000-Chars.         (line   6)
18727
* line comment characters, CRIS:         CRIS-Chars.          (line   6)
18728
* line comment characters, MMIX:         MMIX-Chars.          (line   6)
18729
* line directive:                        Line.                (line   6)
18730
* line directive, MSP 430:               MSP430 Directives.   (line  14)
18731
* line numbers, in input files:          Input Files.         (line  35)
18732
* line numbers, in warnings/errors:      Errors.              (line  16)
18733
* line separator character:              Statements.          (line   6)
18734
* line separator, Alpha:                 Alpha-Chars.         (line   8)
18735
* line separator, ARM:                   ARM-Chars.           (line  10)
18736
* line separator, AVR:                   AVR-Chars.           (line  10)
18737
* line separator, H8/300:                H8/300-Chars.        (line   8)
18738
* line separator, IA-64:                 IA-64-Chars.         (line   8)
18739
* line separator, SH:                    SH-Chars.            (line   8)
18740
* line separator, SH64:                  SH64-Chars.          (line   8)
18741
* line separator, Sparc:                 Sparc-Chars.         (line   8)
18742
* line separator, Z8000:                 Z8000-Chars.         (line   8)
18743
* lines starting with #:                 Comments.            (line  38)
18744
* linker:                                Object.              (line  15)
18745
* linker, and assembler:                 Secs Background.     (line  10)
18746
* linkonce directive:                    Linkonce.            (line   6)
18747
* list directive:                        List.                (line   6)
18748
* list directive, TIC54X:                TIC54X-Directives.   (line 131)
18749
* listing control, turning off:          Nolist.              (line   6)
18750
* listing control, turning on:           List.                (line   6)
18751
* listing control: new page:             Eject.               (line   6)
18752
* listing control: paper size:           Psize.               (line   6)
18753
* listing control: subtitle:             Sbttl.               (line   6)
18754
* listing control: title line:           Title.               (line   6)
18755
* listings, enabling:                    a.                   (line   6)
18756
* literal directive:                     Literal Directive.   (line   6)
18757
* literal_position directive:            Literal Position Directive.
18758
                                                              (line   6)
18759
* literal_prefix directive:              Literal Prefix Directive.
18760
                                                              (line   6)
18761
* little endian output, MIPS:            Overview.            (line 623)
18762
* little endian output, PJ:              Overview.            (line 530)
18763
* little-endian output, MIPS:            MIPS Opts.           (line  13)
18764
* ln directive:                          Ln.                  (line   6)
18765
* lo pseudo-op, V850:                    V850 Opcodes.        (line  22)
18766
* loc directive:                         LNS directives.      (line  19)
18767
* loc_mark_labels directive:             LNS directives.      (line  50)
18768
* local common symbols:                  Lcomm.               (line   6)
18769
* local labels:                          Symbol Names.        (line  35)
18770
* local symbol names:                    Symbol Names.        (line  22)
18771
* local symbols, retaining in output:    L.                   (line   6)
18772
* location counter:                      Dot.                 (line   6)
18773
* location counter, advancing:           Org.                 (line   6)
18774
* location counter, Z80:                 Z80-Chars.           (line   8)
18775
* logical file name:                     File.                (line   6)
18776
* logical line number:                   Line.                (line   6)
18777
* logical line numbers:                  Comments.            (line  38)
18778
* long directive:                        Long.                (line   6)
18779
* long directive, ARC:                   ARC Directives.      (line 159)
18780
* long directive, i386:                  i386-Float.          (line  21)
18781
* long directive, TIC54X:                TIC54X-Directives.   (line 135)
18782
* long directive, x86-64:                i386-Float.          (line  21)
18783
* longcall pseudo-op, V850:              V850 Opcodes.        (line 123)
18784
* longcalls directive:                   Longcalls Directive. (line   6)
18785
* longjump pseudo-op, V850:              V850 Opcodes.        (line 129)
18786
* loop directive, TIC54X:                TIC54X-Directives.   (line 143)
18787
* LOOP instructions, alignment:          Xtensa Automatic Alignment.
18788
                                                              (line   6)
18789
* low directive, M32R:                   M32R-Directives.     (line   9)
18790
* lp register, V850:                     V850-Regs.           (line  98)
18791
* lval:                                  Z8000 Directives.    (line  27)
18792
* M16C architecture option:              M32C-Opts.           (line  12)
18793
* M32C architecture option:              M32C-Opts.           (line   9)
18794
* M32C modifiers:                        M32C-Modifiers.      (line   6)
18795
* M32C options:                          M32C-Opts.           (line   6)
18796
* M32C support:                          M32C-Dependent.      (line   6)
18797
* M32R architecture options:             M32R-Opts.           (line   9)
18798
* M32R directives:                       M32R-Directives.     (line   6)
18799
* M32R options:                          M32R-Opts.           (line   6)
18800
* M32R support:                          M32R-Dependent.      (line   6)
18801
* M32R warnings:                         M32R-Warnings.       (line   6)
18802
* M680x0 addressing modes:               M68K-Syntax.         (line  21)
18803
* M680x0 architecture options:           M68K-Opts.           (line 104)
18804
* M680x0 branch improvement:             M68K-Branch.         (line   6)
18805
* M680x0 directives:                     M68K-Directives.     (line   6)
18806
* M680x0 floating point:                 M68K-Float.          (line   6)
18807
* M680x0 immediate character:            M68K-Chars.          (line   6)
18808
* M680x0 line comment character:         M68K-Chars.          (line   6)
18809
* M680x0 opcodes:                        M68K-opcodes.        (line   6)
18810
* M680x0 options:                        M68K-Opts.           (line   6)
18811
* M680x0 pseudo-opcodes:                 M68K-Branch.         (line   6)
18812
* M680x0 size modifiers:                 M68K-Syntax.         (line   8)
18813
* M680x0 support:                        M68K-Dependent.      (line   6)
18814
* M680x0 syntax:                         M68K-Syntax.         (line   8)
18815
* M68HC11 addressing modes:              M68HC11-Syntax.      (line  17)
18816
* M68HC11 and M68HC12 support:           M68HC11-Dependent.   (line   6)
18817
* M68HC11 assembler directive .far:      M68HC11-Directives.  (line  20)
18818
* M68HC11 assembler directive .interrupt: M68HC11-Directives. (line  26)
18819
* M68HC11 assembler directive .mode:     M68HC11-Directives.  (line  16)
18820
* M68HC11 assembler directive .relax:    M68HC11-Directives.  (line  10)
18821
* M68HC11 assembler directive .xrefb:    M68HC11-Directives.  (line  31)
18822
* M68HC11 assembler directives:          M68HC11-Directives.  (line   6)
18823
* M68HC11 branch improvement:            M68HC11-Branch.      (line   6)
18824
* M68HC11 floating point:                M68HC11-Float.       (line   6)
18825
* M68HC11 modifiers:                     M68HC11-Modifiers.   (line   6)
18826
* M68HC11 opcodes:                       M68HC11-opcodes.     (line   6)
18827
* M68HC11 options:                       M68HC11-Opts.        (line   6)
18828
* M68HC11 pseudo-opcodes:                M68HC11-Branch.      (line   6)
18829
* M68HC11 syntax:                        M68HC11-Syntax.      (line   6)
18830
* M68HC12 assembler directives:          M68HC11-Directives.  (line   6)
18831
* machine dependencies:                  Machine Dependencies.
18832
                                                              (line   6)
18833
* machine directives, ARC:               ARC Directives.      (line   6)
18834
* machine directives, ARM:               ARM Directives.      (line   6)
18835
* machine directives, H8/300 (none):     H8/300 Directives.   (line   6)
18836
* machine directives, i860:              Directives-i860.     (line   6)
18837
* machine directives, i960:              Directives-i960.     (line   6)
18838
* machine directives, MSP 430:           MSP430 Directives.   (line   6)
18839
* machine directives, SH:                SH Directives.       (line   6)
18840
* machine directives, SH64:              SH64 Directives.     (line   9)
18841
* machine directives, SPARC:             Sparc-Directives.    (line   6)
18842
* machine directives, TIC54X:            TIC54X-Directives.   (line   6)
18843
* machine directives, V850:              V850 Directives.     (line   6)
18844
* machine directives, VAX:               VAX-directives.      (line   6)
18845
* machine independent directives:        Pseudo Ops.          (line   6)
18846
* machine instructions (not covered):    Manual.              (line  14)
18847
* machine-independent syntax:            Syntax.              (line   6)
18848
* macro directive:                       Macro.               (line  28)
18849
* macro directive, TIC54X:               TIC54X-Directives.   (line 153)
18850
* macros:                                Macro.               (line   6)
18851
* macros, count executed:                Macro.               (line 143)
18852
* Macros, MSP 430:                       MSP430-Macros.       (line   6)
18853
* macros, TIC54X:                        TIC54X-Macros.       (line   6)
18854
* make rules:                            MD.                  (line   6)
18855
* manual, structure and purpose:         Manual.              (line   6)
18856
* math builtins, TIC54X:                 TIC54X-Builtins.     (line   6)
18857
* Maximum number of continuation lines:  listing.             (line  34)
18858
* memory references, i386:               i386-Memory.         (line   6)
18859
* memory references, x86-64:             i386-Memory.         (line   6)
18860
* memory-mapped registers, TIC54X:       TIC54X-MMRegs.       (line   6)
18861
* merging text and data sections:        R.                   (line   6)
18862
* messages from assembler:               Errors.              (line   6)
18863
* minus, permitted arguments:            Infix Ops.           (line  49)
18864
* MIPS architecture options:             MIPS Opts.           (line  29)
18865
* MIPS big-endian output:                MIPS Opts.           (line  13)
18866
* MIPS CPU override:                     MIPS ISA.            (line  18)
18867
* MIPS debugging directives:             MIPS Stabs.          (line   6)
18868
* MIPS DSP Release 1 instruction generation override: MIPS ASE instruction generation overrides.
18869
                                                              (line  21)
18870
* MIPS DSP Release 2 instruction generation override: MIPS ASE instruction generation overrides.
18871
                                                              (line  26)
18872
* MIPS ECOFF sections:                   MIPS Object.         (line   6)
18873
* MIPS endianness:                       Overview.            (line 620)
18874
* MIPS ISA:                              Overview.            (line 626)
18875
* MIPS ISA override:                     MIPS ISA.            (line   6)
18876
* MIPS little-endian output:             MIPS Opts.           (line  13)
18877
* MIPS MDMX instruction generation override: MIPS ASE instruction generation overrides.
18878
                                                              (line  16)
18879
* MIPS MIPS-3D instruction generation override: MIPS ASE instruction generation overrides.
18880
                                                              (line   6)
18881
* MIPS MT instruction generation override: MIPS ASE instruction generation overrides.
18882
                                                              (line  32)
18883
* MIPS option stack:                     MIPS option stack.   (line   6)
18884
* MIPS processor:                        MIPS-Dependent.      (line   6)
18885
* MIT:                                   M68K-Syntax.         (line   6)
18886
* mlib directive, TIC54X:                TIC54X-Directives.   (line 159)
18887
* mlist directive, TIC54X:               TIC54X-Directives.   (line 164)
18888
* MMIX assembler directive BSPEC:        MMIX-Pseudos.        (line 131)
18889
* MMIX assembler directive BYTE:         MMIX-Pseudos.        (line  97)
18890
* MMIX assembler directive ESPEC:        MMIX-Pseudos.        (line 131)
18891
* MMIX assembler directive GREG:         MMIX-Pseudos.        (line  50)
18892
* MMIX assembler directive IS:           MMIX-Pseudos.        (line  42)
18893
* MMIX assembler directive LOC:          MMIX-Pseudos.        (line   7)
18894
* MMIX assembler directive LOCAL:        MMIX-Pseudos.        (line  28)
18895
* MMIX assembler directive OCTA:         MMIX-Pseudos.        (line 108)
18896
* MMIX assembler directive PREFIX:       MMIX-Pseudos.        (line 120)
18897
* MMIX assembler directive TETRA:        MMIX-Pseudos.        (line 108)
18898
* MMIX assembler directive WYDE:         MMIX-Pseudos.        (line 108)
18899
* MMIX assembler directives:             MMIX-Pseudos.        (line   6)
18900
* MMIX line comment characters:          MMIX-Chars.          (line   6)
18901
* MMIX options:                          MMIX-Opts.           (line   6)
18902
* MMIX pseudo-op BSPEC:                  MMIX-Pseudos.        (line 131)
18903
* MMIX pseudo-op BYTE:                   MMIX-Pseudos.        (line  97)
18904
* MMIX pseudo-op ESPEC:                  MMIX-Pseudos.        (line 131)
18905
* MMIX pseudo-op GREG:                   MMIX-Pseudos.        (line  50)
18906
* MMIX pseudo-op IS:                     MMIX-Pseudos.        (line  42)
18907
* MMIX pseudo-op LOC:                    MMIX-Pseudos.        (line   7)
18908
* MMIX pseudo-op LOCAL:                  MMIX-Pseudos.        (line  28)
18909
* MMIX pseudo-op OCTA:                   MMIX-Pseudos.        (line 108)
18910
* MMIX pseudo-op PREFIX:                 MMIX-Pseudos.        (line 120)
18911
* MMIX pseudo-op TETRA:                  MMIX-Pseudos.        (line 108)
18912
* MMIX pseudo-op WYDE:                   MMIX-Pseudos.        (line 108)
18913
* MMIX pseudo-ops:                       MMIX-Pseudos.        (line   6)
18914
* MMIX register names:                   MMIX-Regs.           (line   6)
18915
* MMIX support:                          MMIX-Dependent.      (line   6)
18916
* mmixal differences:                    MMIX-mmixal.         (line   6)
18917
* mmregs directive, TIC54X:              TIC54X-Directives.   (line 170)
18918
* mmsg directive, TIC54X:                TIC54X-Directives.   (line  77)
18919
* MMX, i386:                             i386-SIMD.           (line   6)
18920
* MMX, x86-64:                           i386-SIMD.           (line   6)
18921
* mnemonic compatibility, i386:          i386-Mnemonics.      (line  57)
18922
* mnemonic suffixes, i386:               i386-Syntax.         (line  29)
18923
* mnemonic suffixes, x86-64:             i386-Syntax.         (line  29)
18924
* mnemonics for opcodes, VAX:            VAX-opcodes.         (line   6)
18925
* mnemonics, AVR:                        AVR Opcodes.         (line   6)
18926
* mnemonics, D10V:                       D10V-Opcodes.        (line   6)
18927
* mnemonics, D30V:                       D30V-Opcodes.        (line   6)
18928
* mnemonics, H8/300:                     H8/300 Opcodes.      (line   6)
18929
* mnemonics, SH:                         SH Opcodes.          (line   6)
18930
* mnemonics, SH64:                       SH64 Opcodes.        (line   6)
18931
* mnemonics, Z8000:                      Z8000 Opcodes.       (line   6)
18932
* mnolist directive, TIC54X:             TIC54X-Directives.   (line 164)
18933
* Motorola syntax for the 680x0:         M68K-Moto-Syntax.    (line   6)
18934
* MOVI instructions, relaxation:         Xtensa Immediate Relaxation.
18935
                                                              (line  12)
18936
* MOVW and MOVT relocations, ARM:        ARM-Relocations.     (line  20)
18937
* MRI compatibility mode:                M.                   (line   6)
18938
* mri directive:                         MRI.                 (line   6)
18939
* MRI mode, temporarily:                 MRI.                 (line   6)
18940
* MSP 430 floating point (IEEE):         MSP430 Floating Point.
18941
                                                              (line   6)
18942
* MSP 430 identifiers:                   MSP430-Chars.        (line   8)
18943
* MSP 430 line comment character:        MSP430-Chars.        (line   6)
18944
* MSP 430 machine directives:            MSP430 Directives.   (line   6)
18945
* MSP 430 macros:                        MSP430-Macros.       (line   6)
18946
* MSP 430 opcodes:                       MSP430 Opcodes.      (line   6)
18947
* MSP 430 options (none):                MSP430 Options.      (line   6)
18948
* MSP 430 profiling capability:          MSP430 Profiling Capability.
18949
                                                              (line   6)
18950
* MSP 430 register names:                MSP430-Regs.         (line   6)
18951
* MSP 430 support:                       MSP430-Dependent.    (line   6)
18952
* MSP430 Assembler Extensions:           MSP430-Ext.          (line   6)
18953
* mul instruction, i386:                 i386-Notes.          (line   6)
18954
* mul instruction, x86-64:               i386-Notes.          (line   6)
18955
* name:                                  Z8000 Directives.    (line  18)
18956
* named section:                         Section.             (line   6)
18957
* named sections:                        Ld Sections.         (line   8)
18958
* names, symbol:                         Symbol Names.        (line   6)
18959
* naming object file:                    o.                   (line   6)
18960
* new page, in listings:                 Eject.               (line   6)
18961
* newblock directive, TIC54X:            TIC54X-Directives.   (line 176)
18962
* newline (\n):                          Strings.             (line  21)
18963
* newline, required at file end:         Statements.          (line  13)
18964
* no-absolute-literals directive:        Absolute Literals Directive.
18965
                                                              (line   6)
18966
* no-longcalls directive:                Longcalls Directive. (line   6)
18967
* no-schedule directive:                 Schedule Directive.  (line   6)
18968
* no-transform directive:                Transform Directive. (line   6)
18969
* nolist directive:                      Nolist.              (line   6)
18970
* nolist directive, TIC54X:              TIC54X-Directives.   (line 131)
18971
* NOP pseudo op, ARM:                    ARM Opcodes.         (line   9)
18972
* notes for Alpha:                       Alpha Notes.         (line   6)
18973
* null-terminated strings:               Asciz.               (line   6)
18974
* number constants:                      Numbers.             (line   6)
18975
* number of macros executed:             Macro.               (line 143)
18976
* numbered subsections:                  Sub-Sections.        (line   6)
18977
* numbers, 16-bit:                       hword.               (line   6)
18978
* numeric values:                        Expressions.         (line   6)
18979
* nword directive, SPARC:                Sparc-Directives.    (line  20)
18980
* object attributes:                     Object Attributes.   (line   6)
18981
* object file:                           Object.              (line   6)
18982
* object file format:                    Object Formats.      (line   6)
18983
* object file name:                      o.                   (line   6)
18984
* object file, after errors:             Z.                   (line   6)
18985
* obsolescent directives:                Deprecated.          (line   6)
18986
* octa directive:                        Octa.                (line   6)
18987
* octal character code (\DDD):           Strings.             (line  30)
18988
* octal integers:                        Integers.            (line   9)
18989
* offset directive, V850:                V850 Directives.     (line   6)
18990
* opcode mnemonics, VAX:                 VAX-opcodes.         (line   6)
18991
* opcode names, Xtensa:                  Xtensa Opcodes.      (line   6)
18992
* opcode summary, AVR:                   AVR Opcodes.         (line   6)
18993
* opcode summary, D10V:                  D10V-Opcodes.        (line   6)
18994
* opcode summary, D30V:                  D30V-Opcodes.        (line   6)
18995
* opcode summary, H8/300:                H8/300 Opcodes.      (line   6)
18996
* opcode summary, SH:                    SH Opcodes.          (line   6)
18997
* opcode summary, SH64:                  SH64 Opcodes.        (line   6)
18998
* opcode summary, Z8000:                 Z8000 Opcodes.       (line   6)
18999
* opcodes for ARC:                       ARC Opcodes.         (line   6)
19000
* opcodes for ARM:                       ARM Opcodes.         (line   6)
19001
* opcodes for MSP 430:                   MSP430 Opcodes.      (line   6)
19002
* opcodes for V850:                      V850 Opcodes.        (line   6)
19003
* opcodes, i860:                         Opcodes for i860.    (line   6)
19004
* opcodes, i960:                         Opcodes for i960.    (line   6)
19005
* opcodes, M680x0:                       M68K-opcodes.        (line   6)
19006
* opcodes, M68HC11:                      M68HC11-opcodes.     (line   6)
19007
* operand delimiters, i386:              i386-Syntax.         (line  15)
19008
* operand delimiters, x86-64:            i386-Syntax.         (line  15)
19009
* operand notation, VAX:                 VAX-operands.        (line   6)
19010
* operands in expressions:               Arguments.           (line   6)
19011
* operator precedence:                   Infix Ops.           (line  11)
19012
* operators, in expressions:             Operators.           (line   6)
19013
* operators, permitted arguments:        Infix Ops.           (line   6)
19014
* optimization, D10V:                    Overview.            (line 405)
19015
* optimization, D30V:                    Overview.            (line 410)
19016
* optimizations:                         Xtensa Optimizations.
19017
                                                              (line   6)
19018
* option directive, ARC:                 ARC Directives.      (line 162)
19019
* option directive, TIC54X:              TIC54X-Directives.   (line 180)
19020
* option summary:                        Overview.            (line   6)
19021
* options for Alpha:                     Alpha Options.       (line   6)
19022
* options for ARC (none):                ARC Options.         (line   6)
19023
* options for ARM (none):                ARM Options.         (line   6)
19024
* options for AVR (none):                AVR Options.         (line   6)
19025
* options for i386:                      i386-Options.        (line   6)
19026
* options for IA-64:                     IA-64 Options.       (line   6)
19027
* options for MSP430 (none):             MSP430 Options.      (line   6)
19028
* options for PDP-11:                    PDP-11-Options.      (line   6)
19029
* options for PowerPC:                   PowerPC-Opts.        (line   6)
19030
* options for SPARC:                     Sparc-Opts.          (line   6)
19031
* options for V850 (none):               V850 Options.        (line   6)
19032
* options for VAX/VMS:                   VAX-Opts.            (line  42)
19033
* options for x86-64:                    i386-Options.        (line   6)
19034
* options for Z80:                       Z80 Options.         (line   6)
19035
* options, all versions of assembler:    Invoking.            (line   6)
19036
* options, command line:                 Command Line.        (line  13)
19037
* options, CRIS:                         CRIS-Opts.           (line   6)
19038
* options, D10V:                         D10V-Opts.           (line   6)
19039
* options, D30V:                         D30V-Opts.           (line   6)
19040
* options, H8/300 (none):                H8/300 Options.      (line   6)
19041
* options, i960:                         Options-i960.        (line   6)
19042
* options, IP2K:                         IP2K-Opts.           (line   6)
19043
* options, M32C:                         M32C-Opts.           (line   6)
19044
* options, M32R:                         M32R-Opts.           (line   6)
19045
* options, M680x0:                       M68K-Opts.           (line   6)
19046
* options, M68HC11:                      M68HC11-Opts.        (line   6)
19047
* options, MMIX:                         MMIX-Opts.           (line   6)
19048
* options, PJ:                           PJ Options.          (line   6)
19049
* options, SH:                           SH Options.          (line   6)
19050
* options, SH64:                         SH64 Options.        (line   6)
19051
* options, TIC54X:                       TIC54X-Opts.         (line   6)
19052
* options, Z8000:                        Z8000 Options.       (line   6)
19053
* org directive:                         Org.                 (line   6)
19054
* other attribute, of a.out symbol:      Symbol Other.        (line   6)
19055
* output file:                           Object.              (line   6)
19056
* p2align directive:                     P2align.             (line   6)
19057
* p2alignl directive:                    P2align.             (line  28)
19058
* p2alignw directive:                    P2align.             (line  28)
19059
* padding the location counter:          Align.               (line   6)
19060
* padding the location counter given a power of two: P2align. (line   6)
19061
* padding the location counter given number of bytes: Balign. (line   6)
19062
* page, in listings:                     Eject.               (line   6)
19063
* paper size, for listings:              Psize.               (line   6)
19064
* paths for .include:                    I.                   (line   6)
19065
* patterns, writing in memory:           Fill.                (line   6)
19066
* PDP-11 comments:                       PDP-11-Syntax.       (line  16)
19067
* PDP-11 floating-point register syntax: PDP-11-Syntax.       (line  13)
19068
* PDP-11 general-purpose register syntax: PDP-11-Syntax.      (line  10)
19069
* PDP-11 instruction naming:             PDP-11-Mnemonics.    (line   6)
19070
* PDP-11 support:                        PDP-11-Dependent.    (line   6)
19071
* PDP-11 syntax:                         PDP-11-Syntax.       (line   6)
19072
* PIC code generation for ARM:           ARM Options.         (line 120)
19073
* PIC code generation for M32R:          M32R-Opts.           (line  42)
19074
* PIC selection, MIPS:                   MIPS Opts.           (line  21)
19075
* PJ endianness:                         Overview.            (line 527)
19076
* PJ options:                            PJ Options.          (line   6)
19077
* PJ support:                            PJ-Dependent.        (line   6)
19078
* plus, permitted arguments:             Infix Ops.           (line  44)
19079
* popsection directive:                  PopSection.          (line   6)
19080
* Position-independent code, CRIS:       CRIS-Opts.           (line  27)
19081
* Position-independent code, symbols in, CRIS: CRIS-Pic.      (line   6)
19082
* PowerPC architectures:                 PowerPC-Opts.        (line   6)
19083
* PowerPC directives:                    PowerPC-Pseudo.      (line   6)
19084
* PowerPC options:                       PowerPC-Opts.        (line   6)
19085
* PowerPC support:                       PPC-Dependent.       (line   6)
19086
* precedence of operators:               Infix Ops.           (line  11)
19087
* precision, floating point:             Flonums.             (line   6)
19088
* prefix operators:                      Prefix Ops.          (line   6)
19089
* prefixes, i386:                        i386-Prefixes.       (line   6)
19090
* preprocessing:                         Preprocessing.       (line   6)
19091
* preprocessing, turning on and off:     Preprocessing.       (line  27)
19092
* previous directive:                    Previous.            (line   6)
19093
* primary attributes, COFF symbols:      COFF Symbols.        (line  13)
19094
* print directive:                       Print.               (line   6)
19095
* proc directive, SPARC:                 Sparc-Directives.    (line  25)
19096
* profiler directive, MSP 430:           MSP430 Directives.   (line  22)
19097
* profiling capability for MSP 430:      MSP430 Profiling Capability.
19098
                                                              (line   6)
19099
* protected directive:                   Protected.           (line   6)
19100
* pseudo-op .arch, CRIS:                 CRIS-Pseudos.        (line  45)
19101
* pseudo-op .dword, CRIS:                CRIS-Pseudos.        (line  12)
19102
* pseudo-op .syntax, CRIS:               CRIS-Pseudos.        (line  17)
19103
* pseudo-op BSPEC, MMIX:                 MMIX-Pseudos.        (line 131)
19104
* pseudo-op BYTE, MMIX:                  MMIX-Pseudos.        (line  97)
19105
* pseudo-op ESPEC, MMIX:                 MMIX-Pseudos.        (line 131)
19106
* pseudo-op GREG, MMIX:                  MMIX-Pseudos.        (line  50)
19107
* pseudo-op IS, MMIX:                    MMIX-Pseudos.        (line  42)
19108
* pseudo-op LOC, MMIX:                   MMIX-Pseudos.        (line   7)
19109
* pseudo-op LOCAL, MMIX:                 MMIX-Pseudos.        (line  28)
19110
* pseudo-op OCTA, MMIX:                  MMIX-Pseudos.        (line 108)
19111
* pseudo-op PREFIX, MMIX:                MMIX-Pseudos.        (line 120)
19112
* pseudo-op TETRA, MMIX:                 MMIX-Pseudos.        (line 108)
19113
* pseudo-op WYDE, MMIX:                  MMIX-Pseudos.        (line 108)
19114
* pseudo-opcodes, M680x0:                M68K-Branch.         (line   6)
19115
* pseudo-opcodes, M68HC11:               M68HC11-Branch.      (line   6)
19116
* pseudo-ops for branch, VAX:            VAX-branch.          (line   6)
19117
* pseudo-ops, CRIS:                      CRIS-Pseudos.        (line   6)
19118
* pseudo-ops, machine independent:       Pseudo Ops.          (line   6)
19119
* pseudo-ops, MMIX:                      MMIX-Pseudos.        (line   6)
19120
* psize directive:                       Psize.               (line   6)
19121
* PSR bits:                              IA-64-Bits.          (line   6)
19122
* pstring directive, TIC54X:             TIC54X-Directives.   (line 209)
19123
* psw register, V850:                    V850-Regs.           (line 116)
19124
* purgem directive:                      Purgem.              (line   6)
19125
* purpose of GNU assembler:              GNU Assembler.       (line  12)
19126
* pushsection directive:                 PushSection.         (line   6)
19127
* quad directive:                        Quad.                (line   6)
19128
* quad directive, i386:                  i386-Float.          (line  21)
19129
* quad directive, x86-64:                i386-Float.          (line  21)
19130
* real-mode code, i386:                  i386-16bit.          (line   6)
19131
* ref directive, TIC54X:                 TIC54X-Directives.   (line 103)
19132
* register directive, SPARC:             Sparc-Directives.    (line  29)
19133
* register names, Alpha:                 Alpha-Regs.          (line   6)
19134
* register names, ARC:                   ARC-Regs.            (line   6)
19135
* register names, ARM:                   ARM-Regs.            (line   6)
19136
* register names, AVR:                   AVR-Regs.            (line   6)
19137
* register names, CRIS:                  CRIS-Regs.           (line   6)
19138
* register names, H8/300:                H8/300-Regs.         (line   6)
19139
* register names, IA-64:                 IA-64-Regs.          (line   6)
19140
* register names, MMIX:                  MMIX-Regs.           (line   6)
19141
* register names, MSP 430:               MSP430-Regs.         (line   6)
19142
* register names, Sparc:                 Sparc-Regs.          (line   6)
19143
* register names, V850:                  V850-Regs.           (line   6)
19144
* register names, VAX:                   VAX-operands.        (line  17)
19145
* register names, Xtensa:                Xtensa Registers.    (line   6)
19146
* register names, Z80:                   Z80-Regs.            (line   6)
19147
* register operands, i386:               i386-Syntax.         (line  15)
19148
* register operands, x86-64:             i386-Syntax.         (line  15)
19149
* registers, D10V:                       D10V-Regs.           (line   6)
19150
* registers, D30V:                       D30V-Regs.           (line   6)
19151
* registers, i386:                       i386-Regs.           (line   6)
19152
* registers, SH:                         SH-Regs.             (line   6)
19153
* registers, SH64:                       SH64-Regs.           (line   6)
19154
* registers, TIC54X memory-mapped:       TIC54X-MMRegs.       (line   6)
19155
* registers, x86-64:                     i386-Regs.           (line   6)
19156
* registers, Z8000:                      Z8000-Regs.          (line   6)
19157
* relaxation:                            Xtensa Relaxation.   (line   6)
19158
* relaxation of ADDI instructions:       Xtensa Immediate Relaxation.
19159
                                                              (line  43)
19160
* relaxation of branch instructions:     Xtensa Branch Relaxation.
19161
                                                              (line   6)
19162
* relaxation of call instructions:       Xtensa Call Relaxation.
19163
                                                              (line   6)
19164
* relaxation of immediate fields:        Xtensa Immediate Relaxation.
19165
                                                              (line   6)
19166
* relaxation of L16SI instructions:      Xtensa Immediate Relaxation.
19167
                                                              (line  23)
19168
* relaxation of L16UI instructions:      Xtensa Immediate Relaxation.
19169
                                                              (line  23)
19170
* relaxation of L32I instructions:       Xtensa Immediate Relaxation.
19171
                                                              (line  23)
19172
* relaxation of L8UI instructions:       Xtensa Immediate Relaxation.
19173
                                                              (line  23)
19174
* relaxation of MOVI instructions:       Xtensa Immediate Relaxation.
19175
                                                              (line  12)
19176
* reloc directive:                       Reloc.               (line   6)
19177
* relocation:                            Sections.            (line   6)
19178
* relocation example:                    Ld Sections.         (line  40)
19179
* relocations, Alpha:                    Alpha-Relocs.        (line   6)
19180
* relocations, Sparc:                    Sparc-Relocs.        (line   6)
19181
* repeat prefixes, i386:                 i386-Prefixes.       (line  44)
19182
* reporting bugs in assembler:           Reporting Bugs.      (line   6)
19183
* rept directive:                        Rept.                (line   6)
19184
* req directive, ARM:                    ARM Directives.      (line  13)
19185
* reserve directive, SPARC:              Sparc-Directives.    (line  39)
19186
* return instructions, i386:             i386-Syntax.         (line  38)
19187
* return instructions, x86-64:           i386-Syntax.         (line  38)
19188
* REX prefixes, i386:                    i386-Prefixes.       (line  46)
19189
* rsect:                                 Z8000 Directives.    (line  52)
19190
* sblock directive, TIC54X:              TIC54X-Directives.   (line 183)
19191
* sbttl directive:                       Sbttl.               (line   6)
19192
* schedule directive:                    Schedule Directive.  (line   6)
19193
* scl directive:                         Scl.                 (line   6)
19194
* sdaoff pseudo-op, V850:                V850 Opcodes.        (line  65)
19195
* search path for .include:              I.                   (line   6)
19196
* sect directive, MSP 430:               MSP430 Directives.   (line  18)
19197
* sect directive, TIC54X:                TIC54X-Directives.   (line 189)
19198
* section directive (COFF version):      Section.             (line  16)
19199
* section directive (ELF version):       Section.             (line  67)
19200
* section directive, V850:               V850 Directives.     (line   9)
19201
* section override prefixes, i386:       i386-Prefixes.       (line  23)
19202
* Section Stack <1>:                     SubSection.          (line   6)
19203
* Section Stack <2>:                     Section.             (line  62)
19204
* Section Stack <3>:                     PushSection.         (line   6)
19205
* Section Stack <4>:                     PopSection.          (line   6)
19206
* Section Stack:                         Previous.            (line   6)
19207
* section-relative addressing:           Secs Background.     (line  68)
19208
* sections:                              Sections.            (line   6)
19209
* sections in messages, internal:        As Sections.         (line   6)
19210
* sections, i386:                        i386-Syntax.         (line  44)
19211
* sections, named:                       Ld Sections.         (line   8)
19212
* sections, x86-64:                      i386-Syntax.         (line  44)
19213
* seg directive, SPARC:                  Sparc-Directives.    (line  44)
19214
* segm:                                  Z8000 Directives.    (line  10)
19215
* set directive:                         Set.                 (line   6)
19216
* set directive, TIC54X:                 TIC54X-Directives.   (line 192)
19217
* SH addressing modes:                   SH-Addressing.       (line   6)
19218
* SH floating point (IEEE):              SH Floating Point.   (line   6)
19219
* SH line comment character:             SH-Chars.            (line   6)
19220
* SH line separator:                     SH-Chars.            (line   8)
19221
* SH machine directives:                 SH Directives.       (line   6)
19222
* SH opcode summary:                     SH Opcodes.          (line   6)
19223
* SH options:                            SH Options.          (line   6)
19224
* SH registers:                          SH-Regs.             (line   6)
19225
* SH support:                            SH-Dependent.        (line   6)
19226
* SH64 ABI options:                      SH64 Options.        (line  29)
19227
* SH64 addressing modes:                 SH64-Addressing.     (line   6)
19228
* SH64 ISA options:                      SH64 Options.        (line   6)
19229
* SH64 line comment character:           SH64-Chars.          (line   6)
19230
* SH64 line separator:                   SH64-Chars.          (line   8)
19231
* SH64 machine directives:               SH64 Directives.     (line   9)
19232
* SH64 opcode summary:                   SH64 Opcodes.        (line   6)
19233
* SH64 options:                          SH64 Options.        (line   6)
19234
* SH64 registers:                        SH64-Regs.           (line   6)
19235
* SH64 support:                          SH64-Dependent.      (line   6)
19236
* shigh directive, M32R:                 M32R-Directives.     (line  26)
19237
* short directive:                       Short.               (line   6)
19238
* short directive, ARC:                  ARC Directives.      (line 171)
19239
* short directive, TIC54X:               TIC54X-Directives.   (line 111)
19240
* SIMD, i386:                            i386-SIMD.           (line   6)
19241
* SIMD, x86-64:                          i386-SIMD.           (line   6)
19242
* single character constant:             Chars.               (line   6)
19243
* single directive:                      Single.              (line   6)
19244
* single directive, i386:                i386-Float.          (line  14)
19245
* single directive, x86-64:              i386-Float.          (line  14)
19246
* single quote, Z80:                     Z80-Chars.           (line  13)
19247
* sixteen bit integers:                  hword.               (line   6)
19248
* sixteen byte integer:                  Octa.                (line   6)
19249
* size directive (COFF version):         Size.                (line  11)
19250
* size directive (ELF version):          Size.                (line  19)
19251
* size modifiers, D10V:                  D10V-Size.           (line   6)
19252
* size modifiers, D30V:                  D30V-Size.           (line   6)
19253
* size modifiers, M680x0:                M68K-Syntax.         (line   8)
19254
* size prefixes, i386:                   i386-Prefixes.       (line  27)
19255
* size suffixes, H8/300:                 H8/300 Opcodes.      (line 163)
19256
* size, translations, Sparc:             Sparc-Size-Translations.
19257
                                                              (line   6)
19258
* sizes operands, i386:                  i386-Syntax.         (line  29)
19259
* sizes operands, x86-64:                i386-Syntax.         (line  29)
19260
* skip directive:                        Skip.                (line   6)
19261
* skip directive, M680x0:                M68K-Directives.     (line  19)
19262
* skip directive, SPARC:                 Sparc-Directives.    (line  48)
19263
* sleb128 directive:                     Sleb128.             (line   6)
19264
* small objects, MIPS ECOFF:             MIPS Object.         (line  11)
19265
* SmartMIPS instruction generation override: MIPS ASE instruction generation overrides.
19266
                                                              (line  11)
19267
* SOM symbol attributes:                 SOM Symbols.         (line   6)
19268
* source program:                        Input Files.         (line   6)
19269
* source, destination operands; i386:    i386-Syntax.         (line  22)
19270
* source, destination operands; x86-64:  i386-Syntax.         (line  22)
19271
* sp register:                           Xtensa Registers.    (line   6)
19272
* sp register, V850:                     V850-Regs.           (line  14)
19273
* space directive:                       Space.               (line   6)
19274
* space directive, TIC54X:               TIC54X-Directives.   (line 197)
19275
* space used, maximum for assembly:      statistics.          (line   6)
19276
* SPARC architectures:                   Sparc-Opts.          (line   6)
19277
* Sparc constants:                       Sparc-Constants.     (line   6)
19278
* SPARC data alignment:                  Sparc-Aligned-Data.  (line   6)
19279
* SPARC floating point (IEEE):           Sparc-Float.         (line   6)
19280
* Sparc line comment character:          Sparc-Chars.         (line   6)
19281
* Sparc line separator:                  Sparc-Chars.         (line   8)
19282
* SPARC machine directives:              Sparc-Directives.    (line   6)
19283
* SPARC options:                         Sparc-Opts.          (line   6)
19284
* Sparc registers:                       Sparc-Regs.          (line   6)
19285
* Sparc relocations:                     Sparc-Relocs.        (line   6)
19286
* Sparc size translations:               Sparc-Size-Translations.
19287
                                                              (line   6)
19288
* SPARC support:                         Sparc-Dependent.     (line   6)
19289
* SPARC syntax:                          Sparc-Aligned-Data.  (line  21)
19290
* special characters, ARC:               ARC-Chars.           (line   6)
19291
* special characters, M680x0:            M68K-Chars.          (line   6)
19292
* special purpose registers, MSP 430:    MSP430-Regs.         (line  11)
19293
* sslist directive, TIC54X:              TIC54X-Directives.   (line 204)
19294
* ssnolist directive, TIC54X:            TIC54X-Directives.   (line 204)
19295
* stabd directive:                       Stab.                (line  38)
19296
* stabn directive:                       Stab.                (line  48)
19297
* stabs directive:                       Stab.                (line  51)
19298
* stabX directives:                      Stab.                (line   6)
19299
* standard assembler sections:           Secs Background.     (line  27)
19300
* standard input, as input file:         Command Line.        (line  10)
19301
* statement separator character:         Statements.          (line   6)
19302
* statement separator, Alpha:            Alpha-Chars.         (line   8)
19303
* statement separator, ARM:              ARM-Chars.           (line  10)
19304
* statement separator, AVR:              AVR-Chars.           (line  10)
19305
* statement separator, H8/300:           H8/300-Chars.        (line   8)
19306
* statement separator, IA-64:            IA-64-Chars.         (line   8)
19307
* statement separator, SH:               SH-Chars.            (line   8)
19308
* statement separator, SH64:             SH64-Chars.          (line   8)
19309
* statement separator, Sparc:            Sparc-Chars.         (line   8)
19310
* statement separator, Z8000:            Z8000-Chars.         (line   8)
19311
* statements, structure of:              Statements.          (line   6)
19312
* statistics, about assembly:            statistics.          (line   6)
19313
* stopping the assembly:                 Abort.               (line   6)
19314
* string constants:                      Strings.             (line   6)
19315
* string directive:                      String.              (line   8)
19316
* string directive on HPPA:              HPPA Directives.     (line 137)
19317
* string directive, TIC54X:              TIC54X-Directives.   (line 209)
19318
* string literals:                       Ascii.               (line   6)
19319
* string, copying to object file:        String.              (line   8)
19320
* string16 directive:                    String.              (line   8)
19321
* string16, copying to object file:      String.              (line   8)
19322
* string32 directive:                    String.              (line   8)
19323
* string32, copying to object file:      String.              (line   8)
19324
* string64 directive:                    String.              (line   8)
19325
* string64, copying to object file:      String.              (line   8)
19326
* string8 directive:                     String.              (line   8)
19327
* string8, copying to object file:       String.              (line   8)
19328
* struct directive:                      Struct.              (line   6)
19329
* struct directive, TIC54X:              TIC54X-Directives.   (line 217)
19330
* structure debugging, COFF:             Tag.                 (line   6)
19331
* sub-instruction ordering, D10V:        D10V-Chars.          (line   6)
19332
* sub-instruction ordering, D30V:        D30V-Chars.          (line   6)
19333
* sub-instructions, D10V:                D10V-Subs.           (line   6)
19334
* sub-instructions, D30V:                D30V-Subs.           (line   6)
19335
* subexpressions:                        Arguments.           (line  24)
19336
* subsection directive:                  SubSection.          (line   6)
19337
* subsym builtins, TIC54X:               TIC54X-Macros.       (line  16)
19338
* subtitles for listings:                Sbttl.               (line   6)
19339
* subtraction, permitted arguments:      Infix Ops.           (line  49)
19340
* summary of options:                    Overview.            (line   6)
19341
* support:                               HPPA-Dependent.      (line   6)
19342
* supporting files, including:           Include.             (line   6)
19343
* suppressing warnings:                  W.                   (line  11)
19344
* sval:                                  Z8000 Directives.    (line  33)
19345
* symbol attributes:                     Symbol Attributes.   (line   6)
19346
* symbol attributes, a.out:              a.out Symbols.       (line   6)
19347
* symbol attributes, COFF:               COFF Symbols.        (line   6)
19348
* symbol attributes, SOM:                SOM Symbols.         (line   6)
19349
* symbol descriptor, COFF:               Desc.                (line   6)
19350
* symbol modifiers <1>:                  M68HC11-Modifiers.   (line  12)
19351
* symbol modifiers <2>:                  M32C-Modifiers.      (line  11)
19352
* symbol modifiers:                      AVR-Modifiers.       (line  12)
19353
* symbol names:                          Symbol Names.        (line   6)
19354
* symbol names, $ in <1>:                SH64-Chars.          (line  10)
19355
* symbol names, $ in <2>:                SH-Chars.            (line  10)
19356
* symbol names, $ in <3>:                D30V-Chars.          (line  63)
19357
* symbol names, $ in:                    D10V-Chars.          (line  46)
19358
* symbol names, local:                   Symbol Names.        (line  22)
19359
* symbol names, temporary:               Symbol Names.        (line  35)
19360
* symbol storage class (COFF):           Scl.                 (line   6)
19361
* symbol type:                           Symbol Type.         (line   6)
19362
* symbol type, COFF:                     Type.                (line  11)
19363
* symbol type, ELF:                      Type.                (line  22)
19364
* symbol value:                          Symbol Value.        (line   6)
19365
* symbol value, setting:                 Set.                 (line   6)
19366
* symbol values, assigning:              Setting Symbols.     (line   6)
19367
* symbol versioning:                     Symver.              (line   6)
19368
* symbol, common:                        Comm.                (line   6)
19369
* symbol, making visible to linker:      Global.              (line   6)
19370
* symbolic debuggers, information for:   Stab.                (line   6)
19371
* symbols:                               Symbols.             (line   6)
19372
* Symbols in position-independent code, CRIS: CRIS-Pic.       (line   6)
19373
* symbols with uppercase, VAX/VMS:       VAX-Opts.            (line  42)
19374
* symbols, assigning values to:          Equ.                 (line   6)
19375
* Symbols, built-in, CRIS:               CRIS-Symbols.        (line   6)
19376
* Symbols, CRIS, built-in:               CRIS-Symbols.        (line   6)
19377
* symbols, local common:                 Lcomm.               (line   6)
19378
* symver directive:                      Symver.              (line   6)
19379
* syntax compatibility, i386:            i386-Syntax.         (line   6)
19380
* syntax compatibility, x86-64:          i386-Syntax.         (line   6)
19381
* syntax, AVR:                           AVR-Modifiers.       (line   6)
19382
* syntax, BFIN:                          BFIN Syntax.         (line   6)
19383
* syntax, D10V:                          D10V-Syntax.         (line   6)
19384
* syntax, D30V:                          D30V-Syntax.         (line   6)
19385
* syntax, M32C:                          M32C-Modifiers.      (line   6)
19386
* syntax, M680x0:                        M68K-Syntax.         (line   8)
19387
* syntax, M68HC11 <1>:                   M68HC11-Modifiers.   (line   6)
19388
* syntax, M68HC11:                       M68HC11-Syntax.      (line   6)
19389
* syntax, machine-independent:           Syntax.              (line   6)
19390
* syntax, SPARC:                         Sparc-Aligned-Data.  (line  21)
19391
* syntax, Xtensa assembler:              Xtensa Syntax.       (line   6)
19392
* sysproc directive, i960:               Directives-i960.     (line  37)
19393
* tab (\t):                              Strings.             (line  27)
19394
* tab directive, TIC54X:                 TIC54X-Directives.   (line 248)
19395
* tag directive:                         Tag.                 (line   6)
19396
* tag directive, TIC54X:                 TIC54X-Directives.   (line 217)
19397
* tdaoff pseudo-op, V850:                V850 Opcodes.        (line  81)
19398
* temporary symbol names:                Symbol Names.        (line  35)
19399
* text and data sections, joining:       R.                   (line   6)
19400
* text directive:                        Text.                (line   6)
19401
* text section:                          Ld Sections.         (line   9)
19402
* tfloat directive, i386:                i386-Float.          (line  14)
19403
* tfloat directive, x86-64:              i386-Float.          (line  14)
19404
* thumb directive, ARM:                  ARM Directives.      (line  57)
19405
* Thumb support:                         ARM-Dependent.       (line   6)
19406
* thumb_func directive, ARM:             ARM Directives.      (line  67)
19407
* thumb_set directive, ARM:              ARM Directives.      (line  78)
19408
* TIC54X builtin math functions:         TIC54X-Builtins.     (line   6)
19409
* TIC54X machine directives:             TIC54X-Directives.   (line   6)
19410
* TIC54X memory-mapped registers:        TIC54X-MMRegs.       (line   6)
19411
* TIC54X options:                        TIC54X-Opts.         (line   6)
19412
* TIC54X subsym builtins:                TIC54X-Macros.       (line  16)
19413
* TIC54X support:                        TIC54X-Dependent.    (line   6)
19414
* TIC54X-specific macros:                TIC54X-Macros.       (line   6)
19415
* time, total for assembly:              statistics.          (line   6)
19416
* title directive:                       Title.               (line   6)
19417
* tp register, V850:                     V850-Regs.           (line  20)
19418
* transform directive:                   Transform Directive. (line   6)
19419
* trusted compiler:                      f.                   (line   6)
19420
* turning preprocessing on and off:      Preprocessing.       (line  27)
19421
* type directive (COFF version):         Type.                (line  11)
19422
* type directive (ELF version):          Type.                (line  22)
19423
* type of a symbol:                      Symbol Type.         (line   6)
19424
* ualong directive, SH:                  SH Directives.       (line   6)
19425
* uaword directive, SH:                  SH Directives.       (line   6)
19426
* ubyte directive, TIC54X:               TIC54X-Directives.   (line  36)
19427
* uchar directive, TIC54X:               TIC54X-Directives.   (line  36)
19428
* uhalf directive, TIC54X:               TIC54X-Directives.   (line 111)
19429
* uint directive, TIC54X:                TIC54X-Directives.   (line 111)
19430
* uleb128 directive:                     Uleb128.             (line   6)
19431
* ulong directive, TIC54X:               TIC54X-Directives.   (line 135)
19432
* undefined section:                     Ld Sections.         (line  36)
19433
* union directive, TIC54X:               TIC54X-Directives.   (line 251)
19434
* unreq directive, ARM:                  ARM Directives.      (line  18)
19435
* unsegm:                                Z8000 Directives.    (line  14)
19436
* usect directive, TIC54X:               TIC54X-Directives.   (line 263)
19437
* ushort directive, TIC54X:              TIC54X-Directives.   (line 111)
19438
* uword directive, TIC54X:               TIC54X-Directives.   (line 111)
19439
* V850 command line options:             V850 Options.        (line   9)
19440
* V850 floating point (IEEE):            V850 Floating Point. (line   6)
19441
* V850 line comment character:           V850-Chars.          (line   6)
19442
* V850 machine directives:               V850 Directives.     (line   6)
19443
* V850 opcodes:                          V850 Opcodes.        (line   6)
19444
* V850 options (none):                   V850 Options.        (line   6)
19445
* V850 register names:                   V850-Regs.           (line   6)
19446
* V850 support:                          V850-Dependent.      (line   6)
19447
* val directive:                         Val.                 (line   6)
19448
* value attribute, COFF:                 Val.                 (line   6)
19449
* value of a symbol:                     Symbol Value.        (line   6)
19450
* var directive, TIC54X:                 TIC54X-Directives.   (line 273)
19451
* VAX bitfields not supported:           VAX-no.              (line   6)
19452
* VAX branch improvement:                VAX-branch.          (line   6)
19453
* VAX command-line options ignored:      VAX-Opts.            (line   6)
19454
* VAX displacement sizing character:     VAX-operands.        (line  12)
19455
* VAX floating point:                    VAX-float.           (line   6)
19456
* VAX immediate character:               VAX-operands.        (line   6)
19457
* VAX indirect character:                VAX-operands.        (line   9)
19458
* VAX machine directives:                VAX-directives.      (line   6)
19459
* VAX opcode mnemonics:                  VAX-opcodes.         (line   6)
19460
* VAX operand notation:                  VAX-operands.        (line   6)
19461
* VAX register names:                    VAX-operands.        (line  17)
19462
* VAX support:                           Vax-Dependent.       (line   6)
19463
* Vax-11 C compatibility:                VAX-Opts.            (line  42)
19464
* VAX/VMS options:                       VAX-Opts.            (line  42)
19465
* version directive:                     Version.             (line   6)
19466
* version directive, TIC54X:             TIC54X-Directives.   (line 277)
19467
* version of assembler:                  v.                   (line   6)
19468
* versions of symbols:                   Symver.              (line   6)
19469
* visibility <1>:                        Protected.           (line   6)
19470
* visibility <2>:                        Internal.            (line   6)
19471
* visibility:                            Hidden.              (line   6)
19472
* VMS (VAX) options:                     VAX-Opts.            (line  42)
19473
* vtable_entry directive:                VTableEntry.         (line   6)
19474
* vtable_inherit directive:              VTableInherit.       (line   6)
19475
* warning directive:                     Warning.             (line   6)
19476
* warning for altered difference tables: K.                   (line   6)
19477
* warning messages:                      Errors.              (line   6)
19478
* warnings, causing error:               W.                   (line  16)
19479
* warnings, M32R:                        M32R-Warnings.       (line   6)
19480
* warnings, suppressing:                 W.                   (line  11)
19481
* warnings, switching on:                W.                   (line  19)
19482
* weak directive:                        Weak.                (line   6)
19483
* weakref directive:                     Weakref.             (line   6)
19484
* whitespace:                            Whitespace.          (line   6)
19485
* whitespace, removed by preprocessor:   Preprocessing.       (line   7)
19486
* wide floating point directives, VAX:   VAX-directives.      (line  10)
19487
* width directive, TIC54X:               TIC54X-Directives.   (line 127)
19488
* Width of continuation lines of disassembly output: listing. (line  21)
19489
* Width of first line disassembly output: listing.            (line  16)
19490
* Width of source line output:           listing.             (line  28)
19491
* wmsg directive, TIC54X:                TIC54X-Directives.   (line  77)
19492
* word directive:                        Word.                (line   6)
19493
* word directive, ARC:                   ARC Directives.      (line 174)
19494
* word directive, H8/300:                H8/300 Directives.   (line   6)
19495
* word directive, i386:                  i386-Float.          (line  21)
19496
* word directive, SPARC:                 Sparc-Directives.    (line  51)
19497
* word directive, TIC54X:                TIC54X-Directives.   (line 111)
19498
* word directive, x86-64:                i386-Float.          (line  21)
19499
* writing patterns in memory:            Fill.                (line   6)
19500
* wval:                                  Z8000 Directives.    (line  24)
19501
* x86-64 arch directive:                 i386-Arch.           (line   6)
19502
* x86-64 att_syntax pseudo op:           i386-Syntax.         (line   6)
19503
* x86-64 conversion instructions:        i386-Mnemonics.      (line  32)
19504
* x86-64 floating point:                 i386-Float.          (line   6)
19505
* x86-64 immediate operands:             i386-Syntax.         (line  15)
19506
* x86-64 instruction naming:             i386-Mnemonics.      (line   6)
19507
* x86-64 intel_syntax pseudo op:         i386-Syntax.         (line   6)
19508
* x86-64 jump optimization:              i386-Jumps.          (line   6)
19509
* x86-64 jump, call, return:             i386-Syntax.         (line  38)
19510
* x86-64 jump/call operands:             i386-Syntax.         (line  15)
19511
* x86-64 memory references:              i386-Memory.         (line   6)
19512
* x86-64 options:                        i386-Options.        (line   6)
19513
* x86-64 register operands:              i386-Syntax.         (line  15)
19514
* x86-64 registers:                      i386-Regs.           (line   6)
19515
* x86-64 sections:                       i386-Syntax.         (line  44)
19516
* x86-64 size suffixes:                  i386-Syntax.         (line  29)
19517
* x86-64 source, destination operands:   i386-Syntax.         (line  22)
19518
* x86-64 support:                        i386-Dependent.      (line   6)
19519
* x86-64 syntax compatibility:           i386-Syntax.         (line   6)
19520
* xfloat directive, TIC54X:              TIC54X-Directives.   (line  64)
19521
* xlong directive, TIC54X:               TIC54X-Directives.   (line 135)
19522
* Xtensa architecture:                   Xtensa-Dependent.    (line   6)
19523
* Xtensa assembler syntax:               Xtensa Syntax.       (line   6)
19524
* Xtensa directives:                     Xtensa Directives.   (line   6)
19525
* Xtensa opcode names:                   Xtensa Opcodes.      (line   6)
19526
* Xtensa register names:                 Xtensa Registers.    (line   6)
19527
* xword directive, SPARC:                Sparc-Directives.    (line  55)
19528
* Z80 $:                                 Z80-Chars.           (line   8)
19529
* Z80 ':                                 Z80-Chars.           (line  13)
19530
* Z80 floating point:                    Z80 Floating Point.  (line   6)
19531
* Z80 line comment character:            Z80-Chars.           (line   6)
19532
* Z80 options:                           Z80 Options.         (line   6)
19533
* Z80 registers:                         Z80-Regs.            (line   6)
19534
* Z80 support:                           Z80-Dependent.       (line   6)
19535
* Z80 Syntax:                            Z80 Options.         (line  47)
19536
* Z80, \:                                Z80-Chars.           (line  11)
19537
* Z80, case sensitivity:                 Z80-Case.            (line   6)
19538
* Z80-only directives:                   Z80 Directives.      (line   9)
19539
* Z800 addressing modes:                 Z8000-Addressing.    (line   6)
19540
* Z8000 directives:                      Z8000 Directives.    (line   6)
19541
* Z8000 line comment character:          Z8000-Chars.         (line   6)
19542
* Z8000 line separator:                  Z8000-Chars.         (line   8)
19543
* Z8000 opcode summary:                  Z8000 Opcodes.       (line   6)
19544
* Z8000 options:                         Z8000 Options.       (line   6)
19545
* Z8000 registers:                       Z8000-Regs.          (line   6)
19546
* Z8000 support:                         Z8000-Dependent.     (line   6)
19547
 
19548
 
19549
* zero-terminated strings:               Asciz.               (line   6)
19550
19551
19552

19553
Tag Table:
19554
Node: Top758
19555
Node: Overview1747
19556
Node: Manual29419
19557
Node: GNU Assembler30363
19558
Node: Object Formats31534
19559
Node: Command Line31986
19560
Node: Input Files33073
19561
Node: Object35054
19562
Node: Errors35950
19563
Node: Invoking37145
19564
Node: a39100
19565
Node: alternate41011
19566
Node: D41183
19567
Node: f41416
19568
Node: I41924
19569
Node: K42468
19570
Node: L42772
19571
Node: listing43511
19572
Node: M45170
19573
Node: MD49571
19574
Node: o49997
19575
Node: R50452
19576
Node: statistics51482
19577
Node: traditional-format51889
19578
Node: v52362
19579
Node: W52637
19580
Node: Z53544
19581
Node: Syntax54066
19582
Node: Preprocessing54657
19583
Node: Whitespace56220
19584
Node: Comments56616
19585
Node: Symbol Intro58769
19586
Node: Statements59459
19587
Node: Constants61380
19588
Node: Characters62011
19589
Node: Strings62513
19590
Node: Chars64679
19591
Node: Numbers65433
19592
Node: Integers65973
19593
Node: Bignums66629
19594
Node: Flonums66985
19595
Node: Sections68732
19596
Node: Secs Background69110
19597
Node: Ld Sections74149
19598
Node: As Sections76533
19599
Node: Sub-Sections77443
19600
Node: bss80588
19601
Node: Symbols81538
19602
Node: Labels82186
19603
Node: Setting Symbols82917
19604
Node: Symbol Names83413
19605
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19606
Node: Symbol Attributes88923
19607
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19608
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19609
Node: a.out Symbols91093
19610
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19611
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19612
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19613
Node: SOM Symbols92492
19614
Node: Expressions92934
19615
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19616
Node: Integer Exprs94030
19617
Node: Arguments94425
19618
Node: Operators95531
19619
Node: Prefix Ops95866
19620
Node: Infix Ops96194
19621
Node: Pseudo Ops98584
19622
Node: Abort103990
19623
Node: ABORT (COFF)104402
19624
Node: Align104610
19625
Node: Ascii106899
19626
Node: Asciz107208
19627
Node: Balign107453
19628
Node: Byte109316
19629
Node: Comm109554
19630
Node: CFI directives110928
19631
Node: LNS directives115522
19632
Node: Data117597
19633
Node: Def117924
19634
Node: Desc118156
19635
Node: Dim118656
19636
Node: Double118913
19637
Node: Eject119251
19638
Node: Else119426
19639
Node: Elseif119726
19640
Node: End120020
19641
Node: Endef120235
19642
Node: Endfunc120412
19643
Node: Endif120587
19644
Node: Equ120848
19645
Node: Equiv121362
19646
Node: Eqv121918
19647
Node: Err122282
19648
Node: Error122593
19649
Node: Exitm123038
19650
Node: Extern123207
19651
Node: Fail123468
19652
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19653
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19654
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19655
Node: Func125696
19656
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19657
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19658
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19659
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19660
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19661
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19662
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19663
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19664
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19665
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19666
Node: Irp134090
19667
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19668
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19669
Node: Lflags136634
19670
Node: Line136828
19671
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19672
Node: Ln138976
19673
Node: MRI139137
19674
Node: List139475
19675
Node: Long140083
19676
Node: Macro140270
19677
Node: Altmacro146192
19678
Node: Noaltmacro147523
19679
Node: Nolist147692
19680
Node: Octa148122
19681
Node: Org148456
19682
Node: P2align149739
19683
Node: Previous151667
19684
Node: PopSection153080
19685
Node: Print153588
19686
Node: Protected153817
19687
Node: Psize154464
19688
Node: Purgem155148
19689
Node: PushSection155369
19690
Node: Quad156112
19691
Node: Reloc156568
19692
Node: Rept157329
19693
Node: Sbttl157743
19694
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19695
Node: Section158449
19696
Node: Set163586
19697
Node: Short164223
19698
Node: Single164544
19699
Node: Size164889
19700
Node: Sleb128165561
19701
Node: Skip165883
19702
Node: Space166207
19703
Node: Stab166848
19704
Node: String168852
19705
Node: Struct169846
19706
Node: SubSection170571
19707
Node: Symver171134
19708
Node: Tag173527
19709
Node: Text173909
19710
Node: Title174230
19711
Node: Type174611
19712
Node: Uleb128176334
19713
Node: Val176658
19714
Node: Version176908
19715
Node: VTableEntry177183
19716
Node: VTableInherit177473
19717
Node: Warning177923
19718
Node: Weak178157
19719
Node: Weakref178826
19720
Node: Word179791
19721
Node: Deprecated181637
19722
Node: Object Attributes181872
19723
Node: GNU Object Attributes183592
19724
Node: Defining New Object Attributes186037
19725
Node: Machine Dependencies186834
19726
Node: Alpha-Dependent189718
19727
Node: Alpha Notes190132
19728
Node: Alpha Options190413
19729
Node: Alpha Syntax192611
19730
Node: Alpha-Chars193080
19731
Node: Alpha-Regs193311
19732
Node: Alpha-Relocs193698
19733
Node: Alpha Floating Point199956
19734
Node: Alpha Directives200178
19735
Node: Alpha Opcodes205701
19736
Node: ARC-Dependent205996
19737
Node: ARC Options206379
19738
Node: ARC Syntax207448
19739
Node: ARC-Chars207680
19740
Node: ARC-Regs207812
19741
Node: ARC Floating Point207936
19742
Node: ARC Directives208247
19743
Node: ARC Opcodes214219
19744
Node: ARM-Dependent214445
19745
Node: ARM Options214871
19746
Node: ARM Syntax220846
19747
Node: ARM-Chars221115
19748
Node: ARM-Regs221639
19749
Node: ARM Floating Point221848
19750
Node: ARM-Relocations222047
19751
Node: ARM Directives223000
19752
Node: ARM Opcodes231372
19753
Node: ARM Mapping Symbols233460
19754
Node: AVR-Dependent234239
19755
Node: AVR Options234525
19756
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20010
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20011
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20012
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20013
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20014
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20015
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20016
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20017
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20018
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20019
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20020
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20021
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20022
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20023
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20024
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20025
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20026
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20027
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20028
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20029
Node: Bug Criteria607080
20030
Node: Bug Reporting607847
20031
Node: Acknowledgements614496
20032
Ref: Acknowledgements-Footnote-1619394
20033
Node: GNU Free Documentation License619420

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