URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [arm/] [arch6zk.d] - Blame information for rev 38

Line No.	Rev	Author	Line
1	38	julius	`#name: ARM V6 instructions`
2			`#as: -march=armv6zk`
3			`#objdump: -dr --prefix-addresses --show-raw-insn`
4
5			`.: +file format .arm.*`
6
7			`Disassembly of section .text:`
8			`0+000 <[^>]*> f57ff01f ? clrex`
9			`0+004 <[^>]*> e1dc4f9f ? ldrexb r4, \[ip\]`
10			`0+008 <[^>]*> 11d4cf9f ? ldrexbne ip, \[r4\]`
11			`0+00c <[^>]*> e1bc4f9f ? ldrexd r4, \[ip\]`
12			`0+010 <[^>]*> 11b4cf9f ? ldrexdne ip, \[r4\]`
13			`0+014 <[^>]*> e1fc4f9f ? ldrexh r4, \[ip\]`
14			`0+018 <[^>]*> 11f4cf9f ? ldrexhne ip, \[r4\]`
15			`0+01c <[^>]*> e320f080 ? nop \{128\}`
16			`0+020 <[^>]*> 1320f07f ? nopne \{127\}`
17			`0+024 <[^>]*> e320f004 ? sev`
18			`0+028 <[^>]*> e1c74f9c ? strexb r4, ip, \[r7\]`
19			`0+02c <[^>]*> 11c8cf94 ? strexbne ip, r4, \[r8\]`
20			`0+030 <[^>]*> e1a74f9c ? strexd r4, ip, \[r7\]`
21			`0+034 <[^>]*> 11a8cf94 ? strexdne ip, r4, \[r8\]`
22			`0+038 <[^>]*> e1e74f9c ? strexh r4, ip, \[r7\]`
23			`0+03c <[^>]*> 11e8cf94 ? strexhne ip, r4, \[r8\]`
24			`0+040 <[^>]*> e320f002 ? wfe`
25			`0+044 <[^>]*> e320f003 ? wfi`
26			`0+048 <[^>]*> e320f001 ? yield`
27			`0+04c <[^>]*> e16ec371 ? smc 60465`
28			`0+050 <[^>]*> 11613c7e ? smcne 5070`
29			`0+054 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)`
30			`0+058 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)`
31			`0+05c <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)`
32