URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [arm/] [arm-it.d] - Blame information for rev 156

Details | Compare with Previous | View Log


#name: ARM IT instruction
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
 
.*: +file format .*arm.*
 
Disassembly of section .text:
0+000 <[^>]*> 03a00000 ?    moveq   r0, #0  ; 0x0
0+004 <[^>]*> e1a0f00e ?    mov     pc, lr

Line No.	Rev	Author	Line
1	38	julius	`#name: ARM IT instruction`
2			`#objdump: -dr --prefix-addresses --show-raw-insn`
3			`#skip: --coff --pe --wince --aout* --netbsd --riscix*`
4
5			`.: +file format .arm.*`
6
7			`Disassembly of section .text:`
8			`0+000 <[^>]*> 03a00000 ? moveq r0, #0 ; 0x0`
9			`0+004 <[^>]*> e1a0f00e ? mov pc, lr`

Browse

Tools

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [arm/] [arm-it.d] - Blame information for rev 156