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[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [bfin/] [control_code2.s] - Blame information for rev 132

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Line No. Rev Author Line
1 132 jeremybenn 
 
2 
.EXTERN MY_LABEL2;
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.section .text;
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//
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//6 CONTROL CODE BIT MANAGEMENT
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//
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//CC = Dreg == Dreg ; /* equal, register, signed (a) */
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CC = R7 == R0;
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CC = R6 == R1;
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CC = R0 == R7;
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//CC = Dreg == imm3 ; /* equal, immediate, signed (a) */
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CC = R7 == -4;
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CC = R7 == 3;
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CC = R0 == -4;
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CC = R0 == 3;
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//CC = Dreg < Dreg ; /* less than, register, signed (a) */
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CC = R7 < R0;
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CC = R6 < R0;
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CC = R7 < R1;
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CC = R1 < R7;
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CC = R0 < R6;
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//CC = Dreg < imm3 ; /* less than, immediate, signed (a) */
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CC = R7 < -4;
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CC = R6 < -4;
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CC = R7 < 3;
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CC = R1 < 3;
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//CC = Dreg <= Dreg ; /* less than or equal, register, signed (a) */
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CC = R7 <= R0;
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CC = R6 <= R0;
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CC = R7 <= R1;
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CC = R1 <= R7;
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CC = R0 <= R6;
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//CC = Dreg <= imm3 ; /* less than or equal, immediate, signed (a) */
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CC = R7 <= -4;
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CC = R6 <= -4;
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CC = R7 <= 3;
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CC = R1 <= 3;
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//CC = Dreg < Dreg (IU) ; /* less than, register, unsigned (a) */
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CC = R7 < R0(IU);
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CC = R6 < R0(IU);
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CC = R7 < R1(IU);
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CC = R1 < R7(IU);
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CC = R0 < R6(IU);
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//CC = Dreg < uimm3 (IU) ; /* less than, immediate, unsigned (a) */
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CC = R7 < 0(IU);
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CC = R6 < 0(IU);
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CC = R7 < 7(IU);
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CC = R1 < 7(IU);
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//CC = Dreg <= Dreg (IU) ; /* less than or equal, register, unsigned (a) */
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CC = R7 <= R0(IU);
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CC = R6 <= R0(IU);
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CC = R7 <= R1(IU);
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CC = R1 <= R7(IU);
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CC = R0 <= R6(IU);
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//CC = Dreg <= uimm3 (IU) ; /* less than or equal, immediate unsigned (a) */
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CC = R7 <= 0(IU);
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CC = R6 <= 0(IU);
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CC = R7 <= 7(IU);
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CC = R1 <= 7(IU);
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//CC = Preg == Preg ; /* equal, register, signed (a) */
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CC = P5 == P0;
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CC = P5 == P1;
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CC = P0 == P2;
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CC = P3 == P5;
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//CC = Preg == imm3 ; /* equal, immediate, signed (a) */
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CC = P5 == -4;
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CC = P5 == 0;
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CC = P5 == 3;
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CC = P2 == -4;
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CC = P2 == 0;
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CC = P2 == 3;
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//CC = Preg < Preg ; /* less than, register, signed (a) */
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CC = P5 < P0;
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CC = P5 < P1;
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CC = P0 < P2;
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CC = P3 < P5;
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//CC = Preg < imm3 ; /* less than, immediate, signed (a) */
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CC = P5 < -4;
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CC = P5 < 0;
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CC = P5 < 3;
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CC = P2 < -4;
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CC = P2 < 0;
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CC = P2 < 3;
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//CC = Preg <= Preg ; /* less than or equal, register, signed (a) */
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CC = P5 <= P0;
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CC = P5 <= P1;
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CC = P0 <= P2;
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CC = P3 <= P5;
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//CC = Preg <= imm3 ; /* less than or equal, immediate, signed (a) */
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CC = P5 <= -4;
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CC = P5 <= 0;
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CC = P5 <= 3;
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CC = P2 <= -4;
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CC = P2 <= 0;
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CC = P2 <= 3;
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//CC = Preg < Preg (IU) ; /* less than, register, unsigned (a) */
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CC = P5 < P0(IU);
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CC = P5 < P1(IU);
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CC = P0 < P2(IU);
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CC = P3 < P5(IU);
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//CC = Preg < uimm3 (IU) ; /* less than, immediate, unsigned (a) */
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CC = P5 < 0(IU);
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CC = P5 < 7(IU);
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CC = P2 < 0(IU);
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CC = P2 < 7(IU);
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//CC = Preg <= Preg (IU) ; /* less than or equal, register, unsigned (a) */
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CC = P5 <= P0(IU);
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CC = P5 <= P1(IU);
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CC = P0 <= P2(IU);
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CC = P3 <= P5(IU);
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//CC = Preg <= uimm3 (IU) ; /* less than or equal, immediate unsigned (a) */
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CC = P5 <= 0(IU);
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CC = P5 <= 7(IU);
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CC = P2 <= 0(IU);
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CC = P2 <= 7(IU);
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CC = A0 == A1 ; /* equal, signed (a) */
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CC = A0 < A1 ; /* less than, Accumulator, signed (a) */
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CC = A0 <= A1 ; /* less than or equal, Accumulator, signed (a) */
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//Dreg = CC ; /* CC into 32-bit data register, zero-extended (a) */
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R7 = CC;
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R0 = CC;
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//statbit = CC ; /* status bit equals CC (a) */
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AZ = CC;
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AN = CC;
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AC0= CC;
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AC1= CC;
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//V  = CC;
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VS = CC;
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AV0= CC;
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AV0S= CC;
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AV1 = CC;
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AV1S= CC;
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AQ  = CC;
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//statbit |= CC ; /* status bit equals status bit OR CC (a) */
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AZ |= CC;
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AN |= CC;
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AC0|= CC;
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AC1|= CC;
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//V  |= CC;
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VS |= CC;
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AV0|= CC;
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AV0S|= CC;
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AV1 |= CC;
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AV1S|= CC;
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AQ  |= CC;
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//statbit &= CC ; /* status bit equals status bit AND CC (a) */
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AZ &= CC;
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AN &= CC;
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AC0&= CC;
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AC1&= CC;
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//V  &= CC;
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VS &= CC;
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AV0&= CC;
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AV0S&= CC;
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AV1 &= CC;
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AV1S&= CC;
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AQ  &= CC;
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//statbit ^= CC ; /* status bit equals status bit XOR CC (a) */
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AZ ^= CC;
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AN ^= CC;
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AC0^= CC;
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AC1^= CC;
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//V  ^= CC;
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VS ^= CC;
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AV0^= CC;
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AV0S^= CC;
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AV1 ^= CC;
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AV1S^= CC;
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AQ  ^= CC;
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//CC = Dreg ; /* CC set if the register is non-zero (a) */
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CC = R7;
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CC = R6;
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CC = R1;
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CC = R0;
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//CC = statbit ; /* CC equals status bit (a) */
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CC = AZ;
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CC = AN;
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CC = AC0;
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CC = AC1;
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//CC = V;
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CC = VS;
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CC = AV0;
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CC = AV0S;
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CC = AV1;
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CC = AV1S;
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CC = AQ;
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//CC |= statbit ; /* CC equals CC OR status bit (a) */
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CC |= AZ;
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CC |= AN;
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CC |= AC0;
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CC |= AC1;
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//CC |= V;
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CC |= VS;
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CC |= AV0;
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CC |= AV0S;
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CC |= AV1;
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CC |= AV1S;
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CC |= AQ;
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//CC &= statbit ; /* CC equals CC AND status bit (a) */
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CC &= AZ;
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CC &= AN;
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CC &= AC0;
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CC &= AC1;
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//CC &= V;
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CC &= VS;
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CC &= AV0;
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CC &= AV0S;
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CC &= AV1;
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CC &= AV1S;
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CC &= AQ;
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244 
//CC ^= statbit ; /* CC equals CC XOR status bit (a) */
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CC ^= AZ;
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CC ^= AN;
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CC ^= AC0;
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CC ^= AC1;
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//CC ^= V;
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CC ^= VS;
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CC ^= AV0;
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CC ^= AV0S;
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CC ^= AV1;
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CC ^= AV1S;
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CC ^= AQ;
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CC = ! CC ; /* (a) */

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