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[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [cr16/] [add_test.d] - Blame information for rev 202

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Line No. Rev Author Line
1 38 julius 
#as:
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#objdump:  -dr
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#name:  add_test
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.*: +file format .*
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Disassembly of section .text:
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00000000 
:
10 
   0:   f1 30           addb    \$0xf:s,r1
11 
   2:   b2 30 ff 00     addb    \$0xff:m,r2
12 
   6:   b1 30 ff 0f     addb    \$0xfff:m,r1
13 
   a:   b1 30 14 00     addb    \$0x14:m,r1
14 
   e:   a2 30           addb    \$0xa:s,r2
15 
  10:   b2 30 0b 00     addb    \$0xb:m,r2
16 
  14:   12 31           addb    r1,r2
17 
  16:   23 31           addb    r2,r3
18 
  18:   34 31           addb    r3,r4
19 
  1a:   56 31           addb    r5,r6
20 
  1c:   67 31           addb    r6,r7
21 
  1e:   78 31           addb    r7,r8
22 
  20:   f1 34           addcb   \$0xf:s,r1
23 
  22:   b2 34 ff 00     addcb   \$0xff:m,r2
24 
  26:   b1 34 ff 0f     addcb   \$0xfff:m,r1
25 
  2a:   b1 34 14 00     addcb   \$0x14:m,r1
26 
  2e:   a2 34           addcb   \$0xa:s,r2
27 
  30:   b2 34 0b 00     addcb   \$0xb:m,r2
28 
  34:   12 35           addcb   r1,r2
29 
  36:   23 35           addcb   r2,r3
30 
  38:   34 35           addcb   r3,r4
31 
  3a:   56 35           addcb   r5,r6
32 
  3c:   67 35           addcb   r6,r7
33 
  3e:   78 35           addcb   r7,r8
34 
  40:   f1 36           addcw   \$0xf:s,r1
35 
  42:   b2 36 ff 00     addcw   \$0xff:m,r2
36 
  46:   b1 36 ff 0f     addcw   \$0xfff:m,r1
37 
  4a:   b1 36 14 00     addcw   \$0x14:m,r1
38 
  4e:   a2 36           addcw   \$0xa:s,r2
39 
  50:   b2 36 0b 00     addcw   \$0xb:m,r2
40 
  54:   12 37           addcw   r1,r2
41 
  56:   23 37           addcw   r2,r3
42 
  58:   34 37           addcw   r3,r4
43 
  5a:   56 37           addcw   r5,r6
44 
  5c:   67 37           addcw   r6,r7
45 
  5e:   78 37           addcw   r7,r8
46 
  60:   f1 32           addw    \$0xf:s,r1
47 
  62:   b2 32 ff 00     addw    \$0xff:m,r2
48 
  66:   b1 32 ff 0f     addw    \$0xfff:m,r1
49 
  6a:   b1 32 14 00     addw    \$0x14:m,r1
50 
  6e:   a2 32           addw    \$0xa:s,r2
51 
  70:   12 33           addw    r1,r2
52 
  72:   23 33           addw    r2,r3
53 
  74:   34 33           addw    r3,r4
54 
  76:   56 33           addw    r5,r6
55 
  78:   67 33           addw    r6,r7
56 
  7a:   78 33           addw    r7,r8
57 
  7c:   f1 60           addd    \$0xf:s,\(r2,r1\)
58 
  7e:   b1 60 0b 00     addd    \$0xb:m,\(r2,r1\)
59 
  82:   b1 60 ff 00     addd    \$0xff:m,\(r2,r1\)
60 
  86:   b1 60 ff 0f     addd    \$0xfff:m,\(r2,r1\)
61 
  8a:   10 04 ff ff     addd    \$0xffff:m,\(r2,r1\)
62 
  8e:   1f 04 ff ff     addd    \$0xfffff:m,\(r2,r1\)
63 
  92:   21 00 ff 0f     addd    \$0xfffffff:l,\(r2,r1\)
64 
  96:   ff ff
65 
  98:   91 60           addd    \$-1:s,\(r2,r1\)
66 
  9a:   31 61           addd    \(r4,r3\),\(r2,r1\)
67 
  9c:   31 61           addd    \(r4,r3\),\(r2,r1\)
68 
  9e:   af 60           addd    \$0xa:s,\(sp\)
69 
  a0:   ef 60           addd    \$0xe:s,\(sp\)
70 
  a2:   bf 60 0b 00     addd    \$0xb:m,\(sp\)
71 
  a6:   8f 60           addd    \$0x8:s,\(sp\)

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