OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [d30v/] [array.d] - Blame information for rev 156

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius 
#objdump: -dr
2 
#name: D30V array test
3 
#as:
4 
 
5 
.*: +file format elf32-d30v
6 
 
7 
Disassembly of section .text:
8 
 
9 
0+0000 <__foo-0x48>:
10 
   0:   880820c0 80000048       add.l   r2, r3, 0x48
11 
                        0: R_D30V_32    .text
12 
   8:   880820c0 80000049       add.l   r2, r3, 0x49
13 
                        8: R_D30V_32    .text
14 
  10:   880820c0 8000004a       add.l   r2, r3, 0x4a
15 
                        10: R_D30V_32   .text
16 
  18:   880820c0 8000004b       add.l   r2, r3, 0x4b
17 
                        18: R_D30V_32   .text
18 
  20:   880820c0 8000004c       add.l   r2, r3, 0x4c
19 
                        20: R_D30V_32   .text
20 
  28:   880820c0 8000004d       add.l   r2, r3, 0x4d
21 
                        28: R_D30V_32   .text
22 
  30:   880820c0 8000004e       add.l   r2, r3, 0x4e
23 
                        30: R_D30V_32   .text
24 
  38:   880820c0 8000004f       add.l   r2, r3, 0x4f
25 
                        38: R_D30V_32   .text
26 
  40:   880820c0 80000050       add.l   r2, r3, 0x50
27 
                        40: R_D30V_32   .text
28 
 
29 
0+0048 <__foo>:
30 
  48:   12345678 12345678       .long   0x12345678      ||      .long   0x12345678
31 
  50:   12345678 00000000       .long   0x12345678      ||      bra.s   r0

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.