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[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [i860/] [pfsm.s] - Blame information for rev 449

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Line No. Rev Author Line
1 38 julius 
# pfsm.p family (p={ss,sd,dd})
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        .text
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        # pfsm without dual bit
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        r2s1.ss %f0,%f1,%f2
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        r2s1.sd %f3,%f4,%f5
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        r2s1.dd %f0,%f2,%f4
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        r2st.ss %f1,%f2,%f3
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        r2st.sd %f4,%f5,%f6
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        r2st.dd %f2,%f4,%f6
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        r2as1.ss        %f2,%f3,%f4
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        r2as1.sd        %f6,%f7,%f8
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        r2as1.dd        %f4,%f6,%f8
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        r2ast.ss        %f3,%f4,%f5
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        r2ast.sd        %f7,%f8,%f9
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        r2ast.dd        %f6,%f8,%f10
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        i2s1.ss %f4,%f5,%f6
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        i2s1.sd %f8,%f9,%f10
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        i2s1.dd %f12,%f14,%f16
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        i2st.ss %f7,%f8,%f9
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        i2st.sd %f11,%f12,%f13
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        i2st.dd %f14,%f16,%f18
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        i2as1.ss        %f10,%f11,%f12
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        i2as1.sd        %f14,%f15,%f16
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        i2as1.dd        %f16,%f18,%f20
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        i2ast.ss        %f13,%f14,%f15
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        i2ast.sd        %f17,%f18,%f19
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        i2ast.dd        %f18,%f20,%f22
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        rat1s2.ss       %f14,%f15,%f16
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        rat1s2.sd       %f20,%f21,%f22
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        rat1s2.dd       %f20,%f22,%f24
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        m12asm.ss       %f15,%f16,%f17
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        m12asm.sd       %f23,%f24,%f25
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        m12asm.dd       %f22,%f24,%f26
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        ra1s2.ss        %f18,%f19,%f20
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        ra1s2.sd        %f26,%f27,%f28
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        ra1s2.dd        %f20,%f22,%f24
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        m12ttsa.ss      %f19,%f20,%f21
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        m12ttsa.sd      %f29,%f30,%f31
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        m12ttsa.dd      %f22,%f24,%f26
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        iat1s2.ss       %f20,%f21,%f22
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        iat1s2.sd       %f0,%f1,%f2
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        iat1s2.dd       %f24,%f26,%f28
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        m12tsm.ss       %f21,%f22,%f23
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        m12tsm.sd       %f3,%f4,%f5
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        m12tsm.dd       %f30,%f0,%f2
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        ia1s2.ss        %f22,%f23,%f24
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        ia1s2.sd        %f6,%f7,%f8
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        ia1s2.dd        %f4,%f6,%f8
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        m12tsa.ss       %f23,%f24,%f25
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        m12tsa.sd       %f9,%f10,%f11
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        m12tsa.dd       %f6,%f8,%f10
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        # pfsm with dual bit
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        d.r2s1.ss       %f0,%f1,%f2
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        nop
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        d.r2s1.sd       %f3,%f4,%f5
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        nop
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        d.r2s1.dd       %f0,%f2,%f4
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        nop
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        d.r2st.ss       %f1,%f2,%f3
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        nop
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        d.r2st.sd       %f4,%f5,%f6
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        nop
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        d.r2st.dd       %f2,%f4,%f6
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        nop
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        d.r2as1.ss      %f2,%f3,%f4
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        nop
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        d.r2as1.sd      %f6,%f7,%f8
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        nop
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        d.r2as1.dd      %f4,%f6,%f8
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        nop
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        d.r2ast.ss      %f3,%f4,%f5
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        nop
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        d.r2ast.sd      %f7,%f8,%f9
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        nop
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        d.r2ast.dd      %f6,%f8,%f10
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        nop
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        d.i2s1.ss       %f4,%f5,%f6
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        nop
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        d.i2s1.sd       %f8,%f9,%f10
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        nop
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        d.i2s1.dd       %f12,%f14,%f16
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        nop
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        d.i2st.ss       %f7,%f8,%f9
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        nop
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        d.i2st.sd       %f11,%f12,%f13
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        nop
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        d.i2st.dd       %f14,%f16,%f18
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        nop
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        d.i2as1.ss      %f10,%f11,%f12
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        nop
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        d.i2as1.sd      %f14,%f15,%f16
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        nop
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        d.i2as1.dd      %f16,%f18,%f20
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        nop
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        d.i2ast.ss      %f13,%f14,%f15
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        nop
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        d.i2ast.sd      %f17,%f18,%f19
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        nop
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        d.i2ast.dd      %f18,%f20,%f22
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        nop
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        d.rat1s2.ss     %f14,%f15,%f16
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        nop
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        d.rat1s2.sd     %f20,%f21,%f22
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        nop
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        d.rat1s2.dd     %f20,%f22,%f24
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        nop
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        d.m12asm.ss     %f15,%f16,%f17
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        nop
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        d.m12asm.sd     %f23,%f24,%f25
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        nop
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        d.m12asm.dd     %f22,%f24,%f26
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        nop
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        d.ra1s2.ss      %f18,%f19,%f20
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        nop
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        d.ra1s2.sd      %f26,%f27,%f28
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        nop
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        d.ra1s2.dd      %f20,%f22,%f24
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        nop
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        d.m12ttsa.ss    %f19,%f20,%f21
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        nop
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        d.m12ttsa.sd    %f29,%f30,%f31
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        nop
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        d.m12ttsa.dd    %f22,%f24,%f26
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        nop
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        d.iat1s2.ss     %f20,%f21,%f22
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        nop
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        d.iat1s2.sd     %f0,%f1,%f2
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        nop
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        d.iat1s2.dd     %f24,%f26,%f28
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        nop
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        d.m12tsm.ss     %f21,%f22,%f23
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        nop
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        d.m12tsm.sd     %f3,%f4,%f5
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        nop
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        d.m12tsm.dd     %f30,%f0,%f2
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        nop
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        d.ia1s2.ss      %f22,%f23,%f24
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        nop
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        d.ia1s2.sd      %f6,%f7,%f8
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        nop
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        d.ia1s2.dd      %f4,%f6,%f8
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        nop
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        d.m12tsa.ss     %f23,%f24,%f25
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        nop
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        d.m12tsa.sd     %f9,%f10,%f11
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        nop
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        d.m12tsa.dd     %f6,%f8,%f10
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        nop
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