OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [mips/] [mips-gp32-fp32.s] - Blame information for rev 438

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius
 
2
        .sdata
3
shared: .word   11
4
 
5
        .data
6
unshared:
7
        .word   1
8
        .word   2
9
        .word   3
10
        .word   4
11
 
12
        .text
13
func:
14
        .set noreorder
15
        li      $4, 0x12345678  # 0000 lui      a0,0x1234
16
                                # 0004 ori      a0,a0,0x5678
17
        la      $4, shared      # 0008 addiu    a0,gp,shared
18
        la      $4, unshared    # 000c lui      a0,hi(unshared)
19
                                # 0010 addiu    a0,a0,lo(unshared)
20
        la      $4, end         # 0014 lui      a0,hi(end)
21
                                # 0018 addiu    a0,a0,lo(end)
22
        j       end             # 001c j        end
23
        jal     end             # 0020 jal      end
24
        lw      $4, shared      # 0024 lw       a0,shared(gp)
25
        lw      $4, unshared    # 0028 lui      a0,hi(unshared)
26
                                # 002c lw       a0,lo(unshared)(a0)
27
        lw      $4, end         # 0030 lui      a0,hi(end)
28
                                # 0034 lw       a0,lo(end)(a0)
29
        ld      $4, shared      # 0038 lw       a0,shared(gp)
30
                                # 003c lw       a1,shared+4(gp)
31
        ld      $4, unshared    # 0040 lui      at,hi(unshared)
32
                                # 0044 lw       a0,lo(unshared)(at)
33
                                # 0048 lw       a1,lo(unshared)+4(at)
34
        ld      $4, end         # 004c lui      at,hi(end)
35
                                # 0050 lw       a0,lo(end)(at)
36
                                # 0054 lw       a1,lo(end)+4(at)
37
        sw      $4, shared      # 0058 sw       a0,shared(gp)
38
        sw      $4, unshared    # 005c lui      at,hi(unshared)
39
                                # 0060 sw       a0,lo(unshared)(at)
40
        sd      $4, shared      # 0064 sw       a0,shared(gp)
41
                                # 0068 sw       a1,shared+4(gp)
42
        sd      $4, unshared    # 006c lui      at,hi(unshared)
43
                                # 0070 sw       a0,lo(unshared)(at)
44
                                # 0074 sw       a1,lo(unshared)+4(at)
45
        ulh     $4, unshared    # 0078 lui      at,hi(unshared)
46
                                # 007c addiu    at,at,lo(unshared)
47
                                # 0080 lb       a0,0(at)
48
                                # 0084 lbu      at,1(at)
49
                                # 0088 sll      a0,a0,8
50
                                # 008c or       a0,a0,at
51
        ush     $4, unshared    # 0090 lui      at,hi(unshared)
52
                                # 0094 addiu    at,at,lo(unshared)
53
                                # 0098 sb       a0,1(at)
54
                                # 009c srl      a0,a0,8
55
                                # 00a0 sb       a0,0(at)
56
                                # 00a4 lbu      at,1(at)
57
                                # 00a8 sll      a0,a0,8
58
                                # 00ac or       a0,a0,at
59
        ulw     $4, unshared    # 00b0 lui      at,hi(unshared)
60
                                # 00b4 addiu    at,at,lo(unshared)
61
                                # 00b8 lwl      a0,0(at)
62
                                # 00bc lwr      a0,3(at)
63
        usw     $4, unshared    # 00c0 lui      at,hi(unshared)
64
                                # 00c4 addiu    at,at,lo(unshared)
65
                                # 00c8 swl      a0,0(at)
66
                                # 00cc swr      a0,3(at)
67
        li.d    $4, 1.0         # 00d0 lui      a0,0x3ff0
68
                                # 00d4 move     a1,zero
69
        li.d    $4, 1.9         # 00d8 lui      at,hi(F1.9)
70
                                # 00dc lw       a0,lo(F1.9)(at)
71
                                # 00e0 lw       a1,lo(F1.9)+4(at)
72
        li.d    $f0, 1.0        # 00e4 lui      at,0x3ff0
73
                                # 00e8 mtc1     at,$f1
74
                                # 00ec mtc1     zero,$f0
75
        li.d    $f0, 1.9        # 00f0 ldc1     $f0,L1.9(gp)
76
        seq     $4, $5, -100    # 00f4 addiu    a0,a1,100
77
                                # 00f8 sltiu    a0,a0,1
78
        sne     $4, $5, -100    # 00fc addiu    a0,a1,100
79
                                # 0100 sltu     a0,zero,a0
80
        move    $4, $5          # 0104 move     a0,a1
81
 
82
# Not available in 32-bit mode
83
#       dla     $4, shared
84
#       dla     $4, unshared
85
#       uld     $4, unshared
86
#       usd     $4, unshared
87
 
88
# Should produce warnings given -mgp32
89
#       bgt     $4, 0x7fffffff, end
90
#       bgtu    $4, 0xffffffff, end
91
#       ble     $4, 0x7fffffff, end
92
#       bleu    $4, 0xffffffff, end
93
 
94
# Should produce warnings given -mfp32
95
#       add.d   $f1, $f2, $f3
96
 
97
end:
98
 
99
# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
100
      .space  8

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.