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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [ppc/] [power4.d] - Blame information for rev 156

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Line No. Rev Author Line
1 38 julius
#objdump: -drx -Mpower4
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#as: -mpower4
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#name: Power4 instructions
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.*: +file format elf64-powerpc
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.*
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architecture: powerpc:common64, flags 0x0+11:
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HAS_RELOC, HAS_SYMS
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start address 0x0+
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Sections:
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Idx Name +Size +VMA +LMA +File off +Algn
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 +0 \.text +0+c4 +0+ +0+ +.*
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 +CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
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 +1 \.data +0+10 +0+ +0+ +.*
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 +CONTENTS, ALLOC, LOAD, DATA
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 +2 \.bss +0+ +0+ +0+ +.*
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 +ALLOC
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 +3 \.toc +0+30 +0+ +0+ +.*
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 +CONTENTS, ALLOC, LOAD, RELOC, DATA
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SYMBOL TABLE:
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0+ l +d +\.text 0+ (|\.text)
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0+ l +d +\.data 0+ (|\.data)
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0+ l +d +\.bss  0+ (|\.bss)
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0+ l +\.data    0+ dsym0
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0+8 l +\.data   0+ dsym1
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0+ l +d +\.toc  0+ (|\.toc)
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0+8 l +\.data   0+ usym0
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0+10 l +\.data  0+ usym1
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0+ +\*UND\*     0+ esym0
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0+ +\*UND\*     0+ esym1
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Disassembly of section \.text:
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0+ <\.text>:
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 +0:    e0 83 00 00     lq      r4,0\(r3\)
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                        2: R_PPC64_ADDR16_LO_DS \.data
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 +4:    e0 83 00 00     lq      r4,0\(r3\)
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                        6: R_PPC64_ADDR16_LO_DS \.data\+0x8
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 +8:    e0 83 00 00     lq      r4,0\(r3\)
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                        a: R_PPC64_ADDR16_LO_DS \.data\+0x8
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 +c:    e0 83 00 10     lq      r4,16\(r3\)
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                        e: R_PPC64_ADDR16_LO_DS \.data\+0x10
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 +10:   e0 83 00 00     lq      r4,0\(r3\)
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                        12: R_PPC64_ADDR16_LO_DS        esym0
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 +14:   e0 83 00 00     lq      r4,0\(r3\)
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                        16: R_PPC64_ADDR16_LO_DS        esym1
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 +18:   e0 82 00 00     lq      r4,0\(r2\)
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                        1a: R_PPC64_TOC16_DS    \.toc
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 +1c:   e0 82 00 00     lq      r4,0\(r2\)
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                        1e: R_PPC64_TOC16_DS    \.toc\+0x8
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 +20:   e0 82 00 10     lq      r4,16\(r2\)
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                        22: R_PPC64_TOC16_DS    \.toc\+0x10
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 +24:   e0 82 00 10     lq      r4,16\(r2\)
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                        26: R_PPC64_TOC16_DS    \.toc\+0x18
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 +28:   e0 82 00 20     lq      r4,32\(r2\)
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                        2a: R_PPC64_TOC16_DS    \.toc\+0x20
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 +2c:   e0 82 00 20     lq      r4,32\(r2\)
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                        2e: R_PPC64_TOC16_DS    \.toc\+0x28
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 +30:   e0 c2 00 20     lq      r6,32\(r2\)
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                        32: R_PPC64_TOC16_LO_DS \.toc\+0x28
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 +34:   e0 80 00 00     lq      r4,0\(0\)
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                        36: R_PPC64_ADDR16_LO_DS        \.text
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 +38:   e0 c3 00 00     lq      r6,0\(r3\)
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                        3a: R_PPC64_GOT16_DS    \.data
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 +3c:   e0 c3 00 00     lq      r6,0\(r3\)
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                        3e: R_PPC64_GOT16_LO_DS \.data
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 +40:   e0 c3 00 00     lq      r6,0\(r3\)
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                        42: R_PPC64_PLT16_LO_DS \.data
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 +44:   e0 c3 00 00     lq      r6,0\(r3\)
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                        46: R_PPC64_SECTOFF_DS  \.data\+0x8
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 +48:   e0 c3 00 00     lq      r6,0\(r3\)
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                        4a: R_PPC64_SECTOFF_LO_DS       \.data\+0x8
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 +4c:   e0 c4 00 10     lq      r6,16\(r4\)
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 +50:   f8 c7 00 02     stq     r6,0\(r7\)
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 +54:   f8 c7 00 12     stq     r6,16\(r7\)
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 +58:   f8 c7 ff f2     stq     r6,-16\(r7\)
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 +5c:   f8 c7 80 02     stq     r6,-32768\(r7\)
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 +60:   f8 c7 7f f2     stq     r6,32752\(r7\)
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 +64:   00 00 02 00     attn
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 +68:   7c 6f f1 20     mtcr    r3
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 +6c:   7c 6f f1 20     mtcr    r3
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 +70:   7c 68 11 20     mtcrf   129,r3
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 +74:   7c 70 11 20     mtocrf  1,r3
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 +78:   7c 70 21 20     mtocrf  2,r3
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 +7c:   7c 70 41 20     mtocrf  4,r3
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 +80:   7c 70 81 20     mtocrf  8,r3
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 +84:   7c 71 01 20     mtocrf  16,r3
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 +88:   7c 72 01 20     mtocrf  32,r3
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 +8c:   7c 74 01 20     mtocrf  64,r3
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 +90:   7c 78 01 20     mtocrf  128,r3
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 +94:   7c 60 00 26     mfcr    r3
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 +98:   7c 70 10 26     mfocrf  r3,1
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 +9c:   7c 70 20 26     mfocrf  r3,2
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 +a0:   7c 70 40 26     mfocrf  r3,4
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 +a4:   7c 70 80 26     mfocrf  r3,8
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 +a8:   7c 71 00 26     mfocrf  r3,16
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 +ac:   7c 72 00 26     mfocrf  r3,32
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 +b0:   7c 74 00 26     mfocrf  r3,64
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 +b4:   7c 78 00 26     mfocrf  r3,128
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 +b8:   7c 01 17 ec     dcbz    r1,r2
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 +bc:   7c 23 27 ec     dcbzl   r3,r4
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 +c0:   7c 05 37 ec     dcbz    r5,r6

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