OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [ppc/] [test1xcoff32.d] - Blame information for rev 156

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius 
#objdump: -Drx
2 
#as:
3 
#name: PowerPC Test 1, 32 bit XCOFF
4 
 
5 
.*: +file format aixcoff-rs6000
6 
.*
7 
architecture: rs6000:6000, flags 0x00000031:
8 
HAS_RELOC, HAS_SYMS, HAS_LOCALS
9 
start address 0x0+0000
10 
 
11 
Sections:
12 
Idx Name +Size +VMA +LMA +File off +Algn
13 
 
14 
 +CONTENTS, ALLOC, LOAD, RELOC, CODE
15 
  1 \.data +00000028  0+0068  0+0068  00000110  2\*\*3
16 
 +CONTENTS, ALLOC, LOAD, RELOC, DATA
17 
  2 \.bss  +00000000  0+0090  0+0090  00000000  2\*\*3
18 
 +ALLOC
19 
SYMBOL TABLE:
20 
\[  0\]\(sec -2\)\(fl 0x00\)\(ty   0\)\(scl 103\) \(nx 1\) 0x00000000 fake
21 
File
22 
\[  2\]\(sec  1\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000000 \.crazy_table
23 
AUX val     8 prmhsh 0 snhsh 0 typ 1 algn 2 clss 1 stb 0 snstb 0
24 
\[  4\]\(sec  1\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000008
25 
AUX val    96 prmhsh 0 snhsh 0 typ 1 algn 2 clss 0 stb 0 snstb 0
26 
\[  6\]\(sec  1\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000008 reference_csect_relative_symbols
27 
AUX indx    4 prmhsh 0 snhsh 0 typ 2 algn 0 clss 0 stb 0 snstb 0
28 
\[  8\]\(sec  1\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000018 dubious_references_to_default_RW_csect
29 
AUX indx    4 prmhsh 0 snhsh 0 typ 2 algn 0 clss 0 stb 0 snstb 0
30 
\[ 10\]\(sec  1\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000028 reference_via_toc
31 
AUX indx    4 prmhsh 0 snhsh 0 typ 2 algn 0 clss 0 stb 0 snstb 0
32 
\[ 12\]\(sec  1\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000040 subtract_symbols
33 
AUX indx    4 prmhsh 0 snhsh 0 typ 2 algn 0 clss 0 stb 0 snstb 0
34 
\[ 14\]\(sec  1\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x0000005c load_addresses
35 
AUX indx    4 prmhsh 0 snhsh 0 typ 2 algn 0 clss 0 stb 0 snstb 0
36 
\[ 16\]\(sec  2\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000068
37 
AUX val    12 prmhsh 0 snhsh 0 typ 1 algn 2 clss 5 stb 0 snstb 0
38 
\[ 18\]\(sec  2\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000074 TOC
39 
AUX val     0 prmhsh 0 snhsh 0 typ 1 algn 2 clss 15 stb 0 snstb 0
40 
\[ 20\]\(sec  2\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000074 ignored0
41 
AUX val     4 prmhsh 0 snhsh 0 typ 1 algn 2 clss 3 stb 0 snstb 0
42 
\[ 22\]\(sec  2\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000078 ignored1
43 
AUX val     4 prmhsh 0 snhsh 0 typ 1 algn 2 clss 3 stb 0 snstb 0
44 
\[ 24\]\(sec  2\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x0000007c ignored2
45 
AUX val     4 prmhsh 0 snhsh 0 typ 1 algn 2 clss 3 stb 0 snstb 0
46 
\[ 26\]\(sec  2\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000080 ignored3
47 
AUX val     4 prmhsh 0 snhsh 0 typ 1 algn 2 clss 3 stb 0 snstb 0
48 
\[ 28\]\(sec  2\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000084 ignored4
49 
AUX val     4 prmhsh 0 snhsh 0 typ 1 algn 2 clss 3 stb 0 snstb 0
50 
\[ 30\]\(sec  2\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000088 ignored5
51 
AUX val     4 prmhsh 0 snhsh 0 typ 1 algn 2 clss 3 stb 0 snstb 0
52 
\[ 32\]\(sec  2\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x0000008c ignored6
53 
AUX val     4 prmhsh 0 snhsh 0 typ 1 algn 2 clss 3 stb 0 snstb 0
54 
\[ 34\]\(sec  0\)\(fl 0x00\)\(ty   0\)\(scl   2\) \(nx 1\) 0x00000000 esym0
55 
AUX val     0 prmhsh 0 snhsh 0 typ 0 algn 0 clss 0 stb 0 snstb 0
56 
\[ 36\]\(sec  0\)\(fl 0x00\)\(ty   0\)\(scl   2\) \(nx 1\) 0x00000000 esym1
57 
AUX val     0 prmhsh 0 snhsh 0 typ 0 algn 0 clss 0 stb 0 snstb 0
58 
 
59 
 
60 
Disassembly of section \.text:
61 
 
62 
0+0000 <\.crazy_table>:
63 
   0:   00 be ef ed     \.long 0xbeefed
64 
   4:   00 be ef ed     \.long 0xbeefed
65 
 
66 
0+0008 :
67 
   8:   80 63 00 00     l       r3,0\(r3\)
68 
   c:   80 63 00 04     l       r3,4\(r3\)
69 
  10:   80 63 00 04     l       r3,4\(r3\)
70 
  14:   80 63 00 00     l       r3,0\(r3\)
71 
 
72 
0+0018 :
73 
  18:   80 63 00 00     l       r3,0\(r3\)
74 
  1c:   80 63 00 04     l       r3,4\(r3\)
75 
  20:   80 63 00 04     l       r3,4\(r3\)
76 
  24:   80 63 00 08     l       r3,8\(r3\)
77 
 
78 
0+0028 :
79 
  28:   80 62 00 00     l       r3,0\(r2\)
80 
                        2a: R_TOC       ignored0\+0xf+ff8c
81 
  2c:   80 62 00 04     l       r3,4\(r2\)
82 
                        2e: R_TOC       ignored1\+0xf+ff88
83 
  30:   80 62 00 08     l       r3,8\(r2\)
84 
                        32: R_TOC       ignored2\+0xf+ff84
85 
  34:   80 62 00 0c     l       r3,12\(r2\)
86 
                        36: R_TOC       ignored3\+0xf+ff80
87 
  38:   80 62 00 10     l       r3,16\(r2\)
88 
                        3a: R_TOC       ignored4\+0xf+ff7c
89 
  3c:   80 62 00 14     l       r3,20\(r2\)
90 
                        3e: R_TOC       ignored5\+0xf+ff78
91 
 
92 
0+0040 :
93 
  40:   38 60 00 04     lil     r3,4
94 
  44:   38 60 ff fc     lil     r3,-4
95 
  48:   38 60 00 04     lil     r3,4
96 
  4c:   38 60 ff fc     lil     r3,-4
97 
  50:   38 60 ff fc     lil     r3,-4
98 
  54:   38 60 00 04     lil     r3,4
99 
  58:   80 64 00 04     l       r3,4\(r4\)
100 
 
101 
0+005c :
102 
  5c:   38 60 00 00     lil     r3,0
103 
  60:   38 60 00 04     lil     r3,4
104 
  64:   38 62 00 18     cal     r3,24\(r2\)
105 
                        66: R_TOC       ignored6\+0xf+ff74
106 
Disassembly of section \.data:
107 
 
108 
0+0068 :
109 
  68:   de ad be ef     stfdu   f21,-16657\(r13\)
110 
  6c:   ca fe ba be     lfd     f23,-17730\(r30\)
111 
  70:   00 00 ba ad     \.long 0xbaad
112 
 
113 
0+0074 :
114 
  74:   00 00 00 68     \.long 0x68
115 
                        74: R_POS       \.data\+0xf+ff98
116 
 
117 
0+0078 :
118 
  78:   00 00 00 6c     \.long 0x6c
119 
                        78: R_POS       \.data\+0xf+ff98
120 
 
121 
0+007c :
122 
  7c:   00 00 00 6c     \.long 0x6c
123 
                        7c: R_POS       \.data\+0xf+ff98
124 
 
125 
0+0080 :
126 
  80:   00 00 00 70     \.long 0x70
127 
                        80: R_POS       \.data\+0xf+ff98
128 
 
129 
0+0084 :
130 
  84:   00 00 00 00     \.long 0x0
131 
                        84: R_POS       esym0
132 
 
133 
0+0088 :
134 
  88:   00 00 00 00     \.long 0x0
135 
                        88: R_POS       esym1
136 
 
137 
0+008c :
138 
  8c:   00 00 00 00     \.long 0x0
139 
                        8c: R_POS       \.crazy_table

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.