OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [s390/] [zarch-z9-ec.s] - Blame information for rev 438

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius
.text
2
foo:
3
        lpdfr   %f6,%f2
4
        lndfr   %f6,%f2
5
        cpsdr   %f6,%f1,%f2
6
        lcdfr   %f6,%f2
7
        ldgr    %f6,%r2
8
        lgdr    %r2,%f6
9
        adtr    %f6,%f2,%f4
10
        axtr    %f6,%f2,%f4
11
        cdtr    %f6,%f2
12
        cxtr    %f6,%f2
13
        kdtr    %f6,%f2
14
        kxtr    %f6,%f2
15
        cedtr   %f6,%f2
16
        cextr   %f6,%f2
17
        cdgtr   %f6,%r2
18
        cxgtr   %f6,%r2
19
        cdstr   %f6,%r2
20
        cxstr   %f6,%r2
21
        cdutr   %f6,%r2
22
        cxutr   %f6,%r2
23
        cgdtr   %r2,1,%f6
24
        cgxtr   %r2,1,%f6
25
        csdtr   %r2,%f6
26
        csxtr   %r2,%f6
27
        cudtr   %r2,%f6
28
        cuxtr   %r2,%f6
29
        ddtr    %f6,%f2,%f4
30
        dxtr    %f6,%f2,%f4
31
        eedtr   %r2,%f6
32
        eextr   %r2,%f6
33
        esdtr   %r2,%f6
34
        esxtr   %r2,%f6
35
        iedtr   %f6,%f2,%r4
36
        iextr   %f6,%f2,%r4
37
        ltdtr   %f6,%f2
38
        ltxtr   %f6,%f2
39
        fidtr   %f6,1,%f2,3
40
        fixtr   %f6,1,%f2,3
41
        lfas    3(%r1)
42
        ldetr   %f6,%f2,1
43
        lxdtr   %f6,%f2,1
44
        ledtr   %f6,1,%f2,3
45
        ldxtr   %f6,1,%f2,3
46
        mdtr    %f6,%f2,%f4
47
        mxtr    %f6,%f2,%f4
48
        qadtr   %f6,%f2,%f4,1
49
        qaxtr   %f6,%f2,%f4,1
50
        rrdtr   %f6,%f2,%f4,1
51
        rrxtr   %f6,%f2,%f4,1
52
        srnmt   3(%r1)
53
        sfasr   %r2
54
        sldt    %f6,%f2,3(%r1,%r4)
55
        slxt    %f6,%f2,3(%r1,%r4)
56
        srdt    %f6,%f2,3(%r1,%r4)
57
        srxt    %f6,%f2,3(%r1,%r4)
58
        sdtr    %f6,%f2,%f4
59
        sxtr    %f6,%f2,%f4
60
        tdcet   %f6,3(%r1,%r2)
61
        tdcdt   %f6,3(%r1,%r2)
62
        tdcxt   %f6,3(%r1,%r2)
63
        tdget   %f6,3(%r1,%r2)
64
        tdgdt   %f6,3(%r1,%r2)
65
        tdgxt   %f6,3(%r1,%r2)
66
        pfpo
67
        ectg    10(%r1),20(%r2),%r3
68
        csst    10(%r1),20(%r2),%r3
69
        /* The following .data section is 4 byte aligned.
70
           So we get 2 additional bytes of 07 07 wherefor
71
           we have to provide an instruction.  */
72
        bcr     0,%r7

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.