OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [sparc/] [reloc64.d] - Blame information for rev 156

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius
#as: -64 -Av9
2
#objdump: -dr
3
#name: sparc64 reloc64
4
 
5
.*: +file format .*sparc.*
6
 
7
Disassembly of section .text:
8
 
9
0+ :
10
   0:   03 04 8d 15     sethi  %hi\(0x12345400\), %g1
11
   4:   82 10 62 78     or  %g1, 0x278, %g1.*
12
   8:   01 00 00 00     nop
13
   c:   03 00 00 00     sethi  %hi\((0x|)0\), %g1
14
                        c: R_SPARC_HH22 .text
15
  10:   82 10 60 00     mov  %g1, %g1   ! 0 
16
                        10: R_SPARC_HM10        .text
17
  14:   01 00 00 00     nop
18
  18:   03 00 00 00     sethi  %hi\((0x|)0\), %g1
19
                        18: R_SPARC_HH22        .text\+0x1234567800000000
20
  1c:   82 10 60 00     mov  %g1, %g1   ! 0 
21
                        1c: R_SPARC_HM10        .text\+0x1234567800000000
22
  20:   01 00 00 00     nop
23
  24:   03 3f b7 2e     sethi  %hi\(0xfedcb800\), %g1
24
  28:   82 10 62 98     or  %g1, 0x298, %g1.*
25
  2c:   05 1d 95 0c     sethi  %hi\(0x76543000\), %g2
26
  30:   84 10 62 10     or  %g1, 0x210, %g2
27
  34:   01 00 00 00     nop
28
  38:   03 00 00 00     sethi  %hi\((0x|)0\), %g1
29
                        38: R_SPARC_HH22        .text
30
  3c:   82 10 60 00     mov  %g1, %g1   ! 0 
31
                        3c: R_SPARC_HM10        .text
32
  40:   05 00 00 00     sethi  %hi\((0x|)0\), %g2
33
                        40: R_SPARC_LM22        .text
34
  44:   84 10 60 00     mov  %g1, %g2
35
                        44: R_SPARC_LO10        .text
36
  48:   01 00 00 00     nop
37
  4c:   03 00 00 00     sethi  %hi\((0x|)0\), %g1
38
                        4c: R_SPARC_HH22        .text\+0xfedcba9876543210
39
  50:   82 10 60 00     mov  %g1, %g1   ! 0 
40
                        50: R_SPARC_HM10        .text\+0xfedcba9876543210
41
  54:   05 00 00 00     sethi  %hi\((0x|)0\), %g2
42
                        54: R_SPARC_LM22        .text\+0xfedcba9876543210
43
  58:   84 10 60 00     mov  %g1, %g2
44
                        58: R_SPARC_LO10        .text\+0xfedcba9876543210
45
  5c:   01 00 00 00     nop
46
  60:   03 2a 61 d9     sethi  %hi\(0xa9876400\), %g1
47
  64:   82 10 61 43     or  %g1, 0x143, %g1.*
48
  68:   82 10 62 10     or  %g1, 0x210, %g1
49
  6c:   01 00 00 00     nop
50
  70:   03 00 00 00     sethi  %hi\((0x|)0\), %g1
51
                        70: R_SPARC_H44 .text
52
  74:   82 10 60 00     mov  %g1, %g1   ! 0 
53
                        74: R_SPARC_M44 .text
54
  78:   82 10 60 00     mov  %g1, %g1
55
                        78: R_SPARC_L44 .text
56
  7c:   01 00 00 00     nop
57
  80:   03 00 00 00     sethi  %hi\((0x|)0\), %g1
58
                        80: R_SPARC_H44 .text\+0xa9876543210
59
  84:   82 10 60 00     mov  %g1, %g1   ! 0 
60
                        84: R_SPARC_M44 .text\+0xa9876543210
61
  88:   82 10 60 00     mov  %g1, %g1
62
                        88: R_SPARC_L44 .text\+0xa9876543210
63
  8c:   01 00 00 00     nop
64
  90:   03 22 6a f3     sethi  %hi\(0x89abcc00\), %g1
65
  94:   82 18 7e 10     xor  %g1, -496, %g1
66
  98:   01 00 00 00     nop
67
  9c:   03 00 00 00     sethi  %hi\((0x|)0\), %g1
68
                        9c: R_SPARC_HIX22       .text
69
  a0:   82 18 60 00     xor  %g1, 0, %g1
70
                        a0: R_SPARC_LOX10       .text
71
  a4:   01 00 00 00     nop
72
  a8:   03 00 00 00     sethi  %hi\((0x|)0\), %g1
73
                        a8: R_SPARC_HIX22       .text\+0xffffffff76543210
74
  ac:   82 18 60 00     xor  %g1, 0, %g1
75
                        ac: R_SPARC_LOX10       .text\+0xffffffff76543210
76
  b0:   01 00 00 00     nop

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.