OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.18.50/] [ld/] [testsuite/] [ld-powerpc/] [tlsso32.d] - Blame information for rev 332

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius 
#source: tls32.s
2 
#as: -a32
3 
#ld: -shared -melf32ppc
4 
#objdump: -dr
5 
#target: powerpc*-*-*
6 
 
7 
.*: +file format elf32-powerpc
8 
 
9 
Disassembly of section \.text:
10 
 
11 
.* <_start>:
12 
.*:     38 7f ff e0     addi    r3,r31,-32
13 
.*:     48 00 00 01     bl      .*
14 
.*:     38 7f ff f4     addi    r3,r31,-12
15 
.*:     48 00 00 01     bl      .*
16 
.*:     38 7f ff e8     addi    r3,r31,-24
17 
.*:     48 01 01 95     bl      .*<__tls_get_addr@plt>
18 
.*:     38 7f ff f4     addi    r3,r31,-12
19 
.*:     48 01 01 8d     bl      .*<__tls_get_addr@plt>
20 
.*:     39 23 80 20     addi    r9,r3,-32736
21 
.*:     3d 23 00 00     addis   r9,r3,0
22 
.*:     81 49 80 24     lwz     r10,-32732\(r9\)
23 
.*:     81 3f ff f0     lwz     r9,-16\(r31\)
24 
.*:     7d 49 12 2e     lhzx    r10,r9,r2
25 
.*:     89 42 00 00     lbz     r10,0\(r2\)
26 
.*:     3d 22 00 00     addis   r9,r2,0
27 
.*:     99 49 00 00     stb     r10,0\(r9\)
28 
.*:     38 7e ff d8     addi    r3,r30,-40
29 
.*:     48 00 00 01     bl      .*
30 
.*:     38 7e ff f4     addi    r3,r30,-12
31 
.*:     48 00 00 01     bl      .*
32 
.*:     91 43 80 04     stw     r10,-32764\(r3\)
33 
.*:     3d 23 00 00     addis   r9,r3,0
34 
.*:     91 49 80 08     stw     r10,-32760\(r9\)
35 
.*:     81 3e ff f0     lwz     r9,-16\(r30\)
36 
.*:     7d 49 13 2e     sthx    r10,r9,r2
37 
.*:     a1 42 00 00     lhz     r10,0\(r2\)
38 
.*:     3d 22 00 00     addis   r9,r2,0
39 
.*:     a9 49 00 00     lha     r10,0\(r9\)
40 
Disassembly of section \.got:
41 
 
42 
.* <\.got>:
43 
        \.\.\.
44 
.*:     4e 80 00 21     blrl
45 
.*:     00 01 03 ec     .*
46 
        \.\.\.

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.