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[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.18.50/] [opcodes/] [ia64-asmtab.h] - Blame information for rev 252

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/* ia64-asmtab.h -- Header for compacted IA-64 opcode tables.
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   Copyright 1999, 2000, 2007 Free Software Foundation, Inc.
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   Contributed by Bob Manson of Cygnus Support <manson@cygnus.com>
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   This file is part of the GNU opcodes library.
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   This library is free software; you can redistribute it and/or modify
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   it under the terms of the GNU General Public License as published by
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   the Free Software Foundation; either version 3, or (at your option)
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   any later version.
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   It is distributed in the hope that it will be useful, but WITHOUT
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   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
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   License for more details.
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   You should have received a copy of the GNU General Public License
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   along with this file; see the file COPYING.  If not, write to the
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   Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
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   MA 02110-1301, USA.  */
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#ifndef IA64_ASMTAB_H
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#define IA64_ASMTAB_H
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#include "opcode/ia64.h"
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/* The primary opcode table is made up of the following: */
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struct ia64_main_table
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{
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  /* The entry in the string table that corresponds to the name of this
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     opcode. */
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  unsigned short name_index;
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  /* The type of opcode; corresponds to the TYPE field in
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     struct ia64_opcode. */
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  unsigned char opcode_type;
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  /* The number of outputs for this opcode. */
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  unsigned char num_outputs;
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  /* The base insn value for this opcode.  It may be modified by completers. */
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  ia64_insn opcode;
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  /* The mask of valid bits in OPCODE. Zeros indicate operand fields. */
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  ia64_insn mask;
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  /* The operands of this instruction.  Corresponds to the OPERANDS field
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     in struct ia64_opcode. */
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  unsigned char operands[5];
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  /* The flags for this instruction.  Corresponds to the FLAGS field in
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     struct ia64_opcode. */
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  short flags;
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  /* The tree of completers for this instruction; this is an offset into
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     completer_table. */
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  short completers;
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};
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/* Each instruction has a set of possible "completers", or additional
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   suffixes that can alter the instruction's behavior, and which has
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   potentially different dependencies.
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   The completer entries modify certain bits in the instruction opcode.
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   Which bits are to be modified are marked by the BITS, MASK and
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   OFFSET fields.  The completer entry may also note dependencies for the
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   opcode.
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   These completers are arranged in a DAG; the pointers are indexes
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   into the completer_table array.  The completer DAG is searched by
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   find_completer () and ia64_find_matching_opcode ().
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   Note that each completer needs to be applied in turn, so that if we
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   have the instruction
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        cmp.lt.unc
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   the completer entries for both "lt" and "unc" would need to be applied
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   to the opcode's value.
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   Some instructions do not require any completers; these contain an
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   empty completer entry.  Instructions that require a completer do
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   not contain an empty entry.
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   Terminal completers (those completers that validly complete an
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   instruction) are marked by having the TERMINAL_COMPLETER flag set.
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   Only dependencies listed in the terminal completer for an opcode are
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   considered to apply to that opcode instance. */
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struct ia64_completer_table
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{
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  /* The bit value that this completer sets. */
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  unsigned int bits;
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  /* And its mask. 1s are bits that are to be modified in the
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     instruction. */
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  unsigned int mask;
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  /* The entry in the string table that corresponds to the name of this
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     completer. */
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  unsigned short name_index;
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  /* An alternative completer, or -1 if this is the end of the chain. */
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  short alternative;
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  /* A pointer to the DAG of completers that can potentially follow
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     this one, or -1. */
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  short subentries;
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  /* The bit offset in the instruction where BITS and MASK should be
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     applied. */
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  unsigned char offset : 7;
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  unsigned char terminal_completer : 1;
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  /* Index into the dependency list table */
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  short dependencies;
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};
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/* This contains sufficient information for the disassembler to resolve
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   the complete name of the original instruction.  */
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struct ia64_dis_names
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{
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  /* COMPLETER_INDEX represents the tree of completers that make up
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     the instruction.  The LSB represents the top of the tree for the
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     specified instruction.
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     A 0 bit indicates to go to the next alternate completer via the
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     alternative field; a 1 bit indicates that the current completer
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     is part of the instruction, and to go down the subentries index.
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     We know we've reached the final completer when we run out of 1
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     bits.
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     There is always at least one 1 bit. */
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  unsigned int completer_index : 20;
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  /* The index in the main_table[] array for the instruction. */
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  unsigned short insn_index : 11;
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  /* If set, the next entry in this table is an alternate possibility
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     for this instruction encoding.  Which one to use is determined by
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     the instruction type and other factors (see opcode_verify ()).  */
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  unsigned int next_flag : 1;
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  /* The disassembly priority of this entry among instructions. */
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  unsigned short priority;
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};
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#endif

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