Subversion Repositories openrisc_2011-10-31

/* Opcode table for m680[012346]0/m6888[12]/m68851/mcf5200.

   Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,

   2000, 2001, 2003, 2004, 2005, 2006, 2007

   Free Software Foundation, Inc.

   This file is part of the GNU opcodes library.

   This library is free software; you can redistribute it and/or modify

   it under the terms of the GNU General Public License as published by

   the Free Software Foundation; either version 3, or (at your option)

   any later version.

   It is distributed in the hope that it will be useful, but WITHOUT

   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY

   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public

   License for more details.

   You should have received a copy of the GNU General Public License

   along with this file; see the file COPYING.  If not, write to the

   Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,

   MA 02110-1301, USA.  */

#include "sysdep.h"

#include "opcode/m68k.h"

#define one(x) ((unsigned int) (x) << 16)

#define two(x, y) (((unsigned int) (x) << 16) + (y))

/* The assembler requires that all instances of the same mnemonic must

   be consecutive.  If they aren't, the assembler will bomb at

   runtime.  */

/* Format strings consist of pairs of characters.  The first describes

   the type of the operand and the second describes the encoding.

   include/opcodes/m68k.h describes them in detail.  */

const struct m68k_opcode m68k_opcodes[] =

{

{"abcd", 2,     one(0140400),   one(0170770), "DsDd", m68000up },

{"abcd", 2,     one(0140410),   one(0170770), "-s-d", m68000up },

{"addaw", 2,    one(0150300),   one(0170700), "*wAd", m68000up },

{"addal", 2,    one(0150700),   one(0170700), "*lAd", m68000up | mcfisa_a },

{"addib", 4,    one(0003000),   one(0177700), "#b$s", m68000up },

{"addiw", 4,    one(0003100),   one(0177700), "#w$s", m68000up },

{"addil", 6,    one(0003200),   one(0177700), "#l$s", m68000up },

{"addil", 6,    one(0003200),   one(0177700), "#lDs", mcfisa_a },

{"addqb", 2,    one(0050000),   one(0170700), "Qd$b", m68000up },

{"addqw", 2,    one(0050100),   one(0170700), "Qd%w", m68000up },

{"addql", 2,    one(0050200),   one(0170700), "Qd%l", m68000up | mcfisa_a },

/* The add opcode can generate the adda, addi, and addq instructions.  */

{"addb", 2,     one(0050000),   one(0170700), "Qd$b", m68000up },

{"addb", 4,     one(0003000),   one(0177700), "#b$s", m68000up },

{"addb", 2,     one(0150000),   one(0170700), ";bDd", m68000up },

{"addb", 2,     one(0150400),   one(0170700), "Dd~b", m68000up },

{"addw", 2,     one(0050100),   one(0170700), "Qd%w", m68000up },

{"addw", 2,     one(0150300),   one(0170700), "*wAd", m68000up },

{"addw", 4,     one(0003100),   one(0177700), "#w$s", m68000up },

{"addw", 2,     one(0150100),   one(0170700), "*wDd", m68000up },

{"addw", 2,     one(0150500),   one(0170700), "Dd~w", m68000up },

{"addl", 2,     one(0050200),   one(0170700), "Qd%l", m68000up | mcfisa_a },

{"addl", 6,     one(0003200),   one(0177700), "#l$s", m68000up },

{"addl", 6,     one(0003200),   one(0177700), "#lDs", mcfisa_a },

{"addl", 2,     one(0150700),   one(0170700), "*lAd", m68000up | mcfisa_a },

{"addl", 2,     one(0150200),   one(0170700), "*lDd", m68000up | mcfisa_a },

{"addl", 2,     one(0150600),   one(0170700), "Dd~l", m68000up | mcfisa_a },

{"addxb", 2,    one(0150400),   one(0170770), "DsDd", m68000up },

{"addxb", 2,    one(0150410),   one(0170770), "-s-d", m68000up },

{"addxw", 2,    one(0150500),   one(0170770), "DsDd", m68000up },

{"addxw", 2,    one(0150510),   one(0170770), "-s-d", m68000up },

{"addxl", 2,    one(0150600),   one(0170770), "DsDd", m68000up | mcfisa_a },

{"addxl", 2,    one(0150610),   one(0170770), "-s-d", m68000up },

{"andib", 4,    one(0001000),   one(0177700), "#b$s", m68000up },

{"andib", 4,    one(0001074),   one(0177777), "#bCs", m68000up },

{"andiw", 4,    one(0001100),   one(0177700), "#w$s", m68000up },

{"andiw", 4,    one(0001174),   one(0177777), "#wSs", m68000up },

{"andil", 6,    one(0001200),   one(0177700), "#l$s", m68000up },

{"andil", 6,    one(0001200),   one(0177700), "#lDs", mcfisa_a },

{"andi", 4,     one(0001100),   one(0177700), "#w$s", m68000up },

{"andi", 4,     one(0001074),   one(0177777), "#bCs", m68000up },

{"andi", 4,     one(0001174),   one(0177777), "#wSs", m68000up },

/* The and opcode can generate the andi instruction.  */

{"andb", 4,     one(0001000),   one(0177700), "#b$s", m68000up },

{"andb", 4,     one(0001074),   one(0177777), "#bCs", m68000up },

{"andb", 2,     one(0140000),   one(0170700), ";bDd", m68000up },

{"andb", 2,     one(0140400),   one(0170700), "Dd~b", m68000up },

{"andw", 4,     one(0001100),   one(0177700), "#w$s", m68000up },

{"andw", 4,     one(0001174),   one(0177777), "#wSs", m68000up },

{"andw", 2,     one(0140100),   one(0170700), ";wDd", m68000up },

{"andw", 2,     one(0140500),   one(0170700), "Dd~w", m68000up },

{"andl", 6,     one(0001200),   one(0177700), "#l$s", m68000up },

{"andl", 6,     one(0001200),   one(0177700), "#lDs", mcfisa_a },

{"andl", 2,     one(0140200),   one(0170700), ";lDd", m68000up | mcfisa_a },

{"andl", 2,     one(0140600),   one(0170700), "Dd~l", m68000up | mcfisa_a },

{"and", 4,      one(0001100),   one(0177700), "#w$w", m68000up },

{"and", 4,      one(0001074),   one(0177777), "#bCs", m68000up },

{"and", 4,      one(0001174),   one(0177777), "#wSs", m68000up },

{"and", 2,      one(0140100),   one(0170700), ";wDd", m68000up },

{"and", 2,      one(0140500),   one(0170700), "Dd~w", m68000up },

{"aslb", 2,     one(0160400),   one(0170770), "QdDs", m68000up },

{"aslb", 2,     one(0160440),   one(0170770), "DdDs", m68000up },

{"aslw", 2,     one(0160500),   one(0170770), "QdDs", m68000up },

{"aslw", 2,     one(0160540),   one(0170770), "DdDs", m68000up },

{"aslw", 2,     one(0160700),   one(0177700), "~s",   m68000up },

{"asll", 2,     one(0160600),   one(0170770), "QdDs", m68000up | mcfisa_a },

{"asll", 2,     one(0160640),   one(0170770), "DdDs", m68000up | mcfisa_a },

{"asrb", 2,     one(0160000),   one(0170770), "QdDs", m68000up },

{"asrb", 2,     one(0160040),   one(0170770), "DdDs", m68000up },

{"asrw", 2,     one(0160100),   one(0170770), "QdDs", m68000up },

{"asrw", 2,     one(0160140),   one(0170770), "DdDs", m68000up },

{"asrw", 2,     one(0160300),   one(0177700), "~s",   m68000up },

{"asrl", 2,     one(0160200),   one(0170770), "QdDs", m68000up | mcfisa_a },

{"asrl", 2,     one(0160240),   one(0170770), "DdDs", m68000up | mcfisa_a },

{"bhiw", 2,     one(0061000),   one(0177777), "BW", m68000up | mcfisa_a },

{"blsw", 2,     one(0061400),   one(0177777), "BW", m68000up | mcfisa_a },

{"bccw", 2,     one(0062000),   one(0177777), "BW", m68000up | mcfisa_a },

{"bcsw", 2,     one(0062400),   one(0177777), "BW", m68000up | mcfisa_a },

{"bnew", 2,     one(0063000),   one(0177777), "BW", m68000up | mcfisa_a },

{"beqw", 2,     one(0063400),   one(0177777), "BW", m68000up | mcfisa_a },

{"bvcw", 2,     one(0064000),   one(0177777), "BW", m68000up | mcfisa_a },

{"bvsw", 2,     one(0064400),   one(0177777), "BW", m68000up | mcfisa_a },

{"bplw", 2,     one(0065000),   one(0177777), "BW", m68000up | mcfisa_a },

{"bmiw", 2,     one(0065400),   one(0177777), "BW", m68000up | mcfisa_a },

{"bgew", 2,     one(0066000),   one(0177777), "BW", m68000up | mcfisa_a },

{"bltw", 2,     one(0066400),   one(0177777), "BW", m68000up | mcfisa_a },

{"bgtw", 2,     one(0067000),   one(0177777), "BW", m68000up | mcfisa_a },

{"blew", 2,     one(0067400),   one(0177777), "BW", m68000up | mcfisa_a },

{"bhil", 2,     one(0061377),   one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},

{"blsl", 2,     one(0061777),   one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},

{"bccl", 2,     one(0062377),   one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},

{"bcsl", 2,     one(0062777),   one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},

{"bnel", 2,     one(0063377),   one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},

{"beql", 2,     one(0063777),   one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},

{"bvcl", 2,     one(0064377),   one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},

{"bvsl", 2,     one(0064777),   one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},

{"bpll", 2,     one(0065377),   one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},

{"bmil", 2,     one(0065777),   one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},

{"bgel", 2,     one(0066377),   one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},

{"bltl", 2,     one(0066777),   one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},

{"bgtl", 2,     one(0067377),   one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},

{"blel", 2,     one(0067777),   one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},

{"bhis", 2,     one(0061000),   one(0177400), "BB", m68000up | mcfisa_a },

{"blss", 2,     one(0061400),   one(0177400), "BB", m68000up | mcfisa_a },

{"bccs", 2,     one(0062000),   one(0177400), "BB", m68000up | mcfisa_a },

{"bcss", 2,     one(0062400),   one(0177400), "BB", m68000up | mcfisa_a },

{"bnes", 2,     one(0063000),   one(0177400), "BB", m68000up | mcfisa_a },

{"beqs", 2,     one(0063400),   one(0177400), "BB", m68000up | mcfisa_a },

{"bvcs", 2,     one(0064000),   one(0177400), "BB", m68000up | mcfisa_a },

{"bvss", 2,     one(0064400),   one(0177400), "BB", m68000up | mcfisa_a },

{"bpls", 2,     one(0065000),   one(0177400), "BB", m68000up | mcfisa_a },

{"bmis", 2,     one(0065400),   one(0177400), "BB", m68000up | mcfisa_a },

{"bges", 2,     one(0066000),   one(0177400), "BB", m68000up | mcfisa_a },

{"blts", 2,     one(0066400),   one(0177400), "BB", m68000up | mcfisa_a },

{"bgts", 2,     one(0067000),   one(0177400), "BB", m68000up | mcfisa_a },

{"bles", 2,     one(0067400),   one(0177400), "BB", m68000up | mcfisa_a },

{"jhi", 2,      one(0061000),   one(0177400), "Bg", m68000up | mcfisa_a },

{"jls", 2,      one(0061400),   one(0177400), "Bg", m68000up | mcfisa_a },

{"jcc", 2,      one(0062000),   one(0177400), "Bg", m68000up | mcfisa_a },

{"jcs", 2,      one(0062400),   one(0177400), "Bg", m68000up | mcfisa_a },

{"jne", 2,      one(0063000),   one(0177400), "Bg", m68000up | mcfisa_a },

{"jeq", 2,      one(0063400),   one(0177400), "Bg", m68000up | mcfisa_a },

{"jvc", 2,      one(0064000),   one(0177400), "Bg", m68000up | mcfisa_a },

{"jvs", 2,      one(0064400),   one(0177400), "Bg", m68000up | mcfisa_a },

{"jpl", 2,      one(0065000),   one(0177400), "Bg", m68000up | mcfisa_a },

{"jmi", 2,      one(0065400),   one(0177400), "Bg", m68000up | mcfisa_a },

{"jge", 2,      one(0066000),   one(0177400), "Bg", m68000up | mcfisa_a },

{"jlt", 2,      one(0066400),   one(0177400), "Bg", m68000up | mcfisa_a },

{"jgt", 2,      one(0067000),   one(0177400), "Bg", m68000up | mcfisa_a },

{"jle", 2,      one(0067400),   one(0177400), "Bg", m68000up | mcfisa_a },

{"bchg", 2,     one(0000500),   one(0170700), "Dd$s", m68000up | mcfisa_a },

{"bchg", 4,     one(0004100),   one(0177700), "#b$s", m68000up },

{"bchg", 4,     one(0004100),   one(0177700), "#bqs", mcfisa_a },

{"bclr", 2,     one(0000600),   one(0170700), "Dd$s", m68000up | mcfisa_a },

{"bclr", 4,     one(0004200),   one(0177700), "#b$s", m68000up },

{"bclr", 4,     one(0004200),   one(0177700), "#bqs", mcfisa_a },

{"bfchg", 4,    two(0165300, 0), two(0177700, 0170000),  "?sO2O3",   m68020up },

{"bfclr", 4,    two(0166300, 0), two(0177700, 0170000),  "?sO2O3",   m68020up },

{"bfexts", 4,   two(0165700, 0), two(0177700, 0100000),  "/sO2O3D1", m68020up },

{"bfextu", 4,   two(0164700, 0), two(0177700, 0100000),  "/sO2O3D1", m68020up },

{"bfffo", 4,    two(0166700, 0), two(0177700, 0100000),  "/sO2O3D1", m68020up },

{"bfins", 4,    two(0167700, 0), two(0177700, 0100000),  "D1?sO2O3", m68020up },

{"bfset", 4,    two(0167300, 0), two(0177700, 0170000),  "?sO2O3",   m68020up },

{"bftst", 4,    two(0164300, 0), two(0177700, 0170000),  "/sO2O3",   m68020up },

{"bgnd", 2,     one(0045372),   one(0177777), "", cpu32 | fido_a },

{"bitrev", 2,   one(0000300),   one(0177770), "Ds", mcfisa_aa | mcfisa_c},

{"bkpt", 2,     one(0044110),   one(0177770), "ts", m68010up },

{"braw", 2,     one(0060000),   one(0177777), "BW", m68000up | mcfisa_a },

{"bral", 2,     one(0060377),   one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b},

{"bras", 2,     one(0060000),   one(0177400), "BB", m68000up | mcfisa_a },

{"bset", 2,     one(0000700),   one(0170700), "Dd$s", m68000up | mcfisa_a },

{"bset", 2,     one(0000700),   one(0170700), "Ddvs", mcfisa_a },

{"bset", 4,     one(0004300),   one(0177700), "#b$s", m68000up },

{"bset", 4,     one(0004300),   one(0177700), "#bqs", mcfisa_a },

{"bsrw", 2,     one(0060400),   one(0177777), "BW", m68000up | mcfisa_a },

{"bsrl", 2,     one(0060777),   one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b | mcfisa_c},

{"bsrs", 2,     one(0060400),   one(0177400), "BB", m68000up | mcfisa_a },

{"btst", 2,     one(0000400),   one(0170700), "Dd;b", m68000up | mcfisa_a },

{"btst", 4,     one(0004000),   one(0177700), "#b@s", m68000up },

{"btst", 4,     one(0004000),   one(0177700), "#bqs", mcfisa_a },

{"byterev", 2,  one(0001300),   one(0177770), "Ds", mcfisa_aa | mcfisa_c},

{"callm", 4,    one(0003300),   one(0177700), "#b!s", m68020 },

{"cas2w", 6,    two(0006374,0), two(0177777,0007070), "D3D6D2D5r1r4", m68020up },

{"cas2w", 6,    two(0006374,0), two(0177777,0007070), "D3D6D2D5R1R4", m68020up },

{"cas2l", 6,    two(0007374,0), two(0177777,0007070), "D3D6D2D5r1r4", m68020up },

{"cas2l", 6,    two(0007374,0), two(0177777,0007070), "D3D6D2D5R1R4", m68020up },

{"casb", 4,     two(0005300, 0), two(0177700, 0177070),  "D3D2~s", m68020up },

{"casw", 4,     two(0006300, 0), two(0177700, 0177070),  "D3D2~s", m68020up },

{"casl", 4,     two(0007300, 0), two(0177700, 0177070),  "D3D2~s", m68020up },

{"chk2b", 4,    two(0000300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 | fido_a },

{"chk2w", 4,    two(0001300,0004000),   two(0177700,07777), "!sR1", m68020up | cpu32 | fido_a },

{"chk2l", 4,    two(0002300,0004000),   two(0177700,07777), "!sR1", m68020up | cpu32 | fido_a },

{"chkl", 2,     one(0040400),           one(0170700), ";lDd", m68000up },

{"chkw", 2,     one(0040600),           one(0170700), ";wDd", m68000up },

#define SCOPE_LINE (0x1 << 3)

#define SCOPE_PAGE (0x2 << 3)

#define SCOPE_ALL  (0x3 << 3)

{"cinva", 2,    one(0xf400|SCOPE_ALL),  one(0xff38), "ce",   m68040up },

{"cinvl", 2,    one(0xf400|SCOPE_LINE), one(0xff38), "ceas", m68040up },

{"cinvp", 2,    one(0xf400|SCOPE_PAGE), one(0xff38), "ceas", m68040up },

{"cpusha", 2,   one(0xf420|SCOPE_ALL),  one(0xff38), "ce",   m68040up },

{"cpushl", 2,   one(0xf420|SCOPE_LINE), one(0xff38), "ceas", m68040up | mcfisa_a },

{"cpushp", 2,   one(0xf420|SCOPE_PAGE), one(0xff38), "ceas", m68040up },

#undef SCOPE_LINE

#undef SCOPE_PAGE

#undef SCOPE_ALL

{"clrb", 2,     one(0041000),   one(0177700), "$s", m68000up | mcfisa_a },

{"clrw", 2,     one(0041100),   one(0177700), "$s", m68000up | mcfisa_a },

{"clrl", 2,     one(0041200),   one(0177700), "$s", m68000up | mcfisa_a },

{"cmp2b", 4,    two(0000300,0), two(0177700,07777), "!sR1", m68020up | cpu32 | fido_a },

{"cmp2w", 4,    two(0001300,0),  two(0177700,07777), "!sR1", m68020up | cpu32 | fido_a },

{"cmp2l", 4,    two(0002300,0),  two(0177700,07777), "!sR1", m68020up | cpu32 | fido_a },

{"cmpaw", 2,    one(0130300),   one(0170700), "*wAd", m68000up },

{"cmpal", 2,    one(0130700),   one(0170700), "*lAd", m68000up | mcfisa_a },

{"cmpib", 4,    one(0006000),   one(0177700), "#b@s", m68000up },

{"cmpib", 4,    one(0006000),   one(0177700), "#bDs", mcfisa_b | mcfisa_c },

{"cmpiw", 4,    one(0006100),   one(0177700), "#w@s", m68000up },

{"cmpiw", 4,    one(0006100),   one(0177700), "#wDs", mcfisa_b | mcfisa_c },

{"cmpil", 6,    one(0006200),   one(0177700), "#l@s", m68000up },

{"cmpil", 6,    one(0006200),   one(0177700), "#lDs", mcfisa_a },

{"cmpmb", 2,    one(0130410),   one(0170770), "+s+d", m68000up },

{"cmpmw", 2,    one(0130510),   one(0170770), "+s+d", m68000up },

{"cmpml", 2,    one(0130610),   one(0170770), "+s+d", m68000up },

/* The cmp opcode can generate the cmpa, cmpm, and cmpi instructions.  */

{"cmpb", 4,     one(0006000),   one(0177700), "#b@s", m68000up },

{"cmpb", 4,     one(0006000),   one(0177700), "#bDs", mcfisa_b | mcfisa_c },

{"cmpb", 2,     one(0130410),   one(0170770), "+s+d", m68000up },

{"cmpb", 2,     one(0130000),   one(0170700), ";bDd", m68000up },

{"cmpb", 2,     one(0130000),   one(0170700), "*bDd", mcfisa_b | mcfisa_c },

{"cmpw", 2,     one(0130300),   one(0170700), "*wAd", m68000up },

{"cmpw", 4,     one(0006100),   one(0177700), "#w@s", m68000up },

{"cmpw", 4,     one(0006100),   one(0177700), "#wDs", mcfisa_b | mcfisa_c },

{"cmpw", 2,     one(0130510),   one(0170770), "+s+d", m68000up },

{"cmpw", 2,     one(0130100),   one(0170700), "*wDd", m68000up | mcfisa_b | mcfisa_c },

{"cmpl", 2,     one(0130700),   one(0170700), "*lAd", m68000up | mcfisa_a },

{"cmpl", 6,     one(0006200),   one(0177700), "#l@s", m68000up },

{"cmpl", 6,     one(0006200),   one(0177700), "#lDs", mcfisa_a },

{"cmpl", 2,     one(0130610),   one(0170770), "+s+d", m68000up },

{"cmpl", 2,     one(0130200),   one(0170700), "*lDd", m68000up | mcfisa_a },

{"cp0bcbusy",2, one (0176300), one (01777770), "BW", mcfisa_a},

{"cp1bcbusy",2, one (0177300), one (01777770), "BW", mcfisa_a},

{"cp0nop",   4, two (0176000,0), two (01777477,0170777), "jE", mcfisa_a},

{"cp1nop",   4, two (0177000,0), two (01777477,0170777), "jE", mcfisa_a},

/* These all have 2 opcode words, but no fixed bits in the second

   word.  We use a leading ' ' in the args string to indicate the

   extra opcode word.  */

{"cp0ldb",   6, one (0176000), one (01777700), ".pwR1jEK3", mcfisa_a},

{"cp1ldb",   6, one (0177000), one (01777700), ".pwR1jEK3", mcfisa_a},

{"cp0ldw",   6, one (0176100), one (01777700), ".pwR1jEK3", mcfisa_a},

{"cp1ldw",   6, one (0177100), one (01777700), ".pwR1jEK3", mcfisa_a},

{"cp0ldl",   6, one (0176200), one (01777700), ".pwR1jEK3", mcfisa_a},

{"cp1ldl",   6, one (0177200), one (01777700), ".pwR1jEK3", mcfisa_a},

{"cp0ld",    6, one (0176200), one (01777700), ".pwR1jEK3", mcfisa_a},

{"cp1ld",    6, one (0177200), one (01777700), ".pwR1jEK3", mcfisa_a},

{"cp0stb",   6, one (0176400), one (01777700), ".R1pwjEK3", mcfisa_a},

{"cp1stb",   6, one (0177400), one (01777700), ".R1pwjEK3", mcfisa_a},

{"cp0stw",   6, one (0176500), one (01777700), ".R1pwjEK3", mcfisa_a},

{"cp1stw",   6, one (0177500), one (01777700), ".R1pwjEK3", mcfisa_a},

{"cp0stl",   6, one (0176600), one (01777700), ".R1pwjEK3", mcfisa_a},

{"cp1stl",   6, one (0177600), one (01777700), ".R1pwjEK3", mcfisa_a},

{"cp0st",    6, one (0176600), one (01777700), ".R1pwjEK3", mcfisa_a},

{"cp1st",    6, one (0177600), one (01777700), ".R1pwjEK3", mcfisa_a},

{"dbcc", 2,     one(0052310),   one(0177770), "DsBw", m68000up },

{"dbcs", 2,     one(0052710),   one(0177770), "DsBw", m68000up },

{"dbeq", 2,     one(0053710),   one(0177770), "DsBw", m68000up },

{"dbf", 2,      one(0050710),   one(0177770), "DsBw", m68000up },

{"dbge", 2,     one(0056310),   one(0177770), "DsBw", m68000up },

{"dbgt", 2,     one(0057310),   one(0177770), "DsBw", m68000up },