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julius |
#name: ARM V7 instructions
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#as: -march=armv7r
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#objdump: -dr --prefix-addresses --show-raw-insn
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.*: +file format .*arm.*
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Disassembly of section .text:
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0+000 <[^>]*> f6d6f008 pli \[r6, r8\]
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0+004 <[^>]*> f6d9f007 pli \[r9, r7\]
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0+008 <[^>]*> f6d0f101 pli \[r0, r1, lsl #2\]
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0+00c <[^>]*> f4d5f000 pli \[r5\]
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0+010 <[^>]*> f4d5ffff pli \[r5, #4095\].*
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0+014 <[^>]*> f455ffff pli \[r5, #-4095\].*
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0+018 <[^>]*> e320f0f0 dbg #0
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0+01c <[^>]*> e320f0ff dbg #15
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0+020 <[^>]*> f57ff05f dmb sy
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0+024 <[^>]*> f57ff05f dmb sy
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0+028 <[^>]*> f57ff04f dsb sy
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0+02c <[^>]*> f57ff04f dsb sy
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0+030 <[^>]*> f57ff047 dsb un
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0+034 <[^>]*> f57ff04e dsb st
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0+038 <[^>]*> f57ff046 dsb unst
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0+03c <[^>]*> f57ff06f isb sy
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0+040 <[^>]*> f57ff06f isb sy
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0+044 <[^>]*> f916 f008 pli \[r6, r8\]
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0+048 <[^>]*> f919 f007 pli \[r9, r7\]
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0+04c <[^>]*> f910 f021 pli \[r0, r1, lsl #2\]
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0+050 <[^>]*> f995 f000 pli \[r5\]
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0+054 <[^>]*> f995 ffff pli \[r5, #4095\].*
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0+058 <[^>]*> f915 fcff pli \[r5, #-255\]
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0+05c <[^>]*> f99f ffff pli \[pc, #4095\] ; 0+0105f <[^>]*>
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0+060 <[^>]*> f91f ffff pli \[pc, #-4095\] ; f+ff065 <[^>]*>
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0+064 <[^>]*> f3af 80f0 dbg #0
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0+068 <[^>]*> f3af 80ff dbg #15
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0+06c <[^>]*> f3bf 8f5f dmb sy
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0+070 <[^>]*> f3bf 8f5f dmb sy
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0+074 <[^>]*> f3bf 8f4f dsb sy
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0+078 <[^>]*> f3bf 8f4f dsb sy
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0+07c <[^>]*> f3bf 8f47 dsb un
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0+080 <[^>]*> f3bf 8f4e dsb st
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0+084 <[^>]*> f3bf 8f46 dsb unst
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0+088 <[^>]*> f3bf 8f6f isb sy
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0+08c <[^>]*> f3bf 8f6f isb sy
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0+090 <[^>]*> fb99 f6fc sdiv r6, r9, ip
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0+094 <[^>]*> fb96 f9f3 sdiv r9, r6, r3
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0+098 <[^>]*> fbb6 f9f3 udiv r9, r6, r3
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0+09c <[^>]*> fbb9 f6fc udiv r6, r9, ip
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# V7M APSR has the same encoding as V7A CPSR_f
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0+0a0 <[^>]*> f3ef 8000 mrs r0, (CPSR|APSR)
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0+0a4 <[^>]*> f3ef 8001 mrs r0, IAPSR
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0+0a8 <[^>]*> f3ef 8002 mrs r0, EAPSR
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0+0ac <[^>]*> f3ef 8003 mrs r0, PSR
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0+0b0 <[^>]*> f3ef 8005 mrs r0, IPSR
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0+0b4 <[^>]*> f3ef 8006 mrs r0, EPSR
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0+0b8 <[^>]*> f3ef 8007 mrs r0, IEPSR
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0+0bc <[^>]*> f3ef 8008 mrs r0, MSP
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0+0c0 <[^>]*> f3ef 8009 mrs r0, PSP
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0+0c4 <[^>]*> f3ef 8010 mrs r0, PRIMASK
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0+0c8 <[^>]*> f3ef 8011 mrs r0, BASEPRI
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0+0cc <[^>]*> f3ef 8012 mrs r0, BASEPRI_MASK
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0+0d0 <[^>]*> f3ef 8013 mrs r0, FAULTMASK
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0+0d4 <[^>]*> f3ef 8014 mrs r0, CONTROL
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0+0d8 <[^>]*> f380 8800 msr (CPSR_f|APSR), r0
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0+0dc <[^>]*> f380 8801 msr IAPSR, r0
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0+0e0 <[^>]*> f380 8802 msr EAPSR, r0
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0+0e4 <[^>]*> f380 8803 msr PSR, r0
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0+0e8 <[^>]*> f380 8805 msr IPSR, r0
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0+0ec <[^>]*> f380 8806 msr EPSR, r0
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0+0f0 <[^>]*> f380 8807 msr IEPSR, r0
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0+0f4 <[^>]*> f380 8808 msr MSP, r0
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0+0f8 <[^>]*> f380 8809 msr PSP, r0
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0+0fc <[^>]*> f380 8810 msr PRIMASK, r0
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0+100 <[^>]*> f380 8811 msr BASEPRI, r0
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0+104 <[^>]*> f380 8812 msr BASEPRI_MASK, r0
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0+108 <[^>]*> f380 8813 msr FAULTMASK, r0
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0+10c <[^>]*> f380 8814 msr CONTROL, r0
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