OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.20.1/] [gas/] [testsuite/] [gas/] [arm/] [mapdir.d] - Blame information for rev 304

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 205 julius
#as: -EL -I$srcdir/$subdir
2
#objdump: --syms --special-syms -d
3
#name: ARM Mapping Symbols for .arm/.thumb
4
# This test is only valid on EABI based ports.
5
#target: *-*-*eabi *-*-symbianelf *-*-linux-* *-*-elf
6
#source: mapdir.s
7
 
8
 
9
.*: +file format .*arm.*
10
 
11
SYMBOL TABLE:
12
0+00 l    d  .text      00000000 .text
13
0+00 l    d  .data      00000000 .data
14
0+00 l    d  .bss       00000000 .bss
15
0+00 l    d  .fini_array        00000000 .fini_array
16
0+00 l       .fini_array        00000000 \$d
17
0+00 l     O .fini_array        00000000 __do_global_dtors_aux_fini_array_entry
18
0+00 l    d  .code      00000000 .code
19
0+00 l       .code      00000000 \$a
20
0+00 l    d  .tcode     00000000 .tcode
21
0+00 l       .tcode     00000000 \$t
22
0+00 l    d  .ARM.attributes    00000000 .ARM.attributes
23
0+00         \*UND\*    00000000 __do_global_dtors_aux
24
 
25
 
26
 
27
Disassembly of section .code:
28
 
29
00000000 <.code>:
30
   0:   e1a00000        nop                     ; \(mov r0, r0\)
31
 
32
Disassembly of section .tcode:
33
 
34
00000000 <.tcode>:
35
   0:   46c0            nop                     ; \(mov r8, r8\)

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.