OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.20.1/] [gas/] [testsuite/] [gas/] [bfin/] [bit2.s] - Blame information for rev 304

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 205 julius 
 
2 
.EXTERN MY_LABEL2;
3 
.section .text;
4 
 
5 
//
6 
//8 BIT OPERATIONS
7 
//
8 
 
9 
//BITCLR ( Dreg , uimm5 ) ; /* (a) */
10 
BITCLR ( R7 , 0 ) ;
11 
BITCLR ( R7 , 31 ) ;
12 
BITCLR ( R7 , 15 ) ;
13 
BITCLR ( R1 , 0 ) ;
14 
BITCLR ( R2 , 1 ) ;
15 
BITCLR ( R3 , 19 ) ;
16 
 
17 
//BITSET ( Dreg , uimm5 ) ; /* (a) */
18 
BITSET ( R7 , 0 ) ;
19 
BITSET ( R7 , 31 ) ;
20 
BITSET ( R7 , 15 ) ;
21 
BITSET ( R1 , 0 ) ;
22 
BITSET ( R2 , 1 ) ;
23 
BITSET ( R3 , 19 ) ;
24 
 
25 
//BITTGL ( Dreg , uimm5 ) ; /* (a) */
26 
BITTGL ( R7 , 0 ) ;
27 
BITTGL ( R7 , 31 ) ;
28 
BITTGL ( R7 , 15 ) ;
29 
BITTGL ( R1 , 0 ) ;
30 
BITTGL ( R2 , 1 ) ;
31 
BITTGL ( R3 , 19 ) ;
32 
 
33 
//CC = BITTST ( Dreg , uimm5 ) ; /* set CC if bit = 1 (a)*/
34 
CC = BITTST ( R7 , 0 ) ;
35 
CC = BITTST ( R7 , 31 ) ;
36 
CC = BITTST ( R7 , 15 ) ;
37 
CC = BITTST ( R1 , 0 ) ;
38 
CC = BITTST ( R2 , 1 ) ;
39 
CC = BITTST ( R3 , 19 ) ;
40 
 
41 
//CC = ! BITTST ( Dreg , uimm5 ) ; /* set CC if bit = 0 (a)*/
42 
CC = !BITTST ( R7 , 0 ) ;
43 
CC = !BITTST ( R7 , 31 ) ;
44 
CC = !BITTST ( R7 , 15 ) ;
45 
CC = !BITTST ( R1 , 0 ) ;
46 
CC = !BITTST ( R2 , 1 ) ;
47 
CC = !BITTST ( R3 , 19 ) ;
48 
 
49 
//Dreg = DEPOSIT ( Dreg, Dreg ) ; /* no extension (b) */
50 
R7 = DEPOSIT(R0, R1);
51 
R7 = DEPOSIT(R7, R1);
52 
R7 = DEPOSIT(R7, R7);
53 
R1 = DEPOSIT(R0, R1);
54 
R2 = DEPOSIT(R7, R1);
55 
R3 = DEPOSIT(R7, R7);
56 
 
57 
//Dreg = DEPOSIT ( Dreg, Dreg ) (X) ; /* sign-extended (b) */
58 
R7 = DEPOSIT(R0, R1)(X);
59 
R7 = DEPOSIT(R7, R1)(X);
60 
R7 = DEPOSIT(R7, R7)(X);
61 
R1 = DEPOSIT(R0, R1)(X);
62 
R2 = DEPOSIT(R7, R1)(X);
63 
R3 = DEPOSIT(R7, R7)(X);
64 
 
65 
//Dreg = EXTRACT ( Dreg, Dreg_lo ) (Z) ; /* zero-extended (b)*/
66 
R7 = EXTRACT(R0, R1.L)(Z);
67 
R7 = EXTRACT(R7, R1.L)(Z);
68 
R7 = EXTRACT(R7, R7.L)(Z);
69 
R1 = EXTRACT(R0, R1.L)(Z);
70 
R2 = EXTRACT(R7, R1.L)(Z);
71 
R3 = EXTRACT(R7, R7.L)(Z);
72 
 
73 
//Dreg = EXTRACT ( Dreg, Dreg_lo ) (X) ; /* sign-extended (b)*/
74 
R7 = EXTRACT(R0, R1.L)(X);
75 
R7 = EXTRACT(R7, R1.L)(X);
76 
R7 = EXTRACT(R7, R7.L)(X);
77 
R1 = EXTRACT(R0, R1.L)(X);
78 
R2 = EXTRACT(R7, R1.L)(X);
79 
R3 = EXTRACT(R7, R7.L)(X);
80 
 
81 
//BITMUX ( Dreg , Dreg , A0 ) (ASR) ; /* shift right, LSB is shifted out (b) */
82 
BITMUX(R0, R1, A0)(ASR);
83 
BITMUX(R0, R2, A0)(ASR);
84 
BITMUX(R1, R3, A0)(ASR);
85 
//BITMUX(R0, R0, A0)(ASR);
86 
 
87 
//BITMUX ( Dreg , Dreg , A0 ) (ASL) ; /* shift left, MSB is shifted out (b) */
88 
//BITMUX(R0, R0, A0)(ASL);
89 
BITMUX(R0, R1, A0)(ASL);
90 
BITMUX(R1, R2, A0)(ASL);
91 
 
92 
//Dreg_lo = ONES Dreg ; /* (b) */
93 
R0.L = ONES R0;
94 
R0.L = ONES R1;
95 
R1.L = ONES R6;
96 
R2.L = ONES R7;
97 
 
98 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.