OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.20.1/] [gas/] [testsuite/] [gas/] [bfin/] [stack2.d] - Blame information for rev 304

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 205 julius
#objdump: -dr
2
#name: stack2
3
.*: +file format .*
4
 
5
Disassembly of section .text:
6
 
7
00000000 <.text>:
8
   0:   40 01           \[--SP\] = R0;
9
   2:   46 01           \[--SP\] = R6;
10
   4:   48 01           \[--SP\] = P0;
11
   6:   4c 01           \[--SP\] = P4;
12
   8:   50 01           \[--SP\] = I0;
13
   a:   51 01           \[--SP\] = I1;
14
   c:   54 01           \[--SP\] = M0;
15
   e:   55 01           \[--SP\] = M1;
16
  10:   5c 01           \[--SP\] = L0;
17
  12:   5d 01           \[--SP\] = L1;
18
  14:   58 01           \[--SP\] = B0;
19
  16:   59 01           \[--SP\] = B1;
20
  18:   60 01           \[--SP\] = A0.X;
21
  1a:   62 01           \[--SP\] = A1.X;
22
  1c:   61 01           \[--SP\] = A0.W;
23
  1e:   63 01           \[--SP\] = A1.W;
24
  20:   66 01           \[--SP\] = ASTAT;
25
  22:   67 01           \[--SP\] = RETS;
26
  24:   7b 01           \[--SP\] = RETI;
27
  26:   7c 01           \[--SP\] = RETX;
28
  28:   7d 01           \[--SP\] = RETN;
29
  2a:   7e 01           \[--SP\] = RETE;
30
  2c:   70 01           \[--SP\] = LC0;
31
  2e:   73 01           \[--SP\] = LC1;
32
  30:   71 01           \[--SP\] = LT0;
33
  32:   74 01           \[--SP\] = LT1;
34
  34:   72 01           \[--SP\] = LB0;
35
  36:   75 01           \[--SP\] = LB1;
36
  38:   76 01           \[--SP\] = CYCLES;
37
  3a:   77 01           \[--SP\] = CYCLES2;
38
  3c:   78 01           \[--SP\] = USP;
39
  3e:   79 01           \[--SP\] = SEQSTAT;
40
  40:   7a 01           \[--SP\] = SYSCFG;
41
  42:   c0 05           \[--SP\] = \(R7:0, P5:0\);
42
  44:   40 05           \[--SP\] = \(R7:0\);
43
  46:   c0 04           \[--SP\] = \(P5:0\);
44
  48:   30 90           R0 = \[SP\+\+\];
45
  4a:   36 90           R6 = \[SP\+\+\];
46
  4c:   70 90           P0 = \[SP\+\+\];
47
  4e:   74 90           P4 = \[SP\+\+\];
48
  50:   10 01           I0 = \[SP\+\+\];
49
  52:   11 01           I1 = \[SP\+\+\];
50
  54:   14 01           M0 = \[SP\+\+\];
51
  56:   15 01           M1 = \[SP\+\+\];
52
  58:   1c 01           L0 = \[SP\+\+\];
53
  5a:   1d 01           L1 = \[SP\+\+\];
54
  5c:   18 01           B0 = \[SP\+\+\];
55
  5e:   19 01           B1 = \[SP\+\+\];
56
  60:   20 01           A0.X = \[SP\+\+\];
57
  62:   22 01           A1.X = \[SP\+\+\];
58
  64:   21 01           A0.W = \[SP\+\+\];
59
  66:   23 01           A1.W = \[SP\+\+\];
60
  68:   26 01           ASTAT = \[SP\+\+\];
61
  6a:   27 01           RETS = \[SP\+\+\];
62
  6c:   3b 01           RETI = \[SP\+\+\];
63
  6e:   3c 01           RETX = \[SP\+\+\];
64
  70:   3d 01           RETN = \[SP\+\+\];
65
  72:   3e 01           RETE = \[SP\+\+\];
66
  74:   30 01           LC0 = \[SP\+\+\];
67
  76:   33 01           LC1 = \[SP\+\+\];
68
  78:   31 01           LT0 = \[SP\+\+\];
69
  7a:   34 01           LT1 = \[SP\+\+\];
70
  7c:   32 01           LB0 = \[SP\+\+\];
71
  7e:   35 01           LB1 = \[SP\+\+\];
72
  80:   36 01           CYCLES = \[SP\+\+\];
73
  82:   37 01           CYCLES2 = \[SP\+\+\];
74
  84:   38 01           USP = \[SP\+\+\];
75
  86:   39 01           SEQSTAT = \[SP\+\+\];
76
  88:   3a 01           SYSCFG = \[SP\+\+\];
77
  8a:   80 05           \(R7:0, P5:0\) = \[SP\+\+\];
78
  8c:   00 05           \(R7:0\) = \[SP\+\+\];
79
  8e:   80 04           \(P5:0\) = \[SP\+\+\];
80
  90:   00 e8 00 00     LINK 0x0;.*
81
  94:   00 e8 02 00     LINK 0x8;.*
82
  98:   00 e8 ff ff     LINK 0x3fffc;.*
83
  9c:   01 e8 00 00     UNLINK;
84
  a0:   b3 05           \(R7:6, P5:3\) = \[SP\+\+\];
85
        \.\.\.

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.