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https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
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| Line No. |
Rev |
Author |
Line |
| 1 |
205 |
julius |
.*: Assembler messages:
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| 2 |
|
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.*:1: Error: Operand 2 of `adds' should be a 14-bit .*
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| 3 |
|
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.*:2: Error: Operand 2 of `adds' should be a 14-bit .*
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| 4 |
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.*:4: Error: Operand 2 of `addl' should be a 22-bit .*
|
| 5 |
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.*:5: Error: Operand 2 of `addl' should be a 22-bit .*
|
| 6 |
|
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.*:6: Error: Operand 3 of `addl' should be a general register r0-r3
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| 7 |
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.*:8: Error: Operand 2 of `sub' should be .*
|
| 8 |
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.*:9: Error: Operand 2 of `sub' should be .*
|
| 9 |
|
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.*:11: Error: Operand 2 of `and' should be .*
|
| 10 |
|
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.*:12: Error: Operand 2 of `and' should be .*
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| 11 |
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.*:14: Error: Operand 2 of `or' should be .*
|
| 12 |
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.*:15: Error: Operand 2 of `or' should be .*
|
| 13 |
|
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.*:17: Error: Operand 2 of `xor' should be .*
|
| 14 |
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.*:18: Error: Operand 2 of `xor' should be .*
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| 15 |
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.*:20: Error: Operand 2 of `andcm' should be .*
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| 16 |
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.*:21: Error: Operand 2 of `andcm' should be .*
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| 17 |
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.*:23: Error: Operand [34] of `cmp4.lt.or' should be r0
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| 18 |
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.*:24: Error: Operand [34] of `cmp4.lt.or' should be r0
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