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[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.20.1/] [gas/] [testsuite/] [gas/] [ia64/] [opc-i.s] - Blame information for rev 205

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Line No. Rev Author Line
1 205 julius 
.text
2 
        .type _start,@function
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_start:
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        pmpyshr2 r4 = r5, r6, 0
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        pmpyshr2.u r4 = r5, r6, 16
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8 
        pmpy2.r r4 = r5, r6
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        pmpy2.l r4 = r5, r6
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11 
        mix1.r r4 = r5, r6
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        mix2.r r4 = r5, r6
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        mix4.r r4 = r5, r6
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        mix1.l r4 = r5, r6
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        mix2.l r4 = r5, r6
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        mix4.l r4 = r5, r6
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18 
        pack2.uss r4 = r5, r6
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        pack2.sss r4 = r5, r6
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        pack4.sss r4 = r5, r6
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22 
        unpack1.h r4 = r5, r6
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        unpack2.h r4 = r5, r6
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        unpack4.h r4 = r5, r6
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        unpack1.l r4 = r5, r6
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        unpack2.l r4 = r5, r6
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        unpack4.l r4 = r5, r6
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29 
        pmin1.u r4 = r5, r6
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        pmax1.u r4 = r5, r6
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32 
        pmin2 r4 = r5, r6
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        pmax2 r4 = r5, r6
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35 
        psad1 r4 = r5, r6
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        mux1 r4 = r5, @rev
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        mux1 r4 = r5, @mix
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        mux1 r4 = r5, @shuf
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        mux1 r4 = r5, @alt
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        mux1 r4 = r5, @brcst
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43 
        mux2 r4 = r5, 0
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        mux2 r4 = r5, 0xff
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        mux2 r4 = r5, 0xaa
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        pshr2 r4 = r5, r6
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        pshr2 r4 = r5, 0
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        pshr2 r4 = r5, 8
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        pshr2 r4 = r5, 31
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        pshr4 r4 = r5, r6
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        pshr4 r4 = r5, 0
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        pshr4 r4 = r5, 8
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        pshr4 r4 = r5, 31
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57 
        pshr2.u r4 = r5, r6
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        pshr2.u r4 = r5, 0
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        pshr2.u r4 = r5, 8
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        pshr2.u r4 = r5, 31
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62 
        pshr4.u r4 = r5, r6
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        pshr4.u r4 = r5, 0
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        pshr4.u r4 = r5, 8
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        pshr4.u r4 = r5, 31
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        shr r4 = r5, r6
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        shr.u r4 = r5, r6
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        pshl2 r4 = r5, r6
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        pshl2 r4 = r5, 0
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        pshl2 r4 = r5, 8
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        pshl2 r4 = r5, 31
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        pshl4 r4 = r5, r6
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        pshl4 r4 = r5, 0
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        pshl4 r4 = r5, 8
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        pshl4 r4 = r5, 31
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80 
        shl r4 = r5, r6
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82 
        popcnt r4 = r5
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84 
        shrp r4 = r5, r6, 0
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        shrp r4 = r5, r6, 12
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        shrp r4 = r5, r6, 63
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88 
        extr r4 = r5, 0, 16
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        extr r4 = r5, 0, 63
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        extr r4 = r5, 10, 40
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92 
        extr.u r4 = r5, 0, 16
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        extr.u r4 = r5, 0, 63
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        extr.u r4 = r5, 10, 40
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        dep.z r4 = r5, 0, 16
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        dep.z r4 = r5, 0, 63
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        dep.z r4 = r5, 10, 40
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        dep.z r4 = 0, 0, 16
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        dep.z r4 = 127, 0, 63
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        dep.z r4 = -128, 5, 50
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        dep.z r4 = 0x55, 10, 40
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        dep r4 = 0, r5, 0, 16
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        dep r4 = -1, r5, 0, 63
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// Insert padding NOPs to force the same template selection as IAS.
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        nop.m 0
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        nop.f 0
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        dep r4 = r5, r6, 10, 7
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        movl r4 = 0
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        movl r4 = 0xffffffffffffffff
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        movl r4 = 0x1234567890abcdef
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115 
        break.i 0
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        break.i 0x1fffff
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        nop.i 0
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        nop.i 0x1fffff
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121 
        chk.s.i r4, _start
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        mov r4 = b0
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        mov b0 = r4
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        mov pr = r4, 0
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        mov pr = r4, 0x1234
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        mov pr = r4, 0x1ffff
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        mov pr.rot = 0
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// ??? This was originally 0x3ffffff, but that generates an assembler warning
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// that the testsuite infrastructure isn't set up to ignore.
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        mov pr.rot = 0x3ff0000
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        mov pr.rot = -0x4000000
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        zxt1 r4 = r5
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        zxt2 r4 = r5
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        zxt4 r4 = r5
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        sxt1 r4 = r5
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        sxt2 r4 = r5
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        sxt4 r4 = r5
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        czx1.l r4 = r5
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        czx2.l r4 = r5
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        czx1.r r4 = r5
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        czx2.r r4 = r5
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        tbit.z p2, p3 = r4, 0
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        tbit.z.unc p2, p3 = r4, 1
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        tbit.z.and p2, p3 = r4, 2
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        tbit.z.or p2, p3 = r4, 3
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        tbit.z.or.andcm p2, p3 = r4, 4
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        tbit.z.orcm p2, p3 = r4, 5
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        tbit.z.andcm p2, p3 = r4, 6
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        tbit.z.and.orcm p2, p3 = r4, 7
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        tbit.nz p2, p3 = r4, 8
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        tbit.nz.unc p2, p3 = r4, 9
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        tbit.nz.and p2, p3 = r4, 10
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        tbit.nz.or p2, p3 = r4, 11
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        tbit.nz.or.andcm p2, p3 = r4, 12
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        tbit.nz.orcm p2, p3 = r4, 13
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        tbit.nz.andcm p2, p3 = r4, 14
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        tbit.nz.and.orcm p2, p3 = r4, 15
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        tnat.z p2, p3 = r4
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        tnat.z.unc p2, p3 = r4
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        tnat.z.and p2, p3 = r4
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        tnat.z.or p2, p3 = r4
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        tnat.z.or.andcm p2, p3 = r4
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        tnat.z.orcm p2, p3 = r4
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        tnat.z.andcm p2, p3 = r4
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        tnat.z.and.orcm p2, p3 = r4
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        tnat.nz p2, p3 = r4
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        tnat.nz.unc p2, p3 = r4
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        tnat.nz.and p2, p3 = r4
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        tnat.nz.or p2, p3 = r4
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        tnat.nz.or.andcm p2, p3 = r4
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        tnat.nz.orcm p2, p3 = r4
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        tnat.nz.andcm p2, p3 = r4
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        tnat.nz.and.orcm p2, p3 = r4
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        mov b3 = r4, .L1
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        mov.imp b3 = r4, .L1
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.space 240
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.L1:
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        mov.sptk b3 = r4, .L2
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        mov.sptk.imp b3 = r4, .L2
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.space 240
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.L2:
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        mov.dptk b3 = r4, .L3
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        mov.dptk.imp b3 = r4, .L3
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.space 240
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.L3:
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196 
        mov.ret b3 = r4, .L4
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        mov.ret.imp b3 = r4, .L4
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.space 240
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.L4:
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        mov.ret.sptk b3 = r4, .L5
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        mov.ret.sptk.imp b3 = r4, .L5
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.space 240
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.L5:
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        mov.ret.dptk b3 = r4, .L6
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        mov.ret.dptk.imp b3 = r4, .L6
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.space 240
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.L6:
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        # instructions added by SDM2.1:
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        hint @pause
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        hint.i 0
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        hint.i @pause
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        hint.i 0x1fffff
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(p7)    hint @pause
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(p7)    hint.i 0
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(p7)    hint.i @pause
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(p7)    hint.i 0x1fffff
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 (p7)   hint @pause
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 (p7)   hint.i 0
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 (p7)   hint.i @pause
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 (p7)   hint.i 0x1fffff
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        # instructions added by SDM2.2:
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226 
        tf.z p2, p3 = 39
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        tf.z.unc p2, p3 = 39
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        tf.z.and p2, p3 = 39
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        tf.z.or p2, p3 = 39
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        tf.z.or.andcm p2, p3 = 39
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        tf.z.orcm p2, p3 = 39
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        tf.z.andcm p2, p3 = 39
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        tf.z.and.orcm p2, p3 = 39
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        tf.nz p2, p3 = 39
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        tf.nz.unc p2, p3 = 39
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        tf.nz.and p2, p3 = 39
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        tf.nz.or p2, p3 = 39
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        tf.nz.or.andcm p2, p3 = 39
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        tf.nz.orcm p2, p3 = 39
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        tf.nz.andcm p2, p3 = 39
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        tf.nz.and.orcm p2, p3 = 39
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243 
(p7)    tf.z p2, p3 = 39
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(p7)    tf.z.unc p2, p3 = 39
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(p7)    tf.z.and p2, p3 = 39
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(p7)    tf.z.or p2, p3 = 39
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(p7)    tf.z.or.andcm p2, p3 = 39
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(p7)    tf.z.orcm p2, p3 = 39
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(p7)    tf.z.andcm p2, p3 = 39
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(p7)    tf.z.and.orcm p2, p3 = 39
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(p7)    tf.nz p2, p3 = 39
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(p7)    tf.nz.unc p2, p3 = 39
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(p7)    tf.nz.and p2, p3 = 39
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(p7)    tf.nz.or p2, p3 = 39
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(p7)    tf.nz.or.andcm p2, p3 = 39
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(p7)    tf.nz.orcm p2, p3 = 39
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(p7)    tf.nz.andcm p2, p3 = 39
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(p7)    tf.nz.and.orcm p2, p3 = 39

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