OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.20.1/] [gas/] [testsuite/] [gas/] [maxq10/] [bits.s] - Blame information for rev 215

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 215 jeremybenn
;# bits.s
2
;# checks all the bit operations in MAXQ10
3
 
4
.text
5
foo:
6
 MOVE C, ACC.0
7
 MOVE C, ACC.1
8
 MOVE C, ACC.2
9
 MOVE C, ACC.3
10
 MOVE C, ACC.4
11
 MOVE C, ACC.5
12
 MOVE C, ACC.6
13
 MOVE C, ACC.7          ;8 bits on a MAXQ10 machine
14
 MOVE C, #0
15
 MOVE C, #1
16
 MOVE ACC.0, C
17
 MOVE ACC.1, C
18
 MOVE ACC.2, C
19
 MOVE ACC.3, C
20
 MOVE ACC.4, C
21
 MOVE ACC.5, C
22
 MOVE ACC.6, C
23
 MOVE ACC.7, C          ;8 bits on a MAXQ10 machine
24
 CPL C
25
 AND ACC.0       ;AND with carry
26
 AND ACC.1
27
 AND ACC.2
28
 AND ACC.3
29
 AND ACC.4
30
 AND ACC.5
31
 AND ACC.6
32
 AND ACC.7
33
 OR ACC.0        ;OR with carry
34
 OR ACC.1
35
 OR ACC.2
36
 OR ACC.3
37
 OR ACC.4
38
 OR ACC.5
39
 OR ACC.6
40
 OR ACC.7
41
 XOR ACC.0       ;XOR with carry
42
 XOR ACC.1
43
 XOR ACC.2
44
 XOR ACC.3
45
 XOR ACC.4
46
 XOR ACC.5
47
 XOR ACC.6
48
 XOR ACC.7
49
 MOVE C, SC.1
50
 MOVE C, IMR.0
51
 MOVE C, IC.0
52
 MOVE C, PSF.0           ;move program status flag bit 0

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.