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[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.20.1/] [gas/] [testsuite/] [gas/] [mips/] [ldstla-n64-sym32.d] - Blame information for rev 205

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1 205 julius 
#objdump: -dr
2 
#as: -64 -msym32 -G8 -EB
3 
#name: MIPS ld-st-la with sym32
4 
#source: ldstla-sym32.s
5 
 
6 
.*file format .*
7 
 
8 
Disassembly .*:
9 
 
10 
0+00 <.*>:
11 
#
12 
# dla constants
13 
#
14 
.*      li      a0,0xa800
15 
.*      dsll32  a0,a0,0x10
16 
.*      li      a0,0xa800
17 
.*      dsll32  a0,a0,0x10
18 
.*      daddu   a0,a0,v1
19 
.*      lui     a0,0x8000
20 
.*      lui     a0,0x8000
21 
.*      daddu   a0,a0,v1
22 
.*      lui     a0,0x7fff
23 
.*      ori     a0,a0,0x7ff8
24 
.*      lui     a0,0x7fff
25 
.*      ori     a0,a0,0x7ff8
26 
.*      daddu   a0,a0,v1
27 
.*      lui     a0,0x7fff
28 
.*      ori     a0,a0,0xfff8
29 
.*      lui     a0,0x7fff
30 
.*      ori     a0,a0,0xfff8
31 
.*      daddu   a0,a0,v1
32 
.*      lui     a0,0x1234
33 
.*      ori     a0,a0,0x5678
34 
.*      dsll    a0,a0,0x10
35 
.*      ori     a0,a0,0x9abc
36 
.*      dsll    a0,a0,0x10
37 
.*      ori     a0,a0,0xdef0
38 
.*      lui     a0,0x1234
39 
.*      ori     a0,a0,0x5678
40 
.*      dsll    a0,a0,0x10
41 
.*      ori     a0,a0,0x9abc
42 
.*      dsll    a0,a0,0x10
43 
.*      ori     a0,a0,0xdef0
44 
.*      daddu   a0,a0,v1
45 
#
46 
# dla small_comm
47 
#
48 
.*      daddiu  a0,gp,0
49 
.*: R_MIPS_GPREL16      small_comm
50 
.*: R_MIPS_NONE .*
51 
.*: R_MIPS_NONE .*
52 
.*      daddiu  a0,gp,0
53 
.*: R_MIPS_GPREL16      small_comm
54 
.*: R_MIPS_NONE .*
55 
.*: R_MIPS_NONE .*
56 
.*      daddu   a0,a0,v1
57 
.*      daddiu  a0,gp,0
58 
.*: R_MIPS_GPREL16      small_comm\+0x3
59 
.*: R_MIPS_NONE .*
60 
.*: R_MIPS_NONE .*
61 
.*      daddiu  a0,gp,0
62 
.*: R_MIPS_GPREL16      small_comm\+0x3
63 
.*: R_MIPS_NONE .*
64 
.*: R_MIPS_NONE .*
65 
.*      daddu   a0,a0,v1
66 
#
67 
# dla big_comm
68 
#
69 
.*      lui     a0,0x0
70 
.*: R_MIPS_HI16 big_comm
71 
.*: R_MIPS_NONE .*
72 
.*: R_MIPS_NONE .*
73 
.*      d?addiu a0,a0,0
74 
.*: R_MIPS_LO16 big_comm
75 
.*: R_MIPS_NONE .*
76 
.*: R_MIPS_NONE .*
77 
.*      lui     a0,0x0
78 
.*: R_MIPS_HI16 big_comm
79 
.*: R_MIPS_NONE .*
80 
.*: R_MIPS_NONE .*
81 
.*      d?addiu a0,a0,0
82 
.*: R_MIPS_LO16 big_comm
83 
.*: R_MIPS_NONE .*
84 
.*: R_MIPS_NONE .*
85 
.*      daddu   a0,a0,v1
86 
.*      lui     a0,0x0
87 
.*: R_MIPS_HI16 big_comm\+0x3
88 
.*: R_MIPS_NONE .*
89 
.*: R_MIPS_NONE .*
90 
.*      d?addiu a0,a0,0
91 
.*: R_MIPS_LO16 big_comm\+0x3
92 
.*: R_MIPS_NONE .*
93 
.*: R_MIPS_NONE .*
94 
.*      lui     a0,0x0
95 
.*: R_MIPS_HI16 big_comm\+0x3
96 
.*: R_MIPS_NONE .*
97 
.*: R_MIPS_NONE .*
98 
.*      d?addiu a0,a0,0
99 
.*: R_MIPS_LO16 big_comm\+0x3
100 
.*: R_MIPS_NONE .*
101 
.*: R_MIPS_NONE .*
102 
.*      daddu   a0,a0,v1
103 
#
104 
# dla small_data
105 
#
106 
.*      daddiu  a0,gp,0
107 
.*: R_MIPS_GPREL16      small_data
108 
.*: R_MIPS_NONE .*
109 
.*: R_MIPS_NONE .*
110 
.*      daddiu  a0,gp,0
111 
.*: R_MIPS_GPREL16      small_data
112 
.*: R_MIPS_NONE .*
113 
.*: R_MIPS_NONE .*
114 
.*      daddu   a0,a0,v1
115 
.*      daddiu  a0,gp,0
116 
.*: R_MIPS_GPREL16      small_data\+0x3
117 
.*: R_MIPS_NONE .*
118 
.*: R_MIPS_NONE .*
119 
.*      daddiu  a0,gp,0
120 
.*: R_MIPS_GPREL16      small_data\+0x3
121 
.*: R_MIPS_NONE .*
122 
.*: R_MIPS_NONE .*
123 
.*      daddu   a0,a0,v1
124 
#
125 
# dla big_data
126 
#
127 
.*      lui     a0,0x0
128 
.*: R_MIPS_HI16 big_data
129 
.*: R_MIPS_NONE .*
130 
.*: R_MIPS_NONE .*
131 
.*      d?addiu a0,a0,0
132 
.*: R_MIPS_LO16 big_data
133 
.*: R_MIPS_NONE .*
134 
.*: R_MIPS_NONE .*
135 
.*      lui     a0,0x0
136 
.*: R_MIPS_HI16 big_data
137 
.*: R_MIPS_NONE .*
138 
.*: R_MIPS_NONE .*
139 
.*      d?addiu a0,a0,0
140 
.*: R_MIPS_LO16 big_data
141 
.*: R_MIPS_NONE .*
142 
.*: R_MIPS_NONE .*
143 
.*      daddu   a0,a0,v1
144 
.*      lui     a0,0x0
145 
.*: R_MIPS_HI16 big_data\+0x3
146 
.*: R_MIPS_NONE .*
147 
.*: R_MIPS_NONE .*
148 
.*      d?addiu a0,a0,0
149 
.*: R_MIPS_LO16 big_data\+0x3
150 
.*: R_MIPS_NONE .*
151 
.*: R_MIPS_NONE .*
152 
.*      lui     a0,0x0
153 
.*: R_MIPS_HI16 big_data\+0x3
154 
.*: R_MIPS_NONE .*
155 
.*: R_MIPS_NONE .*
156 
.*      d?addiu a0,a0,0
157 
.*: R_MIPS_LO16 big_data\+0x3
158 
.*: R_MIPS_NONE .*
159 
.*: R_MIPS_NONE .*
160 
.*      daddu   a0,a0,v1
161 
#
162 
# dla extern
163 
#
164 
.*      lui     a0,0x0
165 
.*: R_MIPS_HI16 extern
166 
.*: R_MIPS_NONE .*
167 
.*: R_MIPS_NONE .*
168 
.*      d?addiu a0,a0,0
169 
.*: R_MIPS_LO16 extern
170 
.*: R_MIPS_NONE .*
171 
.*: R_MIPS_NONE .*
172 
.*      lui     a0,0x0
173 
.*: R_MIPS_HI16 extern
174 
.*: R_MIPS_NONE .*
175 
.*: R_MIPS_NONE .*
176 
.*      d?addiu a0,a0,0
177 
.*: R_MIPS_LO16 extern
178 
.*: R_MIPS_NONE .*
179 
.*: R_MIPS_NONE .*
180 
.*      daddu   a0,a0,v1
181 
.*      lui     a0,0x0
182 
.*: R_MIPS_HI16 extern\+0x34000
183 
.*: R_MIPS_NONE .*
184 
.*: R_MIPS_NONE .*
185 
.*      d?addiu a0,a0,0
186 
.*: R_MIPS_LO16 extern\+0x34000
187 
.*: R_MIPS_NONE .*
188 
.*: R_MIPS_NONE .*
189 
.*      lui     a0,0x0
190 
.*: R_MIPS_HI16 extern\+0x34000
191 
.*: R_MIPS_NONE .*
192 
.*: R_MIPS_NONE .*
193 
.*      d?addiu a0,a0,0
194 
.*: R_MIPS_LO16 extern\+0x34000
195 
.*: R_MIPS_NONE .*
196 
.*: R_MIPS_NONE .*
197 
.*      daddu   a0,a0,v1
198 
.*      lui     a0,0x0
199 
.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
200 
.*: R_MIPS_NONE .*
201 
.*: R_MIPS_NONE .*
202 
.*      d?addiu a0,a0,0
203 
.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
204 
.*: R_MIPS_NONE .*
205 
.*: R_MIPS_NONE .*
206 
.*      lui     a0,0x0
207 
.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
208 
.*: R_MIPS_NONE .*
209 
.*: R_MIPS_NONE .*
210 
.*      d?addiu a0,a0,0
211 
.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
212 
.*: R_MIPS_NONE .*
213 
.*: R_MIPS_NONE .*
214 
.*      daddu   a0,a0,v1
215 
#
216 
# lw constants
217 
#
218 
.*      li      a0,0xa800
219 
.*      dsll32  a0,a0,0x10
220 
.*      lw      a0,0\(a0\)
221 
.*      li      a0,0xa800
222 
.*      dsll32  a0,a0,0x10
223 
.*      daddu   a0,a0,v1
224 
.*      lw      a0,0\(a0\)
225 
.*      lui     a0,0x8000
226 
.*      lw      a0,0\(a0\)
227 
.*      lui     a0,0x8000
228 
.*      daddu   a0,a0,v1
229 
.*      lw      a0,0\(a0\)
230 
.*      lui     a0,0x7fff
231 
.*      lw      a0,32760\(a0\)
232 
.*      lui     a0,0x7fff
233 
.*      daddu   a0,a0,v1
234 
.*      lw      a0,32760\(a0\)
235 
.*      li      a0,0x8000
236 
.*      dsll    a0,a0,0x10
237 
.*      lw      a0,-8\(a0\)
238 
.*      li      a0,0x8000
239 
.*      dsll    a0,a0,0x10
240 
.*      daddu   a0,a0,v1
241 
.*      lw      a0,-8\(a0\)
242 
.*      lui     a0,0x1234
243 
.*      ori     a0,a0,0x5678
244 
.*      dsll    a0,a0,0x10
245 
.*      ori     a0,a0,0x9abd
246 
.*      dsll    a0,a0,0x10
247 
.*      lw      a0,-8464\(a0\)
248 
.*      lui     a0,0x1234
249 
.*      ori     a0,a0,0x5678
250 
.*      dsll    a0,a0,0x10
251 
.*      ori     a0,a0,0x9abd
252 
.*      dsll    a0,a0,0x10
253 
.*      daddu   a0,a0,v1
254 
.*      lw      a0,-8464\(a0\)
255 
#
256 
# lw small_comm
257 
#
258 
.*      lw      a0,0\(gp\)
259 
.*: R_MIPS_GPREL16      small_comm
260 
.*: R_MIPS_NONE .*
261 
.*: R_MIPS_NONE .*
262 
.*      daddu   a0,v1,gp
263 
.*      lw      a0,0\(a0\)
264 
.*: R_MIPS_GPREL16      small_comm
265 
.*: R_MIPS_NONE .*
266 
.*: R_MIPS_NONE .*
267 
.*      lw      a0,0\(gp\)
268 
.*: R_MIPS_GPREL16      small_comm\+0x3
269 
.*: R_MIPS_NONE .*
270 
.*: R_MIPS_NONE .*
271 
.*      daddu   a0,v1,gp
272 
.*      lw      a0,0\(a0\)
273 
.*: R_MIPS_GPREL16      small_comm\+0x3
274 
.*: R_MIPS_NONE .*
275 
.*: R_MIPS_NONE .*
276 
#
277 
# lw big_comm
278 
#
279 
.*      lui     a0,0x0
280 
.*: R_MIPS_HI16 big_comm
281 
.*: R_MIPS_NONE .*
282 
.*: R_MIPS_NONE .*
283 
.*      lw      a0,0\(a0\)
284 
.*: R_MIPS_LO16 big_comm
285 
.*: R_MIPS_NONE .*
286 
.*: R_MIPS_NONE .*
287 
.*      lui     a0,0x0
288 
.*: R_MIPS_HI16 big_comm
289 
.*: R_MIPS_NONE .*
290 
.*: R_MIPS_NONE .*
291 
.*      daddu   a0,a0,v1
292 
.*      lw      a0,0\(a0\)
293 
.*: R_MIPS_LO16 big_comm
294 
.*: R_MIPS_NONE .*
295 
.*: R_MIPS_NONE .*
296 
.*      lui     a0,0x0
297 
.*: R_MIPS_HI16 big_comm\+0x3
298 
.*: R_MIPS_NONE .*
299 
.*: R_MIPS_NONE .*
300 
.*      lw      a0,0\(a0\)
301 
.*: R_MIPS_LO16 big_comm\+0x3
302 
.*: R_MIPS_NONE .*
303 
.*: R_MIPS_NONE .*
304 
.*      lui     a0,0x0
305 
.*: R_MIPS_HI16 big_comm\+0x3
306 
.*: R_MIPS_NONE .*
307 
.*: R_MIPS_NONE .*
308 
.*      daddu   a0,a0,v1
309 
.*      lw      a0,0\(a0\)
310 
.*: R_MIPS_LO16 big_comm\+0x3
311 
.*: R_MIPS_NONE .*
312 
.*: R_MIPS_NONE .*
313 
#
314 
# lw small_data
315 
#
316 
.*      lw      a0,0\(gp\)
317 
.*: R_MIPS_GPREL16      small_data
318 
.*: R_MIPS_NONE .*
319 
.*: R_MIPS_NONE .*
320 
.*      daddu   a0,v1,gp
321 
.*      lw      a0,0\(a0\)
322 
.*: R_MIPS_GPREL16      small_data
323 
.*: R_MIPS_NONE .*
324 
.*: R_MIPS_NONE .*
325 
.*      lw      a0,0\(gp\)
326 
.*: R_MIPS_GPREL16      small_data\+0x3
327 
.*: R_MIPS_NONE .*
328 
.*: R_MIPS_NONE .*
329 
.*      daddu   a0,v1,gp
330 
.*      lw      a0,0\(a0\)
331 
.*: R_MIPS_GPREL16      small_data\+0x3
332 
.*: R_MIPS_NONE .*
333 
.*: R_MIPS_NONE .*
334 
#
335 
# lw big_data
336 
#
337 
.*      lui     a0,0x0
338 
.*: R_MIPS_HI16 big_data
339 
.*: R_MIPS_NONE .*
340 
.*: R_MIPS_NONE .*
341 
.*      lw      a0,0\(a0\)
342 
.*: R_MIPS_LO16 big_data
343 
.*: R_MIPS_NONE .*
344 
.*: R_MIPS_NONE .*
345 
.*      lui     a0,0x0
346 
.*: R_MIPS_HI16 big_data
347 
.*: R_MIPS_NONE .*
348 
.*: R_MIPS_NONE .*
349 
.*      daddu   a0,a0,v1
350 
.*      lw      a0,0\(a0\)
351 
.*: R_MIPS_LO16 big_data
352 
.*: R_MIPS_NONE .*
353 
.*: R_MIPS_NONE .*
354 
.*      lui     a0,0x0
355 
.*: R_MIPS_HI16 big_data\+0x3
356 
.*: R_MIPS_NONE .*
357 
.*: R_MIPS_NONE .*
358 
.*      lw      a0,0\(a0\)
359 
.*: R_MIPS_LO16 big_data\+0x3
360 
.*: R_MIPS_NONE .*
361 
.*: R_MIPS_NONE .*
362 
.*      lui     a0,0x0
363 
.*: R_MIPS_HI16 big_data\+0x3
364 
.*: R_MIPS_NONE .*
365 
.*: R_MIPS_NONE .*
366 
.*      daddu   a0,a0,v1
367 
.*      lw      a0,0\(a0\)
368 
.*: R_MIPS_LO16 big_data\+0x3
369 
.*: R_MIPS_NONE .*
370 
.*: R_MIPS_NONE .*
371 
#
372 
# lw extern
373 
#
374 
.*      lui     a0,0x0
375 
.*: R_MIPS_HI16 extern
376 
.*: R_MIPS_NONE .*
377 
.*: R_MIPS_NONE .*
378 
.*      lw      a0,0\(a0\)
379 
.*: R_MIPS_LO16 extern
380 
.*: R_MIPS_NONE .*
381 
.*: R_MIPS_NONE .*
382 
.*      lui     a0,0x0
383 
.*: R_MIPS_HI16 extern
384 
.*: R_MIPS_NONE .*
385 
.*: R_MIPS_NONE .*
386 
.*      daddu   a0,a0,v1
387 
.*      lw      a0,0\(a0\)
388 
.*: R_MIPS_LO16 extern
389 
.*: R_MIPS_NONE .*
390 
.*: R_MIPS_NONE .*
391 
.*      lui     a0,0x0
392 
.*: R_MIPS_HI16 extern\+0x34000
393 
.*: R_MIPS_NONE .*
394 
.*: R_MIPS_NONE .*
395 
.*      lw      a0,0\(a0\)
396 
.*: R_MIPS_LO16 extern\+0x34000
397 
.*: R_MIPS_NONE .*
398 
.*: R_MIPS_NONE .*
399 
.*      lui     a0,0x0
400 
.*: R_MIPS_HI16 extern\+0x34000
401 
.*: R_MIPS_NONE .*
402 
.*: R_MIPS_NONE .*
403 
.*      daddu   a0,a0,v1
404 
.*      lw      a0,0\(a0\)
405 
.*: R_MIPS_LO16 extern\+0x34000
406 
.*: R_MIPS_NONE .*
407 
.*: R_MIPS_NONE .*
408 
.*      lui     a0,0x0
409 
.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
410 
.*: R_MIPS_NONE .*
411 
.*: R_MIPS_NONE .*
412 
.*      lw      a0,0\(a0\)
413 
.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
414 
.*: R_MIPS_NONE .*
415 
.*: R_MIPS_NONE .*
416 
.*      lui     a0,0x0
417 
.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
418 
.*: R_MIPS_NONE .*
419 
.*: R_MIPS_NONE .*
420 
.*      daddu   a0,a0,v1
421 
.*      lw      a0,0\(a0\)
422 
.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
423 
.*: R_MIPS_NONE .*
424 
.*: R_MIPS_NONE .*
425 
#
426 
# sw constants
427 
#
428 
.*      li      at,0xa800
429 
.*      dsll32  at,at,0x10
430 
.*      sw      a0,0\(at\)
431 
.*      li      at,0xa800
432 
.*      dsll32  at,at,0x10
433 
.*      daddu   at,at,v1
434 
.*      sw      a0,0\(at\)
435 
.*      lui     at,0x8000
436 
.*      sw      a0,0\(at\)
437 
.*      lui     at,0x8000
438 
.*      daddu   at,at,v1
439 
.*      sw      a0,0\(at\)
440 
.*      lui     at,0x7fff
441 
.*      sw      a0,32760\(at\)
442 
.*      lui     at,0x7fff
443 
.*      daddu   at,at,v1
444 
.*      sw      a0,32760\(at\)
445 
.*      li      at,0x8000
446 
.*      dsll    at,at,0x10
447 
.*      sw      a0,-8\(at\)
448 
.*      li      at,0x8000
449 
.*      dsll    at,at,0x10
450 
.*      daddu   at,at,v1
451 
.*      sw      a0,-8\(at\)
452 
.*      lui     at,0x1234
453 
.*      ori     at,at,0x5678
454 
.*      dsll    at,at,0x10
455 
.*      ori     at,at,0x9abd
456 
.*      dsll    at,at,0x10
457 
.*      sw      a0,-8464\(at\)
458 
.*      lui     at,0x1234
459 
.*      ori     at,at,0x5678
460 
.*      dsll    at,at,0x10
461 
.*      ori     at,at,0x9abd
462 
.*      dsll    at,at,0x10
463 
.*      daddu   at,at,v1
464 
.*      sw      a0,-8464\(at\)
465 
#
466 
# sw small_comm
467 
#
468 
.*      sw      a0,0\(gp\)
469 
.*: R_MIPS_GPREL16      small_comm
470 
.*: R_MIPS_NONE .*
471 
.*: R_MIPS_NONE .*
472 
.*      daddu   at,v1,gp
473 
.*      sw      a0,0\(at\)
474 
.*: R_MIPS_GPREL16      small_comm
475 
.*: R_MIPS_NONE .*
476 
.*: R_MIPS_NONE .*
477 
.*      sw      a0,0\(gp\)
478 
.*: R_MIPS_GPREL16      small_comm\+0x3
479 
.*: R_MIPS_NONE .*
480 
.*: R_MIPS_NONE .*
481 
.*      daddu   at,v1,gp
482 
.*      sw      a0,0\(at\)
483 
.*: R_MIPS_GPREL16      small_comm\+0x3
484 
.*: R_MIPS_NONE .*
485 
.*: R_MIPS_NONE .*
486 
#
487 
# sw big_comm
488 
#
489 
.*      lui     at,0x0
490 
.*: R_MIPS_HI16 big_comm
491 
.*: R_MIPS_NONE .*
492 
.*: R_MIPS_NONE .*
493 
.*      sw      a0,0\(at\)
494 
.*: R_MIPS_LO16 big_comm
495 
.*: R_MIPS_NONE .*
496 
.*: R_MIPS_NONE .*
497 
.*      lui     at,0x0
498 
.*: R_MIPS_HI16 big_comm
499 
.*: R_MIPS_NONE .*
500 
.*: R_MIPS_NONE .*
501 
.*      daddu   at,at,v1
502 
.*      sw      a0,0\(at\)
503 
.*: R_MIPS_LO16 big_comm
504 
.*: R_MIPS_NONE .*
505 
.*: R_MIPS_NONE .*
506 
.*      lui     at,0x0
507 
.*: R_MIPS_HI16 big_comm\+0x3
508 
.*: R_MIPS_NONE .*
509 
.*: R_MIPS_NONE .*
510 
.*      sw      a0,0\(at\)
511 
.*: R_MIPS_LO16 big_comm\+0x3
512 
.*: R_MIPS_NONE .*
513 
.*: R_MIPS_NONE .*
514 
.*      lui     at,0x0
515 
.*: R_MIPS_HI16 big_comm\+0x3
516 
.*: R_MIPS_NONE .*
517 
.*: R_MIPS_NONE .*
518 
.*      daddu   at,at,v1
519 
.*      sw      a0,0\(at\)
520 
.*: R_MIPS_LO16 big_comm\+0x3
521 
.*: R_MIPS_NONE .*
522 
.*: R_MIPS_NONE .*
523 
#
524 
# sw small_data
525 
#
526 
.*      sw      a0,0\(gp\)
527 
.*: R_MIPS_GPREL16      small_data
528 
.*: R_MIPS_NONE .*
529 
.*: R_MIPS_NONE .*
530 
.*      daddu   at,v1,gp
531 
.*      sw      a0,0\(at\)
532 
.*: R_MIPS_GPREL16      small_data
533 
.*: R_MIPS_NONE .*
534 
.*: R_MIPS_NONE .*
535 
.*      sw      a0,0\(gp\)
536 
.*: R_MIPS_GPREL16      small_data\+0x3
537 
.*: R_MIPS_NONE .*
538 
.*: R_MIPS_NONE .*
539 
.*      daddu   at,v1,gp
540 
.*      sw      a0,0\(at\)
541 
.*: R_MIPS_GPREL16      small_data\+0x3
542 
.*: R_MIPS_NONE .*
543 
.*: R_MIPS_NONE .*
544 
#
545 
# sw big_data
546 
#
547 
.*      lui     at,0x0
548 
.*: R_MIPS_HI16 big_data
549 
.*: R_MIPS_NONE .*
550 
.*: R_MIPS_NONE .*
551 
.*      sw      a0,0\(at\)
552 
.*: R_MIPS_LO16 big_data
553 
.*: R_MIPS_NONE .*
554 
.*: R_MIPS_NONE .*
555 
.*      lui     at,0x0
556 
.*: R_MIPS_HI16 big_data
557 
.*: R_MIPS_NONE .*
558 
.*: R_MIPS_NONE .*
559 
.*      daddu   at,at,v1
560 
.*      sw      a0,0\(at\)
561 
.*: R_MIPS_LO16 big_data
562 
.*: R_MIPS_NONE .*
563 
.*: R_MIPS_NONE .*
564 
.*      lui     at,0x0
565 
.*: R_MIPS_HI16 big_data\+0x3
566 
.*: R_MIPS_NONE .*
567 
.*: R_MIPS_NONE .*
568 
.*      sw      a0,0\(at\)
569 
.*: R_MIPS_LO16 big_data\+0x3
570 
.*: R_MIPS_NONE .*
571 
.*: R_MIPS_NONE .*
572 
.*      lui     at,0x0
573 
.*: R_MIPS_HI16 big_data\+0x3
574 
.*: R_MIPS_NONE .*
575 
.*: R_MIPS_NONE .*
576 
.*      daddu   at,at,v1
577 
.*      sw      a0,0\(at\)
578 
.*: R_MIPS_LO16 big_data\+0x3
579 
.*: R_MIPS_NONE .*
580 
.*: R_MIPS_NONE .*
581 
#
582 
# sw extern
583 
#
584 
.*      lui     at,0x0
585 
.*: R_MIPS_HI16 extern
586 
.*: R_MIPS_NONE .*
587 
.*: R_MIPS_NONE .*
588 
.*      sw      a0,0\(at\)
589 
.*: R_MIPS_LO16 extern
590 
.*: R_MIPS_NONE .*
591 
.*: R_MIPS_NONE .*
592 
.*      lui     at,0x0
593 
.*: R_MIPS_HI16 extern
594 
.*: R_MIPS_NONE .*
595 
.*: R_MIPS_NONE .*
596 
.*      daddu   at,at,v1
597 
.*      sw      a0,0\(at\)
598 
.*: R_MIPS_LO16 extern
599 
.*: R_MIPS_NONE .*
600 
.*: R_MIPS_NONE .*
601 
.*      lui     at,0x0
602 
.*: R_MIPS_HI16 extern\+0x34000
603 
.*: R_MIPS_NONE .*
604 
.*: R_MIPS_NONE .*
605 
.*      sw      a0,0\(at\)
606 
.*: R_MIPS_LO16 extern\+0x34000
607 
.*: R_MIPS_NONE .*
608 
.*: R_MIPS_NONE .*
609 
.*      lui     at,0x0
610 
.*: R_MIPS_HI16 extern\+0x34000
611 
.*: R_MIPS_NONE .*
612 
.*: R_MIPS_NONE .*
613 
.*      daddu   at,at,v1
614 
.*      sw      a0,0\(at\)
615 
.*: R_MIPS_LO16 extern\+0x34000
616 
.*: R_MIPS_NONE .*
617 
.*: R_MIPS_NONE .*
618 
.*      lui     at,0x0
619 
.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
620 
.*: R_MIPS_NONE .*
621 
.*: R_MIPS_NONE .*
622 
.*      sw      a0,0\(at\)
623 
.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
624 
.*: R_MIPS_NONE .*
625 
.*: R_MIPS_NONE .*
626 
.*      lui     at,0x0
627 
.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
628 
.*: R_MIPS_NONE .*
629 
.*: R_MIPS_NONE .*
630 
.*      daddu   at,at,v1
631 
.*      sw      a0,0\(at\)
632 
.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
633 
.*: R_MIPS_NONE .*
634 
.*: R_MIPS_NONE .*
635 
#
636 
# usw constants
637 
#
638 
.*      li      at,0xa800
639 
.*      dsll32  at,at,0x10
640 
.*      swl     a0,0\(at\)
641 
.*      swr     a0,3\(at\)
642 
.*      li      at,0xa800
643 
.*      dsll32  at,at,0x10
644 
.*      daddu   at,at,v1
645 
.*      swl     a0,0\(at\)
646 
.*      swr     a0,3\(at\)
647 
.*      lui     at,0x8000
648 
.*      swl     a0,0\(at\)
649 
.*      swr     a0,3\(at\)
650 
.*      lui     at,0x8000
651 
.*      daddu   at,at,v1
652 
.*      swl     a0,0\(at\)
653 
.*      swr     a0,3\(at\)
654 
.*      lui     at,0x7fff
655 
.*      ori     at,at,0x7ff8
656 
.*      swl     a0,0\(at\)
657 
.*      swr     a0,3\(at\)
658 
.*      lui     at,0x7fff
659 
.*      ori     at,at,0x7ff8
660 
.*      daddu   at,at,v1
661 
.*      swl     a0,0\(at\)
662 
.*      swr     a0,3\(at\)
663 
.*      lui     at,0x7fff
664 
.*      ori     at,at,0xfff8
665 
.*      swl     a0,0\(at\)
666 
.*      swr     a0,3\(at\)
667 
.*      lui     at,0x7fff
668 
.*      ori     at,at,0xfff8
669 
.*      daddu   at,at,v1
670 
.*      swl     a0,0\(at\)
671 
.*      swr     a0,3\(at\)
672 
.*      lui     at,0x1234
673 
.*      ori     at,at,0x5678
674 
.*      dsll    at,at,0x10
675 
.*      ori     at,at,0x9abc
676 
.*      dsll    at,at,0x10
677 
.*      ori     at,at,0xdef0
678 
.*      swl     a0,0\(at\)
679 
.*      swr     a0,3\(at\)
680 
.*      lui     at,0x1234
681 
.*      ori     at,at,0x5678
682 
.*      dsll    at,at,0x10
683 
.*      ori     at,at,0x9abc
684 
.*      dsll    at,at,0x10
685 
.*      ori     at,at,0xdef0
686 
.*      daddu   at,at,v1
687 
.*      swl     a0,0\(at\)
688 
.*      swr     a0,3\(at\)
689 
#
690 
# usw small_comm
691 
#
692 
.*      daddiu  at,gp,0
693 
.*: R_MIPS_GPREL16      small_comm
694 
.*: R_MIPS_NONE .*
695 
.*: R_MIPS_NONE .*
696 
.*      swl     a0,0\(at\)
697 
.*      swr     a0,3\(at\)
698 
.*      daddiu  at,gp,0
699 
.*: R_MIPS_GPREL16      small_comm
700 
.*: R_MIPS_NONE .*
701 
.*: R_MIPS_NONE .*
702 
.*      daddu   at,at,v1
703 
.*      swl     a0,0\(at\)
704 
.*      swr     a0,3\(at\)
705 
.*      daddiu  at,gp,0
706 
.*: R_MIPS_GPREL16      small_comm\+0x3
707 
.*: R_MIPS_NONE .*
708 
.*: R_MIPS_NONE .*
709 
.*      swl     a0,0\(at\)
710 
.*      swr     a0,3\(at\)
711 
.*      daddiu  at,gp,0
712 
.*: R_MIPS_GPREL16      small_comm\+0x3
713 
.*: R_MIPS_NONE .*
714 
.*: R_MIPS_NONE .*
715 
.*      daddu   at,at,v1
716 
.*      swl     a0,0\(at\)
717 
.*      swr     a0,3\(at\)
718 
#
719 
# usw big_comm
720 
#
721 
.*      lui     at,0x0
722 
.*: R_MIPS_HI16 big_comm
723 
.*: R_MIPS_NONE .*
724 
.*: R_MIPS_NONE .*
725 
.*      d?addiu at,at,0
726 
.*: R_MIPS_LO16 big_comm
727 
.*: R_MIPS_NONE .*
728 
.*: R_MIPS_NONE .*
729 
.*      swl     a0,0\(at\)
730 
.*      swr     a0,3\(at\)
731 
.*      lui     at,0x0
732 
.*: R_MIPS_HI16 big_comm
733 
.*: R_MIPS_NONE .*
734 
.*: R_MIPS_NONE .*
735 
.*      d?addiu at,at,0
736 
.*: R_MIPS_LO16 big_comm
737 
.*: R_MIPS_NONE .*
738 
.*: R_MIPS_NONE .*
739 
.*      daddu   at,at,v1
740 
.*      swl     a0,0\(at\)
741 
.*      swr     a0,3\(at\)
742 
.*      lui     at,0x0
743 
.*: R_MIPS_HI16 big_comm\+0x3
744 
.*: R_MIPS_NONE .*
745 
.*: R_MIPS_NONE .*
746 
.*      d?addiu at,at,0
747 
.*: R_MIPS_LO16 big_comm\+0x3
748 
.*: R_MIPS_NONE .*
749 
.*: R_MIPS_NONE .*
750 
.*      swl     a0,0\(at\)
751 
.*      swr     a0,3\(at\)
752 
.*      lui     at,0x0
753 
.*: R_MIPS_HI16 big_comm\+0x3
754 
.*: R_MIPS_NONE .*
755 
.*: R_MIPS_NONE .*
756 
.*      d?addiu at,at,0
757 
.*: R_MIPS_LO16 big_comm\+0x3
758 
.*: R_MIPS_NONE .*
759 
.*: R_MIPS_NONE .*
760 
.*      daddu   at,at,v1
761 
.*      swl     a0,0\(at\)
762 
.*      swr     a0,3\(at\)
763 
#
764 
# usw small_data
765 
#
766 
.*      daddiu  at,gp,0
767 
.*: R_MIPS_GPREL16      small_data
768 
.*: R_MIPS_NONE .*
769 
.*: R_MIPS_NONE .*
770 
.*      swl     a0,0\(at\)
771 
.*      swr     a0,3\(at\)
772 
.*      daddiu  at,gp,0
773 
.*: R_MIPS_GPREL16      small_data
774 
.*: R_MIPS_NONE .*
775 
.*: R_MIPS_NONE .*
776 
.*      daddu   at,at,v1
777 
.*      swl     a0,0\(at\)
778 
.*      swr     a0,3\(at\)
779 
.*      daddiu  at,gp,0
780 
.*: R_MIPS_GPREL16      small_data\+0x3
781 
.*: R_MIPS_NONE .*
782 
.*: R_MIPS_NONE .*
783 
.*      swl     a0,0\(at\)
784 
.*      swr     a0,3\(at\)
785 
.*      daddiu  at,gp,0
786 
.*: R_MIPS_GPREL16      small_data\+0x3
787 
.*: R_MIPS_NONE .*
788 
.*: R_MIPS_NONE .*
789 
.*      daddu   at,at,v1
790 
.*      swl     a0,0\(at\)
791 
.*      swr     a0,3\(at\)
792 
#
793 
# usw big_data
794 
#
795 
.*      lui     at,0x0
796 
.*: R_MIPS_HI16 big_data
797 
.*: R_MIPS_NONE .*
798 
.*: R_MIPS_NONE .*
799 
.*      d?addiu at,at,0
800 
.*: R_MIPS_LO16 big_data
801 
.*: R_MIPS_NONE .*
802 
.*: R_MIPS_NONE .*
803 
.*      swl     a0,0\(at\)
804 
.*      swr     a0,3\(at\)
805 
.*      lui     at,0x0
806 
.*: R_MIPS_HI16 big_data
807 
.*: R_MIPS_NONE .*
808 
.*: R_MIPS_NONE .*
809 
.*      d?addiu at,at,0
810 
.*: R_MIPS_LO16 big_data
811 
.*: R_MIPS_NONE .*
812 
.*: R_MIPS_NONE .*
813 
.*      daddu   at,at,v1
814 
.*      swl     a0,0\(at\)
815 
.*      swr     a0,3\(at\)
816 
.*      lui     at,0x0
817 
.*: R_MIPS_HI16 big_data\+0x3
818 
.*: R_MIPS_NONE .*
819 
.*: R_MIPS_NONE .*
820 
.*      d?addiu at,at,0
821 
.*: R_MIPS_LO16 big_data\+0x3
822 
.*: R_MIPS_NONE .*
823 
.*: R_MIPS_NONE .*
824 
.*      swl     a0,0\(at\)
825 
.*      swr     a0,3\(at\)
826 
.*      lui     at,0x0
827 
.*: R_MIPS_HI16 big_data\+0x3
828 
.*: R_MIPS_NONE .*
829 
.*: R_MIPS_NONE .*
830 
.*      d?addiu at,at,0
831 
.*: R_MIPS_LO16 big_data\+0x3
832 
.*: R_MIPS_NONE .*
833 
.*: R_MIPS_NONE .*
834 
.*      daddu   at,at,v1
835 
.*      swl     a0,0\(at\)
836 
.*      swr     a0,3\(at\)
837 
#
838 
# usw extern
839 
#
840 
.*      lui     at,0x0
841 
.*: R_MIPS_HI16 extern
842 
.*: R_MIPS_NONE .*
843 
.*: R_MIPS_NONE .*
844 
.*      d?addiu at,at,0
845 
.*: R_MIPS_LO16 extern
846 
.*: R_MIPS_NONE .*
847 
.*: R_MIPS_NONE .*
848 
.*      swl     a0,0\(at\)
849 
.*      swr     a0,3\(at\)
850 
.*      lui     at,0x0
851 
.*: R_MIPS_HI16 extern
852 
.*: R_MIPS_NONE .*
853 
.*: R_MIPS_NONE .*
854 
.*      d?addiu at,at,0
855 
.*: R_MIPS_LO16 extern
856 
.*: R_MIPS_NONE .*
857 
.*: R_MIPS_NONE .*
858 
.*      daddu   at,at,v1
859 
.*      swl     a0,0\(at\)
860 
.*      swr     a0,3\(at\)
861 
.*      lui     at,0x0
862 
.*: R_MIPS_HI16 extern\+0x34000
863 
.*: R_MIPS_NONE .*
864 
.*: R_MIPS_NONE .*
865 
.*      d?addiu at,at,0
866 
.*: R_MIPS_LO16 extern\+0x34000
867 
.*: R_MIPS_NONE .*
868 
.*: R_MIPS_NONE .*
869 
.*      swl     a0,0\(at\)
870 
.*      swr     a0,3\(at\)
871 
.*      lui     at,0x0
872 
.*: R_MIPS_HI16 extern\+0x34000
873 
.*: R_MIPS_NONE .*
874 
.*: R_MIPS_NONE .*
875 
.*      d?addiu at,at,0
876 
.*: R_MIPS_LO16 extern\+0x34000
877 
.*: R_MIPS_NONE .*
878 
.*: R_MIPS_NONE .*
879 
.*      daddu   at,at,v1
880 
.*      swl     a0,0\(at\)
881 
.*      swr     a0,3\(at\)
882 
.*      lui     at,0x0
883 
.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
884 
.*: R_MIPS_NONE .*
885 
.*: R_MIPS_NONE .*
886 
.*      d?addiu at,at,0
887 
.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
888 
.*: R_MIPS_NONE .*
889 
.*: R_MIPS_NONE .*
890 
.*      swl     a0,0\(at\)
891 
.*      swr     a0,3\(at\)
892 
.*      lui     at,0x0
893 
.*: R_MIPS_HI16 extern\+0xfffffffffffcc000
894 
.*: R_MIPS_NONE .*
895 
.*: R_MIPS_NONE .*
896 
.*      d?addiu at,at,0
897 
.*: R_MIPS_LO16 extern\+0xfffffffffffcc000
898 
.*: R_MIPS_NONE .*
899 
.*: R_MIPS_NONE .*
900 
.*      daddu   at,at,v1
901 
.*      swl     a0,0\(at\)
902 
.*      swr     a0,3\(at\)
903 
#
904 
# with sym32 off
905 
#
906 
.*      lui     a0,0x0
907 
.*: R_MIPS_HIGHEST      extern
908 
.*: R_MIPS_NONE .*
909 
.*: R_MIPS_NONE .*
910 
.*      lui     at,0x0
911 
.*: R_MIPS_HI16 extern
912 
.*: R_MIPS_NONE .*
913 
.*: R_MIPS_NONE .*
914 
.*      daddiu  a0,a0,0
915 
.*: R_MIPS_HIGHER       extern
916 
.*: R_MIPS_NONE .*
917 
.*: R_MIPS_NONE .*
918 
.*      daddiu  at,at,0
919 
.*: R_MIPS_LO16 extern
920 
.*: R_MIPS_NONE .*
921 
.*: R_MIPS_NONE .*
922 
.*      dsll32  a0,a0,0x0
923 
.*      daddu   a0,a0,at
924 
.*      lui     a0,0x0
925 
.*: R_MIPS_HIGHEST      extern
926 
.*: R_MIPS_NONE .*
927 
.*: R_MIPS_NONE .*
928 
.*      lui     at,0x0
929 
.*: R_MIPS_HI16 extern
930 
.*: R_MIPS_NONE .*
931 
.*: R_MIPS_NONE .*
932 
.*      daddiu  a0,a0,0
933 
.*: R_MIPS_HIGHER       extern
934 
.*: R_MIPS_NONE .*
935 
.*: R_MIPS_NONE .*
936 
.*      dsll32  a0,a0,0x0
937 
.*      daddu   a0,a0,at
938 
.*      lw      a0,0\(a0\)
939 
.*: R_MIPS_LO16 extern
940 
.*: R_MIPS_NONE .*
941 
.*: R_MIPS_NONE .*
942 
.*      lui     at,0x0
943 
.*: R_MIPS_HIGHEST      extern
944 
.*: R_MIPS_NONE .*
945 
.*: R_MIPS_NONE .*
946 
.*      daddiu  at,at,0
947 
.*: R_MIPS_HIGHER       extern
948 
.*: R_MIPS_NONE .*
949 
.*: R_MIPS_NONE .*
950 
.*      dsll    at,at,0x10
951 
.*      daddiu  at,at,0
952 
.*: R_MIPS_HI16 extern
953 
.*: R_MIPS_NONE .*
954 
.*: R_MIPS_NONE .*
955 
.*      dsll    at,at,0x10
956 
.*      sw      a0,0\(at\)
957 
.*: R_MIPS_LO16 extern
958 
.*: R_MIPS_NONE .*
959 
.*: R_MIPS_NONE .*
960 
.*      lui     at,0x0
961 
.*: R_MIPS_HIGHEST      extern
962 
.*: R_MIPS_NONE .*
963 
.*: R_MIPS_NONE .*
964 
.*      daddiu  at,at,0
965 
.*: R_MIPS_HIGHER       extern
966 
.*: R_MIPS_NONE .*
967 
.*: R_MIPS_NONE .*
968 
.*      dsll    at,at,0x10
969 
.*      daddiu  at,at,0
970 
.*: R_MIPS_HI16 extern
971 
.*: R_MIPS_NONE .*
972 
.*: R_MIPS_NONE .*
973 
.*      dsll    at,at,0x10
974 
.*      daddiu  at,at,0
975 
.*: R_MIPS_LO16 extern
976 
.*: R_MIPS_NONE .*
977 
.*: R_MIPS_NONE .*
978 
.*      swl     a0,0\(at\)
979 
.*      swr     a0,3\(at\)
980 
#
981 
# ...and back on again
982 
#
983 
.*      lui     a0,0x0
984 
.*: R_MIPS_HI16 extern
985 
.*: R_MIPS_NONE .*
986 
.*: R_MIPS_NONE .*
987 
.*      daddiu  a0,a0,0
988 
.*: R_MIPS_LO16 extern
989 
.*: R_MIPS_NONE .*
990 
.*: R_MIPS_NONE .*
991 
.*      lui     a0,0x0
992 
.*: R_MIPS_HI16 extern
993 
.*: R_MIPS_NONE .*
994 
.*: R_MIPS_NONE .*
995 
.*      lw      a0,0\(a0\)
996 
.*: R_MIPS_LO16 extern
997 
.*: R_MIPS_NONE .*
998 
.*: R_MIPS_NONE .*
999 
.*      lui     at,0x0
1000 
.*: R_MIPS_HI16 extern
1001 
.*: R_MIPS_NONE .*
1002 
.*: R_MIPS_NONE .*
1003 
.*      sw      a0,0\(at\)
1004 
.*: R_MIPS_LO16 extern
1005 
.*: R_MIPS_NONE .*
1006 
.*: R_MIPS_NONE .*
1007 
.*      lui     at,0x0
1008 
.*: R_MIPS_HI16 extern
1009 
.*: R_MIPS_NONE .*
1010 
.*: R_MIPS_NONE .*
1011 
.*      daddiu  at,at,0
1012 
.*: R_MIPS_LO16 extern
1013 
.*: R_MIPS_NONE .*
1014 
.*: R_MIPS_NONE .*
1015 
.*      swl     a0,0\(at\)
1016 
.*      swr     a0,3\(at\)
1017 
#pass

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