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[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.20.1/] [gas/] [testsuite/] [gas/] [mips/] [relax-swap1-mips2.d] - Blame information for rev 304

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Line No. Rev Author Line
1 205 julius
#objdump: -dr --prefix-addresses -mmips:6000
2
#name: MIPS2 branch relaxation with swapping
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#as: -32 -mips2 -KPIC -relax-branch
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#source: relax-swap1.s
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#stderr: relax-swap1.l
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7
.*: +file format .*mips.*
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9
Disassembly of section \.text:
10
0+0000 <[^>]*> b    00000000 
11
0+0004 <[^>]*> move v0,a0
12
0+0008 <[^>]*> lw   at,2\(gp\)
13
[       ]*8: R_MIPS_GOT16       \.text
14
0+000c <[^>]*> addiu        at,at,860
15
[       ]*c: R_MIPS_LO16        \.text
16
0+0010 <[^>]*> jr   at
17
0+0014 <[^>]*> move v0,a0
18
0+0018 <[^>]*> b    00000000 
19
0+001c <[^>]*> lw   v0,0\(a0\)
20
0+0020 <[^>]*> lw   at,2\(gp\)
21
[       ]*20: R_MIPS_GOT16      \.text
22
0+0024 <[^>]*> addiu        at,at,860
23
[       ]*24: R_MIPS_LO16       \.text
24
0+0028 <[^>]*> jr   at
25
0+002c <[^>]*> lw   v0,0\(a0\)
26
0+0030 <[^>]*> b    00000000 
27
0+0034 <[^>]*> sw   v0,0\(a0\)
28
0+0038 <[^>]*> lw   at,2\(gp\)
29
[       ]*38: R_MIPS_GOT16      \.text
30
0+003c <[^>]*> addiu        at,at,860
31
[       ]*3c: R_MIPS_LO16       \.text
32
0+0040 <[^>]*> jr   at
33
0+0044 <[^>]*> sw   v0,0\(a0\)
34
0+0048 <[^>]*> move v0,a0
35
0+004c <[^>]*> beq  v0,v1,00000000 
36
0+0050 <[^>]*> nop
37
0+0054 <[^>]*> move v0,a0
38
0+0058 <[^>]*> bne  v0,v1,0000006c 
39
0+005c <[^>]*> nop
40
0+0060 <[^>]*> lw   at,2\(gp\)
41
[       ]*60: R_MIPS_GOT16      \.text
42
0+0064 <[^>]*> addiu        at,at,860
43
[       ]*64: R_MIPS_LO16       \.text
44
0+0068 <[^>]*> jr   at
45
0+006c <[^>]*> nop
46
0+0070 <[^>]*> beq  a0,a1,00000000 
47
0+0074 <[^>]*> move v0,a0
48
0+0078 <[^>]*> bne  a0,a1,0000008c 
49
0+007c <[^>]*> nop
50
0+0080 <[^>]*> lw   at,2\(gp\)
51
[       ]*80: R_MIPS_GOT16      \.text
52
0+0084 <[^>]*> addiu        at,at,860
53
[       ]*84: R_MIPS_LO16       \.text
54
0+0088 <[^>]*> jr   at
55
0+008c <[^>]*> move v0,a0
56
0+0090 <[^>]*> addiu        v0,a0,1
57
0+0094 <[^>]*> beq  v0,v1,00000000 
58
0+0098 <[^>]*> nop
59
0+009c <[^>]*> addiu        v0,a0,1
60
0+00a0 <[^>]*> bne  v0,v1,000000b4 
61
0+00a4 <[^>]*> nop
62
0+00a8 <[^>]*> lw   at,2\(gp\)
63
[       ]*a8: R_MIPS_GOT16      \.text
64
0+00ac <[^>]*> addiu        at,at,860
65
[       ]*ac: R_MIPS_LO16       \.text
66
0+00b0 <[^>]*> jr   at
67
0+00b4 <[^>]*> nop
68
0+00b8 <[^>]*> beq  a0,a1,00000000 
69
0+00bc <[^>]*> addiu        v0,a0,1
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0+00c0 <[^>]*> bne  a0,a1,000000d4 
71
0+00c4 <[^>]*> nop
72
0+00c8 <[^>]*> lw   at,2\(gp\)
73
[       ]*c8: R_MIPS_GOT16      \.text
74
0+00cc <[^>]*> addiu        at,at,860
75
[       ]*cc: R_MIPS_LO16       \.text
76
0+00d0 <[^>]*> jr   at
77
0+00d4 <[^>]*> addiu        v0,a0,1
78
0+00d8 <[^>]*> lw   v0,0\(a0\)
79
0+00dc <[^>]*> beq  v0,v1,00000000 
80
0+00e0 <[^>]*> nop
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0+00e4 <[^>]*> lw   v0,0\(a0\)
82
0+00e8 <[^>]*> bne  v0,v1,000000fc 
83
0+00ec <[^>]*> nop
84
0+00f0 <[^>]*> lw   at,2\(gp\)
85
[       ]*f0: R_MIPS_GOT16      \.text
86
0+00f4 <[^>]*> addiu        at,at,860
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[       ]*f4: R_MIPS_LO16       \.text
88
0+00f8 <[^>]*> jr   at
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0+00fc <[^>]*> nop
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0+0100 <[^>]*> beq  a0,a1,00000000 
91
0+0104 <[^>]*> lw   v0,0\(a0\)
92
0+0108 <[^>]*> bne  a0,a1,0000011c 
93
0+010c <[^>]*> nop
94
0+0110 <[^>]*> lw   at,2\(gp\)
95
[       ]*110: R_MIPS_GOT16     \.text
96
0+0114 <[^>]*> addiu        at,at,860
97
[       ]*114: R_MIPS_LO16      \.text
98
0+0118 <[^>]*> jr   at
99
0+011c <[^>]*> lw   v0,0\(a0\)
100
0+0120 <[^>]*> beq  v0,v1,00000000 
101
0+0124 <[^>]*> sw   v0,0\(a0\)
102
0+0128 <[^>]*> bne  v0,v1,0000013c 
103
0+012c <[^>]*> nop
104
0+0130 <[^>]*> lw   at,2\(gp\)
105
[       ]*130: R_MIPS_GOT16     \.text
106
0+0134 <[^>]*> addiu        at,at,860
107
[       ]*134: R_MIPS_LO16      \.text
108
0+0138 <[^>]*> jr   at
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0+013c <[^>]*> sw   v0,0\(a0\)
110
0+0140 <[^>]*> beq  a0,a1,00000000 
111
0+0144 <[^>]*> sw   v0,0\(a0\)
112
0+0148 <[^>]*> bne  a0,a1,0000015c 
113
0+014c <[^>]*> nop
114
0+0150 <[^>]*> lw   at,2\(gp\)
115
[       ]*150: R_MIPS_GOT16     \.text
116
0+0154 <[^>]*> addiu        at,at,860
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[       ]*154: R_MIPS_LO16      \.text
118
0+0158 <[^>]*> jr   at
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0+015c <[^>]*> sw   v0,0\(a0\)
120
0+0160 <[^>]*> mfc1 v0,\$f0
121
0+0164 <[^>]*> move a2,a3
122
0+0168 <[^>]*> beq  v0,v1,00000000 
123
0+016c <[^>]*> nop
124
0+0170 <[^>]*> mfc1 v0,\$f0
125
0+0174 <[^>]*> move a2,a3
126
0+0178 <[^>]*> bne  v0,v1,0000018c 
127
0+017c <[^>]*> nop
128
0+0180 <[^>]*> lw   at,2\(gp\)
129
[       ]*180: R_MIPS_GOT16     \.text
130
0+0184 <[^>]*> addiu        at,at,860
131
[       ]*184: R_MIPS_LO16      \.text
132
0+0188 <[^>]*> jr   at
133
0+018c <[^>]*> nop
134
0+0190 <[^>]*> mfc1 v0,\$f0
135
0+0194 <[^>]*> beq  a0,a1,00000000 
136
0+0198 <[^>]*> move a2,a3
137
0+019c <[^>]*> mfc1 v0,\$f0
138
0+01a0 <[^>]*> bne  a0,a1,000001b4 
139
0+01a4 <[^>]*> nop
140
0+01a8 <[^>]*> lw   at,2\(gp\)
141
[       ]*1a8: R_MIPS_GOT16     \.text
142
0+01ac <[^>]*> addiu        at,at,860
143
[       ]*1ac: R_MIPS_LO16      \.text
144
0+01b0 <[^>]*> jr   at
145
0+01b4 <[^>]*> move a2,a3
146
0+01b8 <[^>]*> bc1t 00000000 
147
0+01bc <[^>]*> move v0,a0
148
0+01c0 <[^>]*> bc1f 000001d4 
149
0+01c4 <[^>]*> nop
150
0+01c8 <[^>]*> lw   at,2\(gp\)
151
[       ]*1c8: R_MIPS_GOT16     \.text
152
0+01cc <[^>]*> addiu        at,at,860
153
[       ]*1cc: R_MIPS_LO16      \.text
154
0+01d0 <[^>]*> jr   at
155
0+01d4 <[^>]*> move v0,a0
156
0+01d8 <[^>]*> move v0,a0
157
0+01dc <[^>]*> b    00000000 
158
0+01e0 <[^>]*> nop
159
0+01e4 <[^>]*> move v0,a0
160
0+01e8 <[^>]*> lw   at,2\(gp\)
161
[       ]*1e8: R_MIPS_GOT16     \.text
162
0+01ec <[^>]*> addiu        at,at,860
163
[       ]*1ec: R_MIPS_LO16      \.text
164
0+01f0 <[^>]*> jr   at
165
0+01f4 <[^>]*> nop
166
0+01f8 <[^>]*> move v0,a0
167
0+01fc <[^>]*> b    00000000 
168
0+0200 <[^>]*> nop
169
0+0204 <[^>]*> move v0,a0
170
0+0208 <[^>]*> lw   at,2\(gp\)
171
[       ]*208: R_MIPS_GOT16     \.text
172
0+020c <[^>]*> addiu        at,at,860
173
[       ]*20c: R_MIPS_LO16      \.text
174
0+0210 <[^>]*> jr   at
175
0+0214 <[^>]*> nop
176
0+0218 <[^>]*> move a2,a3
177
0+021c <[^>]*> move v0,a0
178
0+0220 <[^>]*> b    00000000 
179
0+0224 <[^>]*> nop
180
0+0228 <[^>]*> move a2,a3
181
0+022c <[^>]*> move v0,a0
182
0+0230 <[^>]*> lw   at,2\(gp\)
183
[       ]*230: R_MIPS_GOT16     \.text
184
0+0234 <[^>]*> addiu        at,at,860
185
[       ]*234: R_MIPS_LO16      \.text
186
0+0238 <[^>]*> jr   at
187
0+023c <[^>]*> nop
188
0+0240 <[^>]*> lw   at,0\(gp\)
189
[       ]*240: R_MIPS_GOT16     \.text
190
0+0244 <[^>]*> addiu        at,at,588
191
[       ]*244: R_MIPS_LO16      \.text
192
0+0248 <[^>]*> sw   v0,0\(at\)
193
0+024c <[^>]*> b    00000000 
194
0+0250 <[^>]*> nop
195
0+0254 <[^>]*> lw   at,0\(gp\)
196
[       ]*254: R_MIPS_GOT16     \.text
197
0+0258 <[^>]*> addiu        at,at,608
198
[       ]*258: R_MIPS_LO16      \.text
199
0+025c <[^>]*> sw   v0,0\(at\)
200
0+0260 <[^>]*> lw   at,2\(gp\)
201
[       ]*260: R_MIPS_GOT16     \.text
202
0+0264 <[^>]*> addiu        at,at,860
203
[       ]*264: R_MIPS_LO16      \.text
204
0+0268 <[^>]*> jr   at
205
0+026c <[^>]*> nop
206
0+0270 <[^>]*> b    00000000 
207
0+0274 <[^>]*> lwc1 \$f0,0\(a0\)
208
0+0278 <[^>]*> lw   at,2\(gp\)
209
[       ]*278: R_MIPS_GOT16     \.text
210
0+027c <[^>]*> addiu        at,at,860
211
[       ]*27c: R_MIPS_LO16      \.text
212
0+0280 <[^>]*> jr   at
213
0+0284 <[^>]*> lwc1 \$f0,0\(a0\)
214
0+0288 <[^>]*> cfc1 v0,\$31
215
0+028c <[^>]*> b    00000000 
216
0+0290 <[^>]*> nop
217
0+0294 <[^>]*> cfc1 v0,\$31
218
0+0298 <[^>]*> lw   at,2\(gp\)
219
[       ]*298: R_MIPS_GOT16     \.text
220
0+029c <[^>]*> addiu        at,at,860
221
[       ]*29c: R_MIPS_LO16      \.text
222
0+02a0 <[^>]*> jr   at
223
0+02a4 <[^>]*> nop
224
0+02a8 <[^>]*> ctc1 v0,\$31
225
0+02ac <[^>]*> b    00000000 
226
0+02b0 <[^>]*> nop
227
0+02b4 <[^>]*> ctc1 v0,\$31
228
0+02b8 <[^>]*> lw   at,2\(gp\)
229
[       ]*2b8: R_MIPS_GOT16     \.text
230
0+02bc <[^>]*> addiu        at,at,860
231
[       ]*2bc: R_MIPS_LO16      \.text
232
0+02c0 <[^>]*> jr   at
233
0+02c4 <[^>]*> nop
234
0+02c8 <[^>]*> mtc1 v0,\$f31
235
0+02cc <[^>]*> b    00000000 
236
0+02d0 <[^>]*> nop
237
0+02d4 <[^>]*> mtc1 v0,\$f31
238
0+02d8 <[^>]*> lw   at,2\(gp\)
239
[       ]*2d8: R_MIPS_GOT16     \.text
240
0+02dc <[^>]*> addiu        at,at,860
241
[       ]*2dc: R_MIPS_LO16      \.text
242
0+02e0 <[^>]*> jr   at
243
0+02e4 <[^>]*> nop
244
0+02e8 <[^>]*> mfhi v0
245
0+02ec <[^>]*> b    00000000 
246
0+02f0 <[^>]*> nop
247
0+02f4 <[^>]*> mfhi v0
248
0+02f8 <[^>]*> lw   at,2\(gp\)
249
[       ]*2f8: R_MIPS_GOT16     \.text
250
0+02fc <[^>]*> addiu        at,at,860
251
[       ]*2fc: R_MIPS_LO16      \.text
252
0+0300 <[^>]*> jr   at
253
0+0304 <[^>]*> nop
254
0+0308 <[^>]*> move v0,a0
255
0+030c <[^>]*> jr   v0
256
0+0310 <[^>]*> nop
257
0+0314 <[^>]*> jr   a0
258
0+0318 <[^>]*> move v0,a0
259
0+031c <[^>]*> move v0,a0
260
0+0320 <[^>]*> jalr v0
261
0+0324 <[^>]*> nop
262
0+0328 <[^>]*> jalr a0
263
0+032c <[^>]*> move v0,a0
264
0+0330 <[^>]*> move v0,ra
265
0+0334 <[^>]*> jalr v1
266
0+0338 <[^>]*> nop
267
0+033c <[^>]*> move ra,a0
268
0+0340 <[^>]*> jalr a1
269
0+0344 <[^>]*> nop
270
0+0348 <[^>]*> jalr v0,v1
271
0+034c <[^>]*> move ra,a0
272
0+0350 <[^>]*> move v0,ra
273
0+0354 <[^>]*> jalr v0,v1
274
0+0358 <[^>]*> nop
275
        \.\.\.
276
        \.\.\.

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