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[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.20.1/] [gas/] [testsuite/] [gas/] [mips/] [relax-swap2.d] - Blame information for rev 301

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Line No. Rev Author Line
1 205 julius
#objdump: -dr --prefix-addresses -mmips:6000
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#name: MIPS2 branch likely relaxation with swapping
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#as: -32 -mips2 -KPIC -relax-branch
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#source: relax-swap2.s
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#stderr: relax-swap2.l
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.*: +file format .*mips.*
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Disassembly of section \.text:
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0+0000 <[^>]*> move v0,a0
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0+0004 <[^>]*> beql v0,v1,00000000 
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0+0008 <[^>]*> nop
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0+000c <[^>]*> move v0,a0
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0+0010 <[^>]*> beql v0,v1,00000020 
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0+0014 <[^>]*> nop
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0+0018 <[^>]*> beqzl        zero,00000030 
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0+001c <[^>]*> nop
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0+0020 <[^>]*> lw   at,2\(gp\)
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[       ]*20: R_MIPS_GOT16      \.text
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0+0024 <[^>]*> addiu        at,at,424
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[       ]*24: R_MIPS_LO16       \.text
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0+0028 <[^>]*> jr   at
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0+002c <[^>]*> nop
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0+0030 <[^>]*> move v0,a0
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0+0034 <[^>]*> beql a0,a1,00000000 
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0+0038 <[^>]*> nop
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0+003c <[^>]*> move v0,a0
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0+0040 <[^>]*> beql a0,a1,00000050 
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0+0044 <[^>]*> nop
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0+0048 <[^>]*> beqzl        zero,00000060 
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0+004c <[^>]*> nop
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0+0050 <[^>]*> lw   at,2\(gp\)
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[       ]*50: R_MIPS_GOT16      \.text
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0+0054 <[^>]*> addiu        at,at,424
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[       ]*54: R_MIPS_LO16       \.text
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0+0058 <[^>]*> jr   at
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0+005c <[^>]*> nop
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0+0060 <[^>]*> addiu        v0,a0,1
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0+0064 <[^>]*> beql v0,v1,00000000 
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0+0068 <[^>]*> nop
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0+006c <[^>]*> addiu        v0,a0,1
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0+0070 <[^>]*> beql v0,v1,00000080 
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0+0074 <[^>]*> nop
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0+0078 <[^>]*> beqzl        zero,00000090 
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0+007c <[^>]*> nop
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0+0080 <[^>]*> lw   at,2\(gp\)
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[       ]*80: R_MIPS_GOT16      \.text
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0+0084 <[^>]*> addiu        at,at,424
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[       ]*84: R_MIPS_LO16       \.text
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0+0088 <[^>]*> jr   at
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0+008c <[^>]*> nop
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0+0090 <[^>]*> addiu        v0,a0,1
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0+0094 <[^>]*> beql a0,a1,00000000 
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0+0098 <[^>]*> nop
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0+009c <[^>]*> addiu        v0,a0,1
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0+00a0 <[^>]*> beql a0,a1,000000b0 
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0+00a4 <[^>]*> nop
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0+00a8 <[^>]*> beqzl        zero,000000c0 
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0+00ac <[^>]*> nop
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0+00b0 <[^>]*> lw   at,2\(gp\)
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[       ]*b0: R_MIPS_GOT16      \.text
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0+00b4 <[^>]*> addiu        at,at,424
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[       ]*b4: R_MIPS_LO16       \.text
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0+00b8 <[^>]*> jr   at
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0+00bc <[^>]*> nop
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0+00c0 <[^>]*> lw   v0,0\(a0\)
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0+00c4 <[^>]*> beql v0,v1,00000000 
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0+00c8 <[^>]*> nop
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0+00cc <[^>]*> lw   v0,0\(a0\)
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0+00d0 <[^>]*> beql v0,v1,000000e0 
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0+00d4 <[^>]*> nop
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0+00d8 <[^>]*> beqzl        zero,000000f0 
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0+00dc <[^>]*> nop
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0+00e0 <[^>]*> lw   at,2\(gp\)
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[       ]*e0: R_MIPS_GOT16      \.text
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0+00e4 <[^>]*> addiu        at,at,424
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[       ]*e4: R_MIPS_LO16       \.text
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0+00e8 <[^>]*> jr   at
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0+00ec <[^>]*> nop
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0+00f0 <[^>]*> lw   v0,0\(a0\)
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0+00f4 <[^>]*> beql a0,a1,00000000 
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0+00f8 <[^>]*> nop
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0+00fc <[^>]*> lw   v0,0\(a0\)
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0+0100 <[^>]*> beql a0,a1,00000110 
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0+0104 <[^>]*> nop
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0+0108 <[^>]*> beqzl        zero,00000120 
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0+010c <[^>]*> nop
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0+0110 <[^>]*> lw   at,2\(gp\)
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[       ]*110: R_MIPS_GOT16     \.text
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0+0114 <[^>]*> addiu        at,at,424
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[       ]*114: R_MIPS_LO16      \.text
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0+0118 <[^>]*> jr   at
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0+011c <[^>]*> nop
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0+0120 <[^>]*> sw   v0,0\(a0\)
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0+0124 <[^>]*> beql v0,v1,00000000 
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0+0128 <[^>]*> nop
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0+012c <[^>]*> sw   v0,0\(a0\)
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0+0130 <[^>]*> beql v0,v1,00000140 
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0+0134 <[^>]*> nop
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0+0138 <[^>]*> beqzl        zero,00000150 
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0+013c <[^>]*> nop
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0+0140 <[^>]*> lw   at,2\(gp\)
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[       ]*140: R_MIPS_GOT16     \.text
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0+0144 <[^>]*> addiu        at,at,424
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[       ]*144: R_MIPS_LO16      \.text
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0+0148 <[^>]*> jr   at
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0+014c <[^>]*> nop
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0+0150 <[^>]*> sw   v0,0\(a0\)
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0+0154 <[^>]*> beql a0,a1,00000000 
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0+0158 <[^>]*> nop
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0+015c <[^>]*> sw   v0,0\(a0\)
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0+0160 <[^>]*> beql a0,a1,00000170 
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0+0164 <[^>]*> nop
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0+0168 <[^>]*> beqzl        zero,00000180 
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0+016c <[^>]*> nop
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0+0170 <[^>]*> lw   at,2\(gp\)
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[       ]*170: R_MIPS_GOT16     \.text
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0+0174 <[^>]*> addiu        at,at,424
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[       ]*174: R_MIPS_LO16      \.text
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0+0178 <[^>]*> jr   at
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0+017c <[^>]*> nop
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0+0180 <[^>]*> teq  v0,a0
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0+0184 <[^>]*> beq  a0,a1,00000000 
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0+0188 <[^>]*> nop
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0+018c <[^>]*> teq  v0,a0
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0+0190 <[^>]*> bne  a0,a1,000001a4 
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0+0194 <[^>]*> nop
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0+0198 <[^>]*> lw   at,2\(gp\)
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[       ]*198: R_MIPS_GOT16     \.text
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0+019c <[^>]*> addiu        at,at,424
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[       ]*19c: R_MIPS_LO16      \.text
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0+01a0 <[^>]*> jr   at
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0+01a4 <[^>]*> nop
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        \.\.\.
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        \.\.\.

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