OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.20.1/] [gas/] [testsuite/] [gas/] [mips/] [ulh-xgot.d] - Blame information for rev 205

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 205 julius
#objdump: -dr --prefix-addresses -mmips:3000
2
#name: MIPS ulh-xgot
3
#as: -32 -mips1 -mtune=r3000 -KPIC -xgot -EB --defsym XGOT=1
4
#source: ulh-pic.s
5
 
6
# Test the unaligned load and store macros with -KPIC -xgot.
7
 
8
.*: +file format .*mips.*
9
 
10
Disassembly of section .text:
11
0+0000 <[^>]*> lw   at,0\(gp\)
12
[       ]*0: R_MIPS_GOT16       .data
13
0+0004 <[^>]*> nop
14
0+0008 <[^>]*> addiu        at,at,0
15
[       ]*8: R_MIPS_LO16        .data
16
0+000c <[^>]*> nop
17
0+0010 <[^>]*> lb   a0,0\(at\)
18
0+0014 <[^>]*> lbu  at,1\(at\)
19
0+0018 <[^>]*> sll  a0,a0,0x8
20
0+001c <[^>]*> or   a0,a0,at
21
0+0020 <[^>]*> lui  at,0x0
22
[       ]*20: R_MIPS_GOT_HI16   big_external_data_label
23
0+0024 <[^>]*> addu at,at,gp
24
0+0028 <[^>]*> lw   at,0\(at\)
25
[       ]*28: R_MIPS_GOT_LO16   big_external_data_label
26
0+002c <[^>]*> nop
27
0+0030 <[^>]*> lbu  a0,0\(at\)
28
0+0034 <[^>]*> lbu  at,1\(at\)
29
0+0038 <[^>]*> sll  a0,a0,0x8
30
0+003c <[^>]*> or   a0,a0,at
31
0+0040 <[^>]*> lui  at,0x0
32
[       ]*40: R_MIPS_GOT_HI16   small_external_data_label
33
0+0044 <[^>]*> addu at,at,gp
34
0+0048 <[^>]*> lw   at,0\(at\)
35
[       ]*48: R_MIPS_GOT_LO16   small_external_data_label
36
0+004c <[^>]*> nop
37
0+0050 <[^>]*> lwl  a0,0\(at\)
38
0+0054 <[^>]*> lwr  a0,3\(at\)
39
0+0058 <[^>]*> lui  at,0x0
40
[       ]*58: R_MIPS_GOT_HI16   big_external_common
41
0+005c <[^>]*> addu at,at,gp
42
0+0060 <[^>]*> lw   at,0\(at\)
43
[       ]*60: R_MIPS_GOT_LO16   big_external_common
44
0+0064 <[^>]*> nop
45
0+0068 <[^>]*> sb   a0,1\(at\)
46
0+006c <[^>]*> srl  a0,a0,0x8
47
0+0070 <[^>]*> sb   a0,0\(at\)
48
0+0074 <[^>]*> lbu  at,1\(at\)
49
0+0078 <[^>]*> sll  a0,a0,0x8
50
0+007c <[^>]*> or   a0,a0,at
51
0+0080 <[^>]*> lui  at,0x0
52
[       ]*80: R_MIPS_GOT_HI16   small_external_common
53
0+0084 <[^>]*> addu at,at,gp
54
0+0088 <[^>]*> lw   at,0\(at\)
55
[       ]*88: R_MIPS_GOT_LO16   small_external_common
56
0+008c <[^>]*> nop
57
0+0090 <[^>]*> swl  a0,0\(at\)
58
0+0094 <[^>]*> swr  a0,3\(at\)
59
0+0098 <[^>]*> lw   at,0\(gp\)
60
[       ]*98: R_MIPS_GOT16      .bss
61
0+009c <[^>]*> nop
62
0+00a0 <[^>]*> addiu        at,at,0
63
[       ]*a0: R_MIPS_LO16       .bss
64
0+00a4 <[^>]*> nop
65
0+00a8 <[^>]*> lb   a0,0\(at\)
66
0+00ac <[^>]*> lbu  at,1\(at\)
67
0+00b0 <[^>]*> sll  a0,a0,0x8
68
0+00b4 <[^>]*> or   a0,a0,at
69
0+00b8 <[^>]*> lw   at,0\(gp\)
70
[       ]*b8: R_MIPS_GOT16      .bss
71
0+00bc <[^>]*> nop
72
0+00c0 <[^>]*> addiu        at,at,1000
73
[       ]*c0: R_MIPS_LO16       .bss
74
0+00c4 <[^>]*> nop
75
0+00c8 <[^>]*> lbu  a0,0\(at\)
76
0+00cc <[^>]*> lbu  at,1\(at\)
77
0+00d0 <[^>]*> sll  a0,a0,0x8
78
0+00d4 <[^>]*> or   a0,a0,at
79
0+00d8 <[^>]*> lw   at,0\(gp\)
80
[       ]*d8: R_MIPS_GOT16      .data
81
0+00dc <[^>]*> nop
82
0+00e0 <[^>]*> addiu        at,at,0
83
[       ]*e0: R_MIPS_LO16       .data
84
0+00e4 <[^>]*> nop
85
0+00e8 <[^>]*> addiu        at,at,1
86
0+00ec <[^>]*> lwl  a0,0\(at\)
87
0+00f0 <[^>]*> lwr  a0,3\(at\)
88
0+00f4 <[^>]*> lui  at,0x0
89
[       ]*f4: R_MIPS_GOT_HI16   big_external_data_label
90
0+00f8 <[^>]*> addu at,at,gp
91
0+00fc <[^>]*> lw   at,0\(at\)
92
[       ]*fc: R_MIPS_GOT_LO16   big_external_data_label
93
0+0100 <[^>]*> nop
94
0+0104 <[^>]*> addiu        at,at,1
95
0+0108 <[^>]*> sb   a0,1\(at\)
96
0+010c <[^>]*> srl  a0,a0,0x8
97
0+0110 <[^>]*> sb   a0,0\(at\)
98
0+0114 <[^>]*> lbu  at,1\(at\)
99
0+0118 <[^>]*> sll  a0,a0,0x8
100
0+011c <[^>]*> or   a0,a0,at
101
0+0120 <[^>]*> lui  at,0x0
102
[       ]*120: R_MIPS_GOT_HI16  small_external_data_label
103
0+0124 <[^>]*> addu at,at,gp
104
0+0128 <[^>]*> lw   at,0\(at\)
105
[       ]*128: R_MIPS_GOT_LO16  small_external_data_label
106
0+012c <[^>]*> nop
107
0+0130 <[^>]*> addiu        at,at,1
108
0+0134 <[^>]*> swl  a0,0\(at\)
109
0+0138 <[^>]*> swr  a0,3\(at\)
110
0+013c <[^>]*> lui  at,0x0
111
[       ]*13c: R_MIPS_GOT_HI16  big_external_common
112
0+0140 <[^>]*> addu at,at,gp
113
0+0144 <[^>]*> lw   at,0\(at\)
114
[       ]*144: R_MIPS_GOT_LO16  big_external_common
115
0+0148 <[^>]*> nop
116
0+014c <[^>]*> addiu        at,at,1
117
0+0150 <[^>]*> lb   a0,0\(at\)
118
0+0154 <[^>]*> lbu  at,1\(at\)
119
0+0158 <[^>]*> sll  a0,a0,0x8
120
0+015c <[^>]*> or   a0,a0,at
121
0+0160 <[^>]*> lui  at,0x0
122
[       ]*160: R_MIPS_GOT_HI16  small_external_common
123
0+0164 <[^>]*> addu at,at,gp
124
0+0168 <[^>]*> lw   at,0\(at\)
125
[       ]*168: R_MIPS_GOT_LO16  small_external_common
126
0+016c <[^>]*> nop
127
0+0170 <[^>]*> addiu        at,at,1
128
0+0174 <[^>]*> lbu  a0,0\(at\)
129
0+0178 <[^>]*> lbu  at,1\(at\)
130
0+017c <[^>]*> sll  a0,a0,0x8
131
0+0180 <[^>]*> or   a0,a0,at
132
0+0184 <[^>]*> lw   at,0\(gp\)
133
[       ]*184: R_MIPS_GOT16     .bss
134
0+0188 <[^>]*> nop
135
0+018c <[^>]*> addiu        at,at,0
136
[       ]*18c: R_MIPS_LO16      .bss
137
0+0190 <[^>]*> nop
138
0+0194 <[^>]*> addiu        at,at,1
139
0+0198 <[^>]*> lwl  a0,0\(at\)
140
0+019c <[^>]*> lwr  a0,3\(at\)
141
0+01a0 <[^>]*> lw   at,0\(gp\)
142
[       ]*1a0: R_MIPS_GOT16     .bss
143
0+01a4 <[^>]*> nop
144
0+01a8 <[^>]*> addiu        at,at,1000
145
[       ]*1a8: R_MIPS_LO16      .bss
146
0+01ac <[^>]*> nop
147
0+01b0 <[^>]*> addiu        at,at,1
148
0+01b4 <[^>]*> sb   a0,1\(at\)
149
0+01b8 <[^>]*> srl  a0,a0,0x8
150
0+01bc <[^>]*> sb   a0,0\(at\)
151
0+01c0 <[^>]*> lbu  at,1\(at\)
152
0+01c4 <[^>]*> sll  a0,a0,0x8
153
0+01c8 <[^>]*> or   a0,a0,at
154
0+01cc <[^>]*> nop

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.