OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.20.1/] [gas/] [testsuite/] [gas/] [sh/] [tlsd.d] - Blame information for rev 215

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 205 julius
#objdump: -dr
2
#as: -big
3
#name: sh dynamic tls
4
 
5
.*: +file format .*
6
 
7
Disassembly of section .text:
8
 
9
0+000 :
10
   0:   2f c6 [         ]*mov\.l        r12,@-r15
11
   2:   2f e6 [         ]*mov\.l        r14,@-r15
12
   4:   4f 22 [         ]*sts\.l        pr,@-r15
13
   6:   c7 14 [         ]*mova  58 ,r0
14
   8:   dc 13 [         ]*mov\.l        58 ,r12[        ]+! 0 .*
15
   a:   3c 0c [         ]*add   r0,r12
16
   c:   6e f3 [         ]*mov   r15,r14
17
   e:   d4 04 [         ]*mov\.l        20 ,r4[         ]+! 0 .*
18
  10:   c7 04 [         ]*mova  24 ,r0
19
  12:   d1 04 [         ]*mov\.l        24 ,r1[         ]+! 0 .*
20
  14:   31 0c [         ]*add   r0,r1
21
  16:   41 0b [         ]*jsr   @r1
22
  18:   34 cc [         ]*add   r12,r4
23
  1a:   a0 05 [         ]*bra   28 
24
  1c:   00 09 [         ]*nop
25
  1e:   00 09 [         ]*nop
26
        \.\.\.
27
[       ]+20: R_SH_TLS_GD_32    foo
28
[       ]+24: R_SH_PLT32        __tls_get_addr
29
  28:   d4 03 [         ]*mov\.l        38 ,r4[         ]+! 0 .*
30
  2a:   c7 04 [         ]*mova  3c ,r0
31
  2c:   d1 03 [         ]*mov\.l        3c ,r1[         ]+! 0 .*
32
  2e:   31 0c [         ]*add   r0,r1
33
  30:   41 0b [         ]*jsr   @r1
34
  32:   34 cc [         ]*add   r12,r4
35
  34:   a0 04 [         ]*bra   40 
36
  36:   00 09 [         ]*nop
37
        \.\.\.
38
[       ]+38: R_SH_TLS_LD_32    bar
39
[       ]+3c: R_SH_PLT32        __tls_get_addr
40
  40:   e2 01 [         ]*mov   #1,r2
41
  42:   d1 06 [         ]*mov\.l        5c ,r1[         ]+! 0 .*
42
  44:   30 1c [         ]*add   r1,r0
43
  46:   20 22 [         ]*mov\.l        r2,@r0
44
  48:   d1 05 [         ]*mov\.l        60 ,r1[         ]+! 0 .*
45
  4a:   30 1c [         ]*add   r1,r0
46
  4c:   6f e3 [         ]*mov   r14,r15
47
  4e:   4f 26 [         ]*lds\.l        @r15\+,pr
48
  50:   6e f6 [         ]*mov\.l        @r15\+,r14
49
  52:   00 0b [         ]*rts
50
  54:   6c f6 [         ]*mov\.l        @r15\+,r12
51
  56:   00 09 [         ]*nop
52
        \.\.\.
53
[       ]+58: R_SH_GOTPC        _GLOBAL_OFFSET_TABLE_
54
[       ]+5c: R_SH_TLS_LDO_32   bar
55
[       ]+60: R_SH_TLS_LDO_32   baz

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.