OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.20.1/] [ld/] [testsuite/] [ld-m68hc11/] [relax-group.d] - Blame information for rev 299

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 205 julius 
#source: relax-group.s
2 
#as: -m68hc11
3 
#ld: --relax
4 
#objdump: -d --prefix-addresses -r
5 
#target: m6811-*-* m6812-*-*
6 
 
7 
.*: +file format elf32-m68hc11
8 
 
9 
Disassembly of section .text:
10 
0+8000 <_start> bset    \*0+ <__bss_size> #\$04
11 
0+8003  bset    \*0+ <__bss_size> #\$04
12 
0+8006  bset    \*0+3 <__bss_size\+0x3> #\$04
13 
0+8009  bset    \*0+4  #\$08
14 
0+800c  bset    \*0+3 <__bss_size\+0x3> #\$04
15 
0+800f  bset    \*0+4  #\$08
16 
0+8012  bset    \*0+6  #\$04
17 
0+8015  bset    \*0+7  #\$08
18 
0+8018  bset    \*0+8  #\$0c
19 
0+801b  bset    \*0+9  #\$0c
20 
0+801e  bset    \*0+a  #\$0c
21 
0+8021  bset    \*0+b  #\$0c
22 
0+8024  bset    \*0+6  #\$04
23 
0+8027  bset    \*0+7  #\$08
24 
0+802a  bset    \*0+8  #\$0c
25 
0+802d  bset    \*0+9  #\$0c
26 
0+8030  bset    \*0+a  #\$0c
27 
0+8033  bset    \*0+b  #\$0c
28 
0+8036  bra     0+8000 <_start>
29 
0+8038  ldx     #0+fe
30 
0+803b  bset    \*0+fe  #\$04
31 
0+803e  bset    \*0+ff  #\$08
32 
0+8041  bset    2,x #\$0c
33 
0+8044  bset    3,x #\$0c
34 
0+8047  bset    4,x #\$0c
35 
0+804a  bset    5,x #\$0c
36 
0+804d  ldy     #0+fe
37 
0+8051  bset    \*0+fe  #\$04
38 
0+8054  bset    \*0+ff  #\$08
39 
0+8057  bset    2,y #\$0c
40 
0+805b  bset    3,y #\$0c
41 
0+805f  bset    4,y #\$0c
42 
0+8063  bset    5,y #\$0c
43 
0+8067  bclr    \*0+a  #\$04
44 
0+806a  bclr    \*0+b  #\$08
45 
0+806d  bclr    \*0+1a  #\$04
46 
0+8070  bclr    \*0+1b  #\$08
47 
0+8073  brset   \*0+8  #\$04 0+8073
48 
0+8077  brset   \*0+8  #\$04 0+8077
49 
0+807b  brset   \*0+8  #\$04 0+8094
50 
0+807f  brset   \*0+8  #\$04 0+8094
51 
0+8083  brclr   \*0+8  #\$04 0+8083
52 
0+8087  brclr   \*0+8  #\$04 0+8087
53 
0+808b  brclr   \*0+8  #\$04 0+8094
54 
0+808f  brclr   \*0+8  #\$04 0+8094
55 
0+8093  nop
56 
0+8094  bset    0,x #\$04
57 
0+8097  ldx     #0+ <__bss_size>
58 
0+809a  ldy     #0+8
59 
0+809e  rts
60 
0+809f  ldx     #0+ <__bss_size>
61 
0+80a2  bset    0,x #\$05
62 
0+80a5  jmp     0+8000 <_start>
63 
0+80a8  rts

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.