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[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.20.1/] [opcodes/] [iq2000-desc.h] - Blame information for rev 205

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1 205 julius
/* CPU data header for iq2000.
2
 
3
THIS FILE IS MACHINE GENERATED WITH CGEN.
4
 
5
Copyright 1996-2009 Free Software Foundation, Inc.
6
 
7
This file is part of the GNU Binutils and/or GDB, the GNU debugger.
8
 
9
   This file is free software; you can redistribute it and/or modify
10
   it under the terms of the GNU General Public License as published by
11
   the Free Software Foundation; either version 3, or (at your option)
12
   any later version.
13
 
14
   It is distributed in the hope that it will be useful, but WITHOUT
15
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
17
   License for more details.
18
 
19
   You should have received a copy of the GNU General Public License along
20
   with this program; if not, write to the Free Software Foundation, Inc.,
21
   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
22
 
23
*/
24
 
25
#ifndef IQ2000_CPU_H
26
#define IQ2000_CPU_H
27
 
28
#include "opcode/cgen-bitset.h"
29
 
30
#define CGEN_ARCH iq2000
31
 
32
/* Given symbol S, return iq2000_cgen_<S>.  */
33
#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
34
#define CGEN_SYM(s) iq2000##_cgen_##s
35
#else
36
#define CGEN_SYM(s) iq2000/**/_cgen_/**/s
37
#endif
38
 
39
 
40
/* Selected cpu families.  */
41
#define HAVE_CPU_IQ2000BF
42
#define HAVE_CPU_IQ10BF
43
 
44
#define CGEN_INSN_LSB0_P 1
45
 
46
/* Minimum size of any insn (in bytes).  */
47
#define CGEN_MIN_INSN_SIZE 4
48
 
49
/* Maximum size of any insn (in bytes).  */
50
#define CGEN_MAX_INSN_SIZE 4
51
 
52
#define CGEN_INT_INSN_P 1
53
 
54
/* Maximum number of syntax elements in an instruction.  */
55
#define CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS 19
56
 
57
/* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands.
58
   e.g. In "b,a foo" the ",a" is an operand.  If mnemonics have operands
59
   we can't hash on everything up to the space.  */
60
#define CGEN_MNEMONIC_OPERANDS
61
 
62
/* Maximum number of fields in an instruction.  */
63
#define CGEN_ACTUAL_MAX_IFMT_OPERANDS 8
64
 
65
/* Enums.  */
66
 
67
/* Enum declaration for .  */
68
typedef enum gr_names {
69
  H_GR_R0 = 0, H_GR__0 = 0, H_GR_R1 = 1, H_GR__1 = 1
70
 , H_GR_R2 = 2, H_GR__2 = 2, H_GR_R3 = 3, H_GR__3 = 3
71
 , H_GR_R4 = 4, H_GR__4 = 4, H_GR_R5 = 5, H_GR__5 = 5
72
 , H_GR_R6 = 6, H_GR__6 = 6, H_GR_R7 = 7, H_GR__7 = 7
73
 , H_GR_R8 = 8, H_GR__8 = 8, H_GR_R9 = 9, H_GR__9 = 9
74
 , H_GR_R10 = 10, H_GR__10 = 10, H_GR_R11 = 11, H_GR__11 = 11
75
 , H_GR_R12 = 12, H_GR__12 = 12, H_GR_R13 = 13, H_GR__13 = 13
76
 , H_GR_R14 = 14, H_GR__14 = 14, H_GR_R15 = 15, H_GR__15 = 15
77
 , H_GR_R16 = 16, H_GR__16 = 16, H_GR_R17 = 17, H_GR__17 = 17
78
 , H_GR_R18 = 18, H_GR__18 = 18, H_GR_R19 = 19, H_GR__19 = 19
79
 , H_GR_R20 = 20, H_GR__20 = 20, H_GR_R21 = 21, H_GR__21 = 21
80
 , H_GR_R22 = 22, H_GR__22 = 22, H_GR_R23 = 23, H_GR__23 = 23
81
 , H_GR_R24 = 24, H_GR__24 = 24, H_GR_R25 = 25, H_GR__25 = 25
82
 , H_GR_R26 = 26, H_GR__26 = 26, H_GR_R27 = 27, H_GR__27 = 27
83
 , H_GR_R28 = 28, H_GR__28 = 28, H_GR_R29 = 29, H_GR__29 = 29
84
 , H_GR_R30 = 30, H_GR__30 = 30, H_GR_R31 = 31, H_GR__31 = 31
85
} GR_NAMES;
86
 
87
/* Enum declaration for primary opcodes.  */
88
typedef enum opcodes {
89
  OP_SPECIAL = 0, OP_REGIMM = 1, OP_J = 2, OP_JAL = 3
90
 , OP_BEQ = 4, OP_BNE = 5, OP_BLEZ = 6, OP_BGTZ = 7
91
 , OP_ADDI = 8, OP_ADDIU = 9, OP_SLTI = 10, OP_SLTIU = 11
92
 , OP_ANDI = 12, OP_ORI = 13, OP_XORI = 14, OP_LUI = 15
93
 , OP_COP0 = 16, OP_COP1 = 17, OP_COP2 = 18, OP_COP3 = 19
94
 , OP_BEQL = 20, OP_BNEL = 21, OP_BLEZL = 22, OP_BGTZL = 23
95
 , OP_BMB0 = 24, OP_BMB1 = 25, OP_BMB2 = 26, OP_BMB3 = 27
96
 , OP_BBI = 28, OP_BBV = 29, OP_BBIN = 30, OP_BBVN = 31
97
 , OP_LB = 32, OP_LH = 33, OP_LW = 35, OP_LBU = 36
98
 , OP_LHU = 37, OP_RAM = 39, OP_SB = 40, OP_SH = 41
99
 , OP_SW = 43, OP_ANDOI = 44, OP_BMB = 45, OP_ORUI = 47
100
 , OP_LDW = 48, OP_SDW = 56, OP_ANDOUI = 63
101
} OPCODES;
102
 
103
/* Enum declaration for iq10-only primary opcodes.  */
104
typedef enum q10_opcodes {
105
  OP10_BMB = 6, OP10_ORUI = 15, OP10_BMBL = 22, OP10_ANDOUI = 47
106
 , OP10_BBIL = 60, OP10_BBVL = 61, OP10_BBINL = 62, OP10_BBVNL = 63
107
} Q10_OPCODES;
108
 
109
/* Enum declaration for branch sub-opcodes.  */
110
typedef enum regimm_functions {
111
  FUNC_BLTZ = 0, FUNC_BGEZ = 1, FUNC_BLTZL = 2, FUNC_BGEZL = 3
112
 , FUNC_BLEZ = 4, FUNC_BGTZ = 5, FUNC_BLEZL = 6, FUNC_BGTZL = 7
113
 , FUNC_BRI = 8, FUNC_BRV = 9, FUNC_BCTX = 12, FUNC_BLTZAL = 16
114
 , FUNC_BGEZAL = 17, FUNC_BLTZALL = 18, FUNC_BGEZALL = 19, FUNC_BLEZAL = 20
115
 , FUNC_BGTZAL = 21, FUNC_BLEZALL = 22, FUNC_BGTZALL = 23
116
} REGIMM_FUNCTIONS;
117
 
118
/* Enum declaration for function sub-opcodes.  */
119
typedef enum functions {
120
  FUNC_SLL = 0, FUNC_SLMV = 1, FUNC_SRL = 2, FUNC_SRA = 3
121
 , FUNC_SLLV = 4, FUNC_SRMV = 5, FUNC_SRLV = 6, FUNC_SRAV = 7
122
 , FUNC_JR = 8, FUNC_JALR = 9, FUNC_JCR = 10, FUNC_SYSCALL = 12
123
 , FUNC_BREAK = 13, FUNC_SLEEP = 14, FUNC_ADD = 32, FUNC_ADDU = 33
124
 , FUNC_SUB = 34, FUNC_SUBU = 35, FUNC_AND = 36, FUNC_OR = 37
125
 , FUNC_XOR = 38, FUNC_NOR = 39, FUNC_ADO16 = 41, FUNC_SLT = 42
126
 , FUNC_SLTU = 43, FUNC_MRGB = 45
127
} FUNCTIONS;
128
 
129
/* Enum declaration for iq10-only special function sub-opcodes.  */
130
typedef enum q10s_functions {
131
  FUNC10_YIELD = 14, FUNC10_CNT1S = 46
132
} Q10S_FUNCTIONS;
133
 
134
/* Enum declaration for iq10 function sub-opcodes.  */
135
typedef enum cop_functions {
136
  FUNC10_CFC = 0, FUNC10_LOCK = 1, FUNC10_CTC = 2, FUNC10_UNLK = 3
137
 , FUNC10_SWRD = 4, FUNC10_SWRDL = 5, FUNC10_SWWR = 6, FUNC10_SWWRU = 7
138
 , FUNC10_RBA = 8, FUNC10_RBAL = 9, FUNC10_RBAR = 10, FUNC10_DWRD = 12
139
 , FUNC10_DWRDL = 13, FUNC10_WBA = 16, FUNC10_WBAU = 17, FUNC10_WBAC = 18
140
 , FUNC10_CRC32 = 20, FUNC10_CRC32B = 21, FUNC10_MCID = 32, FUNC10_DBD = 33
141
 , FUNC10_DBA = 34, FUNC10_DPWT = 35, FUNC10_AVAIL = 36, FUNC10_FREE = 37
142
 , FUNC10_CHKHDR = 38, FUNC10_TSTOD = 39, FUNC10_PKRLA = 40, FUNC10_PKRLAU = 41
143
 , FUNC10_PKRLAH = 42, FUNC10_PKRLAC = 43, FUNC10_CMPHDR = 44, FUNC10_CM64RS = 0
144
 , FUNC10_CM64RD = 1, FUNC10_CM64RI = 4, FUNC10_CM64CLR = 5, FUNC10_CM64SS = 8
145
 , FUNC10_CM64SD = 9, FUNC10_CM64SI = 12, FUNC10_CM64RA = 16, FUNC10_CM64RIA2 = 20
146
 , FUNC10_CM128RIA2 = 21, FUNC10_CM64SA = 24, FUNC10_CM64SIA2 = 28, FUNC10_CM128SIA2 = 29
147
 , FUNC10_CM32RS = 32, FUNC10_CM32RD = 33, FUNC10_CM32XOR = 34, FUNC10_CM32ANDN = 35
148
 , FUNC10_CM32RI = 36, FUNC10_CM128VSA = 38, FUNC10_CM32SS = 40, FUNC10_CM32SD = 41
149
 , FUNC10_CM32OR = 42, FUNC10_CM32AND = 43, FUNC10_CM32SI = 44, FUNC10_CM32RA = 48
150
 , FUNC10_CM32SA = 56
151
} COP_FUNCTIONS;
152
 
153
/* Enum declaration for iq10 function sub-opcodes.  */
154
typedef enum cop_cm128_4functions {
155
  FUNC10_CM128RIA3 = 4, FUNC10_CM128SIA3 = 6
156
} COP_CM128_4FUNCTIONS;
157
 
158
/* Enum declaration for iq10 function sub-opcodes.  */
159
typedef enum cop_cm128_3functions {
160
  FUNC10_CM128RIA4 = 6, FUNC10_CM128SIA4 = 7
161
} COP_CM128_3FUNCTIONS;
162
 
163
/* Enum declaration for iq10 coprocessor sub-opcodes.  */
164
typedef enum cop2_functions {
165
  FUNC10_PKRLI = 0, FUNC10_PKRLIU = 1, FUNC10_PKRLIH = 2, FUNC10_PKRLIC = 3
166
 , FUNC10_RBIR = 1, FUNC10_RBI = 2, FUNC10_RBIL = 3, FUNC10_WBIC = 5
167
 , FUNC10_WBI = 6, FUNC10_WBIU = 7
168
} COP2_FUNCTIONS;
169
 
170
/* Enum declaration for iq10 coprocessor cam sub-opcodes.  */
171
typedef enum cop3_cam_functions {
172
  FUNC10_CAM36 = 16, FUNC10_CAM72 = 17, FUNC10_CAM144 = 18, FUNC10_CAM288 = 19
173
} COP3_CAM_FUNCTIONS;
174
 
175
/* Attributes.  */
176
 
177
/* Enum declaration for machine type selection.  */
178
typedef enum mach_attr {
179
  MACH_BASE, MACH_IQ2000, MACH_IQ10, MACH_MAX
180
} MACH_ATTR;
181
 
182
/* Enum declaration for instruction set selection.  */
183
typedef enum isa_attr {
184
  ISA_IQ2000, ISA_MAX
185
} ISA_ATTR;
186
 
187
/* Number of architecture variants.  */
188
#define MAX_ISAS  1
189
#define MAX_MACHS ((int) MACH_MAX)
190
 
191
/* Ifield support.  */
192
 
193
/* Ifield attribute indices.  */
194
 
195
/* Enum declaration for cgen_ifld attrs.  */
196
typedef enum cgen_ifld_attr {
197
  CGEN_IFLD_VIRTUAL, CGEN_IFLD_PCREL_ADDR, CGEN_IFLD_ABS_ADDR, CGEN_IFLD_RESERVED
198
 , CGEN_IFLD_SIGN_OPT, CGEN_IFLD_SIGNED, CGEN_IFLD_END_BOOLS, CGEN_IFLD_START_NBOOLS = 31
199
 , CGEN_IFLD_MACH, CGEN_IFLD_END_NBOOLS
200
} CGEN_IFLD_ATTR;
201
 
202
/* Number of non-boolean elements in cgen_ifld_attr.  */
203
#define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1)
204
 
205
/* cgen_ifld attribute accessor macros.  */
206
#define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset)
207
#define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_VIRTUAL)) != 0)
208
#define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_PCREL_ADDR)) != 0)
209
#define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_ABS_ADDR)) != 0)
210
#define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_RESERVED)) != 0)
211
#define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGN_OPT)) != 0)
212
#define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGNED)) != 0)
213
 
214
/* Enum declaration for iq2000 ifield types.  */
215
typedef enum ifield_type {
216
  IQ2000_F_NIL, IQ2000_F_ANYOF, IQ2000_F_OPCODE, IQ2000_F_RS
217
 , IQ2000_F_RT, IQ2000_F_RD, IQ2000_F_SHAMT, IQ2000_F_CP_OP
218
 , IQ2000_F_CP_OP_10, IQ2000_F_CP_GRP, IQ2000_F_FUNC, IQ2000_F_IMM
219
 , IQ2000_F_RD_RS, IQ2000_F_RD_RT, IQ2000_F_RT_RS, IQ2000_F_JTARG
220
 , IQ2000_F_JTARGQ10, IQ2000_F_OFFSET, IQ2000_F_COUNT, IQ2000_F_BYTECOUNT
221
 , IQ2000_F_INDEX, IQ2000_F_MASK, IQ2000_F_MASKQ10, IQ2000_F_MASKL
222
 , IQ2000_F_EXCODE, IQ2000_F_RSRVD, IQ2000_F_10_11, IQ2000_F_24_19
223
 , IQ2000_F_5, IQ2000_F_10, IQ2000_F_25, IQ2000_F_CAM_Z
224
 , IQ2000_F_CAM_Y, IQ2000_F_CM_3FUNC, IQ2000_F_CM_4FUNC, IQ2000_F_CM_3Z
225
 , IQ2000_F_CM_4Z, IQ2000_F_MAX
226
} IFIELD_TYPE;
227
 
228
#define MAX_IFLD ((int) IQ2000_F_MAX)
229
 
230
/* Hardware attribute indices.  */
231
 
232
/* Enum declaration for cgen_hw attrs.  */
233
typedef enum cgen_hw_attr {
234
  CGEN_HW_VIRTUAL, CGEN_HW_CACHE_ADDR, CGEN_HW_PC, CGEN_HW_PROFILE
235
 , CGEN_HW_END_BOOLS, CGEN_HW_START_NBOOLS = 31, CGEN_HW_MACH, CGEN_HW_END_NBOOLS
236
} CGEN_HW_ATTR;
237
 
238
/* Number of non-boolean elements in cgen_hw_attr.  */
239
#define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1)
240
 
241
/* cgen_hw attribute accessor macros.  */
242
#define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset)
243
#define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_VIRTUAL)) != 0)
244
#define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_CACHE_ADDR)) != 0)
245
#define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PC)) != 0)
246
#define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PROFILE)) != 0)
247
 
248
/* Enum declaration for iq2000 hardware types.  */
249
typedef enum cgen_hw_type {
250
  HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR
251
 , HW_H_IADDR, HW_H_PC, HW_H_GR, HW_MAX
252
} CGEN_HW_TYPE;
253
 
254
#define MAX_HW ((int) HW_MAX)
255
 
256
/* Operand attribute indices.  */
257
 
258
/* Enum declaration for cgen_operand attrs.  */
259
typedef enum cgen_operand_attr {
260
  CGEN_OPERAND_VIRTUAL, CGEN_OPERAND_PCREL_ADDR, CGEN_OPERAND_ABS_ADDR, CGEN_OPERAND_SIGN_OPT
261
 , CGEN_OPERAND_SIGNED, CGEN_OPERAND_NEGATIVE, CGEN_OPERAND_RELAX, CGEN_OPERAND_SEM_ONLY
262
 , CGEN_OPERAND_END_BOOLS, CGEN_OPERAND_START_NBOOLS = 31, CGEN_OPERAND_MACH, CGEN_OPERAND_END_NBOOLS
263
} CGEN_OPERAND_ATTR;
264
 
265
/* Number of non-boolean elements in cgen_operand_attr.  */
266
#define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1)
267
 
268
/* cgen_operand attribute accessor macros.  */
269
#define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset)
270
#define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_VIRTUAL)) != 0)
271
#define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0)
272
#define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_ABS_ADDR)) != 0)
273
#define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGN_OPT)) != 0)
274
#define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGNED)) != 0)
275
#define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_NEGATIVE)) != 0)
276
#define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_RELAX)) != 0)
277
#define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SEM_ONLY)) != 0)
278
 
279
/* Enum declaration for iq2000 operand types.  */
280
typedef enum cgen_operand_type {
281
  IQ2000_OPERAND_PC, IQ2000_OPERAND_RS, IQ2000_OPERAND_RT, IQ2000_OPERAND_RD
282
 , IQ2000_OPERAND_RD_RS, IQ2000_OPERAND_RD_RT, IQ2000_OPERAND_RT_RS, IQ2000_OPERAND_SHAMT
283
 , IQ2000_OPERAND_IMM, IQ2000_OPERAND_OFFSET, IQ2000_OPERAND_BASEOFF, IQ2000_OPERAND_JMPTARG
284
 , IQ2000_OPERAND_MASK, IQ2000_OPERAND_MASKQ10, IQ2000_OPERAND_MASKL, IQ2000_OPERAND_COUNT
285
 , IQ2000_OPERAND__INDEX, IQ2000_OPERAND_EXECODE, IQ2000_OPERAND_BYTECOUNT, IQ2000_OPERAND_CAM_Y
286
 , IQ2000_OPERAND_CAM_Z, IQ2000_OPERAND_CM_3FUNC, IQ2000_OPERAND_CM_4FUNC, IQ2000_OPERAND_CM_3Z
287
 , IQ2000_OPERAND_CM_4Z, IQ2000_OPERAND_BASE, IQ2000_OPERAND_MASKR, IQ2000_OPERAND_BITNUM
288
 , IQ2000_OPERAND_HI16, IQ2000_OPERAND_LO16, IQ2000_OPERAND_MLO16, IQ2000_OPERAND_JMPTARGQ10
289
 , IQ2000_OPERAND_MAX
290
} CGEN_OPERAND_TYPE;
291
 
292
/* Number of operands types.  */
293
#define MAX_OPERANDS 32
294
 
295
/* Maximum number of operands referenced by any insn.  */
296
#define MAX_OPERAND_INSTANCES 8
297
 
298
/* Insn attribute indices.  */
299
 
300
/* Enum declaration for cgen_insn attrs.  */
301
typedef enum cgen_insn_attr {
302
  CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
303
 , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED
304
 , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_YIELD_INSN, CGEN_INSN_LOAD_DELAY
305
 , CGEN_INSN_EVEN_REG_NUM, CGEN_INSN_UNSUPPORTED, CGEN_INSN_USES_RD, CGEN_INSN_USES_RS
306
 , CGEN_INSN_USES_RT, CGEN_INSN_USES_R31, CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31
307
 , CGEN_INSN_MACH, CGEN_INSN_END_NBOOLS
308
} CGEN_INSN_ATTR;
309
 
310
/* Number of non-boolean elements in cgen_insn_attr.  */
311
#define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1)
312
 
313
/* cgen_insn attribute accessor macros.  */
314
#define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset)
315
#define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_ALIAS)) != 0)
316
#define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_VIRTUAL)) != 0)
317
#define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_UNCOND_CTI)) != 0)
318
#define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_COND_CTI)) != 0)
319
#define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SKIP_CTI)) != 0)
320
#define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_DELAY_SLOT)) != 0)
321
#define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXABLE)) != 0)
322
#define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXED)) != 0)
323
#define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NO_DIS)) != 0)
324
#define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PBB)) != 0)
325
#define CGEN_ATTR_CGEN_INSN_YIELD_INSN_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_YIELD_INSN)) != 0)
326
#define CGEN_ATTR_CGEN_INSN_LOAD_DELAY_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_LOAD_DELAY)) != 0)
327
#define CGEN_ATTR_CGEN_INSN_EVEN_REG_NUM_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_EVEN_REG_NUM)) != 0)
328
#define CGEN_ATTR_CGEN_INSN_UNSUPPORTED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_UNSUPPORTED)) != 0)
329
#define CGEN_ATTR_CGEN_INSN_USES_RD_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_USES_RD)) != 0)
330
#define CGEN_ATTR_CGEN_INSN_USES_RS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_USES_RS)) != 0)
331
#define CGEN_ATTR_CGEN_INSN_USES_RT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_USES_RT)) != 0)
332
#define CGEN_ATTR_CGEN_INSN_USES_R31_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_USES_R31)) != 0)
333
 
334
/* cgen.h uses things we just defined.  */
335
#include "opcode/cgen.h"
336
 
337
extern const struct cgen_ifld iq2000_cgen_ifld_table[];
338
 
339
/* Attributes.  */
340
extern const CGEN_ATTR_TABLE iq2000_cgen_hardware_attr_table[];
341
extern const CGEN_ATTR_TABLE iq2000_cgen_ifield_attr_table[];
342
extern const CGEN_ATTR_TABLE iq2000_cgen_operand_attr_table[];
343
extern const CGEN_ATTR_TABLE iq2000_cgen_insn_attr_table[];
344
 
345
/* Hardware decls.  */
346
 
347
extern CGEN_KEYWORD iq2000_cgen_opval_gr_names;
348
 
349
extern const CGEN_HW_ENTRY iq2000_cgen_hw_table[];
350
 
351
 
352
 
353
#endif /* IQ2000_CPU_H */

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