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[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.20.1/] [opcodes/] [ppc-dis.c] - Blame information for rev 205

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/* ppc-dis.c -- Disassemble PowerPC instructions
   Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
   2008, 2009 Free Software Foundation, Inc.
   Written by Ian Lance Taylor, Cygnus Support
 
   This file is part of the GNU opcodes library.
 
   This library is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.
 
   It is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.
 
   You should have received a copy of the GNU General Public License
   along with this file; see the file COPYING.  If not, write to the
   Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
   MA 02110-1301, USA.  */
 
#include <stdio.h>
#include "sysdep.h"
#include "dis-asm.h"
#include "opintl.h"
#include "opcode/ppc.h"
 
/* This file provides several disassembler functions, all of which use
   the disassembler interface defined in dis-asm.h.  Several functions
   are provided because this file handles disassembly for the PowerPC
   in both big and little endian mode and also for the POWER (RS/6000)
   chip.  */
static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int,
                               ppc_cpu_t);
 
struct dis_private
{
  /* Stash the result of parsing disassembler_options here.  */
  ppc_cpu_t dialect;
};
 
#define POWERPC_DIALECT(INFO) \
  (((struct dis_private *) ((INFO)->private_data))->dialect)
 
struct ppc_mopt {
  const char *opt;
  ppc_cpu_t cpu;
  ppc_cpu_t sticky;
};
 
struct ppc_mopt ppc_opts[] = {
  { "403",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_403
                | PPC_OPCODE_32),
 
  { "405",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_403
                | PPC_OPCODE_405 | PPC_OPCODE_32),
 
  { "440",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
                | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
 
  { "464",     (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
                | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
 
  { "476",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ISEL
                | PPC_OPCODE_440 | PPC_OPCODE_476 | PPC_OPCODE_POWER4
                | PPC_OPCODE_POWER5),
 
  { "601",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_601
                | PPC_OPCODE_32),
 
  { "603",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32),
 
  { "604",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32),
 
  { "620",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64),
 
  { "7400",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC
                | PPC_OPCODE_32),
 
  { "7410",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC
                | PPC_OPCODE_32),
 
  { "7450",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC
                | PPC_OPCODE_32),
 
  { "7455",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC
                | PPC_OPCODE_32),
 
  { "750cl",   (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS)
    , 0 },
  { "a2",      (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ISEL
                | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_CACHELCK
                | PPC_OPCODE_64 | PPC_OPCODE_A2),
 
  { "altivec", (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC),
    PPC_OPCODE_ALTIVEC },
  { "any",     0,
    PPC_OPCODE_ANY },
  { "booke",   (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32),
 
  { "booke32", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32),
 
  { "cell",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
                | PPC_OPCODE_POWER4 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC),
 
  { "com",     (PPC_OPCODE_COMMON | PPC_OPCODE_32),
 
  { "e300",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
                | PPC_OPCODE_E300),
 
  { "e500",    (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
                | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
                | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
                | PPC_OPCODE_E500MC),
 
  { "e500mc",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
                | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
                | PPC_OPCODE_E500MC),
 
  { "e500x2",  (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
                | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
                | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
                | PPC_OPCODE_E500MC),
 
  { "efs",     (PPC_OPCODE_PPC | PPC_OPCODE_EFS),
 
  { "power4",  (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
                | PPC_OPCODE_POWER4),
 
  { "power5",  (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
                | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5),
 
  { "power6",  (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
                | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
                | PPC_OPCODE_ALTIVEC),
 
  { "power7",  (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ISEL
                | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5
                | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC
                | PPC_OPCODE_VSX),
 
  { "ppc",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32),
 
  { "ppc32",   (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32),
 
  { "ppc64",   (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64),
 
  { "ppc64bridge", (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64_BRIDGE
                    | PPC_OPCODE_64),
 
  { "ppcps",   (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS),
 
  { "pwr",     (PPC_OPCODE_POWER | PPC_OPCODE_32),
 
  { "pwr2",    (PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32),
 
  { "pwr4",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
                | PPC_OPCODE_POWER4),
 
  { "pwr5",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
                | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5),
 
  { "pwr5x",   (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
                | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5),
 
  { "pwr6",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
                | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
                | PPC_OPCODE_ALTIVEC),
 
  { "pwr7",    (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ISEL
                | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5
                | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC
                | PPC_OPCODE_VSX),
 
  { "pwrx",    (PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32),
 
  { "spe",     (PPC_OPCODE_PPC | PPC_OPCODE_EFS),
    PPC_OPCODE_SPE },
  { "vsx",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC),
    PPC_OPCODE_VSX },
};
 
/* Handle -m and -M options that set cpu type, and .machine arg.  */
 
ppc_cpu_t
ppc_parse_cpu (ppc_cpu_t ppc_cpu, const char *arg)
{
  /* Sticky bits.  */
  ppc_cpu_t retain_flags = ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
                                      | PPC_OPCODE_SPE | PPC_OPCODE_ANY);
  unsigned int i;
 
  for (i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
    if (strcmp (ppc_opts[i].opt, arg) == 0)
      {
        if (ppc_opts[i].sticky)
          {
            retain_flags |= ppc_opts[i].sticky;
            if ((ppc_cpu & ~(PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
                             | PPC_OPCODE_SPE | PPC_OPCODE_ANY)) != 0)
              break;
          }
        ppc_cpu = ppc_opts[i].cpu;
        break;
      }
  if (i >= sizeof (ppc_opts) / sizeof (ppc_opts[0]))
    return 0;
 
  ppc_cpu |= retain_flags;
  return ppc_cpu;
}
 
/* Determine which set of machines to disassemble for.  */
 
static int
powerpc_init_dialect (struct disassemble_info *info)
{
  ppc_cpu_t dialect = 0;
  char *arg;
  struct dis_private *priv = calloc (sizeof (*priv), 1);
 
  if (priv == NULL)
    return FALSE;
 
  arg = info->disassembler_options;
  while (arg != NULL)
    {
      ppc_cpu_t new_cpu = 0;
      char *end = strchr (arg, ',');
 
      if (end != NULL)
        *end = 0;
 
      if ((new_cpu = ppc_parse_cpu (dialect, arg)) != 0)
        dialect = new_cpu;
      else if (strcmp (arg, "32") == 0)
        {
          dialect &= ~PPC_OPCODE_64;
          dialect |= PPC_OPCODE_32;
        }
      else if (strcmp (arg, "64") == 0)
        {
          dialect |= PPC_OPCODE_64;
          dialect &= ~PPC_OPCODE_32;
        }
      else
        fprintf (stderr, _("warning: ignoring unknown -M%s option\n"), arg);
 
      if (end != NULL)
        *end++ = ',';
      arg = end;
    }
 
  if ((dialect & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) == 0)
    {
      if (info->mach == bfd_mach_ppc64)
        dialect |= PPC_OPCODE_64;
      else
        dialect |= PPC_OPCODE_32;
      /* Choose a reasonable default.  */
      dialect |= (PPC_OPCODE_PPC | PPC_OPCODE_COMMON | PPC_OPCODE_CLASSIC
                  | PPC_OPCODE_601 | PPC_OPCODE_ALTIVEC);
    }
 
  info->private_data = priv;
  POWERPC_DIALECT(info) = dialect;
 
  return TRUE;
}
 
/* Print a big endian PowerPC instruction.  */
 
int
print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
{
  if (info->private_data == NULL && !powerpc_init_dialect (info))
    return -1;
  return print_insn_powerpc (memaddr, info, 1, POWERPC_DIALECT(info));
}
 
/* Print a little endian PowerPC instruction.  */
 
int
print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
{
  if (info->private_data == NULL && !powerpc_init_dialect (info))
    return -1;
  return print_insn_powerpc (memaddr, info, 0, POWERPC_DIALECT(info));
}
 
/* Print a POWER (RS/6000) instruction.  */
 
int
print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
{
  return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
}
 
/* Extract the operand value from the PowerPC or POWER instruction.  */
 
static long
operand_value_powerpc (const struct powerpc_operand *operand,
                       unsigned long insn, ppc_cpu_t dialect)
{
  long value;
  int invalid;
  /* Extract the value from the instruction.  */
  if (operand->extract)
    value = (*operand->extract) (insn, dialect, &invalid);
  else
    {
      value = (insn >> operand->shift) & operand->bitm;
      if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
        {
          /* BITM is always some number of zeros followed by some
             number of ones, followed by some numer of zeros.  */
          unsigned long top = operand->bitm;
          /* top & -top gives the rightmost 1 bit, so this
             fills in any trailing zeros.  */
          top |= (top & -top) - 1;
          top &= ~(top >> 1);
          value = (value ^ top) - top;
        }
    }
 
  return value;
}
 
/* Determine whether the optional operand(s) should be printed.  */
 
static int
skip_optional_operands (const unsigned char *opindex,
                        unsigned long insn, ppc_cpu_t dialect)
{
  const struct powerpc_operand *operand;
 
  for (; *opindex != 0; opindex++)
    {
      operand = &powerpc_operands[*opindex];
      if ((operand->flags & PPC_OPERAND_NEXT) != 0
          || ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
              && operand_value_powerpc (operand, insn, dialect) != 0))
        return 0;
    }
 
  return 1;
}
 
/* Print a PowerPC or POWER instruction.  */
 
static int
print_insn_powerpc (bfd_vma memaddr,
                    struct disassemble_info *info,
                    int bigendian,
                    ppc_cpu_t dialect)
{
  bfd_byte buffer[4];
  int status;
  unsigned long insn;
  const struct powerpc_opcode *opcode;
  const struct powerpc_opcode *opcode_end;
  unsigned long op;
  ppc_cpu_t dialect_orig = dialect;
 
  status = (*info->read_memory_func) (memaddr, buffer, 4, info);
  if (status != 0)
    {
      (*info->memory_error_func) (status, memaddr, info);
      return -1;
    }
 
  if (bigendian)
    insn = bfd_getb32 (buffer);
  else
    insn = bfd_getl32 (buffer);
 
  /* Get the major opcode of the instruction.  */
  op = PPC_OP (insn);
 
  /* Find the first match in the opcode table.  We could speed this up
     a bit by doing a binary search on the major opcode.  */
  opcode_end = powerpc_opcodes + powerpc_num_opcodes;
 again:
  for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
    {
      unsigned long table_op;
      const unsigned char *opindex;
      const struct powerpc_operand *operand;
      int invalid;
      int need_comma;
      int need_paren;
      int skip_optional;
 
      table_op = PPC_OP (opcode->opcode);
      if (op < table_op)
        break;
      if (op > table_op)
        continue;
 
      if ((insn & opcode->mask) != opcode->opcode
          || (opcode->flags & dialect) == 0
          || (opcode->deprecated & dialect_orig) != 0)
        continue;
 
      /* Make two passes over the operands.  First see if any of them
         have extraction functions, and, if they do, make sure the
         instruction is valid.  */
      invalid = 0;
      for (opindex = opcode->operands; *opindex != 0; opindex++)
        {
          operand = powerpc_operands + *opindex;
          if (operand->extract)
            (*operand->extract) (insn, dialect, &invalid);
        }
      if (invalid)
        continue;
 
      /* The instruction is valid.  */
      if (opcode->operands[0] != 0)
        (*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
      else
        (*info->fprintf_func) (info->stream, "%s", opcode->name);
 
      /* Now extract and print the operands.  */
      need_comma = 0;
      need_paren = 0;
      skip_optional = -1;
      for (opindex = opcode->operands; *opindex != 0; opindex++)
        {
          long value;
 
          operand = powerpc_operands + *opindex;
 
          /* Operands that are marked FAKE are simply ignored.  We
             already made sure that the extract function considered
             the instruction to be valid.  */
          if ((operand->flags & PPC_OPERAND_FAKE) != 0)
            continue;
 
          /* If all of the optional operands have the value zero,
             then don't print any of them.  */
          if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
            {
              if (skip_optional < 0)
                skip_optional = skip_optional_operands (opindex, insn,
                                                        dialect);
              if (skip_optional)
                continue;
            }
 
          value = operand_value_powerpc (operand, insn, dialect);
 
          if (need_comma)
            {
              (*info->fprintf_func) (info->stream, ",");
              need_comma = 0;
            }
 
          /* Print the operand as directed by the flags.  */
          if ((operand->flags & PPC_OPERAND_GPR) != 0
              || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
            (*info->fprintf_func) (info->stream, "r%ld", value);
          else if ((operand->flags & PPC_OPERAND_FPR) != 0)
            (*info->fprintf_func) (info->stream, "f%ld", value);
          else if ((operand->flags & PPC_OPERAND_VR) != 0)
            (*info->fprintf_func) (info->stream, "v%ld", value);
          else if ((operand->flags & PPC_OPERAND_VSR) != 0)
            (*info->fprintf_func) (info->stream, "vs%ld", value);
          else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
            (*info->print_address_func) (memaddr + value, info);
          else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
            (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
          else if ((operand->flags & PPC_OPERAND_FSL) != 0)
            (*info->fprintf_func) (info->stream, "fsl%ld", value);
          else if ((operand->flags & PPC_OPERAND_FCR) != 0)
            (*info->fprintf_func) (info->stream, "fcr%ld", value);
          else if ((operand->flags & PPC_OPERAND_UDI) != 0)
            (*info->fprintf_func) (info->stream, "%ld", value);
          else if ((operand->flags & PPC_OPERAND_CR) != 0
                   && (dialect & PPC_OPCODE_PPC) != 0)
            {
              if (operand->bitm == 7)
                (*info->fprintf_func) (info->stream, "cr%ld", value);
              else
                {
                  static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
                  int cr;
                  int cc;
 
                  cr = value >> 2;
                  if (cr != 0)
                    (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
                  cc = value & 3;
                  (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
                }
            }
          else
            (*info->fprintf_func) (info->stream, "%ld", value);
 
          if (need_paren)
            {
              (*info->fprintf_func) (info->stream, ")");
              need_paren = 0;
            }
 
          if ((operand->flags & PPC_OPERAND_PARENS) == 0)
            need_comma = 1;
          else
            {
              (*info->fprintf_func) (info->stream, "(");
              need_paren = 1;
            }
        }
 
      /* We have found and printed an instruction; return.  */
      return 4;
    }
 
  if ((dialect & PPC_OPCODE_ANY) != 0)
    {
      dialect = ~PPC_OPCODE_ANY;
      goto again;
    }
 
  /* We could not find a match.  */
  (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
 
  return 4;
}
 
void
print_ppc_disassembler_options (FILE *stream)
{
  unsigned int i, col;
 
  fprintf (stream, _("\n\
The following PPC specific disassembler options are supported for use with\n\
the -M switch:\n"));
 
  for (col = 0, i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
    {
      col += fprintf (stream, " %s,", ppc_opts[i].opt);
      if (col > 66)
        {
          fprintf (stream, "\n");
          col = 0;
        }
    }
  fprintf (stream, " 32, 64\n");
}

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[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.20.1/] [opcodes/] [ppc-dis.c] - Blame information for rev 205

Line No.	Rev	Author	Line
1	205	julius	`/* ppc-dis.c -- Disassemble PowerPC instructions`
2			`Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,`
3			`2008, 2009 Free Software Foundation, Inc.`
4			`Written by Ian Lance Taylor, Cygnus Support`
5
6			`This file is part of the GNU opcodes library.`
7
8			`This library is free software; you can redistribute it and/or modify`
9			`it under the terms of the GNU General Public License as published by`
10			`the Free Software Foundation; either version 3, or (at your option)`
11			`any later version.`
12
13			`It is distributed in the hope that it will be useful, but WITHOUT`
14			`ANY WARRANTY; without even the implied warranty of MERCHANTABILITY`
15			`or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public`
16			`License for more details.`
17
18			`You should have received a copy of the GNU General Public License`
19			`along with this file; see the file COPYING. If not, write to the`
20			`Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,`
21			`MA 02110-1301, USA. */`
22
23			`#include <stdio.h>`
24			`#include "sysdep.h"`
25			`#include "dis-asm.h"`
26			`#include "opintl.h"`
27			`#include "opcode/ppc.h"`
28
29			`/* This file provides several disassembler functions, all of which use`
30			`the disassembler interface defined in dis-asm.h. Several functions`
31			`are provided because this file handles disassembly for the PowerPC`
32			`in both big and little endian mode and also for the POWER (RS/6000)`
33			`chip. */`
34			`static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int,`
35			`ppc_cpu_t);`
36
37			`struct dis_private`
38			`{`
39			`/* Stash the result of parsing disassembler_options here. */`
40			`ppc_cpu_t dialect;`
41			`};`
42
43			`#define POWERPC_DIALECT(INFO) \`
44			`(((struct dis_private *) ((INFO)->private_data))->dialect)`
45
46			`struct ppc_mopt {`
47			`const char *opt;`
48			`ppc_cpu_t cpu;`
49			`ppc_cpu_t sticky;`
50			`};`
51
52			`struct ppc_mopt ppc_opts[] = {`
53			`{ "403", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_403`
54			`\| PPC_OPCODE_32),`
55
56			`{ "405", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_403`
57			`\| PPC_OPCODE_405 \| PPC_OPCODE_32),`
58
59			`{ "440", (PPC_OPCODE_PPC \| PPC_OPCODE_BOOKE \| PPC_OPCODE_32`
60			`\| PPC_OPCODE_440 \| PPC_OPCODE_ISEL \| PPC_OPCODE_RFMCI),`
61
62			`{ "464", (PPC_OPCODE_PPC \| PPC_OPCODE_BOOKE \| PPC_OPCODE_32`
63			`\| PPC_OPCODE_440 \| PPC_OPCODE_ISEL \| PPC_OPCODE_RFMCI),`
64
65			`{ "476", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_ISEL`
66			`\| PPC_OPCODE_440 \| PPC_OPCODE_476 \| PPC_OPCODE_POWER4`
67			`\| PPC_OPCODE_POWER5),`
68
69			`{ "601", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_601`
70			`\| PPC_OPCODE_32),`
71
72			`{ "603", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_32),`
73
74			`{ "604", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_32),`
75
76			`{ "620", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_64),`
77
78			`{ "7400", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_ALTIVEC`
79			`\| PPC_OPCODE_32),`
80
81			`{ "7410", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_ALTIVEC`
82			`\| PPC_OPCODE_32),`
83
84			`{ "7450", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_ALTIVEC`
85			`\| PPC_OPCODE_32),`
86
87			`{ "7455", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_ALTIVEC`
88			`\| PPC_OPCODE_32),`
89
90			`{ "750cl", (PPC_OPCODE_PPC \| PPC_OPCODE_PPCPS)`
91			`, 0 },`
92			`{ "a2", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_ISEL`
93			`\| PPC_OPCODE_POWER4 \| PPC_OPCODE_POWER5 \| PPC_OPCODE_CACHELCK`
94			`\| PPC_OPCODE_64 \| PPC_OPCODE_A2),`
95
96			`{ "altivec", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC),`
97			`PPC_OPCODE_ALTIVEC },`
98			`{ "any", 0,`
99			`PPC_OPCODE_ANY },`
100			`{ "booke", (PPC_OPCODE_PPC \| PPC_OPCODE_BOOKE \| PPC_OPCODE_32),`
101
102			`{ "booke32", (PPC_OPCODE_PPC \| PPC_OPCODE_BOOKE \| PPC_OPCODE_32),`
103
104			`{ "cell", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_64`
105			`\| PPC_OPCODE_POWER4 \| PPC_OPCODE_CELL \| PPC_OPCODE_ALTIVEC),`
106
107			`{ "com", (PPC_OPCODE_COMMON \| PPC_OPCODE_32),`
108
109			`{ "e300", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_32`
110			`\| PPC_OPCODE_E300),`
111
112			`{ "e500", (PPC_OPCODE_PPC \| PPC_OPCODE_BOOKE \| PPC_OPCODE_SPE`
113			`\| PPC_OPCODE_ISEL \| PPC_OPCODE_EFS \| PPC_OPCODE_BRLOCK`
114			`\| PPC_OPCODE_PMR \| PPC_OPCODE_CACHELCK \| PPC_OPCODE_RFMCI`
115			`\| PPC_OPCODE_E500MC),`
116
117			`{ "e500mc", (PPC_OPCODE_PPC \| PPC_OPCODE_BOOKE \| PPC_OPCODE_ISEL`
118			`\| PPC_OPCODE_PMR \| PPC_OPCODE_CACHELCK \| PPC_OPCODE_RFMCI`
119			`\| PPC_OPCODE_E500MC),`
120
121			`{ "e500x2", (PPC_OPCODE_PPC \| PPC_OPCODE_BOOKE \| PPC_OPCODE_SPE`
122			`\| PPC_OPCODE_ISEL \| PPC_OPCODE_EFS \| PPC_OPCODE_BRLOCK`
123			`\| PPC_OPCODE_PMR \| PPC_OPCODE_CACHELCK \| PPC_OPCODE_RFMCI`
124			`\| PPC_OPCODE_E500MC),`
125
126			`{ "efs", (PPC_OPCODE_PPC \| PPC_OPCODE_EFS),`
127
128			`{ "power4", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_64`
129			`\| PPC_OPCODE_POWER4),`
130
131			`{ "power5", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_64`
132			`\| PPC_OPCODE_POWER4 \| PPC_OPCODE_POWER5),`
133
134			`{ "power6", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_64`
135			`\| PPC_OPCODE_POWER4 \| PPC_OPCODE_POWER5 \| PPC_OPCODE_POWER6`
136			`\| PPC_OPCODE_ALTIVEC),`
137
138			`{ "power7", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_ISEL`
139			`\| PPC_OPCODE_64 \| PPC_OPCODE_POWER4 \| PPC_OPCODE_POWER5`
140			`\| PPC_OPCODE_POWER6 \| PPC_OPCODE_POWER7 \| PPC_OPCODE_ALTIVEC`
141			`\| PPC_OPCODE_VSX),`
142
143			`{ "ppc", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_32),`
144
145			`{ "ppc32", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_32),`
146
147			`{ "ppc64", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_64),`
148
149			`{ "ppc64bridge", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_64_BRIDGE`
150			`\| PPC_OPCODE_64),`
151
152			`{ "ppcps", (PPC_OPCODE_PPC \| PPC_OPCODE_PPCPS),`
153
154			`{ "pwr", (PPC_OPCODE_POWER \| PPC_OPCODE_32),`
155
156			`{ "pwr2", (PPC_OPCODE_POWER \| PPC_OPCODE_POWER2 \| PPC_OPCODE_32),`
157
158			`{ "pwr4", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_64`
159			`\| PPC_OPCODE_POWER4),`
160
161			`{ "pwr5", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_64`
162			`\| PPC_OPCODE_POWER4 \| PPC_OPCODE_POWER5),`
163
164			`{ "pwr5x", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_64`
165			`\| PPC_OPCODE_POWER4 \| PPC_OPCODE_POWER5),`
166
167			`{ "pwr6", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_64`
168			`\| PPC_OPCODE_POWER4 \| PPC_OPCODE_POWER5 \| PPC_OPCODE_POWER6`
169			`\| PPC_OPCODE_ALTIVEC),`
170
171			`{ "pwr7", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC \| PPC_OPCODE_ISEL`
172			`\| PPC_OPCODE_64 \| PPC_OPCODE_POWER4 \| PPC_OPCODE_POWER5`
173			`\| PPC_OPCODE_POWER6 \| PPC_OPCODE_POWER7 \| PPC_OPCODE_ALTIVEC`
174			`\| PPC_OPCODE_VSX),`
175
176			`{ "pwrx", (PPC_OPCODE_POWER \| PPC_OPCODE_POWER2 \| PPC_OPCODE_32),`
177
178			`{ "spe", (PPC_OPCODE_PPC \| PPC_OPCODE_EFS),`
179			`PPC_OPCODE_SPE },`
180			`{ "vsx", (PPC_OPCODE_PPC \| PPC_OPCODE_CLASSIC),`
181			`PPC_OPCODE_VSX },`
182			`};`
183
184			`/* Handle -m and -M options that set cpu type, and .machine arg. */`
185
186			`ppc_cpu_t`
187			`ppc_parse_cpu (ppc_cpu_t ppc_cpu, const char *arg)`
188			`{`
189			`/* Sticky bits. */`
190			`ppc_cpu_t retain_flags = ppc_cpu & (PPC_OPCODE_ALTIVEC \| PPC_OPCODE_VSX`
191			`\| PPC_OPCODE_SPE \| PPC_OPCODE_ANY);`
192			`unsigned int i;`
193
194			`for (i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)`
195			`if (strcmp (ppc_opts[i].opt, arg) == 0)`
196			`{`
197			`if (ppc_opts[i].sticky)`
198			`{`
199			`retain_flags \|= ppc_opts[i].sticky;`
200			`if ((ppc_cpu & ~(PPC_OPCODE_ALTIVEC \| PPC_OPCODE_VSX`
201			`\| PPC_OPCODE_SPE \| PPC_OPCODE_ANY)) != 0)`
202			`break;`
203			`}`
204			`ppc_cpu = ppc_opts[i].cpu;`
205			`break;`
206			`}`
207			`if (i >= sizeof (ppc_opts) / sizeof (ppc_opts[0]))`
208			`return 0;`
209
210			`ppc_cpu \|= retain_flags;`
211			`return ppc_cpu;`
212			`}`
213
214			`/* Determine which set of machines to disassemble for. */`
215
216			`static int`
217			`powerpc_init_dialect (struct disassemble_info *info)`
218			`{`
219			`ppc_cpu_t dialect = 0;`
220			`char *arg;`
221			`struct dis_private priv = calloc (sizeof (priv), 1);`
222
223			`if (priv == NULL)`
224			`return FALSE;`
225
226			`arg = info->disassembler_options;`
227			`while (arg != NULL)`
228			`{`
229			`ppc_cpu_t new_cpu = 0;`
230			`char *end = strchr (arg, ',');`
231
232			`if (end != NULL)`
233			`*end = 0;`
234
235			`if ((new_cpu = ppc_parse_cpu (dialect, arg)) != 0)`
236			`dialect = new_cpu;`
237			`else if (strcmp (arg, "32") == 0)`
238			`{`
239			`dialect &= ~PPC_OPCODE_64;`
240			`dialect \|= PPC_OPCODE_32;`
241			`}`
242			`else if (strcmp (arg, "64") == 0)`
243			`{`
244			`dialect \|= PPC_OPCODE_64;`
245			`dialect &= ~PPC_OPCODE_32;`
246			`}`
247			`else`
248			`fprintf (stderr, _("warning: ignoring unknown -M%s option\n"), arg);`
249
250			`if (end != NULL)`
251			`*end++ = ',';`
252			`arg = end;`
253			`}`
254
255			`if ((dialect & ~(PPC_OPCODE_32 \| PPC_OPCODE_64)) == 0)`
256			`{`
257			`if (info->mach == bfd_mach_ppc64)`
258			`dialect \|= PPC_OPCODE_64;`
259			`else`
260			`dialect \|= PPC_OPCODE_32;`
261			`/* Choose a reasonable default. */`
262			`dialect \|= (PPC_OPCODE_PPC \| PPC_OPCODE_COMMON \| PPC_OPCODE_CLASSIC`
263			`\| PPC_OPCODE_601 \| PPC_OPCODE_ALTIVEC);`
264			`}`
265
266			`info->private_data = priv;`
267			`POWERPC_DIALECT(info) = dialect;`
268
269			`return TRUE;`
270			`}`
271
272			`/* Print a big endian PowerPC instruction. */`
273
274			`int`
275			`print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)`
276			`{`
277			`if (info->private_data == NULL && !powerpc_init_dialect (info))`
278			`return -1;`
279			`return print_insn_powerpc (memaddr, info, 1, POWERPC_DIALECT(info));`
280			`}`
281
282			`/* Print a little endian PowerPC instruction. */`
283
284			`int`
285			`print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)`
286			`{`
287			`if (info->private_data == NULL && !powerpc_init_dialect (info))`
288			`return -1;`
289			`return print_insn_powerpc (memaddr, info, 0, POWERPC_DIALECT(info));`
290			`}`
291
292			`/* Print a POWER (RS/6000) instruction. */`
293
294			`int`
295			`print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)`
296			`{`
297			`return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);`
298			`}`
299
300			`/* Extract the operand value from the PowerPC or POWER instruction. */`
301
302			`static long`
303			`operand_value_powerpc (const struct powerpc_operand *operand,`
304			`unsigned long insn, ppc_cpu_t dialect)`
305			`{`
306			`long value;`
307			`int invalid;`
308			`/* Extract the value from the instruction. */`
309			`if (operand->extract)`
310			`value = (*operand->extract) (insn, dialect, &invalid);`
311			`else`
312			`{`
313			`value = (insn >> operand->shift) & operand->bitm;`
314			`if ((operand->flags & PPC_OPERAND_SIGNED) != 0)`
315			`{`
316			`/* BITM is always some number of zeros followed by some`
317			`number of ones, followed by some numer of zeros. */`
318			`unsigned long top = operand->bitm;`
319			`/* top & -top gives the rightmost 1 bit, so this`
320			`fills in any trailing zeros. */`
321			`top \|= (top & -top) - 1;`
322			`top &= ~(top >> 1);`
323			`value = (value ^ top) - top;`
324			`}`
325			`}`
326
327			`return value;`
328			`}`
329
330			`/* Determine whether the optional operand(s) should be printed. */`
331
332			`static int`
333			`skip_optional_operands (const unsigned char *opindex,`
334			`unsigned long insn, ppc_cpu_t dialect)`
335			`{`
336			`const struct powerpc_operand *operand;`
337
338			`for (; *opindex != 0; opindex++)`
339			`{`
340			`operand = &powerpc_operands[*opindex];`
341			`if ((operand->flags & PPC_OPERAND_NEXT) != 0`
342			`\|\| ((operand->flags & PPC_OPERAND_OPTIONAL) != 0`
343			`&& operand_value_powerpc (operand, insn, dialect) != 0))`
344			`return 0;`
345			`}`
346
347			`return 1;`
348			`}`
349
350			`/* Print a PowerPC or POWER instruction. */`
351
352			`static int`
353			`print_insn_powerpc (bfd_vma memaddr,`
354			`struct disassemble_info *info,`
355			`int bigendian,`
356			`ppc_cpu_t dialect)`
357			`{`
358			`bfd_byte buffer[4];`
359			`int status;`
360			`unsigned long insn;`
361			`const struct powerpc_opcode *opcode;`
362			`const struct powerpc_opcode *opcode_end;`
363			`unsigned long op;`
364			`ppc_cpu_t dialect_orig = dialect;`
365
366			`status = (*info->read_memory_func) (memaddr, buffer, 4, info);`
367			`if (status != 0)`
368			`{`
369			`(*info->memory_error_func) (status, memaddr, info);`
370			`return -1;`
371			`}`
372
373			`if (bigendian)`
374			`insn = bfd_getb32 (buffer);`
375			`else`
376			`insn = bfd_getl32 (buffer);`
377
378			`/* Get the major opcode of the instruction. */`
379			`op = PPC_OP (insn);`
380
381			`/* Find the first match in the opcode table. We could speed this up`
382			`a bit by doing a binary search on the major opcode. */`
383			`opcode_end = powerpc_opcodes + powerpc_num_opcodes;`
384			`again:`
385			`for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)`
386			`{`
387			`unsigned long table_op;`
388			`const unsigned char *opindex;`
389			`const struct powerpc_operand *operand;`
390			`int invalid;`
391			`int need_comma;`
392			`int need_paren;`
393			`int skip_optional;`
394
395			`table_op = PPC_OP (opcode->opcode);`
396			`if (op < table_op)`
397			`break;`
398			`if (op > table_op)`
399			`continue;`
400
401			`if ((insn & opcode->mask) != opcode->opcode`
402			`\|\| (opcode->flags & dialect) == 0`
403			`\|\| (opcode->deprecated & dialect_orig) != 0)`
404			`continue;`
405
406			`/* Make two passes over the operands. First see if any of them`
407			`have extraction functions, and, if they do, make sure the`
408			`instruction is valid. */`
409			`invalid = 0;`
410			`for (opindex = opcode->operands; *opindex != 0; opindex++)`
411			`{`
412			`operand = powerpc_operands + *opindex;`
413			`if (operand->extract)`
414			`(*operand->extract) (insn, dialect, &invalid);`
415			`}`
416			`if (invalid)`
417			`continue;`
418
419			`/* The instruction is valid. */`
420			`if (opcode->operands[0] != 0)`
421			`(*info->fprintf_func) (info->stream, "%-7s ", opcode->name);`
422			`else`
423			`(*info->fprintf_func) (info->stream, "%s", opcode->name);`
424
425			`/* Now extract and print the operands. */`
426			`need_comma = 0;`
427			`need_paren = 0;`
428			`skip_optional = -1;`
429			`for (opindex = opcode->operands; *opindex != 0; opindex++)`
430			`{`
431			`long value;`
432
433			`operand = powerpc_operands + *opindex;`
434
435			`/* Operands that are marked FAKE are simply ignored. We`
436			`already made sure that the extract function considered`
437			`the instruction to be valid. */`
438			`if ((operand->flags & PPC_OPERAND_FAKE) != 0)`
439			`continue;`
440
441			`/* If all of the optional operands have the value zero,`
442			`then don't print any of them. */`
443			`if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)`
444			`{`
445			`if (skip_optional < 0)`
446			`skip_optional = skip_optional_operands (opindex, insn,`
447			`dialect);`
448			`if (skip_optional)`
449			`continue;`
450			`}`
451
452			`value = operand_value_powerpc (operand, insn, dialect);`
453
454			`if (need_comma)`
455			`{`
456			`(*info->fprintf_func) (info->stream, ",");`
457			`need_comma = 0;`
458			`}`
459
460			`/* Print the operand as directed by the flags. */`
461			`if ((operand->flags & PPC_OPERAND_GPR) != 0`
462			`\|\| ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))`
463			`(*info->fprintf_func) (info->stream, "r%ld", value);`
464			`else if ((operand->flags & PPC_OPERAND_FPR) != 0)`
465			`(*info->fprintf_func) (info->stream, "f%ld", value);`
466			`else if ((operand->flags & PPC_OPERAND_VR) != 0)`
467			`(*info->fprintf_func) (info->stream, "v%ld", value);`
468			`else if ((operand->flags & PPC_OPERAND_VSR) != 0)`
469			`(*info->fprintf_func) (info->stream, "vs%ld", value);`
470			`else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)`
471			`(*info->print_address_func) (memaddr + value, info);`
472			`else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)`
473			`(*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);`
474			`else if ((operand->flags & PPC_OPERAND_FSL) != 0)`
475			`(*info->fprintf_func) (info->stream, "fsl%ld", value);`
476			`else if ((operand->flags & PPC_OPERAND_FCR) != 0)`
477			`(*info->fprintf_func) (info->stream, "fcr%ld", value);`
478			`else if ((operand->flags & PPC_OPERAND_UDI) != 0)`
479			`(*info->fprintf_func) (info->stream, "%ld", value);`
480			`else if ((operand->flags & PPC_OPERAND_CR) != 0`
481			`&& (dialect & PPC_OPCODE_PPC) != 0)`
482			`{`
483			`if (operand->bitm == 7)`
484			`(*info->fprintf_func) (info->stream, "cr%ld", value);`
485			`else`
486			`{`
487			`static const char *cbnames[4] = { "lt", "gt", "eq", "so" };`
488			`int cr;`
489			`int cc;`
490
491			`cr = value >> 2;`
492			`if (cr != 0)`
493			`(info->fprintf_func) (info->stream, "4cr%d+", cr);`
494			`cc = value & 3;`
495			`(*info->fprintf_func) (info->stream, "%s", cbnames[cc]);`
496			`}`
497			`}`
498			`else`
499			`(*info->fprintf_func) (info->stream, "%ld", value);`
500
501			`if (need_paren)`
502			`{`
503			`(*info->fprintf_func) (info->stream, ")");`
504			`need_paren = 0;`
505			`}`
506
507			`if ((operand->flags & PPC_OPERAND_PARENS) == 0)`
508			`need_comma = 1;`
509			`else`
510			`{`
511			`(*info->fprintf_func) (info->stream, "(");`
512			`need_paren = 1;`
513			`}`
514			`}`
515
516			`/* We have found and printed an instruction; return. */`
517			`return 4;`
518			`}`
519
520			`if ((dialect & PPC_OPCODE_ANY) != 0)`
521			`{`
522			`dialect = ~PPC_OPCODE_ANY;`
523			`goto again;`
524			`}`
525
526			`/* We could not find a match. */`
527			`(*info->fprintf_func) (info->stream, ".long 0x%lx", insn);`
528
529			`return 4;`
530			`}`
531
532			`void`
533			`print_ppc_disassembler_options (FILE *stream)`
534			`{`
535			`unsigned int i, col;`
536
537			`fprintf (stream, _("\n\`
538			`The following PPC specific disassembler options are supported for use with\n\`
539			`the -M switch:\n"));`
540
541			`for (col = 0, i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)`
542			`{`
543			`col += fprintf (stream, " %s,", ppc_opts[i].opt);`
544			`if (col > 66)`
545			`{`
546			`fprintf (stream, "\n");`
547			`col = 0;`
548			`}`
549			`}`
550			`fprintf (stream, " 32, 64\n");`
551			`}`