1 |
38 |
julius |
/* Save and restore call-clobbered registers which are live across a call.
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Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002,
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2003, 2004, 2005, 2007 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#include "config.h"
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22 |
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#include "system.h"
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23 |
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#include "coretypes.h"
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#include "tm.h"
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25 |
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#include "rtl.h"
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26 |
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#include "regs.h"
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27 |
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#include "insn-config.h"
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28 |
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#include "flags.h"
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29 |
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#include "hard-reg-set.h"
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30 |
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#include "recog.h"
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#include "basic-block.h"
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32 |
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#include "reload.h"
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33 |
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#include "function.h"
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34 |
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#include "expr.h"
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35 |
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#include "toplev.h"
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36 |
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#include "tm_p.h"
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37 |
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#include "addresses.h"
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38 |
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39 |
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#ifndef MAX_MOVE_MAX
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40 |
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#define MAX_MOVE_MAX MOVE_MAX
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41 |
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#endif
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#ifndef MIN_UNITS_PER_WORD
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#define MIN_UNITS_PER_WORD UNITS_PER_WORD
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45 |
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#endif
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46 |
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47 |
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#define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
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48 |
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49 |
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/* Modes for each hard register that we can save. The smallest mode is wide
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50 |
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enough to save the entire contents of the register. When saving the
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51 |
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register because it is live we first try to save in multi-register modes.
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52 |
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If that is not possible the save is done one register at a time. */
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53 |
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54 |
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static enum machine_mode
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55 |
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regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
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56 |
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57 |
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/* For each hard register, a place on the stack where it can be saved,
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58 |
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if needed. */
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59 |
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60 |
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static rtx
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regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
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63 |
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/* We will only make a register eligible for caller-save if it can be
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64 |
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saved in its widest mode with a simple SET insn as long as the memory
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65 |
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address is valid. We record the INSN_CODE is those insns here since
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66 |
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when we emit them, the addresses might not be valid, so they might not
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67 |
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be recognized. */
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68 |
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69 |
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static int
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70 |
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reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
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71 |
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static int
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72 |
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reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
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73 |
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74 |
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/* Set of hard regs currently residing in save area (during insn scan). */
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76 |
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static HARD_REG_SET hard_regs_saved;
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78 |
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/* Number of registers currently in hard_regs_saved. */
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80 |
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static int n_regs_saved;
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81 |
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82 |
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/* Computed by mark_referenced_regs, all regs referenced in a given
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83 |
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insn. */
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84 |
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static HARD_REG_SET referenced_regs;
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85 |
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86 |
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static void mark_set_regs (rtx, rtx, void *);
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88 |
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static void mark_referenced_regs (rtx);
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static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
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enum machine_mode *);
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static int insert_restore (struct insn_chain *, int, int, int,
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92 |
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enum machine_mode *);
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static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
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94 |
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rtx);
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95 |
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static void add_stored_regs (rtx, rtx, void *);
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96 |
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97 |
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/* Initialize for caller-save.
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98 |
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99 |
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Look at all the hard registers that are used by a call and for which
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regclass.c has not already excluded from being used across a call.
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101 |
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102 |
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Ensure that we can find a mode to save the register and that there is a
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simple insn to save and restore the register. This latter check avoids
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problems that would occur if we tried to save the MQ register of some
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machines directly into memory. */
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void
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init_caller_save (void)
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{
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110 |
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rtx addr_reg;
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111 |
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int offset;
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112 |
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rtx address;
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113 |
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int i, j;
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114 |
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enum machine_mode mode;
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115 |
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rtx savepat, restpat;
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116 |
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rtx test_reg, test_mem;
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117 |
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rtx saveinsn, restinsn;
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/* First find all the registers that we need to deal with and all
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the modes that they can have. If we can't find a mode to use,
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121 |
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we can't have the register live over calls. */
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122 |
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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{
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if (call_used_regs[i] && ! call_fixed_regs[i])
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126 |
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{
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for (j = 1; j <= MOVE_MAX_WORDS; j++)
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128 |
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{
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regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
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VOIDmode);
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if (regno_save_mode[i][j] == VOIDmode && j == 1)
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132 |
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{
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133 |
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call_fixed_regs[i] = 1;
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SET_HARD_REG_BIT (call_fixed_reg_set, i);
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}
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136 |
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}
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137 |
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}
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138 |
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else
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regno_save_mode[i][1] = VOIDmode;
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140 |
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}
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141 |
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/* The following code tries to approximate the conditions under which
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we can easily save and restore a register without scratch registers or
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other complexities. It will usually work, except under conditions where
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the validity of an insn operand is dependent on the address offset.
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No such cases are currently known.
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147 |
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We first find a typical offset from some BASE_REG_CLASS register.
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This address is chosen by finding the first register in the class
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and by finding the smallest power of two that is a valid offset from
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that register in every mode we will use to save registers. */
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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if (TEST_HARD_REG_BIT
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(reg_class_contents
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[(int) base_reg_class (regno_save_mode [i][1], PLUS, CONST_INT)], i))
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break;
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gcc_assert (i < FIRST_PSEUDO_REGISTER);
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160 |
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addr_reg = gen_rtx_REG (Pmode, i);
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for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
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{
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address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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if (regno_save_mode[i][1] != VOIDmode
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&& ! strict_memory_address_p (regno_save_mode[i][1], address))
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break;
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if (i == FIRST_PSEUDO_REGISTER)
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break;
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}
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175 |
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/* If we didn't find a valid address, we must use register indirect. */
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if (offset == 0)
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address = addr_reg;
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/* Next we try to form an insn to save and restore the register. We
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see if such an insn is recognized and meets its constraints.
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183 |
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To avoid lots of unnecessary RTL allocation, we construct all the RTL
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once, then modify the memory and register operands in-place. */
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test_reg = gen_rtx_REG (VOIDmode, 0);
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test_mem = gen_rtx_MEM (VOIDmode, address);
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savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);
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restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);
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191 |
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saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, savepat, -1, 0, 0);
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restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, restpat, -1, 0, 0);
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194 |
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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for (mode = 0 ; mode < MAX_MACHINE_MODE; mode++)
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196 |
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if (HARD_REGNO_MODE_OK (i, mode))
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197 |
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{
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198 |
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int ok;
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199 |
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200 |
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/* Update the register number and modes of the register
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201 |
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and memory operand. */
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202 |
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REGNO (test_reg) = i;
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203 |
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PUT_MODE (test_reg, mode);
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204 |
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PUT_MODE (test_mem, mode);
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205 |
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206 |
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/* Force re-recognition of the modified insns. */
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207 |
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INSN_CODE (saveinsn) = -1;
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208 |
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INSN_CODE (restinsn) = -1;
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209 |
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210 |
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reg_save_code[i][mode] = recog_memoized (saveinsn);
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211 |
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reg_restore_code[i][mode] = recog_memoized (restinsn);
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212 |
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213 |
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/* Now extract both insns and see if we can meet their
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214 |
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constraints. */
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215 |
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ok = (reg_save_code[i][mode] != -1
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216 |
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&& reg_restore_code[i][mode] != -1);
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217 |
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if (ok)
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218 |
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{
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219 |
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extract_insn (saveinsn);
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220 |
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ok = constrain_operands (1);
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221 |
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extract_insn (restinsn);
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222 |
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ok &= constrain_operands (1);
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223 |
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}
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224 |
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225 |
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if (! ok)
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226 |
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{
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227 |
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reg_save_code[i][mode] = -1;
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228 |
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reg_restore_code[i][mode] = -1;
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229 |
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}
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230 |
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}
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231 |
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else
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232 |
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{
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233 |
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reg_save_code[i][mode] = -1;
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234 |
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reg_restore_code[i][mode] = -1;
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235 |
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}
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236 |
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237 |
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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238 |
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for (j = 1; j <= MOVE_MAX_WORDS; j++)
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239 |
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if (reg_save_code [i][regno_save_mode[i][j]] == -1)
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240 |
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{
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241 |
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regno_save_mode[i][j] = VOIDmode;
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242 |
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if (j == 1)
|
243 |
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{
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244 |
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call_fixed_regs[i] = 1;
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245 |
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SET_HARD_REG_BIT (call_fixed_reg_set, i);
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246 |
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}
|
247 |
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}
|
248 |
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}
|
249 |
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|
250 |
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/* Initialize save areas by showing that we haven't allocated any yet. */
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251 |
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|
252 |
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void
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253 |
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init_save_areas (void)
|
254 |
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{
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255 |
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int i, j;
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256 |
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|
257 |
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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258 |
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for (j = 1; j <= MOVE_MAX_WORDS; j++)
|
259 |
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regno_save_mem[i][j] = 0;
|
260 |
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}
|
261 |
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|
262 |
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/* Allocate save areas for any hard registers that might need saving.
|
263 |
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We take a conservative approach here and look for call-clobbered hard
|
264 |
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registers that are assigned to pseudos that cross calls. This may
|
265 |
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overestimate slightly (especially if some of these registers are later
|
266 |
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used as spill registers), but it should not be significant.
|
267 |
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|
268 |
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Future work:
|
269 |
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|
270 |
|
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In the fallback case we should iterate backwards across all possible
|
271 |
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modes for the save, choosing the largest available one instead of
|
272 |
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falling back to the smallest mode immediately. (eg TF -> DF -> SF).
|
273 |
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|
274 |
|
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We do not try to use "move multiple" instructions that exist
|
275 |
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on some machines (such as the 68k moveml). It could be a win to try
|
276 |
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and use them when possible. The hard part is doing it in a way that is
|
277 |
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machine independent since they might be saving non-consecutive
|
278 |
|
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registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
|
279 |
|
|
|
280 |
|
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void
|
281 |
|
|
setup_save_areas (void)
|
282 |
|
|
{
|
283 |
|
|
int i, j, k;
|
284 |
|
|
unsigned int r;
|
285 |
|
|
HARD_REG_SET hard_regs_used;
|
286 |
|
|
|
287 |
|
|
/* Allocate space in the save area for the largest multi-register
|
288 |
|
|
pseudos first, then work backwards to single register
|
289 |
|
|
pseudos. */
|
290 |
|
|
|
291 |
|
|
/* Find and record all call-used hard-registers in this function. */
|
292 |
|
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CLEAR_HARD_REG_SET (hard_regs_used);
|
293 |
|
|
for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
|
294 |
|
|
if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
|
295 |
|
|
{
|
296 |
|
|
unsigned int regno = reg_renumber[i];
|
297 |
|
|
unsigned int endregno
|
298 |
|
|
= regno + hard_regno_nregs[regno][GET_MODE (regno_reg_rtx[i])];
|
299 |
|
|
|
300 |
|
|
for (r = regno; r < endregno; r++)
|
301 |
|
|
if (call_used_regs[r])
|
302 |
|
|
SET_HARD_REG_BIT (hard_regs_used, r);
|
303 |
|
|
}
|
304 |
|
|
|
305 |
|
|
/* Now run through all the call-used hard-registers and allocate
|
306 |
|
|
space for them in the caller-save area. Try to allocate space
|
307 |
|
|
in a manner which allows multi-register saves/restores to be done. */
|
308 |
|
|
|
309 |
|
|
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
310 |
|
|
for (j = MOVE_MAX_WORDS; j > 0; j--)
|
311 |
|
|
{
|
312 |
|
|
int do_save = 1;
|
313 |
|
|
|
314 |
|
|
/* If no mode exists for this size, try another. Also break out
|
315 |
|
|
if we have already saved this hard register. */
|
316 |
|
|
if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
|
317 |
|
|
continue;
|
318 |
|
|
|
319 |
|
|
/* See if any register in this group has been saved. */
|
320 |
|
|
for (k = 0; k < j; k++)
|
321 |
|
|
if (regno_save_mem[i + k][1])
|
322 |
|
|
{
|
323 |
|
|
do_save = 0;
|
324 |
|
|
break;
|
325 |
|
|
}
|
326 |
|
|
if (! do_save)
|
327 |
|
|
continue;
|
328 |
|
|
|
329 |
|
|
for (k = 0; k < j; k++)
|
330 |
|
|
if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
|
331 |
|
|
{
|
332 |
|
|
do_save = 0;
|
333 |
|
|
break;
|
334 |
|
|
}
|
335 |
|
|
if (! do_save)
|
336 |
|
|
continue;
|
337 |
|
|
|
338 |
|
|
/* We have found an acceptable mode to store in. */
|
339 |
|
|
regno_save_mem[i][j]
|
340 |
|
|
= assign_stack_local (regno_save_mode[i][j],
|
341 |
|
|
GET_MODE_SIZE (regno_save_mode[i][j]), 0);
|
342 |
|
|
|
343 |
|
|
/* Setup single word save area just in case... */
|
344 |
|
|
for (k = 0; k < j; k++)
|
345 |
|
|
/* This should not depend on WORDS_BIG_ENDIAN.
|
346 |
|
|
The order of words in regs is the same as in memory. */
|
347 |
|
|
regno_save_mem[i + k][1]
|
348 |
|
|
= adjust_address_nv (regno_save_mem[i][j],
|
349 |
|
|
regno_save_mode[i + k][1],
|
350 |
|
|
k * UNITS_PER_WORD);
|
351 |
|
|
}
|
352 |
|
|
|
353 |
|
|
/* Now loop again and set the alias set of any save areas we made to
|
354 |
|
|
the alias set used to represent frame objects. */
|
355 |
|
|
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
356 |
|
|
for (j = MOVE_MAX_WORDS; j > 0; j--)
|
357 |
|
|
if (regno_save_mem[i][j] != 0)
|
358 |
|
|
set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
|
359 |
|
|
}
|
360 |
|
|
|
361 |
|
|
/* Find the places where hard regs are live across calls and save them. */
|
362 |
|
|
|
363 |
|
|
void
|
364 |
|
|
save_call_clobbered_regs (void)
|
365 |
|
|
{
|
366 |
|
|
struct insn_chain *chain, *next;
|
367 |
|
|
enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
|
368 |
|
|
|
369 |
|
|
/* Computed in mark_set_regs, holds all registers set by the current
|
370 |
|
|
instruction. */
|
371 |
|
|
HARD_REG_SET this_insn_sets;
|
372 |
|
|
|
373 |
|
|
CLEAR_HARD_REG_SET (hard_regs_saved);
|
374 |
|
|
n_regs_saved = 0;
|
375 |
|
|
|
376 |
|
|
for (chain = reload_insn_chain; chain != 0; chain = next)
|
377 |
|
|
{
|
378 |
|
|
rtx insn = chain->insn;
|
379 |
|
|
enum rtx_code code = GET_CODE (insn);
|
380 |
|
|
|
381 |
|
|
next = chain->next;
|
382 |
|
|
|
383 |
|
|
gcc_assert (!chain->is_caller_save_insn);
|
384 |
|
|
|
385 |
|
|
if (INSN_P (insn))
|
386 |
|
|
{
|
387 |
|
|
/* If some registers have been saved, see if INSN references
|
388 |
|
|
any of them. We must restore them before the insn if so. */
|
389 |
|
|
|
390 |
|
|
if (n_regs_saved)
|
391 |
|
|
{
|
392 |
|
|
int regno;
|
393 |
|
|
|
394 |
|
|
if (code == JUMP_INSN)
|
395 |
|
|
/* Restore all registers if this is a JUMP_INSN. */
|
396 |
|
|
COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
|
397 |
|
|
else
|
398 |
|
|
{
|
399 |
|
|
CLEAR_HARD_REG_SET (referenced_regs);
|
400 |
|
|
mark_referenced_regs (PATTERN (insn));
|
401 |
|
|
AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
|
402 |
|
|
}
|
403 |
|
|
|
404 |
|
|
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
|
405 |
|
|
if (TEST_HARD_REG_BIT (referenced_regs, regno))
|
406 |
|
|
regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode);
|
407 |
|
|
}
|
408 |
|
|
|
409 |
|
|
if (code == CALL_INSN && ! find_reg_note (insn, REG_NORETURN, NULL))
|
410 |
|
|
{
|
411 |
|
|
unsigned regno;
|
412 |
|
|
HARD_REG_SET hard_regs_to_save;
|
413 |
|
|
reg_set_iterator rsi;
|
414 |
|
|
|
415 |
|
|
/* Use the register life information in CHAIN to compute which
|
416 |
|
|
regs are live during the call. */
|
417 |
|
|
REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
|
418 |
|
|
&chain->live_throughout);
|
419 |
|
|
/* Save hard registers always in the widest mode available. */
|
420 |
|
|
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
|
421 |
|
|
if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
|
422 |
|
|
save_mode [regno] = regno_save_mode [regno][1];
|
423 |
|
|
else
|
424 |
|
|
save_mode [regno] = VOIDmode;
|
425 |
|
|
|
426 |
|
|
/* Look through all live pseudos, mark their hard registers
|
427 |
|
|
and choose proper mode for saving. */
|
428 |
|
|
EXECUTE_IF_SET_IN_REG_SET
|
429 |
|
|
(&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
|
430 |
|
|
{
|
431 |
|
|
int r = reg_renumber[regno];
|
432 |
|
|
int nregs;
|
433 |
|
|
enum machine_mode mode;
|
434 |
|
|
|
435 |
|
|
gcc_assert (r >= 0);
|
436 |
|
|
nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
|
437 |
|
|
mode = HARD_REGNO_CALLER_SAVE_MODE
|
438 |
|
|
(r, nregs, PSEUDO_REGNO_MODE (regno));
|
439 |
|
|
if (GET_MODE_BITSIZE (mode)
|
440 |
|
|
> GET_MODE_BITSIZE (save_mode[r]))
|
441 |
|
|
save_mode[r] = mode;
|
442 |
|
|
while (nregs-- > 0)
|
443 |
|
|
SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
|
444 |
|
|
}
|
445 |
|
|
|
446 |
|
|
/* Record all registers set in this call insn. These don't need
|
447 |
|
|
to be saved. N.B. the call insn might set a subreg of a
|
448 |
|
|
multi-hard-reg pseudo; then the pseudo is considered live
|
449 |
|
|
during the call, but the subreg that is set isn't. */
|
450 |
|
|
CLEAR_HARD_REG_SET (this_insn_sets);
|
451 |
|
|
note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
|
452 |
|
|
/* Sibcalls are considered to set the return value,
|
453 |
|
|
compare flow.c:propagate_one_insn. */
|
454 |
|
|
if (SIBLING_CALL_P (insn) && current_function_return_rtx)
|
455 |
|
|
mark_set_regs (current_function_return_rtx, NULL_RTX,
|
456 |
|
|
&this_insn_sets);
|
457 |
|
|
|
458 |
|
|
/* Compute which hard regs must be saved before this call. */
|
459 |
|
|
AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
|
460 |
|
|
AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
|
461 |
|
|
AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
|
462 |
|
|
AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
|
463 |
|
|
|
464 |
|
|
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
|
465 |
|
|
if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
|
466 |
|
|
regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
|
467 |
|
|
|
468 |
|
|
/* Must recompute n_regs_saved. */
|
469 |
|
|
n_regs_saved = 0;
|
470 |
|
|
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
|
471 |
|
|
if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
|
472 |
|
|
n_regs_saved++;
|
473 |
|
|
}
|
474 |
|
|
}
|
475 |
|
|
|
476 |
|
|
if (chain->next == 0 || chain->next->block > chain->block)
|
477 |
|
|
{
|
478 |
|
|
int regno;
|
479 |
|
|
/* At the end of the basic block, we must restore any registers that
|
480 |
|
|
remain saved. If the last insn in the block is a JUMP_INSN, put
|
481 |
|
|
the restore before the insn, otherwise, put it after the insn. */
|
482 |
|
|
|
483 |
|
|
if (n_regs_saved)
|
484 |
|
|
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
|
485 |
|
|
if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
|
486 |
|
|
regno += insert_restore (chain, JUMP_P (insn),
|
487 |
|
|
regno, MOVE_MAX_WORDS, save_mode);
|
488 |
|
|
}
|
489 |
|
|
}
|
490 |
|
|
}
|
491 |
|
|
|
492 |
|
|
/* Here from note_stores, or directly from save_call_clobbered_regs, when
|
493 |
|
|
an insn stores a value in a register.
|
494 |
|
|
Set the proper bit or bits in this_insn_sets. All pseudos that have
|
495 |
|
|
been assigned hard regs have had their register number changed already,
|
496 |
|
|
so we can ignore pseudos. */
|
497 |
|
|
static void
|
498 |
|
|
mark_set_regs (rtx reg, rtx setter ATTRIBUTE_UNUSED, void *data)
|
499 |
|
|
{
|
500 |
|
|
int regno, endregno, i;
|
501 |
|
|
enum machine_mode mode = GET_MODE (reg);
|
502 |
|
|
HARD_REG_SET *this_insn_sets = data;
|
503 |
|
|
|
504 |
|
|
if (GET_CODE (reg) == SUBREG)
|
505 |
|
|
{
|
506 |
|
|
rtx inner = SUBREG_REG (reg);
|
507 |
|
|
if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
|
508 |
|
|
return;
|
509 |
|
|
regno = subreg_regno (reg);
|
510 |
|
|
}
|
511 |
|
|
else if (REG_P (reg)
|
512 |
|
|
&& REGNO (reg) < FIRST_PSEUDO_REGISTER)
|
513 |
|
|
regno = REGNO (reg);
|
514 |
|
|
else
|
515 |
|
|
return;
|
516 |
|
|
|
517 |
|
|
endregno = regno + hard_regno_nregs[regno][mode];
|
518 |
|
|
|
519 |
|
|
for (i = regno; i < endregno; i++)
|
520 |
|
|
SET_HARD_REG_BIT (*this_insn_sets, i);
|
521 |
|
|
}
|
522 |
|
|
|
523 |
|
|
/* Here from note_stores when an insn stores a value in a register.
|
524 |
|
|
Set the proper bit or bits in the passed regset. All pseudos that have
|
525 |
|
|
been assigned hard regs have had their register number changed already,
|
526 |
|
|
so we can ignore pseudos. */
|
527 |
|
|
static void
|
528 |
|
|
add_stored_regs (rtx reg, rtx setter, void *data)
|
529 |
|
|
{
|
530 |
|
|
int regno, endregno, i;
|
531 |
|
|
enum machine_mode mode = GET_MODE (reg);
|
532 |
|
|
int offset = 0;
|
533 |
|
|
|
534 |
|
|
if (GET_CODE (setter) == CLOBBER)
|
535 |
|
|
return;
|
536 |
|
|
|
537 |
|
|
if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
|
538 |
|
|
{
|
539 |
|
|
offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
|
540 |
|
|
GET_MODE (SUBREG_REG (reg)),
|
541 |
|
|
SUBREG_BYTE (reg),
|
542 |
|
|
GET_MODE (reg));
|
543 |
|
|
reg = SUBREG_REG (reg);
|
544 |
|
|
}
|
545 |
|
|
|
546 |
|
|
if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
|
547 |
|
|
return;
|
548 |
|
|
|
549 |
|
|
regno = REGNO (reg) + offset;
|
550 |
|
|
endregno = regno + hard_regno_nregs[regno][mode];
|
551 |
|
|
|
552 |
|
|
for (i = regno; i < endregno; i++)
|
553 |
|
|
SET_REGNO_REG_SET ((regset) data, i);
|
554 |
|
|
}
|
555 |
|
|
|
556 |
|
|
/* Walk X and record all referenced registers in REFERENCED_REGS. */
|
557 |
|
|
static void
|
558 |
|
|
mark_referenced_regs (rtx x)
|
559 |
|
|
{
|
560 |
|
|
enum rtx_code code = GET_CODE (x);
|
561 |
|
|
const char *fmt;
|
562 |
|
|
int i, j;
|
563 |
|
|
|
564 |
|
|
if (code == SET)
|
565 |
|
|
mark_referenced_regs (SET_SRC (x));
|
566 |
|
|
if (code == SET || code == CLOBBER)
|
567 |
|
|
{
|
568 |
|
|
x = SET_DEST (x);
|
569 |
|
|
code = GET_CODE (x);
|
570 |
|
|
if ((code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
|
571 |
|
|
|| code == PC || code == CC0
|
572 |
|
|
|| (code == SUBREG && REG_P (SUBREG_REG (x))
|
573 |
|
|
&& REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
|
574 |
|
|
/* If we're setting only part of a multi-word register,
|
575 |
|
|
we shall mark it as referenced, because the words
|
576 |
|
|
that are not being set should be restored. */
|
577 |
|
|
&& ((GET_MODE_SIZE (GET_MODE (x))
|
578 |
|
|
>= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
|
579 |
|
|
|| (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
|
580 |
|
|
<= UNITS_PER_WORD))))
|
581 |
|
|
return;
|
582 |
|
|
}
|
583 |
|
|
if (code == MEM || code == SUBREG)
|
584 |
|
|
{
|
585 |
|
|
x = XEXP (x, 0);
|
586 |
|
|
code = GET_CODE (x);
|
587 |
|
|
}
|
588 |
|
|
|
589 |
|
|
if (code == REG)
|
590 |
|
|
{
|
591 |
|
|
int regno = REGNO (x);
|
592 |
|
|
int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
|
593 |
|
|
: reg_renumber[regno]);
|
594 |
|
|
|
595 |
|
|
if (hardregno >= 0)
|
596 |
|
|
{
|
597 |
|
|
int nregs = hard_regno_nregs[hardregno][GET_MODE (x)];
|
598 |
|
|
while (nregs-- > 0)
|
599 |
|
|
SET_HARD_REG_BIT (referenced_regs, hardregno + nregs);
|
600 |
|
|
}
|
601 |
|
|
/* If this is a pseudo that did not get a hard register, scan its
|
602 |
|
|
memory location, since it might involve the use of another
|
603 |
|
|
register, which might be saved. */
|
604 |
|
|
else if (reg_equiv_mem[regno] != 0)
|
605 |
|
|
mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
|
606 |
|
|
else if (reg_equiv_address[regno] != 0)
|
607 |
|
|
mark_referenced_regs (reg_equiv_address[regno]);
|
608 |
|
|
return;
|
609 |
|
|
}
|
610 |
|
|
|
611 |
|
|
fmt = GET_RTX_FORMAT (code);
|
612 |
|
|
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
|
613 |
|
|
{
|
614 |
|
|
if (fmt[i] == 'e')
|
615 |
|
|
mark_referenced_regs (XEXP (x, i));
|
616 |
|
|
else if (fmt[i] == 'E')
|
617 |
|
|
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
|
618 |
|
|
mark_referenced_regs (XVECEXP (x, i, j));
|
619 |
|
|
}
|
620 |
|
|
}
|
621 |
|
|
|
622 |
|
|
/* Insert a sequence of insns to restore. Place these insns in front of
|
623 |
|
|
CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
|
624 |
|
|
the maximum number of registers which should be restored during this call.
|
625 |
|
|
It should never be less than 1 since we only work with entire registers.
|
626 |
|
|
|
627 |
|
|
Note that we have verified in init_caller_save that we can do this
|
628 |
|
|
with a simple SET, so use it. Set INSN_CODE to what we save there
|
629 |
|
|
since the address might not be valid so the insn might not be recognized.
|
630 |
|
|
These insns will be reloaded and have register elimination done by
|
631 |
|
|
find_reload, so we need not worry about that here.
|
632 |
|
|
|
633 |
|
|
Return the extra number of registers saved. */
|
634 |
|
|
|
635 |
|
|
static int
|
636 |
|
|
insert_restore (struct insn_chain *chain, int before_p, int regno,
|
637 |
|
|
int maxrestore, enum machine_mode *save_mode)
|
638 |
|
|
{
|
639 |
|
|
int i, k;
|
640 |
|
|
rtx pat = NULL_RTX;
|
641 |
|
|
int code;
|
642 |
|
|
unsigned int numregs = 0;
|
643 |
|
|
struct insn_chain *new;
|
644 |
|
|
rtx mem;
|
645 |
|
|
|
646 |
|
|
/* A common failure mode if register status is not correct in the
|
647 |
|
|
RTL is for this routine to be called with a REGNO we didn't
|
648 |
|
|
expect to save. That will cause us to write an insn with a (nil)
|
649 |
|
|
SET_DEST or SET_SRC. Instead of doing so and causing a crash
|
650 |
|
|
later, check for this common case here instead. This will remove
|
651 |
|
|
one step in debugging such problems. */
|
652 |
|
|
gcc_assert (regno_save_mem[regno][1]);
|
653 |
|
|
|
654 |
|
|
/* Get the pattern to emit and update our status.
|
655 |
|
|
|
656 |
|
|
See if we can restore `maxrestore' registers at once. Work
|
657 |
|
|
backwards to the single register case. */
|
658 |
|
|
for (i = maxrestore; i > 0; i--)
|
659 |
|
|
{
|
660 |
|
|
int j;
|
661 |
|
|
int ok = 1;
|
662 |
|
|
|
663 |
|
|
if (regno_save_mem[regno][i] == 0)
|
664 |
|
|
continue;
|
665 |
|
|
|
666 |
|
|
for (j = 0; j < i; j++)
|
667 |
|
|
if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
|
668 |
|
|
{
|
669 |
|
|
ok = 0;
|
670 |
|
|
break;
|
671 |
|
|
}
|
672 |
|
|
/* Must do this one restore at a time. */
|
673 |
|
|
if (! ok)
|
674 |
|
|
continue;
|
675 |
|
|
|
676 |
|
|
numregs = i;
|
677 |
|
|
break;
|
678 |
|
|
}
|
679 |
|
|
|
680 |
|
|
mem = regno_save_mem [regno][numregs];
|
681 |
|
|
if (save_mode [regno] != VOIDmode
|
682 |
|
|
&& save_mode [regno] != GET_MODE (mem)
|
683 |
|
|
&& numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
|
684 |
|
|
mem = adjust_address (mem, save_mode[regno], 0);
|
685 |
|
|
else
|
686 |
|
|
mem = copy_rtx (mem);
|
687 |
|
|
pat = gen_rtx_SET (VOIDmode,
|
688 |
|
|
gen_rtx_REG (GET_MODE (mem),
|
689 |
|
|
regno), mem);
|
690 |
|
|
code = reg_restore_code[regno][GET_MODE (mem)];
|
691 |
|
|
new = insert_one_insn (chain, before_p, code, pat);
|
692 |
|
|
|
693 |
|
|
/* Clear status for all registers we restored. */
|
694 |
|
|
for (k = 0; k < i; k++)
|
695 |
|
|
{
|
696 |
|
|
CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
|
697 |
|
|
SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
|
698 |
|
|
n_regs_saved--;
|
699 |
|
|
}
|
700 |
|
|
|
701 |
|
|
/* Tell our callers how many extra registers we saved/restored. */
|
702 |
|
|
return numregs - 1;
|
703 |
|
|
}
|
704 |
|
|
|
705 |
|
|
/* Like insert_restore above, but save registers instead. */
|
706 |
|
|
|
707 |
|
|
static int
|
708 |
|
|
insert_save (struct insn_chain *chain, int before_p, int regno,
|
709 |
|
|
HARD_REG_SET (*to_save), enum machine_mode *save_mode)
|
710 |
|
|
{
|
711 |
|
|
int i;
|
712 |
|
|
unsigned int k;
|
713 |
|
|
rtx pat = NULL_RTX;
|
714 |
|
|
int code;
|
715 |
|
|
unsigned int numregs = 0;
|
716 |
|
|
struct insn_chain *new;
|
717 |
|
|
rtx mem;
|
718 |
|
|
|
719 |
|
|
/* A common failure mode if register status is not correct in the
|
720 |
|
|
RTL is for this routine to be called with a REGNO we didn't
|
721 |
|
|
expect to save. That will cause us to write an insn with a (nil)
|
722 |
|
|
SET_DEST or SET_SRC. Instead of doing so and causing a crash
|
723 |
|
|
later, check for this common case here. This will remove one
|
724 |
|
|
step in debugging such problems. */
|
725 |
|
|
gcc_assert (regno_save_mem[regno][1]);
|
726 |
|
|
|
727 |
|
|
/* Get the pattern to emit and update our status.
|
728 |
|
|
|
729 |
|
|
See if we can save several registers with a single instruction.
|
730 |
|
|
Work backwards to the single register case. */
|
731 |
|
|
for (i = MOVE_MAX_WORDS; i > 0; i--)
|
732 |
|
|
{
|
733 |
|
|
int j;
|
734 |
|
|
int ok = 1;
|
735 |
|
|
if (regno_save_mem[regno][i] == 0)
|
736 |
|
|
continue;
|
737 |
|
|
|
738 |
|
|
for (j = 0; j < i; j++)
|
739 |
|
|
if (! TEST_HARD_REG_BIT (*to_save, regno + j))
|
740 |
|
|
{
|
741 |
|
|
ok = 0;
|
742 |
|
|
break;
|
743 |
|
|
}
|
744 |
|
|
/* Must do this one save at a time. */
|
745 |
|
|
if (! ok)
|
746 |
|
|
continue;
|
747 |
|
|
|
748 |
|
|
numregs = i;
|
749 |
|
|
break;
|
750 |
|
|
}
|
751 |
|
|
|
752 |
|
|
mem = regno_save_mem [regno][numregs];
|
753 |
|
|
if (save_mode [regno] != VOIDmode
|
754 |
|
|
&& save_mode [regno] != GET_MODE (mem)
|
755 |
|
|
&& numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
|
756 |
|
|
mem = adjust_address (mem, save_mode[regno], 0);
|
757 |
|
|
else
|
758 |
|
|
mem = copy_rtx (mem);
|
759 |
|
|
pat = gen_rtx_SET (VOIDmode, mem,
|
760 |
|
|
gen_rtx_REG (GET_MODE (mem),
|
761 |
|
|
regno));
|
762 |
|
|
code = reg_save_code[regno][GET_MODE (mem)];
|
763 |
|
|
new = insert_one_insn (chain, before_p, code, pat);
|
764 |
|
|
|
765 |
|
|
/* Set hard_regs_saved and dead_or_set for all the registers we saved. */
|
766 |
|
|
for (k = 0; k < numregs; k++)
|
767 |
|
|
{
|
768 |
|
|
SET_HARD_REG_BIT (hard_regs_saved, regno + k);
|
769 |
|
|
SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
|
770 |
|
|
n_regs_saved++;
|
771 |
|
|
}
|
772 |
|
|
|
773 |
|
|
/* Tell our callers how many extra registers we saved/restored. */
|
774 |
|
|
return numregs - 1;
|
775 |
|
|
}
|
776 |
|
|
|
777 |
|
|
/* Emit a new caller-save insn and set the code. */
|
778 |
|
|
static struct insn_chain *
|
779 |
|
|
insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
|
780 |
|
|
{
|
781 |
|
|
rtx insn = chain->insn;
|
782 |
|
|
struct insn_chain *new;
|
783 |
|
|
|
784 |
|
|
#ifdef HAVE_cc0
|
785 |
|
|
/* If INSN references CC0, put our insns in front of the insn that sets
|
786 |
|
|
CC0. This is always safe, since the only way we could be passed an
|
787 |
|
|
insn that references CC0 is for a restore, and doing a restore earlier
|
788 |
|
|
isn't a problem. We do, however, assume here that CALL_INSNs don't
|
789 |
|
|
reference CC0. Guard against non-INSN's like CODE_LABEL. */
|
790 |
|
|
|
791 |
|
|
if ((NONJUMP_INSN_P (insn) || JUMP_P (insn))
|
792 |
|
|
&& before_p
|
793 |
|
|
&& reg_referenced_p (cc0_rtx, PATTERN (insn)))
|
794 |
|
|
chain = chain->prev, insn = chain->insn;
|
795 |
|
|
#endif
|
796 |
|
|
|
797 |
|
|
new = new_insn_chain ();
|
798 |
|
|
if (before_p)
|
799 |
|
|
{
|
800 |
|
|
rtx link;
|
801 |
|
|
|
802 |
|
|
new->prev = chain->prev;
|
803 |
|
|
if (new->prev != 0)
|
804 |
|
|
new->prev->next = new;
|
805 |
|
|
else
|
806 |
|
|
reload_insn_chain = new;
|
807 |
|
|
|
808 |
|
|
chain->prev = new;
|
809 |
|
|
new->next = chain;
|
810 |
|
|
new->insn = emit_insn_before (pat, insn);
|
811 |
|
|
/* ??? It would be nice if we could exclude the already / still saved
|
812 |
|
|
registers from the live sets. */
|
813 |
|
|
COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
|
814 |
|
|
/* Registers that die in CHAIN->INSN still live in the new insn. */
|
815 |
|
|
for (link = REG_NOTES (chain->insn); link; link = XEXP (link, 1))
|
816 |
|
|
{
|
817 |
|
|
if (REG_NOTE_KIND (link) == REG_DEAD)
|
818 |
|
|
{
|
819 |
|
|
rtx reg = XEXP (link, 0);
|
820 |
|
|
int regno, i;
|
821 |
|
|
|
822 |
|
|
gcc_assert (REG_P (reg));
|
823 |
|
|
regno = REGNO (reg);
|
824 |
|
|
if (regno >= FIRST_PSEUDO_REGISTER)
|
825 |
|
|
regno = reg_renumber[regno];
|
826 |
|
|
if (regno < 0)
|
827 |
|
|
continue;
|
828 |
|
|
for (i = hard_regno_nregs[regno][GET_MODE (reg)] - 1;
|
829 |
|
|
i >= 0; i--)
|
830 |
|
|
SET_REGNO_REG_SET (&new->live_throughout, regno + i);
|
831 |
|
|
}
|
832 |
|
|
}
|
833 |
|
|
CLEAR_REG_SET (&new->dead_or_set);
|
834 |
|
|
if (chain->insn == BB_HEAD (BASIC_BLOCK (chain->block)))
|
835 |
|
|
BB_HEAD (BASIC_BLOCK (chain->block)) = new->insn;
|
836 |
|
|
}
|
837 |
|
|
else
|
838 |
|
|
{
|
839 |
|
|
new->next = chain->next;
|
840 |
|
|
if (new->next != 0)
|
841 |
|
|
new->next->prev = new;
|
842 |
|
|
chain->next = new;
|
843 |
|
|
new->prev = chain;
|
844 |
|
|
new->insn = emit_insn_after (pat, insn);
|
845 |
|
|
/* ??? It would be nice if we could exclude the already / still saved
|
846 |
|
|
registers from the live sets, and observe REG_UNUSED notes. */
|
847 |
|
|
COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
|
848 |
|
|
/* Registers that are set in CHAIN->INSN live in the new insn.
|
849 |
|
|
(Unless there is a REG_UNUSED note for them, but we don't
|
850 |
|
|
look for them here.) */
|
851 |
|
|
note_stores (PATTERN (chain->insn), add_stored_regs,
|
852 |
|
|
&new->live_throughout);
|
853 |
|
|
CLEAR_REG_SET (&new->dead_or_set);
|
854 |
|
|
if (chain->insn == BB_END (BASIC_BLOCK (chain->block)))
|
855 |
|
|
BB_END (BASIC_BLOCK (chain->block)) = new->insn;
|
856 |
|
|
}
|
857 |
|
|
new->block = chain->block;
|
858 |
|
|
new->is_caller_save_insn = 1;
|
859 |
|
|
|
860 |
|
|
INSN_CODE (new->insn) = code;
|
861 |
|
|
return new;
|
862 |
|
|
}
|