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[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.2.2/] [gcc/] [config/] [bfin/] [predicates.md] - Blame information for rev 154

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;; Predicate definitions for the Blackfin.
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;; Copyright (C) 2005, 2006, 2007 Free Software Foundation, Inc.
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;; Contributed by Analog Devices.
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 3, or (at your option)
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;; any later version.
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;;
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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;; GNU General Public License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3.  If not see
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;; .
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;; Return nonzero iff OP is one of the integer constants 1 or 2.
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(define_predicate "pos_scale_operand"
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  (and (match_code "const_int")
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       (match_test "INTVAL (op) == 1 || INTVAL (op) == 2")))
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;; Return nonzero iff OP is one of the integer constants 2 or 4.
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(define_predicate "scale_by_operand"
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  (and (match_code "const_int")
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       (match_test "INTVAL (op) == 2 || INTVAL (op) == 4")))
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;; Return nonzero if OP is a constant that consists of two parts; lower
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;; bits all zero and upper bits all ones.  In this case, we can perform
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;; an AND operation with a sequence of two shifts.  Don't return nonzero
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;; if the constant would be cheap to load.
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(define_predicate "highbits_operand"
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  (and (match_code "const_int")
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       (match_test "log2constp (-INTVAL (op)) && !CONST_7BIT_IMM_P (INTVAL (op))")))
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;; Return nonzero if OP is suitable as a right-hand side operand for an
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;; andsi3 operation.
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(define_predicate "rhs_andsi3_operand"
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  (ior (match_operand 0 "register_operand")
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       (and (match_code "const_int")
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            (match_test "log2constp (~INTVAL (op)) || INTVAL (op) == 255 || INTVAL (op) == 65535"))))
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;; Return nonzero if OP is a register or a constant with exactly one bit
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;; set.
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(define_predicate "regorlog2_operand"
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  (ior (match_operand 0 "register_operand")
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       (and (match_code "const_int")
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            (match_test "log2constp (INTVAL (op))"))))
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;; Return nonzero if OP is a register or an integer constant.
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(define_predicate "reg_or_const_int_operand"
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  (ior (match_operand 0 "register_operand")
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       (match_code "const_int")))
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(define_predicate "const01_operand"
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  (and (match_code "const_int")
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       (match_test "op == const0_rtx || op == const1_rtx")))
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(define_predicate "vec_shift_operand"
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  (ior (and (match_code "const_int")
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            (match_test "INTVAL (op) >= -16 && INTVAL (op) < 15"))
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       (match_operand 0 "register_operand")))
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;; Like register_operand, but make sure that hard regs have a valid mode.
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(define_predicate "valid_reg_operand"
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  (match_operand 0 "register_operand")
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{
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  if (GET_CODE (op) == SUBREG)
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    op = SUBREG_REG (op);
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  if (REGNO (op) < FIRST_PSEUDO_REGISTER)
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    return HARD_REGNO_MODE_OK (REGNO (op), mode);
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  return 1;
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})
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;; Return nonzero if OP is a LC register.
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(define_predicate "lc_register_operand"
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  (and (match_code "reg")
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       (match_test "REGNO (op) == REG_LC0 || REGNO (op) == REG_LC1")))
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;; Return nonzero if OP is a LT register.
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(define_predicate "lt_register_operand"
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  (and (match_code "reg")
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       (match_test "REGNO (op) == REG_LT0 || REGNO (op) == REG_LT1")))
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;; Return nonzero if OP is a LB register.
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(define_predicate "lb_register_operand"
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  (and (match_code "reg")
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       (match_test "REGNO (op) == REG_LB0 || REGNO (op) == REG_LB1")))
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;; Return nonzero if OP is a register or a 7 bit signed constant.
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(define_predicate "reg_or_7bit_operand"
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  (ior (match_operand 0 "register_operand")
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       (and (match_code "const_int")
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            (match_test "CONST_7BIT_IMM_P (INTVAL (op))"))))
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;; Return nonzero if OP is a register other than DREG and PREG.
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(define_predicate "nondp_register_operand"
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  (match_operand 0 "register_operand")
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{
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  unsigned int regno;
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  if (GET_CODE (op) == SUBREG)
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    op = SUBREG_REG (op);
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  regno = REGNO (op);
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  return (regno >= FIRST_PSEUDO_REGISTER || !DP_REGNO_P (regno));
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})
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;; Return nonzero if OP is a register other than DREG and PREG, or MEM.
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(define_predicate "nondp_reg_or_memory_operand"
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  (ior (match_operand 0 "nondp_register_operand")
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       (match_operand 0 "memory_operand")))
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;; Return nonzero if OP is a register or, when negated, a 7 bit signed
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;; constant.
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(define_predicate "reg_or_neg7bit_operand"
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  (ior (match_operand 0 "register_operand")
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       (and (match_code "const_int")
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            (match_test "CONST_7BIT_IMM_P (-INTVAL (op))"))))
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;; Used for secondary reloads, this function returns 1 if OP is of the
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;; form (plus (fp) (const_int)).
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(define_predicate "fp_plus_const_operand"
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  (match_code "plus")
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{
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  rtx op1, op2;
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  op1 = XEXP (op, 0);
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  op2 = XEXP (op, 1);
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  return (REG_P (op1)
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          && (REGNO (op1) == FRAME_POINTER_REGNUM
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              || REGNO (op1) == STACK_POINTER_REGNUM)
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          && GET_CODE (op2) == CONST_INT);
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})
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;; Returns 1 if OP is a symbolic operand, i.e. a symbol_ref or a label_ref,
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;; possibly with an offset.
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(define_predicate "symbolic_operand"
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  (ior (match_code "symbol_ref,label_ref")
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       (and (match_code "const")
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            (match_test "GET_CODE (XEXP (op,0)) == PLUS
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                         && (GET_CODE (XEXP (XEXP (op, 0), 0)) == SYMBOL_REF
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                             || GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF)
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                         && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT"))))
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;; Returns 1 if OP is a plain constant or matched by symbolic_operand.
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(define_predicate "symbolic_or_const_operand"
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  (ior (match_code "const_int,const_double")
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       (match_operand 0 "symbolic_operand")))
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;; Returns 1 if OP is a SYMBOL_REF.
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(define_predicate "symbol_ref_operand"
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  (match_code "symbol_ref"))
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;; True for any non-virtual or eliminable register.  Used in places where
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;; instantiation of such a register may cause the pattern to not be recognized.
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(define_predicate "register_no_elim_operand"
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  (match_operand 0 "register_operand")
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{
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  if (GET_CODE (op) == SUBREG)
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    op = SUBREG_REG (op);
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  return !(op == arg_pointer_rtx
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           || op == frame_pointer_rtx
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           || (REGNO (op) >= FIRST_PSEUDO_REGISTER
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               && REGNO (op) <= LAST_VIRTUAL_REGISTER));
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})
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;; Test for an operator valid in a conditional branch
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(define_predicate "bfin_cbranch_operator"
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  (match_code "eq,ne"))

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