Subversion Repositories openrisc_2011-10-31

/* Definitions of target machine for GNU compiler.

   Vitesse IQ2000 processors

   Copyright (C) 2003, 2004, 2005, 2007 Free Software Foundation, Inc.

   This file is part of GCC.

   GCC is free software; you can redistribute it and/or modify it

   under the terms of the GNU General Public License as published

   by the Free Software Foundation; either version 3, or (at your

   option) any later version.

   GCC is distributed in the hope that it will be useful, but WITHOUT

   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY

   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public

   License for more details.

   You should have received a copy of the GNU General Public License

   along with GCC; see the file COPYING3.  If not see

   <http://www.gnu.org/licenses/>.  */

/* Driver configuration.  */

#undef  SWITCH_TAKES_ARG

#define SWITCH_TAKES_ARG(CHAR)                                          \

  (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')

/* The svr4.h LIB_SPEC with -leval and --*group tacked on */

#undef  LIB_SPEC

#define LIB_SPEC "%{!shared:%{!symbolic:--start-group -lc -leval -lgcc --end-group}}"

#undef STARTFILE_SPEC

#undef ENDFILE_SPEC

/* Run-time target specifications.  */

#define TARGET_CPU_CPP_BUILTINS()               \

  do                                            \

    {                                           \

      builtin_define ("__iq2000__");            \

      builtin_assert ("cpu=iq2000");            \

      builtin_assert ("machine=iq2000");        \

    }                                           \

  while (0)

/* Macros used in the machine description to test the flags.  */

#define TARGET_STATS            0

#define TARGET_DEBUG_MODE       0

#define TARGET_DEBUG_A_MODE     0

#define TARGET_DEBUG_B_MODE     0

#define TARGET_DEBUG_C_MODE     0

#define TARGET_DEBUG_D_MODE     0

#ifndef IQ2000_ISA_DEFAULT

#define IQ2000_ISA_DEFAULT 1

#endif

#define IQ2000_VERSION "[1.0]"

#ifndef MACHINE_TYPE

#define MACHINE_TYPE "IQ2000"

#endif

#ifndef TARGET_VERSION_INTERNAL

#define TARGET_VERSION_INTERNAL(STREAM)                                 \

  fprintf (STREAM, " %s %s", IQ2000_VERSION, MACHINE_TYPE)

#endif

#ifndef TARGET_VERSION

#define TARGET_VERSION TARGET_VERSION_INTERNAL (stderr)

#endif

#define OVERRIDE_OPTIONS override_options ()

#define CAN_DEBUG_WITHOUT_FP

/* Storage Layout.  */

#define BITS_BIG_ENDIAN                 0

#define BYTES_BIG_ENDIAN                1 

#define WORDS_BIG_ENDIAN                1

#define LIBGCC2_WORDS_BIG_ENDIAN        1

#define BITS_PER_WORD                   32

#define MAX_BITS_PER_WORD               64

#define UNITS_PER_WORD                  4

#define MIN_UNITS_PER_WORD              4

#define POINTER_SIZE                    32

/* Define this macro if it is advisable to hold scalars in registers

   in a wider mode than that declared by the program.  In such cases,

   the value is constrained to be within the bounds of the declared

   type, but kept valid in the wider mode.  The signedness of the

   extension may differ from that of the type.

   We promote any value smaller than SImode up to SImode.  */

#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)     \

  if (GET_MODE_CLASS (MODE) == MODE_INT         \

      && GET_MODE_SIZE (MODE) < 4)              \

    (MODE) = SImode;

#define PARM_BOUNDARY 32

#define STACK_BOUNDARY 64

#define FUNCTION_BOUNDARY 32

#define BIGGEST_ALIGNMENT 64

#undef  DATA_ALIGNMENT

#define DATA_ALIGNMENT(TYPE, ALIGN)                                     \

  ((((ALIGN) < BITS_PER_WORD)                                           \

    && (TREE_CODE (TYPE) == ARRAY_TYPE                                  \

        || TREE_CODE (TYPE) == UNION_TYPE                               \

        || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))

#define CONSTANT_ALIGNMENT(EXP, ALIGN)                                  \

  ((TREE_CODE (EXP) == STRING_CST  || TREE_CODE (EXP) == CONSTRUCTOR)   \

   && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))

#define EMPTY_FIELD_BOUNDARY 32

#define STRUCTURE_SIZE_BOUNDARY 8

#define STRICT_ALIGNMENT 1

#define PCC_BITFIELD_TYPE_MATTERS 1

#define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT

/* Layout of Source Language Data Types.  */

#define INT_TYPE_SIZE           32

#define SHORT_TYPE_SIZE         16

#define LONG_TYPE_SIZE          32

#define LONG_LONG_TYPE_SIZE     64

#define CHAR_TYPE_SIZE          BITS_PER_UNIT

#define FLOAT_TYPE_SIZE         32

#define DOUBLE_TYPE_SIZE        64

#define LONG_DOUBLE_TYPE_SIZE   64

#define DEFAULT_SIGNED_CHAR     1

/* Register Basics.  */

/* On the IQ2000, we have 32 integer registers.  */

#define FIRST_PSEUDO_REGISTER 33

#define FIXED_REGISTERS                                                 \

{                                                                       \

  1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,                     \

  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 1                        \

}

#define CALL_USED_REGISTERS                                             \

{                                                                       \

  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,                       \

  0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 1                      \

}

/* Order of allocation of registers.  */

#define REG_ALLOC_ORDER                                                 \

{  0,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11, 12, 13, 14, 15,        \

  16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31        \

}

/* How Values Fit in Registers.  */

#define HARD_REGNO_NREGS(REGNO, MODE)   \

  ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

#define HARD_REGNO_MODE_OK(REGNO, MODE)                         \

 ((REGNO_REG_CLASS (REGNO) == GR_REGS)                          \

  ? ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) <= 4      \

  : ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) == 4)

#define MODES_TIEABLE_P(MODE1, MODE2)                           \

  ((GET_MODE_CLASS (MODE1) == MODE_FLOAT ||                     \

    GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT)               \

   == (GET_MODE_CLASS (MODE2) == MODE_FLOAT ||                  \

       GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))

#define AVOID_CCMODE_COPIES

/* Register Classes.  */

enum reg_class

{

  NO_REGS,                      /* No registers in set.  */

  GR_REGS,                      /* Integer registers.  */

  ALL_REGS,                     /* All registers.  */

  LIM_REG_CLASSES               /* Max value + 1.  */

};

#define GENERAL_REGS GR_REGS

#define N_REG_CLASSES (int) LIM_REG_CLASSES

#define REG_CLASS_NAMES                                         \

{                                                               \

  "NO_REGS",                                                    \

  "GR_REGS",                                                    \

  "ALL_REGS"                                                    \

}

#define REG_CLASS_CONTENTS                                      \

{                                                               \

  { 0x00000000, 0x00000000 },   /* No registers,  */            \

  { 0xffffffff, 0x00000000 },   /* Integer registers.  */       \

  { 0xffffffff, 0x00000001 }    /* All registers.  */           \

}

#define REGNO_REG_CLASS(REGNO) \

((REGNO) <= GP_REG_LAST + 1 ? GR_REGS : NO_REGS)

#define BASE_REG_CLASS  (GR_REGS)

#define INDEX_REG_CLASS NO_REGS

#define REG_CLASS_FROM_LETTER(C) \

  ((C) == 'd' ? GR_REGS :        \

   (C) == 'b' ? ALL_REGS :       \

   (C) == 'y' ? GR_REGS :        \

   NO_REGS)

#define REGNO_OK_FOR_INDEX_P(regno)     0

#define PREFERRED_RELOAD_CLASS(X,CLASS)                         \

  ((CLASS) != ALL_REGS                                          \

   ? (CLASS)                                                    \

   : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT              \

       || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT)  \

      ? (GR_REGS)                                               \

      : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_INT             \

          || GET_MODE (X) == VOIDmode)                          \

         ? (GR_REGS)                                            \

         : (CLASS))))

#define SMALL_REGISTER_CLASSES 0

#define CLASS_MAX_NREGS(CLASS, MODE)    \

  ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

/* For IQ2000:

   `I'  is used for the range of constants an arithmetic insn can

        actually contain (16 bits signed integers).

   `J'  is used for the range which is just zero (i.e., $r0).

   `K'  is used for the range of constants a logical insn can actually

        contain (16 bit zero-extended integers).

   `L'  is used for the range of constants that be loaded with lui

        (i.e., the bottom 16 bits are zero).

   `M'  is used for the range of constants that take two words to load

        (i.e., not matched by `I', `K', and `L').

   `N'  is used for constants 0xffffnnnn or 0xnnnnffff

   `O'  is a 5 bit zero-extended integer.  */

#define CONST_OK_FOR_LETTER_P(VALUE, C)                                 \

  ((C) == 'I' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000) \

   : (C) == 'J' ? ((VALUE) == 0)                                 \

   : (C) == 'K' ? ((unsigned HOST_WIDE_INT) (VALUE) < 0x10000)          \

   : (C) == 'L' ? (((VALUE) & 0x0000ffff) == 0                           \

                   && (((VALUE) & ~2147483647) == 0                      \

                       || ((VALUE) & ~2147483647) == ~2147483647))      \

   : (C) == 'M' ? ((((VALUE) & ~0x0000ffff) != 0)                        \

                   && (((VALUE) & ~0x0000ffff) != ~0x0000ffff)          \

                   && (((VALUE) & 0x0000ffff) != 0                       \

                       || (((VALUE) & ~2147483647) != 0                  \

                           && ((VALUE) & ~2147483647) != ~2147483647))) \

   : (C) == 'N' ? ((((VALUE) & 0xffff) == 0xffff)                       \

                   || (((VALUE) & 0xffff0000) == 0xffff0000))           \

   : (C) == 'O' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x20) < 0x40)    \

   : 0)

#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)                          \

  ((C) == 'G'                                                           \

   && (VALUE) == CONST0_RTX (GET_MODE (VALUE)))

/* `R' is for memory references which take 1 word for the instruction.  */

#define EXTRA_CONSTRAINT(OP,CODE)                                       \

  (((CODE) == 'R')        ? simple_memory_operand (OP, GET_MODE (OP))   \

   : FALSE)

/* Basic Stack Layout.  */

#define STACK_GROWS_DOWNWARD

#define FRAME_GROWS_DOWNWARD 0

#define STARTING_FRAME_OFFSET                                           \

  (current_function_outgoing_args_size)

/* Use the default value zero.  */

/* #define STACK_POINTER_OFFSET 0 */

#define FIRST_PARM_OFFSET(FNDECL) 0

/* The return address for the current frame is in r31 if this is a leaf

   function.  Otherwise, it is on the stack.  It is at a variable offset

   from sp/fp/ap, so we define a fake hard register rap which is a

   pointer to the return address on the stack.  This always gets eliminated

   during reload to be either the frame pointer or the stack pointer plus

   an offset.  */

#define RETURN_ADDR_RTX(count, frame)                                   \

  (((count) == 0)                                                       \

   ? (leaf_function_p ()                                                \

      ? gen_rtx_REG (Pmode, GP_REG_FIRST + 31)                          \

      : gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode,                         \

                                         RETURN_ADDRESS_POINTER_REGNUM))) \

    : (rtx) 0)

/* Before the prologue, RA lives in r31.  */

#define INCOMING_RETURN_ADDR_RTX  gen_rtx_REG (VOIDmode, GP_REG_FIRST + 31)

/* Register That Address the Stack Frame.  */

#define STACK_POINTER_REGNUM            (GP_REG_FIRST + 29)

#define FRAME_POINTER_REGNUM            (GP_REG_FIRST + 1)

#define HARD_FRAME_POINTER_REGNUM       (GP_REG_FIRST + 27)

#define ARG_POINTER_REGNUM              GP_REG_FIRST

#define RETURN_ADDRESS_POINTER_REGNUM   RAP_REG_NUM

#define STATIC_CHAIN_REGNUM             (GP_REG_FIRST + 2)

/* Eliminating the Frame Pointer and the Arg Pointer.  */

#define FRAME_POINTER_REQUIRED 0

#define ELIMINABLE_REGS                                                 \

{{ ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM},                         \

 { ARG_POINTER_REGNUM,   HARD_FRAME_POINTER_REGNUM},                    \

 { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM},                \

 { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},           \

 { RETURN_ADDRESS_POINTER_REGNUM, GP_REG_FIRST + 31},                   \

 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},                         \

 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}

/* We can always eliminate to the frame pointer.  We can eliminate to the

   stack pointer unless a frame pointer is needed.  */

#define CAN_ELIMINATE(FROM, TO)                                         \

  (((FROM) == RETURN_ADDRESS_POINTER_REGNUM && (! leaf_function_p ()    \

   || (TO == GP_REG_FIRST + 31 && leaf_function_p)))                    \

  || ((FROM) != RETURN_ADDRESS_POINTER_REGNUM                           \

   && ((TO) == HARD_FRAME_POINTER_REGNUM                                \

   || ((TO) == STACK_POINTER_REGNUM && ! frame_pointer_needed))))

#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                     \

        (OFFSET) = iq2000_initial_elimination_offset ((FROM), (TO))

/* Passing Function Arguments on the Stack.  */

/* #define PUSH_ROUNDING(BYTES) 0 */

#define ACCUMULATE_OUTGOING_ARGS 1

#define REG_PARM_STACK_SPACE(FNDECL) 0

#define OUTGOING_REG_PARM_STACK_SPACE

#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0

/* Function Arguments in Registers.  */

#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \

  function_arg (& CUM, MODE, TYPE, NAMED)

#define MAX_ARGS_IN_REGISTERS 8

typedef struct iq2000_args

{

  int gp_reg_found;             /* Whether a gp register was found yet.  */

  unsigned int arg_number;      /* Argument number.  */

  unsigned int arg_words;       /* # total words the arguments take.  */

  unsigned int fp_arg_words;    /* # words for FP args (IQ2000_EABI only).  */

  int last_arg_fp;              /* Nonzero if last arg was FP (EABI only).  */

  int fp_code;                  /* Mode of FP arguments.  */

  unsigned int num_adjusts;     /* Number of adjustments made.  */

                                /* Adjustments made to args pass in regs.  */

  struct rtx_def * adjust[MAX_ARGS_IN_REGISTERS * 2];

} CUMULATIVE_ARGS;

/* Initialize a variable CUM of type CUMULATIVE_ARGS

   for a call to a function whose data type is FNTYPE.

   For a library call, FNTYPE is 0.  */

#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \

  init_cumulative_args (& CUM, FNTYPE, LIBNAME)                         \

#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)                    \

  function_arg_advance (& CUM, MODE, TYPE, NAMED)

#define FUNCTION_ARG_PADDING(MODE, TYPE)                                \

  (! BYTES_BIG_ENDIAN                                                   \

   ? upward                                                             \

   : (((MODE) == BLKmode                                                \

       ? ((TYPE) && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST         \

          && int_size_in_bytes (TYPE) < (PARM_BOUNDARY / BITS_PER_UNIT))\

       : (GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY                       \

          && (GET_MODE_CLASS (MODE) == MODE_INT)))                      \

      ? downward : upward))

#define FUNCTION_ARG_BOUNDARY(MODE, TYPE)                               \

  (((TYPE) != 0)                                                 \

        ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY)                          \

                ? PARM_BOUNDARY                                         \

                : TYPE_ALIGN(TYPE))                                     \

        : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY)                  \

                ? PARM_BOUNDARY                                         \

                : GET_MODE_ALIGNMENT(MODE)))

#define FUNCTION_ARG_REGNO_P(N)                                         \

  (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST))

/* How Scalar Function Values are Returned.  */

#define FUNCTION_VALUE(VALTYPE, FUNC)   iq2000_function_value (VALTYPE, FUNC)

#define LIBCALL_VALUE(MODE)                             \

  gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT      \

                 || GET_MODE_SIZE (MODE) >= 4)          \

                ? (MODE)                                \

                : SImode),                              \

               GP_RETURN)

/* On the IQ2000, R2 and R3 are the only register thus used.  */

#define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN)

/* How Large Values are Returned.  */

#define DEFAULT_PCC_STRUCT_RETURN 0

/* Function Entry and Exit.  */

#define EXIT_IGNORE_STACK 1

/* Generating Code for Profiling.  */

#define FUNCTION_PROFILER(FILE, LABELNO)                                \

{                                                                       \

  fprintf (FILE, "\t.set\tnoreorder\n");                                \

  fprintf (FILE, "\t.set\tnoat\n");                                     \

  fprintf (FILE, "\tmove\t%s,%s\t\t# save current return address\n",    \

           reg_names[GP_REG_FIRST + 1], reg_names[GP_REG_FIRST + 31]);  \

  fprintf (FILE, "\tjal\t_mcount\n");                                   \

  fprintf (FILE,                                                        \

           "\t%s\t%s,%s,%d\t\t# _mcount pops 2 words from  stack\n",    \

           "subu",                                                      \

           reg_names[STACK_POINTER_REGNUM],                             \

           reg_names[STACK_POINTER_REGNUM],                             \

           Pmode == DImode ? 16 : 8);                                   \

  fprintf (FILE, "\t.set\treorder\n");                                  \

  fprintf (FILE, "\t.set\tat\n");                                       \

}

/* Implementing the Varargs Macros.  */

#define EXPAND_BUILTIN_VA_START(valist, nextarg) \

  iq2000_va_start (valist, nextarg)

/* Trampolines for Nested Functions.  */

/* A C statement to output, on the stream FILE, assembler code for a

   block of data that contains the constant parts of a trampoline.

   This code should not include a label--the label is taken care of

   automatically.  */

#define TRAMPOLINE_TEMPLATE(STREAM)                                      \

{                                                                        \

  fprintf (STREAM, "\t.word\t0x03e00821\t\t# move   $1,$31\n");         \

  fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n");         \

  fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n");                   \

  if (Pmode == DImode)                                                  \

    {                                                                   \

      fprintf (STREAM, "\t.word\t0xdfe30014\t\t# ld     $3,20($31)\n"); \

      fprintf (STREAM, "\t.word\t0xdfe2001c\t\t# ld     $2,28($31)\n"); \

    }                                                                   \

  else                                                                  \

    {                                                                   \

      fprintf (STREAM, "\t.word\t0x8fe30014\t\t# lw     $3,20($31)\n"); \

      fprintf (STREAM, "\t.word\t0x8fe20018\t\t# lw     $2,24($31)\n"); \

    }                                                                   \

  fprintf (STREAM, "\t.word\t0x0060c821\t\t# move   $25,$3 (abicalls)\n"); \

  fprintf (STREAM, "\t.word\t0x00600008\t\t# jr     $3\n");             \

  fprintf (STREAM, "\t.word\t0x0020f821\t\t# move   $31,$1\n");         \

  fprintf (STREAM, "\t.word\t0x00000000\t\t# <function address>\n"); \

  fprintf (STREAM, "\t.word\t0x00000000\t\t# <static chain value>\n"); \

}

#define TRAMPOLINE_SIZE (40)

#define TRAMPOLINE_ALIGNMENT 32

#define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN)                            \

{                                                                           \

  rtx addr = ADDR;                                                          \

    emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 32)), FUNC); \

    emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 36)), CHAIN);\

}

/* Addressing Modes.  */

#define CONSTANT_ADDRESS_P(X)                                           \

  (   (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF          \

    || GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH                \

    || (GET_CODE (X) == CONST)))

#define MAX_REGS_PER_ADDRESS 1

#ifdef REG_OK_STRICT

#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)         \

  {                                                     \

    if (iq2000_legitimate_address_p (MODE, X, 1))       \

      goto ADDR;                                        \

  }

#else

#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)         \

  {                                                     \

    if (iq2000_legitimate_address_p (MODE, X, 0))        \

      goto ADDR;                                        \

  }

#endif

#define REG_OK_FOR_INDEX_P(X) 0

/* For the IQ2000, transform:

        memory(X + <large int>)

   into:

        Y = <large int> & ~0x7fff;

        Z = X + Y

        memory (Z + (<large int> & 0x7fff));

*/

#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)                             \

{                                                                       \

  rtx xinsn = (X);                                                      \

                                                                        \

  if (TARGET_DEBUG_B_MODE)                                              \

    {                                                                   \

      GO_PRINTF ("\n========== LEGITIMIZE_ADDRESS\n");                  \

      GO_DEBUG_RTX (xinsn);                                             \

    }                                                                   \

                                                                        \

  if (iq2000_check_split (X, MODE))             \

    {                                                                   \

      X = gen_rtx_LO_SUM (Pmode,                                        \

                          copy_to_mode_reg (Pmode,                      \

                                            gen_rtx_HIGH (Pmode, X)),   \

                          X);                                           \

      goto WIN;                                                         \

    }                                                                   \

                                                                        \

  if (GET_CODE (xinsn) == PLUS)                                         \

    {                                                                   \

      rtx xplus0 = XEXP (xinsn, 0);                                      \

      rtx xplus1 = XEXP (xinsn, 1);                                     \

      enum rtx_code code0 = GET_CODE (xplus0);                          \

      enum rtx_code code1 = GET_CODE (xplus1);                          \

                                                                        \

      if (code0 != REG && code1 == REG)                                 \

        {                                                               \

          xplus0 = XEXP (xinsn, 1);                                     \

          xplus1 = XEXP (xinsn, 0);                                      \

          code0 = GET_CODE (xplus0);                                    \

          code1 = GET_CODE (xplus1);                                    \

        }                                                               \

                                                                        \

      if (code0 == REG && REG_MODE_OK_FOR_BASE_P (xplus0, MODE)         \

          && code1 == CONST_INT && !SMALL_INT (xplus1))                 \

        {                                                               \

          rtx int_reg = gen_reg_rtx (Pmode);                            \

          rtx ptr_reg = gen_reg_rtx (Pmode);                            \

                                                                        \

          emit_move_insn (int_reg,                                      \

                          GEN_INT (INTVAL (xplus1) & ~ 0x7fff));        \

                                                                        \

          emit_insn (gen_rtx_SET (VOIDmode,                             \

                                  ptr_reg,                              \

                                  gen_rtx_PLUS (Pmode, xplus0, int_reg))); \

                                                                        \

          X = plus_constant (ptr_reg, INTVAL (xplus1) & 0x7fff);        \

          goto WIN;                                                     \

        }                                                               \

    }                                                                   \

                                                                        \

  if (TARGET_DEBUG_B_MODE)                                              \

    GO_PRINTF ("LEGITIMIZE_ADDRESS could not fix.\n");                  \

}

#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}

#define LEGITIMATE_CONSTANT_P(X) (1)

/* Describing Relative Costs of Operations.  */

#define REGISTER_MOVE_COST(MODE, FROM, TO)      2

#define MEMORY_MOVE_COST(MODE,CLASS,TO_P)       \

  (TO_P ? 2 : 16)

#define BRANCH_COST 2

#define SLOW_BYTE_ACCESS 1

#define NO_FUNCTION_CSE 1

#define ADJUST_COST(INSN,LINK,DEP_INSN,COST)                            \

  if (REG_NOTE_KIND (LINK) != 0)                                 \

    (COST) = 0; /* Anti or output dependence.  */

/* Dividing the output into sections.  */

#define TEXT_SECTION_ASM_OP     "\t.text"       /* Instructions.  */

#define DATA_SECTION_ASM_OP     "\t.data"       /* Large data.  */

/* The Overall Framework of an Assembler File.  */

#define ASM_COMMENT_START " #"

#define ASM_APP_ON "#APP\n"

#define ASM_APP_OFF "#NO_APP\n"

/* Output and Generation of Labels.  */

#undef ASM_GENERATE_INTERNAL_LABEL

#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM)                   \

  sprintf ((LABEL), "*%s%s%ld", (LOCAL_LABEL_PREFIX), (PREFIX), (long) (NUM))

#define GLOBAL_ASM_OP "\t.globl\t"

/* Output of Assembler Instructions.  */

#define REGISTER_NAMES                                                  \

{                                                                       \

 "%0",   "%1",   "%2",   "%3",   "%4",   "%5",   "%6",   "%7",          \

 "%8",   "%9",   "%10",  "%11",  "%12",  "%13",  "%14",  "%15",         \

 "%16",  "%17",  "%18",  "%19",  "%20",  "%21",  "%22",  "%23",         \

 "%24",  "%25",  "%26",  "%27",  "%28",  "%29",  "%30",  "%31",  "%rap" \

};

#define ADDITIONAL_REGISTER_NAMES                                       \

{                                                                       \

  { "%0",        0 + GP_REG_FIRST },                                     \

  { "%1",        1 + GP_REG_FIRST },                                    \

  { "%2",        2 + GP_REG_FIRST },                                    \

  { "%3",        3 + GP_REG_FIRST },                                    \

  { "%4",        4 + GP_REG_FIRST },                                    \

  { "%5",        5 + GP_REG_FIRST },                                    \

  { "%6",        6 + GP_REG_FIRST },                                    \

  { "%7",        7 + GP_REG_FIRST },                                    \