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[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.2.2/] [gcc/] [config/] [mn10300/] [mn10300.h] - Blame information for rev 294

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1 38 julius
/* Definitions of target machine for GNU compiler.
2
   Matsushita MN10300 series
3
   Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
4
   2007 Free Software Foundation, Inc.
5
   Contributed by Jeff Law (law@cygnus.com).
6
 
7
This file is part of GCC.
8
 
9
GCC is free software; you can redistribute it and/or modify
10
it under the terms of the GNU General Public License as published by
11
the Free Software Foundation; either version 3, or (at your option)
12
any later version.
13
 
14
GCC is distributed in the hope that it will be useful,
15
but WITHOUT ANY WARRANTY; without even the implied warranty of
16
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17
GNU General Public License for more details.
18
 
19
You should have received a copy of the GNU General Public License
20
along with GCC; see the file COPYING3.  If not see
21
<http://www.gnu.org/licenses/>.  */
22
 
23
 
24
#undef ASM_SPEC
25
#undef LIB_SPEC
26
#undef ENDFILE_SPEC
27
#undef LINK_SPEC
28
#define LINK_SPEC "%{mrelax:--relax}"
29
#undef STARTFILE_SPEC
30
#define STARTFILE_SPEC "%{!mno-crt0:%{!shared:%{pg:gcrt0%O%s}%{!pg:%{p:mcrt0%O%s}%{!p:crt0%O%s}}}}"
31
 
32
/* Names to predefine in the preprocessor for this target machine.  */
33
 
34
#define TARGET_CPU_CPP_BUILTINS()               \
35
  do                                            \
36
    {                                           \
37
      builtin_define ("__mn10300__");           \
38
      builtin_define ("__MN10300__");           \
39
      builtin_assert ("cpu=mn10300");           \
40
      builtin_assert ("machine=mn10300");       \
41
    }                                           \
42
  while (0)
43
 
44
#define CPP_SPEC "%{mam33:-D__AM33__} %{mam33-2:-D__AM33__=2 -D__AM33_2__}"
45
 
46
extern GTY(()) int mn10300_unspec_int_label_counter;
47
 
48
enum processor_type {
49
  PROCESSOR_MN10300,
50
  PROCESSOR_AM33,
51
  PROCESSOR_AM33_2
52
};
53
 
54
extern enum processor_type mn10300_processor;
55
 
56
#define TARGET_AM33     (mn10300_processor >= PROCESSOR_AM33)
57
#define TARGET_AM33_2   (mn10300_processor == PROCESSOR_AM33_2)
58
 
59
#ifndef PROCESSOR_DEFAULT
60
#define PROCESSOR_DEFAULT PROCESSOR_MN10300
61
#endif
62
 
63
#define OVERRIDE_OPTIONS mn10300_override_options ()
64
 
65
/* Print subsidiary information on the compiler version in use.  */
66
 
67
#define TARGET_VERSION fprintf (stderr, " (MN10300)");
68
 
69
 
70
/* Target machine storage layout */
71
 
72
/* Define this if most significant bit is lowest numbered
73
   in instructions that operate on numbered bit-fields.
74
   This is not true on the Matsushita MN1003.  */
75
#define BITS_BIG_ENDIAN 0
76
 
77
/* Define this if most significant byte of a word is the lowest numbered.  */
78
/* This is not true on the Matsushita MN10300.  */
79
#define BYTES_BIG_ENDIAN 0
80
 
81
/* Define this if most significant word of a multiword number is lowest
82
   numbered.
83
   This is not true on the Matsushita MN10300.  */
84
#define WORDS_BIG_ENDIAN 0
85
 
86
/* Width of a word, in units (bytes).  */
87
#define UNITS_PER_WORD          4
88
 
89
/* Allocation boundary (in *bits*) for storing arguments in argument list.  */
90
#define PARM_BOUNDARY           32
91
 
92
/* The stack goes in 32 bit lumps.  */
93
#define STACK_BOUNDARY          32
94
 
95
/* Allocation boundary (in *bits*) for the code of a function.
96
   8 is the minimum boundary; it's unclear if bigger alignments
97
   would improve performance.  */
98
#define FUNCTION_BOUNDARY 8
99
 
100
/* No data type wants to be aligned rounder than this.  */
101
#define BIGGEST_ALIGNMENT       32
102
 
103
/* Alignment of field after `int : 0' in a structure.  */
104
#define EMPTY_FIELD_BOUNDARY 32
105
 
106
/* Define this if move instructions will actually fail to work
107
   when given unaligned data.  */
108
#define STRICT_ALIGNMENT 1
109
 
110
/* Define this as 1 if `char' should by default be signed; else as 0.  */
111
#define DEFAULT_SIGNED_CHAR 0
112
 
113
/* Standard register usage.  */
114
 
115
/* Number of actual hardware registers.
116
   The hardware registers are assigned numbers for the compiler
117
   from 0 to just below FIRST_PSEUDO_REGISTER.
118
 
119
   All registers that the compiler knows about must be given numbers,
120
   even those that are not normally considered general registers.  */
121
 
122
#define FIRST_PSEUDO_REGISTER 50
123
 
124
/* Specify machine-specific register numbers.  */
125
#define FIRST_DATA_REGNUM 0
126
#define LAST_DATA_REGNUM 3
127
#define FIRST_ADDRESS_REGNUM 4
128
#define LAST_ADDRESS_REGNUM 8
129
#define FIRST_EXTENDED_REGNUM 10
130
#define LAST_EXTENDED_REGNUM 17
131
#define FIRST_FP_REGNUM 18
132
#define LAST_FP_REGNUM 49
133
 
134
/* Specify the registers used for certain standard purposes.
135
   The values of these macros are register numbers.  */
136
 
137
/* Register to use for pushing function arguments.  */
138
#define STACK_POINTER_REGNUM (LAST_ADDRESS_REGNUM+1)
139
 
140
/* Base register for access to local variables of the function.  */
141
#define FRAME_POINTER_REGNUM (LAST_ADDRESS_REGNUM-1)
142
 
143
/* Base register for access to arguments of the function.  This
144
   is a fake register and will be eliminated into either the frame
145
   pointer or stack pointer.  */
146
#define ARG_POINTER_REGNUM LAST_ADDRESS_REGNUM
147
 
148
/* Register in which static-chain is passed to a function.  */
149
#define STATIC_CHAIN_REGNUM (FIRST_ADDRESS_REGNUM+1)
150
 
151
/* 1 for registers that have pervasive standard uses
152
   and are not available for the register allocator.  */
153
 
154
#define FIXED_REGISTERS \
155
  { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 \
156
  , 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
157
  , 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
158
  }
159
 
160
/* 1 for registers not available across function calls.
161
   These must include the FIXED_REGISTERS and also any
162
   registers that can be used without being saved.
163
   The latter must include the registers where values are returned
164
   and the register where structure-value addresses are passed.
165
   Aside from that, you can include as many other registers as you
166
   like.  */
167
 
168
#define CALL_USED_REGISTERS \
169
  { 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 \
170
  , 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
171
  , 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 \
172
  }
173
 
174
#define REG_ALLOC_ORDER \
175
  { 0, 1, 4, 5, 2, 3, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 8, 9 \
176
  , 42, 43, 44, 45, 46, 47, 48, 49, 34, 35, 36, 37, 38, 39, 40, 41 \
177
  , 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33 \
178
  }
179
 
180
#define CONDITIONAL_REGISTER_USAGE \
181
{                                               \
182
  unsigned int i;                               \
183
                                                \
184
  if (!TARGET_AM33)                             \
185
    {                                           \
186
      for (i = FIRST_EXTENDED_REGNUM;           \
187
           i <= LAST_EXTENDED_REGNUM; i++)      \
188
        fixed_regs[i] = call_used_regs[i] = 1;  \
189
    }                                           \
190
  if (!TARGET_AM33_2)                           \
191
    {                                           \
192
      for (i = FIRST_FP_REGNUM;                 \
193
           i <= LAST_FP_REGNUM;                 \
194
           i++)                                 \
195
        fixed_regs[i] = call_used_regs[i] = 1;  \
196
    }                                           \
197
  if (flag_pic)                                 \
198
    fixed_regs[PIC_OFFSET_TABLE_REGNUM] =       \
199
    call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;\
200
}
201
 
202
/* Return number of consecutive hard regs needed starting at reg REGNO
203
   to hold something of mode MODE.
204
 
205
   This is ordinarily the length in words of a value of mode MODE
206
   but can be less for certain modes in special long registers.  */
207
 
208
#define HARD_REGNO_NREGS(REGNO, MODE)   \
209
  ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
210
 
211
/* Value is 1 if hard register REGNO can hold a value of machine-mode
212
   MODE.  */
213
 
214
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
215
 ((REGNO_REG_CLASS (REGNO) == DATA_REGS \
216
   || (TARGET_AM33 && REGNO_REG_CLASS (REGNO) == ADDRESS_REGS) \
217
   || REGNO_REG_CLASS (REGNO) == EXTENDED_REGS) \
218
  ? ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) <= 4      \
219
  : ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) == 4)
220
 
221
/* Value is 1 if it is a good idea to tie two pseudo registers
222
   when one has mode MODE1 and one has mode MODE2.
223
   If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
224
   for any hard reg, then this must be 0 for correct output.  */
225
#define MODES_TIEABLE_P(MODE1, MODE2) \
226
  (TARGET_AM33  \
227
   || MODE1 == MODE2 \
228
   || (GET_MODE_SIZE (MODE1) <= 4 && GET_MODE_SIZE (MODE2) <= 4))
229
 
230
/* 4 data, and effectively 3 address registers is small as far as I'm
231
   concerned.  */
232
#define SMALL_REGISTER_CLASSES 1
233
 
234
/* Define the classes of registers for register constraints in the
235
   machine description.  Also define ranges of constants.
236
 
237
   One of the classes must always be named ALL_REGS and include all hard regs.
238
   If there is more than one class, another class must be named NO_REGS
239
   and contain no registers.
240
 
241
   The name GENERAL_REGS must be the name of a class (or an alias for
242
   another name such as ALL_REGS).  This is the class of registers
243
   that is allowed by "g" or "r" in a register constraint.
244
   Also, registers outside this class are allocated only when
245
   instructions express preferences for them.
246
 
247
   The classes must be numbered in nondecreasing order; that is,
248
   a larger-numbered class must never be contained completely
249
   in a smaller-numbered class.
250
 
251
   For any two classes, it is very desirable that there be another
252
   class that represents their union.  */
253
 
254
enum reg_class {
255
  NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
256
  DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
257
  EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS,
258
  SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS,
259
  FP_REGS, FP_ACC_REGS,
260
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES
261
};
262
 
263
#define N_REG_CLASSES (int) LIM_REG_CLASSES
264
 
265
/* Give names of register classes as strings for dump file.  */
266
 
267
#define REG_CLASS_NAMES \
268
{ "NO_REGS", "DATA_REGS", "ADDRESS_REGS", \
269
  "SP_REGS", "DATA_OR_ADDRESS_REGS", "SP_OR_ADDRESS_REGS", \
270
  "EXTENDED_REGS", \
271
  "DATA_OR_EXTENDED_REGS", "ADDRESS_OR_EXTENDED_REGS", \
272
  "SP_OR_EXTENDED_REGS", "SP_OR_ADDRESS_OR_EXTENDED_REGS", \
273
  "FP_REGS", "FP_ACC_REGS", \
274
  "GENERAL_REGS", "ALL_REGS", "LIM_REGS" }
275
 
276
/* Define which registers fit in which classes.
277
   This is an initializer for a vector of HARD_REG_SET
278
   of length N_REG_CLASSES.  */
279
 
280
#define REG_CLASS_CONTENTS                      \
281
{  { 0,  0 },             /* No regs      */      \
282
 { 0x0000f, 0 }, /* DATA_REGS */         \
283
 { 0x001f0, 0 }, /* ADDRESS_REGS */      \
284
 { 0x00200, 0 }, /* SP_REGS */           \
285
 { 0x001ff, 0 }, /* DATA_OR_ADDRESS_REGS */\
286
 { 0x003f0, 0 }, /* SP_OR_ADDRESS_REGS */\
287
 { 0x3fc00, 0 }, /* EXTENDED_REGS */     \
288
 { 0x3fc0f, 0 }, /* DATA_OR_EXTENDED_REGS */     \
289
 { 0x3fdf0, 0 }, /* ADDRESS_OR_EXTENDED_REGS */  \
290
 { 0x3fe00, 0 }, /* SP_OR_EXTENDED_REGS */       \
291
 { 0x3fff0, 0 }, /* SP_OR_ADDRESS_OR_EXTENDED_REGS */    \
292
 { 0xfffc0000, 0x3ffff }, /* FP_REGS */         \
293
 { 0x03fc0000, 0 },      /* FP_ACC_REGS */       \
294
 { 0x3fdff, 0 },         /* GENERAL_REGS */      \
295
 { 0xffffffff, 0x3ffff } /* ALL_REGS    */      \
296
}
297
 
298
/* The same information, inverted:
299
   Return the class number of the smallest class containing
300
   reg number REGNO.  This could be a conditional expression
301
   or could index an array.  */
302
 
303
#define REGNO_REG_CLASS(REGNO) \
304
  ((REGNO) <= LAST_DATA_REGNUM ? DATA_REGS : \
305
   (REGNO) <= LAST_ADDRESS_REGNUM ? ADDRESS_REGS : \
306
   (REGNO) == STACK_POINTER_REGNUM ? SP_REGS : \
307
   (REGNO) <= LAST_EXTENDED_REGNUM ? EXTENDED_REGS : \
308
   (REGNO) <= LAST_FP_REGNUM ? FP_REGS : \
309
   NO_REGS)
310
 
311
/* The class value for index registers, and the one for base regs.  */
312
#define INDEX_REG_CLASS DATA_OR_EXTENDED_REGS
313
#define BASE_REG_CLASS  SP_OR_ADDRESS_REGS
314
 
315
/* Get reg_class from a letter such as appears in the machine description.  */
316
 
317
#define REG_CLASS_FROM_LETTER(C) \
318
  ((C) == 'd' ? DATA_REGS : \
319
   (C) == 'a' ? ADDRESS_REGS : \
320
   (C) == 'y' ? SP_REGS : \
321
   ! TARGET_AM33 ? NO_REGS : \
322
   (C) == 'x' ? EXTENDED_REGS : \
323
   ! TARGET_AM33_2 ? NO_REGS : \
324
   (C) == 'f' ? FP_REGS : \
325
   (C) == 'A' ? FP_ACC_REGS : \
326
   NO_REGS)
327
 
328
/* Macros to check register numbers against specific register classes.  */
329
 
330
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
331
   and check its validity for a certain class.
332
   We have two alternate definitions for each of them.
333
   The usual definition accepts all pseudo regs; the other rejects
334
   them unless they have been allocated suitable hard regs.
335
   The symbol REG_OK_STRICT causes the latter definition to be used.
336
 
337
   Most source files want to accept pseudo regs in the hope that
338
   they will get allocated to the class that the insn wants them to be in.
339
   Source files for reload pass need to be strict.
340
   After reload, it makes no difference, since pseudo regs have
341
   been eliminated by then.  */
342
 
343
/* These assume that REGNO is a hard or pseudo reg number.
344
   They give nonzero only if REGNO is a hard reg of the suitable class
345
   or a pseudo reg currently allocated to a suitable hard reg.
346
   Since they use reg_renumber, they are safe only once reg_renumber
347
   has been allocated, which happens in local-alloc.c.  */
348
 
349
#ifndef REG_OK_STRICT
350
# define REG_STRICT 0
351
#else
352
# define REG_STRICT 1
353
#endif
354
 
355
# define REGNO_IN_RANGE_P(regno,min,max,strict) \
356
  (IN_RANGE ((regno), (min), (max))             \
357
   || ((strict)                                 \
358
       ? (reg_renumber                          \
359
          && reg_renumber[(regno)] >= (min)     \
360
          && reg_renumber[(regno)] <= (max))    \
361
       : (regno) >= FIRST_PSEUDO_REGISTER))
362
 
363
#define REGNO_DATA_P(regno, strict) \
364
  (REGNO_IN_RANGE_P ((regno), FIRST_DATA_REGNUM, LAST_DATA_REGNUM, \
365
                     (strict)))
366
#define REGNO_ADDRESS_P(regno, strict) \
367
  (REGNO_IN_RANGE_P ((regno), FIRST_ADDRESS_REGNUM, LAST_ADDRESS_REGNUM, \
368
                     (strict)))
369
#define REGNO_SP_P(regno, strict) \
370
  (REGNO_IN_RANGE_P ((regno), STACK_POINTER_REGNUM, STACK_POINTER_REGNUM, \
371
                     (strict)))
372
#define REGNO_EXTENDED_P(regno, strict) \
373
  (REGNO_IN_RANGE_P ((regno), FIRST_EXTENDED_REGNUM, LAST_EXTENDED_REGNUM, \
374
                     (strict)))
375
#define REGNO_AM33_P(regno, strict) \
376
  (REGNO_DATA_P ((regno), (strict)) || REGNO_ADDRESS_P ((regno), (strict)) \
377
   || REGNO_EXTENDED_P ((regno), (strict)))
378
#define REGNO_FP_P(regno, strict) \
379
  (REGNO_IN_RANGE_P ((regno), FIRST_FP_REGNUM, LAST_FP_REGNUM, (strict)))
380
 
381
#define REGNO_STRICT_OK_FOR_BASE_P(regno, strict) \
382
  (REGNO_SP_P ((regno), (strict)) \
383
   || REGNO_ADDRESS_P ((regno), (strict)) \
384
   || REGNO_EXTENDED_P ((regno), (strict)))
385
#define REGNO_OK_FOR_BASE_P(regno) \
386
  (REGNO_STRICT_OK_FOR_BASE_P ((regno), REG_STRICT))
387
#define REG_OK_FOR_BASE_P(X) \
388
  (REGNO_OK_FOR_BASE_P (REGNO (X)))
389
 
390
#define REGNO_STRICT_OK_FOR_BIT_BASE_P(regno, strict) \
391
  (REGNO_SP_P ((regno), (strict)) || REGNO_ADDRESS_P ((regno), (strict)))
392
#define REGNO_OK_FOR_BIT_BASE_P(regno) \
393
  (REGNO_STRICT_OK_FOR_BIT_BASE_P ((regno), REG_STRICT))
394
#define REG_OK_FOR_BIT_BASE_P(X) \
395
  (REGNO_OK_FOR_BIT_BASE_P (REGNO (X)))
396
 
397
#define REGNO_STRICT_OK_FOR_INDEX_P(regno, strict) \
398
  (REGNO_DATA_P ((regno), (strict)) || REGNO_EXTENDED_P ((regno), (strict)))
399
#define REGNO_OK_FOR_INDEX_P(regno) \
400
  (REGNO_STRICT_OK_FOR_INDEX_P ((regno), REG_STRICT))
401
#define REG_OK_FOR_INDEX_P(X) \
402
  (REGNO_OK_FOR_INDEX_P (REGNO (X)))
403
 
404
/* Given an rtx X being reloaded into a reg required to be
405
   in class CLASS, return the class of reg to actually use.
406
   In general this is just CLASS; but on some machines
407
   in some cases it is preferable to use a more restrictive class.  */
408
 
409
#define PREFERRED_RELOAD_CLASS(X,CLASS)                         \
410
  ((X) == stack_pointer_rtx && (CLASS) != SP_REGS               \
411
   ? ADDRESS_OR_EXTENDED_REGS                                   \
412
   : (GET_CODE (X) == MEM                                       \
413
      || (GET_CODE (X) == REG                                   \
414
          && REGNO (X) >= FIRST_PSEUDO_REGISTER)                \
415
      || (GET_CODE (X) == SUBREG                                \
416
          && GET_CODE (SUBREG_REG (X)) == REG                   \
417
          && REGNO (SUBREG_REG (X)) >= FIRST_PSEUDO_REGISTER)   \
418
      ? LIMIT_RELOAD_CLASS (GET_MODE (X), CLASS)                \
419
      : (CLASS)))
420
 
421
#define PREFERRED_OUTPUT_RELOAD_CLASS(X,CLASS) \
422
  (X == stack_pointer_rtx && CLASS != SP_REGS \
423
   ? ADDRESS_OR_EXTENDED_REGS : CLASS)
424
 
425
#define LIMIT_RELOAD_CLASS(MODE, CLASS) \
426
  (!TARGET_AM33 && (MODE == QImode || MODE == HImode) ? DATA_REGS : CLASS)
427
 
428
#define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
429
  mn10300_secondary_reload_class(CLASS,MODE,IN)
430
 
431
/* Return the maximum number of consecutive registers
432
   needed to represent mode MODE in a register of class CLASS.  */
433
 
434
#define CLASS_MAX_NREGS(CLASS, MODE)    \
435
  ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
436
 
437
/* A class that contains registers which the compiler must always
438
   access in a mode that is the same size as the mode in which it
439
   loaded the register.  */
440
#define CLASS_CANNOT_CHANGE_SIZE FP_REGS
441
 
442
/* The letters I, J, K, L, M, N, O, P in a register constraint string
443
   can be used to stand for particular ranges of immediate operands.
444
   This macro defines what the ranges are.
445
   C is the letter, and VALUE is a constant value.
446
   Return 1 if VALUE is in the range specified by C.  */
447
 
448
#define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100)
449
#define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000)
450
 
451
#define CONST_OK_FOR_I(VALUE) ((VALUE) == 0)
452
#define CONST_OK_FOR_J(VALUE) ((VALUE) == 1)
453
#define CONST_OK_FOR_K(VALUE) ((VALUE) == 2)
454
#define CONST_OK_FOR_L(VALUE) ((VALUE) == 4)
455
#define CONST_OK_FOR_M(VALUE) ((VALUE) == 3)
456
#define CONST_OK_FOR_N(VALUE) ((VALUE) == 255 || (VALUE) == 65535)
457
 
458
#define CONST_OK_FOR_LETTER_P(VALUE, C) \
459
  ((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
460
   (C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
461
   (C) == 'K' ? CONST_OK_FOR_K (VALUE) : \
462
   (C) == 'L' ? CONST_OK_FOR_L (VALUE) : \
463
   (C) == 'M' ? CONST_OK_FOR_M (VALUE) : \
464
   (C) == 'N' ? CONST_OK_FOR_N (VALUE) : 0)
465
 
466
 
467
/* Similar, but for floating constants, and defining letters G and H.
468
   Here VALUE is the CONST_DOUBLE rtx itself.
469
 
470
  `G' is a floating-point zero.  */
471
 
472
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
473
  ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT        \
474
                 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) : 0)
475
 
476
 
477
/* Stack layout; function entry, exit and calling.  */
478
 
479
/* Define this if pushing a word on the stack
480
   makes the stack pointer a smaller address.  */
481
 
482
#define STACK_GROWS_DOWNWARD
483
 
484
/* Define this to nonzero if the nominal address of the stack frame
485
   is at the high-address end of the local variables;
486
   that is, each additional local variable allocated
487
   goes at a more negative offset in the frame.  */
488
 
489
#define FRAME_GROWS_DOWNWARD 1
490
 
491
/* Offset within stack frame to start allocating local variables at.
492
   If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
493
   first local allocated.  Otherwise, it is the offset to the BEGINNING
494
   of the first local allocated.  */
495
 
496
#define STARTING_FRAME_OFFSET 0
497
 
498
/* Offset of first parameter from the argument pointer register value.  */
499
/* Is equal to the size of the saved fp + pc, even if an fp isn't
500
   saved since the value is used before we know.  */
501
 
502
#define FIRST_PARM_OFFSET(FNDECL) 4
503
 
504
#define ELIMINABLE_REGS                         \
505
{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},   \
506
 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},   \
507
 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
508
 
509
#define CAN_ELIMINATE(FROM, TO) 1
510
 
511
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
512
  OFFSET = initial_offset (FROM, TO)
513
 
514
/* We can debug without frame pointers on the mn10300, so eliminate
515
   them whenever possible.  */
516
#define FRAME_POINTER_REQUIRED 0
517
#define CAN_DEBUG_WITHOUT_FP
518
 
519
/* Value is the number of bytes of arguments automatically
520
   popped when returning from a subroutine call.
521
   FUNDECL is the declaration node of the function (as a tree),
522
   FUNTYPE is the data type of the function (as a tree),
523
   or for a library call it is an identifier node for the subroutine name.
524
   SIZE is the number of bytes of arguments passed on the stack.  */
525
 
526
#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
527
 
528
/* We use d0/d1 for passing parameters, so allocate 8 bytes of space
529
   for a register flushback area.  */
530
#define REG_PARM_STACK_SPACE(DECL) 8
531
#define OUTGOING_REG_PARM_STACK_SPACE
532
#define ACCUMULATE_OUTGOING_ARGS 1
533
 
534
/* So we can allocate space for return pointers once for the function
535
   instead of around every call.  */
536
#define STACK_POINTER_OFFSET 4
537
 
538
/* 1 if N is a possible register number for function argument passing.
539
   On the MN10300, no registers are used in this way.  */
540
 
541
#define FUNCTION_ARG_REGNO_P(N) ((N) <= 1)
542
 
543
 
544
/* Define a data type for recording info about an argument list
545
   during the scan of that argument list.  This data type should
546
   hold all necessary information about the function itself
547
   and about the args processed so far, enough to enable macros
548
   such as FUNCTION_ARG to determine where the next arg should go.
549
 
550
   On the MN10300, this is a single integer, which is a number of bytes
551
   of arguments scanned so far.  */
552
 
553
#define CUMULATIVE_ARGS struct cum_arg
554
struct cum_arg {int nbytes; };
555
 
556
/* Initialize a variable CUM of type CUMULATIVE_ARGS
557
   for a call to a function whose data type is FNTYPE.
558
   For a library call, FNTYPE is 0.
559
 
560
   On the MN10300, the offset starts at 0.  */
561
 
562
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
563
 ((CUM).nbytes = 0)
564
 
565
/* Update the data in CUM to advance over an argument
566
   of mode MODE and data type TYPE.
567
   (TYPE is null for libcalls where that information may not be available.)  */
568
 
569
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)    \
570
 ((CUM).nbytes += ((MODE) != BLKmode                    \
571
                   ? (GET_MODE_SIZE (MODE) + 3) & ~3    \
572
                   : (int_size_in_bytes (TYPE) + 3) & ~3))
573
 
574
/* Define where to put the arguments to a function.
575
   Value is zero to push the argument on the stack,
576
   or a hard register in which to store the argument.
577
 
578
   MODE is the argument's machine mode.
579
   TYPE is the data type of the argument (as a tree).
580
    This is null for libcalls where that information may
581
    not be available.
582
   CUM is a variable of type CUMULATIVE_ARGS which gives info about
583
    the preceding args and about the function being called.
584
   NAMED is nonzero if this argument is a named parameter
585
    (otherwise it is an extra parameter matching an ellipsis).  */
586
 
587
/* On the MN10300 all args are pushed.  */
588
 
589
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
590
  function_arg (&CUM, MODE, TYPE, NAMED)
591
 
592
/* Define how to find the value returned by a function.
593
   VALTYPE is the data type of the value (as a tree).
594
   If the precise function being called is known, FUNC is its FUNCTION_DECL;
595
   otherwise, FUNC is 0.  */
596
 
597
#define FUNCTION_VALUE(VALTYPE, FUNC) \
598
  mn10300_function_value (VALTYPE, FUNC, 0)
599
#define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
600
  mn10300_function_value (VALTYPE, FUNC, 1)
601
 
602
/* Define how to find the value returned by a library function
603
   assuming the value has mode MODE.  */
604
 
605
#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_DATA_REGNUM)
606
 
607
/* 1 if N is a possible register number for a function value.  */
608
 
609
#define FUNCTION_VALUE_REGNO_P(N) \
610
  ((N) == FIRST_DATA_REGNUM || (N) == FIRST_ADDRESS_REGNUM)
611
 
612
#define DEFAULT_PCC_STRUCT_RETURN 0
613
 
614
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
615
   the stack pointer does not matter.  The value is tested only in
616
   functions that have frame pointers.
617
   No definition is equivalent to always zero.  */
618
 
619
#define EXIT_IGNORE_STACK 1
620
 
621
/* Output assembler code to FILE to increment profiler label # LABELNO
622
   for profiling a function entry.  */
623
 
624
#define FUNCTION_PROFILER(FILE, LABELNO) ;
625
 
626
#define TRAMPOLINE_TEMPLATE(FILE)                       \
627
  do {                                                  \
628
    fprintf (FILE, "\tadd -4,sp\n");                    \
629
    fprintf (FILE, "\t.long 0x0004fffa\n");             \
630
    fprintf (FILE, "\tmov (0,sp),a0\n");                \
631
    fprintf (FILE, "\tadd 4,sp\n");                     \
632
    fprintf (FILE, "\tmov (13,a0),a1\n");               \
633
    fprintf (FILE, "\tmov (17,a0),a0\n");               \
634
    fprintf (FILE, "\tjmp (a0)\n");                     \
635
    fprintf (FILE, "\t.long 0\n");                      \
636
    fprintf (FILE, "\t.long 0\n");                      \
637
  } while (0)
638
 
639
/* Length in units of the trampoline for entering a nested function.  */
640
 
641
#define TRAMPOLINE_SIZE 0x1b
642
 
643
#define TRAMPOLINE_ALIGNMENT 32
644
 
645
/* Emit RTL insns to initialize the variable parts of a trampoline.
646
   FNADDR is an RTX for the address of the function's pure code.
647
   CXT is an RTX for the static chain value for the function.  */
648
 
649
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)                       \
650
{                                                                       \
651
  emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x14)),  \
652
                 (CXT));                                                \
653
  emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x18)),  \
654
                 (FNADDR));                                             \
655
}
656
/* A C expression whose value is RTL representing the value of the return
657
   address for the frame COUNT steps up from the current frame.
658
 
659
   On the mn10300, the return address is not at a constant location
660
   due to the frame layout.  Luckily, it is at a constant offset from
661
   the argument pointer, so we define RETURN_ADDR_RTX to return a
662
   MEM using arg_pointer_rtx.  Reload will replace arg_pointer_rtx
663
   with a reference to the stack/frame pointer + an appropriate offset.  */
664
 
665
#define RETURN_ADDR_RTX(COUNT, FRAME)   \
666
  ((COUNT == 0)                         \
667
   ? gen_rtx_MEM (Pmode, arg_pointer_rtx) \
668
   : (rtx) 0)
669
 
670
/* Implement `va_start' for varargs and stdarg.  */
671
#define EXPAND_BUILTIN_VA_START(valist, nextarg) \
672
  mn10300_va_start (valist, nextarg)
673
 
674
/* 1 if X is an rtx for a constant that is a valid address.  */
675
 
676
#define CONSTANT_ADDRESS_P(X)   CONSTANT_P (X)
677
 
678
/* Extra constraints.  */
679
 
680
#define OK_FOR_Q(OP) \
681
   (GET_CODE (OP) == MEM && ! CONSTANT_ADDRESS_P (XEXP (OP, 0)))
682
 
683
#define OK_FOR_R(OP) \
684
   (GET_CODE (OP) == MEM                                        \
685
    && GET_MODE (OP) == QImode                                  \
686
    && (CONSTANT_ADDRESS_P (XEXP (OP, 0))                        \
687
        || (GET_CODE (XEXP (OP, 0)) == REG                       \
688
            && REG_OK_FOR_BIT_BASE_P (XEXP (OP, 0))              \
689
            && XEXP (OP, 0) != stack_pointer_rtx)                \
690
        || (GET_CODE (XEXP (OP, 0)) == PLUS                      \
691
            && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG           \
692
            && REG_OK_FOR_BIT_BASE_P (XEXP (XEXP (OP, 0), 0))     \
693
            && XEXP (XEXP (OP, 0), 0) != stack_pointer_rtx        \
694
            && GET_CODE (XEXP (XEXP (OP, 0), 1)) == CONST_INT    \
695
            && INT_8_BITS (INTVAL (XEXP (XEXP (OP, 0), 1))))))
696
 
697
#define OK_FOR_T(OP) \
698
   (GET_CODE (OP) == MEM                                        \
699
    && GET_MODE (OP) == QImode                                  \
700
    && (GET_CODE (XEXP (OP, 0)) == REG                           \
701
        && REG_OK_FOR_BIT_BASE_P (XEXP (OP, 0))                  \
702
        && XEXP (OP, 0) != stack_pointer_rtx))
703
 
704
#define EXTRA_CONSTRAINT(OP, C) \
705
 ((C) == 'R' ? OK_FOR_R (OP) \
706
  : (C) == 'Q' ? OK_FOR_Q (OP) \
707
  : (C) == 'S' && flag_pic \
708
  ? GET_CODE (OP) == UNSPEC && (XINT (OP, 1) == UNSPEC_PLT \
709
                                || XINT (OP, 1) == UNSPEC_PIC) \
710
  : (C) == 'S' ? GET_CODE (OP) == SYMBOL_REF \
711
  : (C) == 'T' ? OK_FOR_T (OP) \
712
  : 0)
713
 
714
/* Maximum number of registers that can appear in a valid memory address.  */
715
 
716
#define MAX_REGS_PER_ADDRESS 2
717
 
718
 
719
#define HAVE_POST_INCREMENT (TARGET_AM33)
720
 
721
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
722
   that is a valid memory address for an instruction.
723
   The MODE argument is the machine mode for the MEM expression
724
   that wants to use this address.
725
 
726
   The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
727
   except for CONSTANT_ADDRESS_P which is actually
728
   machine-independent.
729
 
730
   On the mn10300, the value in the address register must be
731
   in the same memory space/segment as the effective address.
732
 
733
   This is problematical for reload since it does not understand
734
   that base+index != index+base in a memory reference.
735
 
736
   Note it is still possible to use reg+reg addressing modes,
737
   it's just much more difficult.  For a discussion of a possible
738
   workaround and solution, see the comments in pa.c before the
739
   function record_unscaled_index_insn_codes.  */
740
 
741
/* Accept either REG or SUBREG where a register is valid.  */
742
 
743
#define RTX_OK_FOR_BASE_P(X, strict)                            \
744
  ((REG_P (X) && REGNO_STRICT_OK_FOR_BASE_P (REGNO (X),         \
745
                                             (strict)))         \
746
   || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X))         \
747
       && REGNO_STRICT_OK_FOR_BASE_P (REGNO (SUBREG_REG (X)),   \
748
                                      (strict))))
749
 
750
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)         \
751
do                                                      \
752
  {                                                     \
753
    if (legitimate_address_p ((MODE), (X), REG_STRICT)) \
754
      goto ADDR;                                        \
755
  }                                                     \
756
while (0)
757
 
758
 
759
/* Try machine-dependent ways of modifying an illegitimate address
760
   to be legitimate.  If we find one, return the new, valid address.
761
   This macro is used in only one place: `memory_address' in explow.c.
762
 
763
   OLDX is the address as it was before break_out_memory_refs was called.
764
   In some cases it is useful to look at this to decide what needs to be done.
765
 
766
   MODE and WIN are passed so that this macro can use
767
   GO_IF_LEGITIMATE_ADDRESS.
768
 
769
   It is always safe for this macro to do nothing.  It exists to recognize
770
   opportunities to optimize the output.  */
771
 
772
#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)  \
773
{ rtx orig_x = (X);                             \
774
  (X) = legitimize_address (X, OLDX, MODE);     \
775
  if ((X) != orig_x && memory_address_p (MODE, X)) \
776
    goto WIN; }
777
 
778
/* Go to LABEL if ADDR (a legitimate address expression)
779
   has an effect that depends on the machine mode it is used for.  */
780
 
781
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)        \
782
  if (GET_CODE (ADDR) == POST_INC) \
783
    goto LABEL
784
 
785
/* Nonzero if the constant value X is a legitimate general operand.
786
   It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.  */
787
 
788
#define LEGITIMATE_CONSTANT_P(X) 1
789
 
790
/* Zero if this needs fixing up to become PIC.  */
791
 
792
#define LEGITIMATE_PIC_OPERAND_P(X) (legitimate_pic_operand_p (X))
793
 
794
/* Register to hold the addressing base for
795
   position independent code access to data items.  */
796
#define PIC_OFFSET_TABLE_REGNUM PIC_REG
797
 
798
/* The name of the pseudo-symbol representing the Global Offset Table.  */
799
#define GOT_SYMBOL_NAME "*_GLOBAL_OFFSET_TABLE_"
800
 
801
#define SYMBOLIC_CONST_P(X)     \
802
((GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == LABEL_REF)      \
803
  && ! LEGITIMATE_PIC_OPERAND_P (X))
804
 
805
/* Non-global SYMBOL_REFs have SYMBOL_REF_FLAG enabled.  */
806
#define MN10300_GLOBAL_P(X) (! SYMBOL_REF_FLAG (X))
807
 
808
/* Recognize machine-specific patterns that may appear within
809
   constants.  Used for PIC-specific UNSPECs.  */
810
#define OUTPUT_ADDR_CONST_EXTRA(STREAM, X, FAIL) \
811
  do                                                                    \
812
    if (GET_CODE (X) == UNSPEC && XVECLEN ((X), 0) == 1) \
813
      {                                                                 \
814
        switch (XINT ((X), 1))                                          \
815
          {                                                             \
816
          case UNSPEC_INT_LABEL:                                        \
817
            asm_fprintf ((STREAM), ".%LLIL%d",                          \
818
                         INTVAL (XVECEXP ((X), 0, 0)));                   \
819
            break;                                                      \
820
          case UNSPEC_PIC:                                              \
821
            /* GLOBAL_OFFSET_TABLE or local symbols, no suffix.  */     \
822
            output_addr_const ((STREAM), XVECEXP ((X), 0, 0));            \
823
            break;                                                      \
824
          case UNSPEC_GOT:                                              \
825
            output_addr_const ((STREAM), XVECEXP ((X), 0, 0));            \
826
            fputs ("@GOT", (STREAM));                                   \
827
            break;                                                      \
828
          case UNSPEC_GOTOFF:                                           \
829
            output_addr_const ((STREAM), XVECEXP ((X), 0, 0));            \
830
            fputs ("@GOTOFF", (STREAM));                                \
831
            break;                                                      \
832
          case UNSPEC_PLT:                                              \
833
            output_addr_const ((STREAM), XVECEXP ((X), 0, 0));            \
834
            fputs ("@PLT", (STREAM));                                   \
835
            break;                                                      \
836
          default:                                                      \
837
            goto FAIL;                                                  \
838
          }                                                             \
839
        break;                                                          \
840
      }                                                                 \
841
    else                                                                \
842
      goto FAIL;                                                        \
843
  while (0)
844
 
845
/* Tell final.c how to eliminate redundant test instructions.  */
846
 
847
/* Here we define machine-dependent flags and fields in cc_status
848
   (see `conditions.h').  No extra ones are needed for the VAX.  */
849
 
850
/* Store in cc_status the expressions
851
   that the condition codes will describe
852
   after execution of an instruction whose pattern is EXP.
853
   Do not alter them if the instruction would not alter the cc's.  */
854
 
855
#define CC_OVERFLOW_UNUSABLE 0x200
856
#define CC_NO_CARRY CC_NO_OVERFLOW
857
#define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
858
 
859
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
860
  ((CLASS1 == CLASS2 && (CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS)) ? 2 :\
861
   ((CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS) && \
862
    (CLASS2 == ADDRESS_REGS || CLASS2 == DATA_REGS)) ? 4 : \
863
   (CLASS1 == SP_REGS && CLASS2 == ADDRESS_REGS) ? 2 : \
864
   (CLASS1 == ADDRESS_REGS && CLASS2 == SP_REGS) ? 4 : \
865
   ! TARGET_AM33 ? 6 : \
866
   (CLASS1 == SP_REGS || CLASS2 == SP_REGS) ? 6 : \
867
   (CLASS1 == CLASS2 && CLASS1 == EXTENDED_REGS) ? 6 : \
868
   (CLASS1 == FP_REGS || CLASS2 == FP_REGS) ? 6 : \
869
   (CLASS1 == EXTENDED_REGS || CLASS2 == EXTENDED_REGS) ? 4 : \
870
   4)
871
 
872
/* Nonzero if access to memory by bytes or half words is no faster
873
   than accessing full words.  */
874
#define SLOW_BYTE_ACCESS 1
875
 
876
/* Dispatch tables on the mn10300 are extremely expensive in terms of code
877
   and readonly data size.  So we crank up the case threshold value to
878
   encourage a series of if/else comparisons to implement many small switch
879
   statements.  In theory, this value could be increased much more if we
880
   were solely optimizing for space, but we keep it "reasonable" to avoid
881
   serious code efficiency lossage.  */
882
#define CASE_VALUES_THRESHOLD 6
883
 
884
#define NO_FUNCTION_CSE
885
 
886
/* According expr.c, a value of around 6 should minimize code size, and
887
   for the MN10300 series, that's our primary concern.  */
888
#define MOVE_RATIO 6
889
 
890
#define TEXT_SECTION_ASM_OP "\t.section .text"
891
#define DATA_SECTION_ASM_OP "\t.section .data"
892
#define BSS_SECTION_ASM_OP "\t.section .bss"
893
 
894
#define ASM_COMMENT_START "#"
895
 
896
/* Output to assembler file text saying following lines
897
   may contain character constants, extra white space, comments, etc.  */
898
 
899
#define ASM_APP_ON "#APP\n"
900
 
901
/* Output to assembler file text saying following lines
902
   no longer contain unusual constructs.  */
903
 
904
#define ASM_APP_OFF "#NO_APP\n"
905
 
906
/* This says how to output the assembler to define a global
907
   uninitialized but not common symbol.
908
   Try to use asm_output_bss to implement this macro.  */
909
 
910
#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
911
  asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
912
 
913
/* Globalizing directive for a label.  */
914
#define GLOBAL_ASM_OP "\t.global "
915
 
916
/* This is how to output a reference to a user-level label named NAME.
917
   `assemble_name' uses this.  */
918
 
919
#undef ASM_OUTPUT_LABELREF
920
#define ASM_OUTPUT_LABELREF(FILE, NAME) \
921
  fprintf (FILE, "_%s", (*targetm.strip_name_encoding) (NAME))
922
 
923
#define ASM_PN_FORMAT "%s___%lu"
924
 
925
/* This is how we tell the assembler that two symbols have the same value.  */
926
 
927
#define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \
928
  do { assemble_name(FILE, NAME1);       \
929
       fputs(" = ", FILE);               \
930
       assemble_name(FILE, NAME2);       \
931
       fputc('\n', FILE); } while (0)
932
 
933
 
934
/* How to refer to registers in assembler output.
935
   This sequence is indexed by compiler's hard-register-number (see above).  */
936
 
937
#define REGISTER_NAMES \
938
{ "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", "ap", "sp", \
939
  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7" \
940
, "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7" \
941
, "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15" \
942
, "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23" \
943
, "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31" \
944
}
945
 
946
#define ADDITIONAL_REGISTER_NAMES \
947
{ {"r8",  4}, {"r9",  5}, {"r10", 6}, {"r11", 7}, \
948
  {"r12", 0}, {"r13", 1}, {"r14", 2}, {"r15", 3}, \
949
  {"e0", 10}, {"e1", 11}, {"e2", 12}, {"e3", 13}, \
950
  {"e4", 14}, {"e5", 15}, {"e6", 16}, {"e7", 17} \
951
, {"fd0", 18}, {"fd2", 20}, {"fd4", 22}, {"fd6", 24} \
952
, {"fd8", 26}, {"fd10", 28}, {"fd12", 30}, {"fd14", 32} \
953
, {"fd16", 34}, {"fd18", 36}, {"fd20", 38}, {"fd22", 40} \
954
, {"fd24", 42}, {"fd26", 44}, {"fd28", 46}, {"fd30", 48} \
955
}
956
 
957
/* Print an instruction operand X on file FILE.
958
   look in mn10300.c for details */
959
 
960
#define PRINT_OPERAND(FILE, X, CODE)  print_operand(FILE,X,CODE)
961
 
962
/* Print a memory operand whose address is X, on file FILE.
963
   This uses a function in output-vax.c.  */
964
 
965
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
966
 
967
#define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
968
#define ASM_OUTPUT_REG_POP(FILE,REGNO)
969
 
970
/* This is how to output an element of a case-vector that is absolute.  */
971
 
972
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
973
  fprintf (FILE, "\t%s .L%d\n", ".long", VALUE)
974
 
975
/* This is how to output an element of a case-vector that is relative.  */
976
 
977
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
978
  fprintf (FILE, "\t%s .L%d-.L%d\n", ".long", VALUE, REL)
979
 
980
#define ASM_OUTPUT_ALIGN(FILE,LOG)      \
981
  if ((LOG) != 0)                        \
982
    fprintf (FILE, "\t.align %d\n", (LOG))
983
 
984
/* We don't have to worry about dbx compatibility for the mn10300.  */
985
#define DEFAULT_GDB_EXTENSIONS 1
986
 
987
/* Use dwarf2 debugging info by default.  */
988
#undef PREFERRED_DEBUGGING_TYPE
989
#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
990
 
991
#define DWARF2_ASM_LINE_DEBUG_INFO 1
992
 
993
/* GDB always assumes the current function's frame begins at the value
994
   of the stack pointer upon entry to the current function.  Accessing
995
   local variables and parameters passed on the stack is done using the
996
   base of the frame + an offset provided by GCC.
997
 
998
   For functions which have frame pointers this method works fine;
999
   the (frame pointer) == (stack pointer at function entry) and GCC provides
1000
   an offset relative to the frame pointer.
1001
 
1002
   This loses for functions without a frame pointer; GCC provides an offset
1003
   which is relative to the stack pointer after adjusting for the function's
1004
   frame size.  GDB would prefer the offset to be relative to the value of
1005
   the stack pointer at the function's entry.  Yuk!  */
1006
#define DEBUGGER_AUTO_OFFSET(X) \
1007
  ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
1008
    + (frame_pointer_needed \
1009
       ? 0 : -initial_offset (FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM)))
1010
 
1011
#define DEBUGGER_ARG_OFFSET(OFFSET, X) \
1012
  ((GET_CODE (X) == PLUS ? OFFSET : 0) \
1013
    + (frame_pointer_needed \
1014
       ? 0 : -initial_offset (ARG_POINTER_REGNUM, STACK_POINTER_REGNUM)))
1015
 
1016
/* Specify the machine mode that this machine uses
1017
   for the index in the tablejump instruction.  */
1018
#define CASE_VECTOR_MODE Pmode
1019
 
1020
/* Define if operations between registers always perform the operation
1021
   on the full register even if a narrower mode is specified.  */
1022
#define WORD_REGISTER_OPERATIONS
1023
 
1024
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1025
 
1026
/* This flag, if defined, says the same insns that convert to a signed fixnum
1027
   also convert validly to an unsigned one.  */
1028
#define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1029
 
1030
/* Max number of bytes we can move from memory to memory
1031
   in one reasonably fast instruction.  */
1032
#define MOVE_MAX        4
1033
 
1034
/* Define if shifts truncate the shift count
1035
   which implies one can omit a sign-extension or zero-extension
1036
   of a shift count.  */
1037
#define SHIFT_COUNT_TRUNCATED 1
1038
 
1039
/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1040
   is done just by pretending it is already truncated.  */
1041
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1042
 
1043
/* Specify the machine mode that pointers have.
1044
   After generation of rtl, the compiler makes no further distinction
1045
   between pointers and any other objects of this machine mode.  */
1046
#define Pmode SImode
1047
 
1048
/* A function address in a call instruction
1049
   is a byte address (for indexing purposes)
1050
   so give the MEM rtx a byte's mode.  */
1051
#define FUNCTION_MODE QImode
1052
 
1053
/* The assembler op to get a word.  */
1054
 
1055
#define FILE_ASM_OP "\t.file\n"
1056
 
1057
typedef struct mn10300_cc_status_mdep
1058
  {
1059
    int fpCC;
1060
  }
1061
cc_status_mdep;
1062
 
1063
#define CC_STATUS_MDEP cc_status_mdep
1064
 
1065
#define CC_STATUS_MDEP_INIT (cc_status.mdep.fpCC = 0)

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