OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.2.2/] [gcc/] [config/] [pa/] [pa.h] - Blame information for rev 455

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius
/* Definitions of target machine for GNU compiler, for the HP Spectrum.
2
   Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3
   2001, 2002, 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
4
   Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
5
   and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
6
   Software Science at the University of Utah.
7
 
8
This file is part of GCC.
9
 
10
GCC is free software; you can redistribute it and/or modify
11
it under the terms of the GNU General Public License as published by
12
the Free Software Foundation; either version 3, or (at your option)
13
any later version.
14
 
15
GCC is distributed in the hope that it will be useful,
16
but WITHOUT ANY WARRANTY; without even the implied warranty of
17
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18
GNU General Public License for more details.
19
 
20
You should have received a copy of the GNU General Public License
21
along with GCC; see the file COPYING3.  If not see
22
<http://www.gnu.org/licenses/>.  */
23
 
24
enum cmp_type                           /* comparison type */
25
{
26
  CMP_SI,                               /* compare integers */
27
  CMP_SF,                               /* compare single precision floats */
28
  CMP_DF,                               /* compare double precision floats */
29
  CMP_MAX                               /* max comparison type */
30
};
31
 
32
/* For long call handling.  */
33
extern unsigned long total_code_bytes;
34
 
35
/* Which processor to schedule for.  */
36
 
37
enum processor_type
38
{
39
  PROCESSOR_700,
40
  PROCESSOR_7100,
41
  PROCESSOR_7100LC,
42
  PROCESSOR_7200,
43
  PROCESSOR_7300,
44
  PROCESSOR_8000
45
};
46
 
47
/* For -mschedule= option.  */
48
extern enum processor_type pa_cpu;
49
 
50
/* For -munix= option.  */
51
extern int flag_pa_unix;
52
 
53
#define pa_cpu_attr ((enum attr_cpu)pa_cpu)
54
 
55
/* Print subsidiary information on the compiler version in use.  */
56
 
57
#define TARGET_VERSION fputs (" (hppa)", stderr);
58
 
59
#define TARGET_PA_10 (!TARGET_PA_11 && !TARGET_PA_20)
60
 
61
/* Generate code for the HPPA 2.0 architecture in 64bit mode.  */
62
#ifndef TARGET_64BIT
63
#define TARGET_64BIT 0
64
#endif
65
 
66
/* Generate code for ELF32 ABI.  */
67
#ifndef TARGET_ELF32
68
#define TARGET_ELF32 0
69
#endif
70
 
71
/* Generate code for SOM 32bit ABI.  */
72
#ifndef TARGET_SOM
73
#define TARGET_SOM 0
74
#endif
75
 
76
/* HP-UX UNIX features.  */
77
#ifndef TARGET_HPUX
78
#define TARGET_HPUX 0
79
#endif
80
 
81
/* HP-UX 10.10 UNIX 95 features.  */
82
#ifndef TARGET_HPUX_10_10
83
#define TARGET_HPUX_10_10 0
84
#endif
85
 
86
/* HP-UX 11i multibyte and UNIX 98 extensions.  */
87
#ifndef TARGET_HPUX_11_11
88
#define TARGET_HPUX_11_11 0
89
#endif
90
 
91
/* The following three defines are potential target switches.  The current
92
   defines are optimal given the current capabilities of GAS and GNU ld.  */
93
 
94
/* Define to a C expression evaluating to true to use long absolute calls.
95
   Currently, only the HP assembler and SOM linker support long absolute
96
   calls.  They are used only in non-pic code.  */
97
#define TARGET_LONG_ABS_CALL (TARGET_SOM && !TARGET_GAS)
98
 
99
/* Define to a C expression evaluating to true to use long pic symbol
100
   difference calls.  This is a call variant similar to the long pic
101
   pc-relative call.  Long pic symbol difference calls are only used with
102
   the HP SOM linker.  Currently, only the HP assembler supports these
103
   calls.  GAS doesn't allow an arbitrary difference of two symbols.  */
104
#define TARGET_LONG_PIC_SDIFF_CALL (!TARGET_GAS)
105
 
106
/* Define to a C expression evaluating to true to use long pic
107
   pc-relative calls.  Long pic pc-relative calls are only used with
108
   GAS.  Currently, they are usable for calls within a module but
109
   not for external calls.  */
110
#define TARGET_LONG_PIC_PCREL_CALL 0
111
 
112
/* Define to a C expression evaluating to true to use SOM secondary
113
   definition symbols for weak support.  Linker support for secondary
114
   definition symbols is buggy prior to HP-UX 11.X.  */
115
#define TARGET_SOM_SDEF 0
116
 
117
/* Define to a C expression evaluating to true to save the entry value
118
   of SP in the current frame marker.  This is normally unnecessary.
119
   However, the HP-UX unwind library looks at the SAVE_SP callinfo flag.
120
   HP compilers don't use this flag but it is supported by the assembler.
121
   We set this flag to indicate that register %r3 has been saved at the
122
   start of the frame.  Thus, when the HP unwind library is used, we
123
   need to generate additional code to save SP into the frame marker.  */
124
#define TARGET_HPUX_UNWIND_LIBRARY 0
125
 
126
#ifndef TARGET_DEFAULT
127
#define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY | MASK_BIG_SWITCH)
128
#endif
129
 
130
#ifndef TARGET_CPU_DEFAULT
131
#define TARGET_CPU_DEFAULT 0
132
#endif
133
 
134
#ifndef TARGET_SCHED_DEFAULT
135
#define TARGET_SCHED_DEFAULT PROCESSOR_8000
136
#endif
137
 
138
/* Support for a compile-time default CPU, et cetera.  The rules are:
139
   --with-schedule is ignored if -mschedule is specified.
140
   --with-arch is ignored if -march is specified.  */
141
#define OPTION_DEFAULT_SPECS \
142
  {"arch", "%{!march=*:-march=%(VALUE)}" }, \
143
  {"schedule", "%{!mschedule=*:-mschedule=%(VALUE)}" }
144
 
145
/* Specify the dialect of assembler to use.  New mnemonics is dialect one
146
   and the old mnemonics are dialect zero.  */
147
#define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0)
148
 
149
#define OVERRIDE_OPTIONS override_options ()
150
 
151
/* Override some settings from dbxelf.h.  */
152
 
153
/* We do not have to be compatible with dbx, so we enable gdb extensions
154
   by default.  */
155
#define DEFAULT_GDB_EXTENSIONS 1
156
 
157
/* This used to be zero (no max length), but big enums and such can
158
   cause huge strings which killed gas.
159
 
160
   We also have to avoid lossage in dbxout.c -- it does not compute the
161
   string size accurately, so we are real conservative here.  */
162
#undef DBX_CONTIN_LENGTH
163
#define DBX_CONTIN_LENGTH 3000
164
 
165
/* GDB always assumes the current function's frame begins at the value
166
   of the stack pointer upon entry to the current function.  Accessing
167
   local variables and parameters passed on the stack is done using the
168
   base of the frame + an offset provided by GCC.
169
 
170
   For functions which have frame pointers this method works fine;
171
   the (frame pointer) == (stack pointer at function entry) and GCC provides
172
   an offset relative to the frame pointer.
173
 
174
   This loses for functions without a frame pointer; GCC provides an offset
175
   which is relative to the stack pointer after adjusting for the function's
176
   frame size.  GDB would prefer the offset to be relative to the value of
177
   the stack pointer at the function's entry.  Yuk!  */
178
#define DEBUGGER_AUTO_OFFSET(X) \
179
  ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
180
    + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
181
 
182
#define DEBUGGER_ARG_OFFSET(OFFSET, X) \
183
  ((GET_CODE (X) == PLUS ? OFFSET : 0) \
184
    + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
185
 
186
#define TARGET_CPU_CPP_BUILTINS()                               \
187
do {                                                            \
188
     builtin_assert("cpu=hppa");                                \
189
     builtin_assert("machine=hppa");                            \
190
     builtin_define("__hppa");                                  \
191
     builtin_define("__hppa__");                                \
192
     if (TARGET_PA_20)                                          \
193
       builtin_define("_PA_RISC2_0");                           \
194
     else if (TARGET_PA_11)                                     \
195
       builtin_define("_PA_RISC1_1");                           \
196
     else                                                       \
197
       builtin_define("_PA_RISC1_0");                           \
198
} while (0)
199
 
200
/* An old set of OS defines for various BSD-like systems.  */
201
#define TARGET_OS_CPP_BUILTINS()                                \
202
  do                                                            \
203
    {                                                           \
204
        builtin_define_std ("REVARGV");                         \
205
        builtin_define_std ("hp800");                           \
206
        builtin_define_std ("hp9000");                          \
207
        builtin_define_std ("hp9k8");                           \
208
        if (!c_dialect_cxx () && !flag_iso)                     \
209
          builtin_define ("hppa");                              \
210
        builtin_define_std ("spectrum");                        \
211
        builtin_define_std ("unix");                            \
212
        builtin_assert ("system=bsd");                          \
213
        builtin_assert ("system=unix");                         \
214
    }                                                           \
215
  while (0)
216
 
217
#define CC1_SPEC "%{pg:} %{p:}"
218
 
219
#define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}"
220
 
221
/* We don't want -lg.  */
222
#ifndef LIB_SPEC
223
#define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
224
#endif
225
 
226
/* This macro defines command-line switches that modify the default
227
   target name.
228
 
229
   The definition is be an initializer for an array of structures.  Each
230
   array element has have three elements: the switch name, one of the
231
   enumeration codes ADD or DELETE to indicate whether the string should be
232
   inserted or deleted, and the string to be inserted or deleted.  */
233
#define MODIFY_TARGET_NAME {{"-32", DELETE, "64"}, {"-64", ADD, "64"}}
234
 
235
/* Make gcc agree with <machine/ansi.h> */
236
 
237
#define SIZE_TYPE "unsigned int"
238
#define PTRDIFF_TYPE "int"
239
#define WCHAR_TYPE "unsigned int"
240
#define WCHAR_TYPE_SIZE 32
241
 
242
/* Show we can debug even without a frame pointer.  */
243
#define CAN_DEBUG_WITHOUT_FP
244
 
245
/* target machine storage layout */
246
typedef struct machine_function GTY(())
247
{
248
  /* Flag indicating that a .NSUBSPA directive has been output for
249
     this function.  */
250
  int in_nsubspa;
251
} machine_function;
252
 
253
/* Define this macro if it is advisable to hold scalars in registers
254
   in a wider mode than that declared by the program.  In such cases,
255
   the value is constrained to be within the bounds of the declared
256
   type, but kept valid in the wider mode.  The signedness of the
257
   extension may differ from that of the type.  */
258
 
259
#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE)  \
260
  if (GET_MODE_CLASS (MODE) == MODE_INT \
261
      && GET_MODE_SIZE (MODE) < UNITS_PER_WORD)         \
262
    (MODE) = word_mode;
263
 
264
/* Define this if most significant bit is lowest numbered
265
   in instructions that operate on numbered bit-fields.  */
266
#define BITS_BIG_ENDIAN 1
267
 
268
/* Define this if most significant byte of a word is the lowest numbered.  */
269
/* That is true on the HP-PA.  */
270
#define BYTES_BIG_ENDIAN 1
271
 
272
/* Define this if most significant word of a multiword number is lowest
273
   numbered.  */
274
#define WORDS_BIG_ENDIAN 1
275
 
276
#define MAX_BITS_PER_WORD 64
277
 
278
/* Width of a word, in units (bytes).  */
279
#define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
280
 
281
/* Minimum number of units in a word.  If this is undefined, the default
282
   is UNITS_PER_WORD.  Otherwise, it is the constant value that is the
283
   smallest value that UNITS_PER_WORD can have at run-time.
284
 
285
   FIXME: This needs to be 4 when TARGET_64BIT is true to suppress the
286
   building of various TImode routines in libgcc.  The HP runtime
287
   specification doesn't provide the alignment requirements and calling
288
   conventions for TImode variables.  */
289
#define MIN_UNITS_PER_WORD 4
290
 
291
/* The widest floating point format supported by the hardware.  Note that
292
   setting this influences some Ada floating point type sizes, currently
293
   required for GNAT to operate properly.  */
294
#define WIDEST_HARDWARE_FP_SIZE 64
295
 
296
/* Allocation boundary (in *bits*) for storing arguments in argument list.  */
297
#define PARM_BOUNDARY BITS_PER_WORD
298
 
299
/* Largest alignment required for any stack parameter, in bits.
300
   Don't define this if it is equal to PARM_BOUNDARY */
301
#define MAX_PARM_BOUNDARY BIGGEST_ALIGNMENT
302
 
303
/* Boundary (in *bits*) on which stack pointer is always aligned;
304
   certain optimizations in combine depend on this.
305
 
306
   The HP-UX runtime documents mandate 64-byte and 16-byte alignment for
307
   the stack on the 32 and 64-bit ports, respectively.  However, we
308
   are only guaranteed that the stack is aligned to BIGGEST_ALIGNMENT
309
   in main.  Thus, we treat the former as the preferred alignment.  */
310
#define STACK_BOUNDARY BIGGEST_ALIGNMENT
311
#define PREFERRED_STACK_BOUNDARY (TARGET_64BIT ? 128 : 512)
312
 
313
/* Allocation boundary (in *bits*) for the code of a function.  */
314
#define FUNCTION_BOUNDARY BITS_PER_WORD
315
 
316
/* Alignment of field after `int : 0' in a structure.  */
317
#define EMPTY_FIELD_BOUNDARY 32
318
 
319
/* Every structure's size must be a multiple of this.  */
320
#define STRUCTURE_SIZE_BOUNDARY 8
321
 
322
/* A bit-field declared as `int' forces `int' alignment for the struct.  */
323
#define PCC_BITFIELD_TYPE_MATTERS 1
324
 
325
/* No data type wants to be aligned rounder than this.  */
326
#define BIGGEST_ALIGNMENT (2 * BITS_PER_WORD)
327
 
328
/* Get around hp-ux assembler bug, and make strcpy of constants fast.  */
329
#define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
330
  ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
331
 
332
/* Make arrays of chars word-aligned for the same reasons.  */
333
#define DATA_ALIGNMENT(TYPE, ALIGN)             \
334
  (TREE_CODE (TYPE) == ARRAY_TYPE               \
335
   && TYPE_MODE (TREE_TYPE (TYPE)) == QImode    \
336
   && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
337
 
338
/* Set this nonzero if move instructions will actually fail to work
339
   when given unaligned data.  */
340
#define STRICT_ALIGNMENT 1
341
 
342
/* Value is 1 if it is a good idea to tie two pseudo registers
343
   when one has mode MODE1 and one has mode MODE2.
344
   If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
345
   for any hard reg, then this must be 0 for correct output.  */
346
#define MODES_TIEABLE_P(MODE1, MODE2) \
347
  (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
348
 
349
/* Specify the registers used for certain standard purposes.
350
   The values of these macros are register numbers.  */
351
 
352
/* The HP-PA pc isn't overloaded on a register that the compiler knows about.  */
353
/* #define PC_REGNUM  */
354
 
355
/* Register to use for pushing function arguments.  */
356
#define STACK_POINTER_REGNUM 30
357
 
358
/* Base register for access to local variables of the function.  */
359
#define FRAME_POINTER_REGNUM 3
360
 
361
/* Value should be nonzero if functions must have frame pointers.  */
362
#define FRAME_POINTER_REQUIRED \
363
  (current_function_calls_alloca)
364
 
365
/* Don't allow hard registers to be renamed into r2 unless r2
366
   is already live or already being saved (due to eh).  */
367
 
368
#define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
369
  ((NEW_REG) != 2 || regs_ever_live[2] || current_function_calls_eh_return)
370
 
371
/* C statement to store the difference between the frame pointer
372
   and the stack pointer values immediately after the function prologue.
373
 
374
   Note, we always pretend that this is a leaf function because if
375
   it's not, there's no point in trying to eliminate the
376
   frame pointer.  If it is a leaf function, we guessed right!  */
377
#define INITIAL_FRAME_POINTER_OFFSET(VAR) \
378
  do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
379
 
380
/* Base register for access to arguments of the function.  */
381
#define ARG_POINTER_REGNUM (TARGET_64BIT ? 29 : 3)
382
 
383
/* Register in which static-chain is passed to a function.  */
384
#define STATIC_CHAIN_REGNUM (TARGET_64BIT ? 31 : 29)
385
 
386
/* Register used to address the offset table for position-independent
387
   data references.  */
388
#define PIC_OFFSET_TABLE_REGNUM \
389
  (flag_pic ? (TARGET_64BIT ? 27 : 19) : INVALID_REGNUM)
390
 
391
#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
392
 
393
/* Function to return the rtx used to save the pic offset table register
394
   across function calls.  */
395
extern struct rtx_def *hppa_pic_save_rtx (void);
396
 
397
#define DEFAULT_PCC_STRUCT_RETURN 0
398
 
399
/* Register in which address to store a structure value
400
   is passed to a function.  */
401
#define PA_STRUCT_VALUE_REGNUM 28
402
 
403
/* Describe how we implement __builtin_eh_return.  */
404
#define EH_RETURN_DATA_REGNO(N) \
405
  ((N) < 3 ? (N) + 20 : (N) == 3 ? 31 : INVALID_REGNUM)
406
#define EH_RETURN_STACKADJ_RTX  gen_rtx_REG (Pmode, 29)
407
#define EH_RETURN_HANDLER_RTX \
408
  gen_rtx_MEM (word_mode,                                               \
409
               gen_rtx_PLUS (word_mode, frame_pointer_rtx,              \
410
                             TARGET_64BIT ? GEN_INT (-16) : GEN_INT (-20)))
411
 
412
/* Offset from the frame pointer register value to the top of stack.  */
413
#define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
414
 
415
/* A C expression whose value is RTL representing the location of the
416
   incoming return address at the beginning of any function, before the
417
   prologue.  You only need to define this macro if you want to support
418
   call frame debugging information like that provided by DWARF 2.  */
419
#define INCOMING_RETURN_ADDR_RTX (gen_rtx_REG (word_mode, 2))
420
#define DWARF_FRAME_RETURN_COLUMN (DWARF_FRAME_REGNUM (2))
421
 
422
/* A C expression whose value is an integer giving a DWARF 2 column
423
   number that may be used as an alternate return column.  This should
424
   be defined only if DWARF_FRAME_RETURN_COLUMN is set to a general
425
   register, but an alternate column needs to be used for signal frames.
426
 
427
   Column 0 is not used but unfortunately its register size is set to
428
   4 bytes (sizeof CCmode) so it can't be used on 64-bit targets.  */
429
#define DWARF_ALT_FRAME_RETURN_COLUMN FIRST_PSEUDO_REGISTER
430
 
431
/* This macro chooses the encoding of pointers embedded in the exception
432
   handling sections.  If at all possible, this should be defined such
433
   that the exception handling section will not require dynamic relocations,
434
   and so may be read-only.
435
 
436
   Because the HP assembler auto aligns, it is necessary to use
437
   DW_EH_PE_aligned.  It's not possible to make the data read-only
438
   on the HP-UX SOM port since the linker requires fixups for label
439
   differences in different sections to be word aligned.  However,
440
   the SOM linker can do unaligned fixups for absolute pointers.
441
   We also need aligned pointers for global and function pointers.
442
 
443
   Although the HP-UX 64-bit ELF linker can handle unaligned pc-relative
444
   fixups, the runtime doesn't have a consistent relationship between
445
   text and data for dynamically loaded objects.  Thus, it's not possible
446
   to use pc-relative encoding for pointers on this target.  It may be
447
   possible to use segment relative encodings but GAS doesn't currently
448
   have a mechanism to generate these encodings.  For other targets, we
449
   use pc-relative encoding for pointers.  If the pointer might require
450
   dynamic relocation, we make it indirect.  */
451
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL)                       \
452
  (TARGET_GAS && !TARGET_HPUX                                           \
453
   ? (DW_EH_PE_pcrel                                                    \
454
      | ((GLOBAL) || (CODE) == 2 ? DW_EH_PE_indirect : 0)                \
455
      | (TARGET_64BIT ? DW_EH_PE_sdata8 : DW_EH_PE_sdata4))             \
456
   : (!TARGET_GAS || (GLOBAL) || (CODE) == 2                            \
457
      ? DW_EH_PE_aligned : DW_EH_PE_absptr))
458
 
459
/* Handle special EH pointer encodings.  Absolute, pc-relative, and
460
   indirect are handled automatically.  We output pc-relative, and
461
   indirect pc-relative ourself since we need some special magic to
462
   generate pc-relative relocations, and to handle indirect function
463
   pointers.  */
464
#define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \
465
  do {                                                                  \
466
    if (((ENCODING) & 0x70) == DW_EH_PE_pcrel)                          \
467
      {                                                                 \
468
        fputs (integer_asm_op (SIZE, FALSE), FILE);                     \
469
        if ((ENCODING) & DW_EH_PE_indirect)                             \
470
          output_addr_const (FILE, get_deferred_plabel (ADDR));         \
471
        else                                                            \
472
          assemble_name (FILE, XSTR ((ADDR), 0));                        \
473
        fputs ("+8-$PIC_pcrel$0", FILE);                                \
474
        goto DONE;                                                      \
475
      }                                                                 \
476
    } while (0)
477
 
478
/* The letters I, J, K, L and M in a register constraint string
479
   can be used to stand for particular ranges of immediate operands.
480
   This macro defines what the ranges are.
481
   C is the letter, and VALUE is a constant value.
482
   Return 1 if VALUE is in the range specified by C.
483
 
484
   `I' is used for the 11 bit constants.
485
   `J' is used for the 14 bit constants.
486
   `K' is used for values that can be moved with a zdepi insn.
487
   `L' is used for the 5 bit constants.
488
   `M' is used for 0.
489
   `N' is used for values with the least significant 11 bits equal to zero
490
                          and when sign extended from 32 to 64 bits the
491
                          value does not change.
492
   `O' is used for numbers n such that n+1 is a power of 2.
493
   */
494
 
495
#define CONST_OK_FOR_LETTER_P(VALUE, C)  \
496
  ((C) == 'I' ? VAL_11_BITS_P (VALUE)                                   \
497
   : (C) == 'J' ? VAL_14_BITS_P (VALUE)                                 \
498
   : (C) == 'K' ? zdepi_cint_p (VALUE)                                  \
499
   : (C) == 'L' ? VAL_5_BITS_P (VALUE)                                  \
500
   : (C) == 'M' ? (VALUE) == 0                                           \
501
   : (C) == 'N' ? (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) == 0 \
502
                   || (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) \
503
                       == (HOST_WIDE_INT) -1 << 31))                    \
504
   : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0)                       \
505
   : (C) == 'P' ? and_mask_p (VALUE)                                    \
506
   : 0)
507
 
508
/* Similar, but for floating or large integer constants, and defining letters
509
   G and H.   Here VALUE is the CONST_DOUBLE rtx itself.
510
 
511
   For PA, `G' is the floating-point constant zero.  `H' is undefined.  */
512
 
513
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)                          \
514
  ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT        \
515
                 && (VALUE) == CONST0_RTX (GET_MODE (VALUE)))           \
516
   : 0)
517
 
518
/* The class value for index registers, and the one for base regs.  */
519
#define INDEX_REG_CLASS GENERAL_REGS
520
#define BASE_REG_CLASS GENERAL_REGS
521
 
522
#define FP_REG_CLASS_P(CLASS) \
523
  ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS)
524
 
525
/* True if register is floating-point.  */
526
#define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST)
527
 
528
/* Given an rtx X being reloaded into a reg required to be
529
   in class CLASS, return the class of reg to actually use.
530
   In general this is just CLASS; but on some machines
531
   in some cases it is preferable to use a more restrictive class.  */
532
#define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
533
 
534
#define MAYBE_FP_REG_CLASS_P(CLASS) \
535
  reg_classes_intersect_p ((CLASS), FP_REGS)
536
 
537
/* On the PA it is not possible to directly move data between
538
   GENERAL_REGS and FP_REGS.  On the 32-bit port, we use the
539
   location at SP-16.  We don't expose this location in the RTL to
540
   avoid scheduling related problems.  For example, the store and
541
   load could be separated by a call to a pure or const function
542
   which has no frame and uses SP-16.  */
543
#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE)                   \
544
  (TARGET_64BIT                                                         \
545
   && (MAYBE_FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2)         \
546
       || MAYBE_FP_REG_CLASS_P (CLASS2) != FP_REG_CLASS_P (CLASS1)))
547
 
548
 
549
/* Stack layout; function entry, exit and calling.  */
550
 
551
/* Define this if pushing a word on the stack
552
   makes the stack pointer a smaller address.  */
553
/* #define STACK_GROWS_DOWNWARD */
554
 
555
/* Believe it or not.  */
556
#define ARGS_GROW_DOWNWARD
557
 
558
/* Define this to nonzero if the nominal address of the stack frame
559
   is at the high-address end of the local variables;
560
   that is, each additional local variable allocated
561
   goes at a more negative offset in the frame.  */
562
#define FRAME_GROWS_DOWNWARD 0
563
 
564
/* Offset within stack frame to start allocating local variables at.
565
   If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
566
   first local allocated.  Otherwise, it is the offset to the BEGINNING
567
   of the first local allocated.
568
 
569
   On the 32-bit ports, we reserve one slot for the previous frame
570
   pointer and one fill slot.  The fill slot is for compatibility
571
   with HP compiled programs.  On the 64-bit ports, we reserve one
572
   slot for the previous frame pointer.  */
573
#define STARTING_FRAME_OFFSET 8
574
 
575
/* Define STACK_ALIGNMENT_NEEDED to zero to disable final alignment
576
   of the stack.  The default is to align it to STACK_BOUNDARY.  */
577
#define STACK_ALIGNMENT_NEEDED 0
578
 
579
/* If we generate an insn to push BYTES bytes,
580
   this says how many the stack pointer really advances by.
581
   On the HP-PA, don't define this because there are no push insns.  */
582
/*  #define PUSH_ROUNDING(BYTES) */
583
 
584
/* Offset of first parameter from the argument pointer register value.
585
   This value will be negated because the arguments grow down.
586
   Also note that on STACK_GROWS_UPWARD machines (such as this one)
587
   this is the distance from the frame pointer to the end of the first
588
   argument, not it's beginning.  To get the real offset of the first
589
   argument, the size of the argument must be added.  */
590
 
591
#define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32)
592
 
593
/* When a parameter is passed in a register, stack space is still
594
   allocated for it.  */
595
#define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16)
596
 
597
/* Define this if the above stack space is to be considered part of the
598
   space allocated by the caller.  */
599
#define OUTGOING_REG_PARM_STACK_SPACE
600
 
601
/* Keep the stack pointer constant throughout the function.
602
   This is both an optimization and a necessity: longjmp
603
   doesn't behave itself when the stack pointer moves within
604
   the function!  */
605
#define ACCUMULATE_OUTGOING_ARGS 1
606
 
607
/* The weird HPPA calling conventions require a minimum of 48 bytes on
608
   the stack: 16 bytes for register saves, and 32 bytes for magic.
609
   This is the difference between the logical top of stack and the
610
   actual sp.
611
 
612
   On the 64-bit port, the HP C compiler allocates a 48-byte frame
613
   marker, although the runtime documentation only describes a 16
614
   byte marker.  For compatibility, we allocate 48 bytes.  */
615
#define STACK_POINTER_OFFSET \
616
  (TARGET_64BIT ? -(current_function_outgoing_args_size + 48): -32)
617
 
618
#define STACK_DYNAMIC_OFFSET(FNDECL)    \
619
  (TARGET_64BIT                         \
620
   ? (STACK_POINTER_OFFSET)             \
621
   : ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size))
622
 
623
/* Value is 1 if returning from a function call automatically
624
   pops the arguments described by the number-of-args field in the call.
625
   FUNDECL is the declaration node of the function (as a tree),
626
   FUNTYPE is the data type of the function (as a tree),
627
   or for a library call it is an identifier node for the subroutine name.  */
628
 
629
#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
630
 
631
/* Define how to find the value returned by a function.
632
   VALTYPE is the data type of the value (as a tree).
633
   If the precise function being called is known, FUNC is its FUNCTION_DECL;
634
   otherwise, FUNC is 0.  */
635
 
636
#define FUNCTION_VALUE(VALTYPE, FUNC) function_value (VALTYPE, FUNC)
637
 
638
/* Define how to find the value returned by a library function
639
   assuming the value has mode MODE.  */
640
 
641
#define LIBCALL_VALUE(MODE)     \
642
  gen_rtx_REG (MODE,                                                    \
643
               (! TARGET_SOFT_FLOAT                                     \
644
                && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
645
 
646
/* 1 if N is a possible register number for a function value
647
   as seen by the caller.  */
648
 
649
#define FUNCTION_VALUE_REGNO_P(N) \
650
  ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
651
 
652
 
653
/* Define a data type for recording info about an argument list
654
   during the scan of that argument list.  This data type should
655
   hold all necessary information about the function itself
656
   and about the args processed so far, enough to enable macros
657
   such as FUNCTION_ARG to determine where the next arg should go.
658
 
659
   On the HP-PA, the WORDS field holds the number of words
660
   of arguments scanned so far (including the invisible argument,
661
   if any, which holds the structure-value-address).  Thus, 4 or
662
   more means all following args should go on the stack.
663
 
664
   The INCOMING field tracks whether this is an "incoming" or
665
   "outgoing" argument.
666
 
667
   The INDIRECT field indicates whether this is is an indirect
668
   call or not.
669
 
670
   The NARGS_PROTOTYPE field indicates that an argument does not
671
   have a prototype when it less than or equal to 0.  */
672
 
673
struct hppa_args {int words, nargs_prototype, incoming, indirect; };
674
 
675
#define CUMULATIVE_ARGS struct hppa_args
676
 
677
/* Initialize a variable CUM of type CUMULATIVE_ARGS
678
   for a call to a function whose data type is FNTYPE.
679
   For a library call, FNTYPE is 0.  */
680
 
681
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
682
  (CUM).words = 0,                                                       \
683
  (CUM).incoming = 0,                                                    \
684
  (CUM).indirect = (FNTYPE) && !(FNDECL),                               \
685
  (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE)            \
686
                           ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
687
                              + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
688
                                 || pa_return_in_memory (TREE_TYPE (FNTYPE), 0))) \
689
                           : 0)
690
 
691
 
692
 
693
/* Similar, but when scanning the definition of a procedure.  We always
694
   set NARGS_PROTOTYPE large so we never return a PARALLEL.  */
695
 
696
#define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
697
  (CUM).words = 0,                               \
698
  (CUM).incoming = 1,                           \
699
  (CUM).indirect = 0,                            \
700
  (CUM).nargs_prototype = 1000
701
 
702
/* Figure out the size in words of the function argument.  The size
703
   returned by this macro should always be greater than zero because
704
   we pass variable and zero sized objects by reference.  */
705
 
706
#define FUNCTION_ARG_SIZE(MODE, TYPE)   \
707
  ((((MODE) != BLKmode \
708
     ? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
709
     : int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
710
 
711
/* Update the data in CUM to advance over an argument
712
   of mode MODE and data type TYPE.
713
   (TYPE is null for libcalls where that information may not be available.)  */
714
 
715
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)                    \
716
{ (CUM).nargs_prototype--;                                              \
717
  (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE)                          \
718
    + (((CUM).words & 01) && (TYPE) != 0                         \
719
        && FUNCTION_ARG_SIZE(MODE, TYPE) > 1);                          \
720
}
721
 
722
/* Determine where to put an argument to a function.
723
   Value is zero to push the argument on the stack,
724
   or a hard register in which to store the argument.
725
 
726
   MODE is the argument's machine mode.
727
   TYPE is the data type of the argument (as a tree).
728
    This is null for libcalls where that information may
729
    not be available.
730
   CUM is a variable of type CUMULATIVE_ARGS which gives info about
731
    the preceding args and about the function being called.
732
   NAMED is nonzero if this argument is a named parameter
733
    (otherwise it is an extra parameter matching an ellipsis).
734
 
735
   On the HP-PA the first four words of args are normally in registers
736
   and the rest are pushed.  But any arg that won't entirely fit in regs
737
   is pushed.
738
 
739
   Arguments passed in registers are either 1 or 2 words long.
740
 
741
   The caller must make a distinction between calls to explicitly named
742
   functions and calls through pointers to functions -- the conventions
743
   are different!  Calls through pointers to functions only use general
744
   registers for the first four argument words.
745
 
746
   Of course all this is different for the portable runtime model
747
   HP wants everyone to use for ELF.  Ugh.  Here's a quick description
748
   of how it's supposed to work.
749
 
750
   1) callee side remains unchanged.  It expects integer args to be
751
   in the integer registers, float args in the float registers and
752
   unnamed args in integer registers.
753
 
754
   2) caller side now depends on if the function being called has
755
   a prototype in scope (rather than if it's being called indirectly).
756
 
757
      2a) If there is a prototype in scope, then arguments are passed
758
      according to their type (ints in integer registers, floats in float
759
      registers, unnamed args in integer registers.
760
 
761
      2b) If there is no prototype in scope, then floating point arguments
762
      are passed in both integer and float registers.  egad.
763
 
764
  FYI: The portable parameter passing conventions are almost exactly like
765
  the standard parameter passing conventions on the RS6000.  That's why
766
  you'll see lots of similar code in rs6000.h.  */
767
 
768
/* If defined, a C expression which determines whether, and in which
769
   direction, to pad out an argument with extra space.  */
770
#define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
771
 
772
/* Specify padding for the last element of a block move between registers
773
   and memory.
774
 
775
   The 64-bit runtime specifies that objects need to be left justified
776
   (i.e., the normal justification for a big endian target).  The 32-bit
777
   runtime specifies right justification for objects smaller than 64 bits.
778
   We use a DImode register in the parallel for 5 to 7 byte structures
779
   so that there is only one element.  This allows the object to be
780
   correctly padded.  */
781
#define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \
782
  function_arg_padding ((MODE), (TYPE))
783
 
784
/* Do not expect to understand this without reading it several times.  I'm
785
   tempted to try and simply it, but I worry about breaking something.  */
786
 
787
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
788
  function_arg (&CUM, MODE, TYPE, NAMED)
789
 
790
/* If defined, a C expression that gives the alignment boundary, in
791
   bits, of an argument with the specified mode and type.  If it is
792
   not defined,  `PARM_BOUNDARY' is used for all arguments.  */
793
 
794
/* Arguments larger than one word are double word aligned.  */
795
 
796
#define FUNCTION_ARG_BOUNDARY(MODE, TYPE)                               \
797
  (((TYPE)                                                              \
798
    ? (integer_zerop (TYPE_SIZE (TYPE))                                 \
799
       || !TREE_CONSTANT (TYPE_SIZE (TYPE))                             \
800
       || int_size_in_bytes (TYPE) <= UNITS_PER_WORD)                   \
801
    : GET_MODE_SIZE(MODE) <= UNITS_PER_WORD)                            \
802
   ? PARM_BOUNDARY : MAX_PARM_BOUNDARY)
803
 
804
 
805
extern GTY(()) rtx hppa_compare_op0;
806
extern GTY(()) rtx hppa_compare_op1;
807
extern enum cmp_type hppa_branch_type;
808
 
809
/* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than
810
   as assembly via FUNCTION_PROFILER.  Just output a local label.
811
   We can't use the function label because the GAS SOM target can't
812
   handle the difference of a global symbol and a local symbol.  */
813
 
814
#ifndef FUNC_BEGIN_PROLOG_LABEL
815
#define FUNC_BEGIN_PROLOG_LABEL        "LFBP"
816
#endif
817
 
818
#define FUNCTION_PROFILER(FILE, LABEL) \
819
  (*targetm.asm_out.internal_label) (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL)
820
 
821
#define PROFILE_HOOK(label_no) hppa_profile_hook (label_no)
822
void hppa_profile_hook (int label_no);
823
 
824
/* The profile counter if emitted must come before the prologue.  */
825
#define PROFILE_BEFORE_PROLOGUE 1
826
 
827
/* We never want final.c to emit profile counters.  When profile
828
   counters are required, we have to defer emitting them to the end
829
   of the current file.  */
830
#define NO_PROFILE_COUNTERS 1
831
 
832
/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
833
   the stack pointer does not matter.  The value is tested only in
834
   functions that have frame pointers.
835
   No definition is equivalent to always zero.  */
836
 
837
extern int may_call_alloca;
838
 
839
#define EXIT_IGNORE_STACK       \
840
 (get_frame_size () != 0 \
841
  || current_function_calls_alloca || current_function_outgoing_args_size)
842
 
843
/* Output assembler code for a block containing the constant parts
844
   of a trampoline, leaving space for the variable parts.\
845
 
846
   The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
847
   and then branches to the specified routine.
848
 
849
   This code template is copied from text segment to stack location
850
   and then patched with INITIALIZE_TRAMPOLINE to contain
851
   valid values, and then entered as a subroutine.
852
 
853
   It is best to keep this as small as possible to avoid having to
854
   flush multiple lines in the cache.  */
855
 
856
#define TRAMPOLINE_TEMPLATE(FILE)                                       \
857
  {                                                                     \
858
    if (!TARGET_64BIT)                                                  \
859
      {                                                                 \
860
        fputs ("\tldw   36(%r22),%r21\n", FILE);                        \
861
        fputs ("\tbb,>=,n       %r21,30,.+16\n", FILE);                 \
862
        if (ASSEMBLER_DIALECT == 0)                                      \
863
          fputs ("\tdepi        0,31,2,%r21\n", FILE);                  \
864
        else                                                            \
865
          fputs ("\tdepwi       0,31,2,%r21\n", FILE);                  \
866
        fputs ("\tldw   4(%r21),%r19\n", FILE);                         \
867
        fputs ("\tldw   0(%r21),%r21\n", FILE);                         \
868
        if (TARGET_PA_20)                                               \
869
          {                                                             \
870
            fputs ("\tbve       (%r21)\n", FILE);                       \
871
            fputs ("\tldw       40(%r22),%r29\n", FILE);                \
872
            fputs ("\t.word     0\n", FILE);                             \
873
            fputs ("\t.word     0\n", FILE);                             \
874
          }                                                             \
875
        else                                                            \
876
          {                                                             \
877
            fputs ("\tldsid     (%r21),%r1\n", FILE);                   \
878
            fputs ("\tmtsp      %r1,%sr0\n", FILE);                     \
879
            fputs ("\tbe        0(%sr0,%r21)\n", FILE);                 \
880
            fputs ("\tldw       40(%r22),%r29\n", FILE);                \
881
          }                                                             \
882
        fputs ("\t.word 0\n", FILE);                                     \
883
        fputs ("\t.word 0\n", FILE);                                     \
884
        fputs ("\t.word 0\n", FILE);                                     \
885
        fputs ("\t.word 0\n", FILE);                                     \
886
      }                                                                 \
887
    else                                                                \
888
      {                                                                 \
889
        fputs ("\t.dword 0\n", FILE);                                   \
890
        fputs ("\t.dword 0\n", FILE);                                   \
891
        fputs ("\t.dword 0\n", FILE);                                   \
892
        fputs ("\t.dword 0\n", FILE);                                   \
893
        fputs ("\tmfia  %r31\n", FILE);                                 \
894
        fputs ("\tldd   24(%r31),%r1\n", FILE);                         \
895
        fputs ("\tldd   24(%r1),%r27\n", FILE);                         \
896
        fputs ("\tldd   16(%r1),%r1\n", FILE);                          \
897
        fputs ("\tbve   (%r1)\n", FILE);                                \
898
        fputs ("\tldd   32(%r31),%r31\n", FILE);                        \
899
        fputs ("\t.dword 0  ; fptr\n", FILE);                           \
900
        fputs ("\t.dword 0  ; static link\n", FILE);                    \
901
      }                                                                 \
902
  }
903
 
904
/* Length in units of the trampoline for entering a nested function.  */
905
 
906
#define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52)
907
 
908
/* Length in units of the trampoline instruction code.  */
909
 
910
#define TRAMPOLINE_CODE_SIZE (TARGET_64BIT ? 24 : (TARGET_PA_20 ? 32 : 40))
911
 
912
/* Minimum length of a cache line.  A length of 16 will work on all
913
   PA-RISC processors.  All PA 1.1 processors have a cache line of
914
   32 bytes.  Most but not all PA 2.0 processors have a cache line
915
   of 64 bytes.  As cache flushes are expensive and we don't support
916
   PA 1.0, we use a minimum length of 32.  */
917
 
918
#define MIN_CACHELINE_SIZE 32
919
 
920
/* Emit RTL insns to initialize the variable parts of a trampoline.
921
   FNADDR is an RTX for the address of the function's pure code.
922
   CXT is an RTX for the static chain value for the function.
923
 
924
   Move the function address to the trampoline template at offset 36.
925
   Move the static chain value to trampoline template at offset 40.
926
   Move the trampoline address to trampoline template at offset 44.
927
   Move r19 to trampoline template at offset 48.  The latter two
928
   words create a plabel for the indirect call to the trampoline.
929
 
930
   A similar sequence is used for the 64-bit port but the plabel is
931
   at the beginning of the trampoline.
932
 
933
   Finally, the cache entries for the trampoline code are flushed.
934
   This is necessary to ensure that the trampoline instruction sequence
935
   is written to memory prior to any attempts at prefetching the code
936
   sequence.  */
937
 
938
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)                       \
939
{                                                                       \
940
  rtx start_addr = gen_reg_rtx (Pmode);                                 \
941
  rtx end_addr = gen_reg_rtx (Pmode);                                   \
942
  rtx line_length = gen_reg_rtx (Pmode);                                \
943
  rtx tmp;                                                              \
944
                                                                        \
945
  if (!TARGET_64BIT)                                                    \
946
    {                                                                   \
947
      tmp = memory_address (Pmode, plus_constant ((TRAMP), 36));        \
948
      emit_move_insn (gen_rtx_MEM (Pmode, tmp), (FNADDR));              \
949
      tmp = memory_address (Pmode, plus_constant ((TRAMP), 40));        \
950
      emit_move_insn (gen_rtx_MEM (Pmode, tmp), (CXT));                 \
951
                                                                        \
952
      /* Create a fat pointer for the trampoline.  */                   \
953
      tmp = memory_address (Pmode, plus_constant ((TRAMP), 44));        \
954
      emit_move_insn (gen_rtx_MEM (Pmode, tmp), (TRAMP));               \
955
      tmp = memory_address (Pmode, plus_constant ((TRAMP), 48));        \
956
      emit_move_insn (gen_rtx_MEM (Pmode, tmp),                         \
957
                      gen_rtx_REG (Pmode, 19));                         \
958
                                                                        \
959
      /* fdc and fic only use registers for the address to flush,       \
960
         they do not accept integer displacements.  We align the        \
961
         start and end addresses to the beginning of their respective   \
962
         cache lines to minimize the number of lines flushed.  */       \
963
      tmp = force_reg (Pmode, (TRAMP));                                 \
964
      emit_insn (gen_andsi3 (start_addr, tmp,                           \
965
                             GEN_INT (-MIN_CACHELINE_SIZE)));           \
966
      tmp = force_reg (Pmode,                                           \
967
                       plus_constant (tmp, TRAMPOLINE_CODE_SIZE - 1));  \
968
      emit_insn (gen_andsi3 (end_addr, tmp,                             \
969
                             GEN_INT (-MIN_CACHELINE_SIZE)));           \
970
      emit_move_insn (line_length, GEN_INT (MIN_CACHELINE_SIZE));       \
971
      emit_insn (gen_dcacheflush (start_addr, end_addr, line_length));  \
972
      emit_insn (gen_icacheflush (start_addr, end_addr, line_length,    \
973
                                  gen_reg_rtx (Pmode),                  \
974
                                  gen_reg_rtx (Pmode)));                \
975
    }                                                                   \
976
  else                                                                  \
977
    {                                                                   \
978
      tmp = memory_address (Pmode, plus_constant ((TRAMP), 56));        \
979
      emit_move_insn (gen_rtx_MEM (Pmode, tmp), (FNADDR));              \
980
      tmp = memory_address (Pmode, plus_constant ((TRAMP), 64));        \
981
      emit_move_insn (gen_rtx_MEM (Pmode, tmp), (CXT));                 \
982
                                                                        \
983
      /* Create a fat pointer for the trampoline.  */                   \
984
      tmp = memory_address (Pmode, plus_constant ((TRAMP), 16));        \
985
      emit_move_insn (gen_rtx_MEM (Pmode, tmp),                         \
986
                      force_reg (Pmode, plus_constant ((TRAMP), 32)));  \
987
      tmp = memory_address (Pmode, plus_constant ((TRAMP), 24));        \
988
      emit_move_insn (gen_rtx_MEM (Pmode, tmp),                         \
989
                      gen_rtx_REG (Pmode, 27));                         \
990
                                                                        \
991
      /* fdc and fic only use registers for the address to flush,       \
992
         they do not accept integer displacements.  We align the        \
993
         start and end addresses to the beginning of their respective   \
994
         cache lines to minimize the number of lines flushed.  */       \
995
      tmp = force_reg (Pmode, plus_constant ((TRAMP), 32));             \
996
      emit_insn (gen_anddi3 (start_addr, tmp,                           \
997
                             GEN_INT (-MIN_CACHELINE_SIZE)));           \
998
      tmp = force_reg (Pmode,                                           \
999
                       plus_constant (tmp, TRAMPOLINE_CODE_SIZE - 1));  \
1000
      emit_insn (gen_anddi3 (end_addr, tmp,                             \
1001
                             GEN_INT (-MIN_CACHELINE_SIZE)));           \
1002
      emit_move_insn (line_length, GEN_INT (MIN_CACHELINE_SIZE));       \
1003
      emit_insn (gen_dcacheflush (start_addr, end_addr, line_length));  \
1004
      emit_insn (gen_icacheflush (start_addr, end_addr, line_length,    \
1005
                                  gen_reg_rtx (Pmode),                  \
1006
                                  gen_reg_rtx (Pmode)));                \
1007
    }                                                                   \
1008
}
1009
 
1010
/* Perform any machine-specific adjustment in the address of the trampoline.
1011
   ADDR contains the address that was passed to INITIALIZE_TRAMPOLINE.
1012
   Adjust the trampoline address to point to the plabel at offset 44.  */
1013
 
1014
#define TRAMPOLINE_ADJUST_ADDRESS(ADDR) \
1015
  if (!TARGET_64BIT) (ADDR) = memory_address (Pmode, plus_constant ((ADDR), 46))
1016
 
1017
/* Implement `va_start' for varargs and stdarg.  */
1018
 
1019
#define EXPAND_BUILTIN_VA_START(valist, nextarg) \
1020
  hppa_va_start (valist, nextarg)
1021
 
1022
/* Addressing modes, and classification of registers for them.
1023
 
1024
   Using autoincrement addressing modes on PA8000 class machines is
1025
   not profitable.  */
1026
 
1027
#define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000)
1028
#define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000)
1029
 
1030
#define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000)
1031
#define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000)
1032
 
1033
/* Macros to check register numbers against specific register classes.  */
1034
 
1035
/* The following macros assume that X is a hard or pseudo reg number.
1036
   They give nonzero only if X is a hard reg of the suitable class
1037
   or a pseudo reg currently allocated to a suitable hard reg.
1038
   Since they use reg_renumber, they are safe only once reg_renumber
1039
   has been allocated, which happens in local-alloc.c.  */
1040
 
1041
#define REGNO_OK_FOR_INDEX_P(X) \
1042
  ((X) && ((X) < 32                                                     \
1043
   || (X >= FIRST_PSEUDO_REGISTER                                       \
1044
       && reg_renumber                                                  \
1045
       && (unsigned) reg_renumber[X] < 32)))
1046
#define REGNO_OK_FOR_BASE_P(X) \
1047
  ((X) && ((X) < 32                                                     \
1048
   || (X >= FIRST_PSEUDO_REGISTER                                       \
1049
       && reg_renumber                                                  \
1050
       && (unsigned) reg_renumber[X] < 32)))
1051
#define REGNO_OK_FOR_FP_P(X) \
1052
  (FP_REGNO_P (X)                                                       \
1053
   || (X >= FIRST_PSEUDO_REGISTER                                       \
1054
       && reg_renumber                                                  \
1055
       && FP_REGNO_P (reg_renumber[X])))
1056
 
1057
/* Now macros that check whether X is a register and also,
1058
   strictly, whether it is in a specified class.
1059
 
1060
   These macros are specific to the HP-PA, and may be used only
1061
   in code for printing assembler insns and in conditions for
1062
   define_optimization.  */
1063
 
1064
/* 1 if X is an fp register.  */
1065
 
1066
#define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1067
 
1068
/* Maximum number of registers that can appear in a valid memory address.  */
1069
 
1070
#define MAX_REGS_PER_ADDRESS 2
1071
 
1072
/* Non-TLS symbolic references.  */
1073
#define PA_SYMBOL_REF_TLS_P(RTX) \
1074
  (GET_CODE (RTX) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (RTX) != 0)
1075
 
1076
/* Recognize any constant value that is a valid address except
1077
   for symbolic addresses.  We get better CSE by rejecting them
1078
   here and allowing hppa_legitimize_address to break them up.  We
1079
   use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE.  */
1080
 
1081
#define CONSTANT_ADDRESS_P(X) \
1082
  ((GET_CODE (X) == LABEL_REF                                           \
1083
   || (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (X))         \
1084
   || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST                \
1085
   || GET_CODE (X) == HIGH)                                             \
1086
   && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1087
 
1088
/* A C expression that is nonzero if we are using the new HP assembler.  */
1089
 
1090
#ifndef NEW_HP_ASSEMBLER
1091
#define NEW_HP_ASSEMBLER 0
1092
#endif
1093
 
1094
/* The macros below define the immediate range for CONST_INTS on
1095
   the 64-bit port.  Constants in this range can be loaded in three
1096
   instructions using a ldil/ldo/depdi sequence.  Constants outside
1097
   this range are forced to the constant pool prior to reload.  */
1098
 
1099
#define MAX_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) 32 << 31)
1100
#define MIN_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) -32 << 31)
1101
#define LEGITIMATE_64BIT_CONST_INT_P(X) \
1102
  ((X) >= MIN_LEGIT_64BIT_CONST_INT && (X) < MAX_LEGIT_64BIT_CONST_INT)
1103
 
1104
/* A C expression that is nonzero if X is a legitimate constant for an
1105
   immediate operand.
1106
 
1107
   We include all constant integers and constant doubles, but not
1108
   floating-point, except for floating-point zero.  We reject LABEL_REFs
1109
   if we're not using gas or the new HP assembler.
1110
 
1111
   In 64-bit mode, we reject CONST_DOUBLES.  We also reject CONST_INTS
1112
   that need more than three instructions to load prior to reload.  This
1113
   limit is somewhat arbitrary.  It takes three instructions to load a
1114
   CONST_INT from memory but two are memory accesses.  It may be better
1115
   to increase the allowed range for CONST_INTS.  We may also be able
1116
   to handle CONST_DOUBLES.  */
1117
 
1118
#define LEGITIMATE_CONSTANT_P(X)                                \
1119
  ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT                 \
1120
    || (X) == CONST0_RTX (GET_MODE (X)))                        \
1121
   && (NEW_HP_ASSEMBLER || TARGET_GAS || GET_CODE (X) != LABEL_REF)     \
1122
   && !(TARGET_64BIT && GET_CODE (X) == CONST_DOUBLE)           \
1123
   && !(TARGET_64BIT && GET_CODE (X) == CONST_INT               \
1124
        && !(HOST_BITS_PER_WIDE_INT <= 32                       \
1125
             || (reload_in_progress || reload_completed)        \
1126
             || LEGITIMATE_64BIT_CONST_INT_P (INTVAL (X))       \
1127
             || cint_ok_for_move (INTVAL (X))))                 \
1128
   && !function_label_operand (X, VOIDmode))
1129
 
1130
/* Target flags set on a symbol_ref.  */
1131
 
1132
/* Set by ASM_OUTPUT_SYMBOL_REF when a symbol_ref is output.  */
1133
#define SYMBOL_FLAG_REFERENCED (1 << SYMBOL_FLAG_MACH_DEP_SHIFT)
1134
#define SYMBOL_REF_REFERENCED_P(RTX) \
1135
  ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_REFERENCED) != 0)
1136
 
1137
/* Subroutines for EXTRA_CONSTRAINT.
1138
 
1139
   Return 1 iff OP is a pseudo which did not get a hard register and
1140
   we are running the reload pass.  */
1141
#define IS_RELOADING_PSEUDO_P(OP) \
1142
  ((reload_in_progress                                  \
1143
    && GET_CODE (OP) == REG                             \
1144
    && REGNO (OP) >= FIRST_PSEUDO_REGISTER              \
1145
    && reg_renumber [REGNO (OP)] < 0))
1146
 
1147
/* Return 1 iff OP is a scaled or unscaled index address.  */
1148
#define IS_INDEX_ADDR_P(OP) \
1149
  (GET_CODE (OP) == PLUS                                \
1150
   && GET_MODE (OP) == Pmode                            \
1151
   && (GET_CODE (XEXP (OP, 0)) == MULT                   \
1152
       || GET_CODE (XEXP (OP, 1)) == MULT               \
1153
       || (REG_P (XEXP (OP, 0))                          \
1154
           && REG_P (XEXP (OP, 1)))))
1155
 
1156
/* Return 1 iff OP is a LO_SUM DLT address.  */
1157
#define IS_LO_SUM_DLT_ADDR_P(OP) \
1158
  (GET_CODE (OP) == LO_SUM                              \
1159
   && GET_MODE (OP) == Pmode                            \
1160
   && REG_P (XEXP (OP, 0))                               \
1161
   && REG_OK_FOR_BASE_P (XEXP (OP, 0))                   \
1162
   && GET_CODE (XEXP (OP, 1)) == UNSPEC)
1163
 
1164
/* Optional extra constraints for this machine. Borrowed from sparc.h.
1165
 
1166
   `A' is a LO_SUM DLT memory operand.
1167
 
1168
   `Q' is any memory operand that isn't a symbolic, indexed or lo_sum
1169
       memory operand.  Note that an unassigned pseudo register is such a
1170
       memory operand.  Needed because reload will generate these things
1171
       and then not re-recognize the insn, causing constrain_operands to
1172
       fail.
1173
 
1174
   `R' is a scaled/unscaled indexed memory operand.
1175
 
1176
   `S' is the constant 31.
1177
 
1178
   `T' is for floating-point loads and stores.
1179
 
1180
   `U' is the constant 63.
1181
 
1182
   `W' is a register indirect memory operand.  We could allow short
1183
       displacements but GO_IF_LEGITIMATE_ADDRESS can't tell when a
1184
       long displacement is valid.  This is only used for prefetch
1185
       instructions with the `sl' completer.  */
1186
 
1187
#define EXTRA_CONSTRAINT(OP, C) \
1188
  ((C) == 'Q' ?                                                         \
1189
   (IS_RELOADING_PSEUDO_P (OP)                                          \
1190
    || (GET_CODE (OP) == MEM                                            \
1191
        && (reload_in_progress                                          \
1192
            || memory_address_p (GET_MODE (OP), XEXP (OP, 0)))           \
1193
        && !symbolic_memory_operand (OP, VOIDmode)                      \
1194
        && !IS_LO_SUM_DLT_ADDR_P (XEXP (OP, 0))                          \
1195
        && !IS_INDEX_ADDR_P (XEXP (OP, 0))))                             \
1196
   : ((C) == 'W' ?                                                      \
1197
      (GET_CODE (OP) == MEM                                             \
1198
       && REG_P (XEXP (OP, 0))                                           \
1199
       && REG_OK_FOR_BASE_P (XEXP (OP, 0)))                              \
1200
   : ((C) == 'A' ?                                                      \
1201
      (GET_CODE (OP) == MEM                                             \
1202
       && IS_LO_SUM_DLT_ADDR_P (XEXP (OP, 0)))                           \
1203
   : ((C) == 'R' ?                                                      \
1204
      (GET_CODE (OP) == MEM                                             \
1205
       && IS_INDEX_ADDR_P (XEXP (OP, 0)))                                \
1206
   : ((C) == 'T' ?                                                      \
1207
      (GET_CODE (OP) == MEM                                             \
1208
       && !IS_LO_SUM_DLT_ADDR_P (XEXP (OP, 0))                           \
1209
       && !IS_INDEX_ADDR_P (XEXP (OP, 0))                                \
1210
       /* Floating-point loads and stores are used to load              \
1211
          integer values as well as floating-point values.              \
1212
          They don't have the same set of REG+D address modes           \
1213
          as integer loads and stores.  PA 1.x supports only            \
1214
          short displacements.  PA 2.0 supports long displacements      \
1215
          but the base register needs to be aligned.                    \
1216
                                                                        \
1217
          The checks in GO_IF_LEGITIMATE_ADDRESS for SFmode and         \
1218
          DFmode test the validity of an address for use in a           \
1219
          floating point load or store.  So, we use SFmode/DFmode       \
1220
          to see if the address is valid for a floating-point           \
1221
          load/store operation.  */                                     \
1222
       && memory_address_p ((GET_MODE_SIZE (GET_MODE (OP)) == 4         \
1223
                             ? SFmode                                   \
1224
                             : DFmode),                                 \
1225
                            XEXP (OP, 0)))                               \
1226
   : ((C) == 'S' ?                                                      \
1227
      (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 31)                 \
1228
   : ((C) == 'U' ?                                                      \
1229
      (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 63) : 0)))))))
1230
 
1231
 
1232
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1233
   and check its validity for a certain class.
1234
   We have two alternate definitions for each of them.
1235
   The usual definition accepts all pseudo regs; the other rejects
1236
   them unless they have been allocated suitable hard regs.
1237
   The symbol REG_OK_STRICT causes the latter definition to be used.
1238
 
1239
   Most source files want to accept pseudo regs in the hope that
1240
   they will get allocated to the class that the insn wants them to be in.
1241
   Source files for reload pass need to be strict.
1242
   After reload, it makes no difference, since pseudo regs have
1243
   been eliminated by then.  */
1244
 
1245
#ifndef REG_OK_STRICT
1246
 
1247
/* Nonzero if X is a hard reg that can be used as an index
1248
   or if it is a pseudo reg.  */
1249
#define REG_OK_FOR_INDEX_P(X) \
1250
(REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1251
/* Nonzero if X is a hard reg that can be used as a base reg
1252
   or if it is a pseudo reg.  */
1253
#define REG_OK_FOR_BASE_P(X) \
1254
(REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1255
 
1256
#else
1257
 
1258
/* Nonzero if X is a hard reg that can be used as an index.  */
1259
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1260
/* Nonzero if X is a hard reg that can be used as a base reg.  */
1261
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1262
 
1263
#endif
1264
 
1265
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
1266
   valid memory address for an instruction.  The MODE argument is the
1267
   machine mode for the MEM expression that wants to use this address.
1268
 
1269
   On HP PA-RISC, the legitimate address forms are REG+SMALLINT,
1270
   REG+REG, and REG+(REG*SCALE).  The indexed address forms are only
1271
   available with floating point loads and stores, and integer loads.
1272
   We get better code by allowing indexed addresses in the initial
1273
   RTL generation.
1274
 
1275
   The acceptance of indexed addresses as legitimate implies that we
1276
   must provide patterns for doing indexed integer stores, or the move
1277
   expanders must force the address of an indexed store to a register.
1278
   We have adopted the latter approach.
1279
 
1280
   Another function of GO_IF_LEGITIMATE_ADDRESS is to ensure that
1281
   the base register is a valid pointer for indexed instructions.
1282
   On targets that have non-equivalent space registers, we have to
1283
   know at the time of assembler output which register in a REG+REG
1284
   pair is the base register.  The REG_POINTER flag is sometimes lost
1285
   in reload and the following passes, so it can't be relied on during
1286
   code generation.  Thus, we either have to canonicalize the order
1287
   of the registers in REG+REG indexed addresses, or treat REG+REG
1288
   addresses separately and provide patterns for both permutations.
1289
 
1290
   The latter approach requires several hundred additional lines of
1291
   code in pa.md.  The downside to canonicalizing is that a PLUS
1292
   in the wrong order can't combine to form to make a scaled indexed
1293
   memory operand.  As we won't need to canonicalize the operands if
1294
   the REG_POINTER lossage can be fixed, it seems better canonicalize.
1295
 
1296
   We initially break out scaled indexed addresses in canonical order
1297
   in emit_move_sequence.  LEGITIMIZE_ADDRESS also canonicalizes
1298
   scaled indexed addresses during RTL generation.  However, fold_rtx
1299
   has its own opinion on how the operands of a PLUS should be ordered.
1300
   If one of the operands is equivalent to a constant, it will make
1301
   that operand the second operand.  As the base register is likely to
1302
   be equivalent to a SYMBOL_REF, we have made it the second operand.
1303
 
1304
   GO_IF_LEGITIMATE_ADDRESS accepts REG+REG as legitimate when the
1305
   operands are in the order INDEX+BASE on targets with non-equivalent
1306
   space registers, and in any order on targets with equivalent space
1307
   registers.  It accepts both MULT+BASE and BASE+MULT for scaled indexing.
1308
 
1309
   We treat a SYMBOL_REF as legitimate if it is part of the current
1310
   function's constant-pool, because such addresses can actually be
1311
   output as REG+SMALLINT.
1312
 
1313
   Note we only allow 5 bit immediates for access to a constant address;
1314
   doing so avoids losing for loading/storing a FP register at an address
1315
   which will not fit in 5 bits.  */
1316
 
1317
#define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20)
1318
#define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1319
 
1320
#define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20)
1321
#define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1322
 
1323
#define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800)
1324
#define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1325
 
1326
#define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000)
1327
#define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1328
 
1329
#if HOST_BITS_PER_WIDE_INT > 32
1330
#define VAL_32_BITS_P(X) \
1331
  ((unsigned HOST_WIDE_INT)(X) + ((unsigned HOST_WIDE_INT) 1 << 31)    \
1332
   < (unsigned HOST_WIDE_INT) 2 << 31)
1333
#else
1334
#define VAL_32_BITS_P(X) 1
1335
#endif
1336
#define INT_32_BITS(X) VAL_32_BITS_P (INTVAL (X))
1337
 
1338
/* These are the modes that we allow for scaled indexing.  */
1339
#define MODE_OK_FOR_SCALED_INDEXING_P(MODE) \
1340
  ((TARGET_64BIT && (MODE) == DImode)                                   \
1341
   || (MODE) == SImode                                                  \
1342
   || (MODE) == HImode                                                  \
1343
   || (!TARGET_SOFT_FLOAT && ((MODE) == DFmode || (MODE) == SFmode)))
1344
 
1345
/* These are the modes that we allow for unscaled indexing.  */
1346
#define MODE_OK_FOR_UNSCALED_INDEXING_P(MODE) \
1347
  ((TARGET_64BIT && (MODE) == DImode)                                   \
1348
   || (MODE) == SImode                                                  \
1349
   || (MODE) == HImode                                                  \
1350
   || (MODE) == QImode                                                  \
1351
   || (!TARGET_SOFT_FLOAT && ((MODE) == DFmode || (MODE) == SFmode)))
1352
 
1353
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1354
{                                                                       \
1355
  if ((REG_P (X) && REG_OK_FOR_BASE_P (X))                              \
1356
      || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC          \
1357
           || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC)      \
1358
          && REG_P (XEXP (X, 0))                                 \
1359
          && REG_OK_FOR_BASE_P (XEXP (X, 0))))                           \
1360
    goto ADDR;                                                          \
1361
  else if (GET_CODE (X) == PLUS)                                        \
1362
    {                                                                   \
1363
      rtx base = 0, index = 0;                                            \
1364
      if (REG_P (XEXP (X, 1))                                           \
1365
          && REG_OK_FOR_BASE_P (XEXP (X, 1)))                           \
1366
        base = XEXP (X, 1), index = XEXP (X, 0);                 \
1367
      else if (REG_P (XEXP (X, 0))                                       \
1368
               && REG_OK_FOR_BASE_P (XEXP (X, 0)))                       \
1369
        base = XEXP (X, 0), index = XEXP (X, 1);                 \
1370
      if (base                                                          \
1371
          && GET_CODE (index) == CONST_INT                              \
1372
          && ((INT_14_BITS (index)                                      \
1373
               && (((MODE) != DImode                                    \
1374
                    && (MODE) != SFmode                                 \
1375
                    && (MODE) != DFmode)                                \
1376
                   /* The base register for DImode loads and stores     \
1377
                      with long displacements must be aligned because   \
1378
                      the lower three bits in the displacement are      \
1379
                      assumed to be zero.  */                           \
1380
                   || ((MODE) == DImode                                 \
1381
                       && (!TARGET_64BIT                                \
1382
                           || (INTVAL (index) % 8) == 0))                \
1383
                   /* Similarly, the base register for SFmode/DFmode    \
1384
                      loads and stores with long displacements must     \
1385
                      be aligned.                                       \
1386
                                                                        \
1387
                      FIXME: the ELF32 linker clobbers the LSB of       \
1388
                      the FP register number in PA 2.0 floating-point   \
1389
                      insns with long displacements.  This is because   \
1390
                      R_PARISC_DPREL14WR and other relocations like     \
1391
                      it are not supported.  For now, we reject long    \
1392
                      displacements on this target.  */                 \
1393
                   || (((MODE) == SFmode || (MODE) == DFmode)           \
1394
                       && (TARGET_SOFT_FLOAT                            \
1395
                           || (TARGET_PA_20                             \
1396
                               && !TARGET_ELF32                         \
1397
                               && (INTVAL (index)                       \
1398
                                   % GET_MODE_SIZE (MODE)) == 0)))))     \
1399
               || INT_5_BITS (index)))                                  \
1400
        goto ADDR;                                                      \
1401
      if (!TARGET_DISABLE_INDEXING                                      \
1402
          /* Only accept the "canonical" INDEX+BASE operand order       \
1403
             on targets with non-equivalent space registers.  */        \
1404
          && (TARGET_NO_SPACE_REGS                                      \
1405
              ? (base && REG_P (index))                                 \
1406
              : (base == XEXP (X, 1) && REG_P (index)                   \
1407
                 && (reload_completed                                   \
1408
                     || (reload_in_progress && HARD_REGISTER_P (base))  \
1409
                     || REG_POINTER (base))                             \
1410
                 && (reload_completed                                   \
1411
                     || (reload_in_progress && HARD_REGISTER_P (index)) \
1412
                     || !REG_POINTER (index))))                         \
1413
          && MODE_OK_FOR_UNSCALED_INDEXING_P (MODE)                     \
1414
          && REG_OK_FOR_INDEX_P (index)                                 \
1415
          && borx_reg_operand (base, Pmode)                             \
1416
          && borx_reg_operand (index, Pmode))                           \
1417
        goto ADDR;                                                      \
1418
      if (!TARGET_DISABLE_INDEXING                                      \
1419
          && base                                                       \
1420
          && GET_CODE (index) == MULT                                   \
1421
          && MODE_OK_FOR_SCALED_INDEXING_P (MODE)                       \
1422
          && REG_P (XEXP (index, 0))                                     \
1423
          && GET_MODE (XEXP (index, 0)) == Pmode                 \
1424
          && REG_OK_FOR_INDEX_P (XEXP (index, 0))                        \
1425
          && GET_CODE (XEXP (index, 1)) == CONST_INT                    \
1426
          && INTVAL (XEXP (index, 1))                                   \
1427
             == (HOST_WIDE_INT) GET_MODE_SIZE (MODE)                    \
1428
          && borx_reg_operand (base, Pmode))                            \
1429
        goto ADDR;                                                      \
1430
    }                                                                   \
1431
  else if (GET_CODE (X) == LO_SUM                                       \
1432
           && GET_CODE (XEXP (X, 0)) == REG                              \
1433
           && REG_OK_FOR_BASE_P (XEXP (X, 0))                            \
1434
           && CONSTANT_P (XEXP (X, 1))                                  \
1435
           && (TARGET_SOFT_FLOAT                                        \
1436
               /* We can allow symbolic LO_SUM addresses for PA2.0.  */ \
1437
               || (TARGET_PA_20                                         \
1438
                   && !TARGET_ELF32                                     \
1439
                   && GET_CODE (XEXP (X, 1)) != CONST_INT)              \
1440
               || ((MODE) != SFmode                                     \
1441
                   && (MODE) != DFmode)))                               \
1442
    goto ADDR;                                                          \
1443
  else if (GET_CODE (X) == LO_SUM                                       \
1444
           && GET_CODE (XEXP (X, 0)) == SUBREG                           \
1445
           && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG         \
1446
           && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))               \
1447
           && CONSTANT_P (XEXP (X, 1))                                  \
1448
           && (TARGET_SOFT_FLOAT                                        \
1449
               /* We can allow symbolic LO_SUM addresses for PA2.0.  */ \
1450
               || (TARGET_PA_20                                         \
1451
                   && !TARGET_ELF32                                     \
1452
                   && GET_CODE (XEXP (X, 1)) != CONST_INT)              \
1453
               || ((MODE) != SFmode                                     \
1454
                   && (MODE) != DFmode)))                               \
1455
    goto ADDR;                                                          \
1456
  else if (GET_CODE (X) == LABEL_REF                                    \
1457
           || (GET_CODE (X) == CONST_INT                                \
1458
               && INT_5_BITS (X)))                                      \
1459
    goto ADDR;                                                          \
1460
  /* Needed for -fPIC */                                                \
1461
  else if (GET_CODE (X) == LO_SUM                                       \
1462
           && GET_CODE (XEXP (X, 0)) == REG                      \
1463
           && REG_OK_FOR_BASE_P (XEXP (X, 0))                            \
1464
           && GET_CODE (XEXP (X, 1)) == UNSPEC                          \
1465
           && (TARGET_SOFT_FLOAT                                        \
1466
               || (TARGET_PA_20 && !TARGET_ELF32)                       \
1467
               || ((MODE) != SFmode                                     \
1468
                   && (MODE) != DFmode)))                               \
1469
    goto ADDR;                                                          \
1470
}
1471
 
1472
/* Look for machine dependent ways to make the invalid address AD a
1473
   valid address.
1474
 
1475
   For the PA, transform:
1476
 
1477
        memory(X + <large int>)
1478
 
1479
   into:
1480
 
1481
        if (<large int> & mask) >= 16
1482
          Y = (<large int> & ~mask) + mask + 1  Round up.
1483
        else
1484
          Y = (<large int> & ~mask)             Round down.
1485
        Z = X + Y
1486
        memory (Z + (<large int> - Y));
1487
 
1488
   This makes reload inheritance and reload_cse work better since Z
1489
   can be reused.
1490
 
1491
   There may be more opportunities to improve code with this hook.  */
1492
#define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN)      \
1493
do {                                                                    \
1494
  long offset, newoffset, mask;                                         \
1495
  rtx new, temp = NULL_RTX;                                             \
1496
                                                                        \
1497
  mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT                           \
1498
          ? (TARGET_PA_20 && !TARGET_ELF32 ? 0x3fff : 0x1f) : 0x3fff);  \
1499
                                                                        \
1500
  if (optimize && GET_CODE (AD) == PLUS)                                \
1501
    temp = simplify_binary_operation (PLUS, Pmode,                      \
1502
                                      XEXP (AD, 0), XEXP (AD, 1));       \
1503
                                                                        \
1504
  new = temp ? temp : AD;                                               \
1505
                                                                        \
1506
  if (optimize                                                          \
1507
      && GET_CODE (new) == PLUS                                         \
1508
      && GET_CODE (XEXP (new, 0)) == REG                         \
1509
      && GET_CODE (XEXP (new, 1)) == CONST_INT)                         \
1510
    {                                                                   \
1511
      offset = INTVAL (XEXP ((new), 1));                                \
1512
                                                                        \
1513
      /* Choose rounding direction.  Round up if we are >= halfway.  */ \
1514
      if ((offset & mask) >= ((mask + 1) / 2))                          \
1515
        newoffset = (offset & ~mask) + mask + 1;                        \
1516
      else                                                              \
1517
        newoffset = offset & ~mask;                                     \
1518
                                                                        \
1519
      /* Ensure that long displacements are aligned.  */                \
1520
      if (!VAL_5_BITS_P (newoffset)                                     \
1521
          && GET_MODE_CLASS (MODE) == MODE_FLOAT)                       \
1522
        newoffset &= ~(GET_MODE_SIZE (MODE) -1);                        \
1523
                                                                        \
1524
      if (newoffset != 0 && VAL_14_BITS_P (newoffset))                   \
1525
        {                                                               \
1526
          temp = gen_rtx_PLUS (Pmode, XEXP (new, 0),                     \
1527
                               GEN_INT (newoffset));                    \
1528
          AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\
1529
          push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0,           \
1530
                       BASE_REG_CLASS, Pmode, VOIDmode, 0, 0,             \
1531
                       (OPNUM), (TYPE));                                \
1532
          goto WIN;                                                     \
1533
        }                                                               \
1534
    }                                                                   \
1535
} while (0)
1536
 
1537
 
1538
 
1539
 
1540
/* Try machine-dependent ways of modifying an illegitimate address
1541
   to be legitimate.  If we find one, return the new, valid address.
1542
   This macro is used in only one place: `memory_address' in explow.c.
1543
 
1544
   OLDX is the address as it was before break_out_memory_refs was called.
1545
   In some cases it is useful to look at this to decide what needs to be done.
1546
 
1547
   MODE and WIN are passed so that this macro can use
1548
   GO_IF_LEGITIMATE_ADDRESS.
1549
 
1550
   It is always safe for this macro to do nothing.  It exists to recognize
1551
   opportunities to optimize the output.  */
1552
 
1553
#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)  \
1554
{ rtx orig_x = (X);                             \
1555
  (X) = hppa_legitimize_address (X, OLDX, MODE);        \
1556
  if ((X) != orig_x && memory_address_p (MODE, X)) \
1557
    goto WIN; }
1558
 
1559
/* Go to LABEL if ADDR (a legitimate address expression)
1560
   has an effect that depends on the machine mode it is used for.  */
1561
 
1562
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)        \
1563
  if (GET_CODE (ADDR) == PRE_DEC        \
1564
      || GET_CODE (ADDR) == POST_DEC    \
1565
      || GET_CODE (ADDR) == PRE_INC     \
1566
      || GET_CODE (ADDR) == POST_INC)   \
1567
    goto LABEL
1568
 
1569
#define TARGET_ASM_SELECT_SECTION  pa_select_section
1570
 
1571
/* Return a nonzero value if DECL has a section attribute.  */
1572
#define IN_NAMED_SECTION_P(DECL) \
1573
  ((TREE_CODE (DECL) == FUNCTION_DECL || TREE_CODE (DECL) == VAR_DECL) \
1574
   && DECL_SECTION_NAME (DECL) != NULL_TREE)
1575
 
1576
/* Define this macro if references to a symbol must be treated
1577
   differently depending on something about the variable or
1578
   function named by the symbol (such as what section it is in).
1579
 
1580
   The macro definition, if any, is executed immediately after the
1581
   rtl for DECL or other node is created.
1582
   The value of the rtl will be a `mem' whose address is a
1583
   `symbol_ref'.
1584
 
1585
   The usual thing for this macro to do is to a flag in the
1586
   `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1587
   name string in the `symbol_ref' (if one bit is not enough
1588
   information).
1589
 
1590
   On the HP-PA we use this to indicate if a symbol is in text or
1591
   data space.  Also, function labels need special treatment.  */
1592
 
1593
#define TEXT_SPACE_P(DECL)\
1594
  (TREE_CODE (DECL) == FUNCTION_DECL                                    \
1595
   || (TREE_CODE (DECL) == VAR_DECL                                     \
1596
       && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL)            \
1597
       && (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \
1598
       && !flag_pic)                                                    \
1599
   || CONSTANT_CLASS_P (DECL))
1600
 
1601
#define FUNCTION_NAME_P(NAME)  (*(NAME) == '@')
1602
 
1603
/* Specify the machine mode that this machine uses for the index in the
1604
   tablejump instruction.  For small tables, an element consists of a
1605
   ia-relative branch and its delay slot.  When -mbig-switch is specified,
1606
   we use a 32-bit absolute address for non-pic code, and a 32-bit offset
1607
   for both 32 and 64-bit pic code.  */
1608
#define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : DImode)
1609
 
1610
/* Jump tables must be 32-bit aligned, no matter the size of the element.  */
1611
#define ADDR_VEC_ALIGN(ADDR_VEC) 2
1612
 
1613
/* Define this as 1 if `char' should by default be signed; else as 0.  */
1614
#define DEFAULT_SIGNED_CHAR 1
1615
 
1616
/* Max number of bytes we can move from memory to memory
1617
   in one reasonably fast instruction.  */
1618
#define MOVE_MAX 8
1619
 
1620
/* Higher than the default as we prefer to use simple move insns
1621
   (better scheduling and delay slot filling) and because our
1622
   built-in block move is really a 2X unrolled loop.
1623
 
1624
   Believe it or not, this has to be big enough to allow for copying all
1625
   arguments passed in registers to avoid infinite recursion during argument
1626
   setup for a function call.  Why?  Consider how we copy the stack slots
1627
   reserved for parameters when they may be trashed by a call.  */
1628
#define MOVE_RATIO (TARGET_64BIT ? 8 : 4)
1629
 
1630
/* Define if operations between registers always perform the operation
1631
   on the full register even if a narrower mode is specified.  */
1632
#define WORD_REGISTER_OPERATIONS
1633
 
1634
/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1635
   will either zero-extend or sign-extend.  The value of this macro should
1636
   be the code that says which one of the two operations is implicitly
1637
   done, UNKNOWN if none.  */
1638
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1639
 
1640
/* Nonzero if access to memory by bytes is slow and undesirable.  */
1641
#define SLOW_BYTE_ACCESS 1
1642
 
1643
/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1644
   is done just by pretending it is already truncated.  */
1645
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1646
 
1647
/* Specify the machine mode that pointers have.
1648
   After generation of rtl, the compiler makes no further distinction
1649
   between pointers and any other objects of this machine mode.  */
1650
#define Pmode word_mode
1651
 
1652
/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1653
   return the mode to be used for the comparison.  For floating-point, CCFPmode
1654
   should be used.  CC_NOOVmode should be used when the first operand is a
1655
   PLUS, MINUS, or NEG.  CCmode should be used when no special processing is
1656
   needed.  */
1657
#define SELECT_CC_MODE(OP,X,Y) \
1658
  (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode)    \
1659
 
1660
/* A function address in a call instruction
1661
   is a byte address (for indexing purposes)
1662
   so give the MEM rtx a byte's mode.  */
1663
#define FUNCTION_MODE SImode
1664
 
1665
/* Define this if addresses of constant functions
1666
   shouldn't be put through pseudo regs where they can be cse'd.
1667
   Desirable on machines where ordinary constants are expensive
1668
   but a CALL with constant address is cheap.  */
1669
#define NO_FUNCTION_CSE
1670
 
1671
/* Define this to be nonzero if shift instructions ignore all but the low-order
1672
   few bits.  */
1673
#define SHIFT_COUNT_TRUNCATED 1
1674
 
1675
/* Compute extra cost of moving data between one register class
1676
   and another.
1677
 
1678
   Make moves from SAR so expensive they should never happen.  We used to
1679
   have 0xffff here, but that generates overflow in rare cases.
1680
 
1681
   Copies involving a FP register and a non-FP register are relatively
1682
   expensive because they must go through memory.
1683
 
1684
   Other copies are reasonably cheap.  */
1685
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1686
 (CLASS1 == SHIFT_REGS ? 0x100                                  \
1687
  : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16   \
1688
  : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16   \
1689
  : 2)
1690
 
1691
/* Adjust the cost of branches.  */
1692
#define BRANCH_COST (pa_cpu == PROCESSOR_8000 ? 2 : 1)
1693
 
1694
/* Handling the special cases is going to get too complicated for a macro,
1695
   just call `pa_adjust_insn_length' to do the real work.  */
1696
#define ADJUST_INSN_LENGTH(INSN, LENGTH)        \
1697
  LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1698
 
1699
/* Millicode insns are actually function calls with some special
1700
   constraints on arguments and register usage.
1701
 
1702
   Millicode calls always expect their arguments in the integer argument
1703
   registers, and always return their result in %r29 (ret1).  They
1704
   are expected to clobber their arguments, %r1, %r29, and the return
1705
   pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else.
1706
 
1707
   This macro tells reorg that the references to arguments and
1708
   millicode calls do not appear to happen until after the millicode call.
1709
   This allows reorg to put insns which set the argument registers into the
1710
   delay slot of the millicode call -- thus they act more like traditional
1711
   CALL_INSNs.
1712
 
1713
   Note we cannot consider side effects of the insn to be delayed because
1714
   the branch and link insn will clobber the return pointer.  If we happened
1715
   to use the return pointer in the delay slot of the call, then we lose.
1716
 
1717
   get_attr_type will try to recognize the given insn, so make sure to
1718
   filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1719
   in particular.  */
1720
#define INSN_REFERENCES_ARE_DELAYED(X) (insn_refs_are_delayed (X))
1721
 
1722
 
1723
/* Control the assembler format that we output.  */
1724
 
1725
/* A C string constant describing how to begin a comment in the target
1726
   assembler language.  The compiler assumes that the comment will end at
1727
   the end of the line.  */
1728
 
1729
#define ASM_COMMENT_START ";"
1730
 
1731
/* Output to assembler file text saying following lines
1732
   may contain character constants, extra white space, comments, etc.  */
1733
 
1734
#define ASM_APP_ON ""
1735
 
1736
/* Output to assembler file text saying following lines
1737
   no longer contain unusual constructs.  */
1738
 
1739
#define ASM_APP_OFF ""
1740
 
1741
/* This is how to output the definition of a user-level label named NAME,
1742
   such as the label on a static function or variable NAME.  */
1743
 
1744
#define ASM_OUTPUT_LABEL(FILE,NAME) \
1745
  do {                                                  \
1746
    assemble_name ((FILE), (NAME));                     \
1747
    if (TARGET_GAS)                                     \
1748
      fputs (":\n", (FILE));                            \
1749
    else                                                \
1750
      fputc ('\n', (FILE));                             \
1751
  } while (0)
1752
 
1753
/* This is how to output a reference to a user-level label named NAME.
1754
   `assemble_name' uses this.  */
1755
 
1756
#define ASM_OUTPUT_LABELREF(FILE,NAME)  \
1757
  do {                                  \
1758
    const char *xname = (NAME);         \
1759
    if (FUNCTION_NAME_P (NAME))         \
1760
      xname += 1;                       \
1761
    if (xname[0] == '*')         \
1762
      xname += 1;                       \
1763
    else                                \
1764
      fputs (user_label_prefix, FILE);  \
1765
    fputs (xname, FILE);                \
1766
  } while (0)
1767
 
1768
/* This how we output the symbol_ref X.  */
1769
 
1770
#define ASM_OUTPUT_SYMBOL_REF(FILE,X) \
1771
  do {                                                 \
1772
    SYMBOL_REF_FLAGS (X) |= SYMBOL_FLAG_REFERENCED;    \
1773
    assemble_name (FILE, XSTR (X, 0));                 \
1774
  } while (0)
1775
 
1776
/* This is how to store into the string LABEL
1777
   the symbol_ref name of an internal numbered label where
1778
   PREFIX is the class of label and NUM is the number within the class.
1779
   This is suitable for output with `assemble_name'.  */
1780
 
1781
#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM)   \
1782
  sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM))
1783
 
1784
/* Output the definition of a compiler-generated label named NAME.  */
1785
 
1786
#define ASM_OUTPUT_INTERNAL_LABEL(FILE,NAME) \
1787
  do {                                                  \
1788
    assemble_name_raw ((FILE), (NAME));                 \
1789
    if (TARGET_GAS)                                     \
1790
      fputs (":\n", (FILE));                            \
1791
    else                                                \
1792
      fputc ('\n', (FILE));                             \
1793
  } while (0)
1794
 
1795
#define TARGET_ASM_GLOBALIZE_LABEL pa_globalize_label
1796
 
1797
#define ASM_OUTPUT_ASCII(FILE, P, SIZE)  \
1798
  output_ascii ((FILE), (P), (SIZE))
1799
 
1800
/* Jump tables are always placed in the text section.  Technically, it
1801
   is possible to put them in the readonly data section when -mbig-switch
1802
   is specified.  This has the benefit of getting the table out of .text
1803
   and reducing branch lengths as a result.  The downside is that an
1804
   additional insn (addil) is needed to access the table when generating
1805
   PIC code.  The address difference table also has to use 32-bit
1806
   pc-relative relocations.  Currently, GAS does not support these
1807
   relocations, although it is easily modified to do this operation.
1808
   The table entries need to look like "$L1+(.+8-$L0)-$PIC_pcrel$0"
1809
   when using ELF GAS.  A simple difference can be used when using
1810
   SOM GAS or the HP assembler.  The final downside is GDB complains
1811
   about the nesting of the label for the table when debugging.  */
1812
 
1813
#define JUMP_TABLES_IN_TEXT_SECTION 1
1814
 
1815
/* This is how to output an element of a case-vector that is absolute.  */
1816
 
1817
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)  \
1818
  if (TARGET_BIG_SWITCH)                                                \
1819
    fprintf (FILE, "\t.word L$%04d\n", VALUE);                          \
1820
  else                                                                  \
1821
    fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1822
 
1823
/* This is how to output an element of a case-vector that is relative.
1824
   Since we always place jump tables in the text section, the difference
1825
   is absolute and requires no relocation.  */
1826
 
1827
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)  \
1828
  if (TARGET_BIG_SWITCH)                                                \
1829
    fprintf (FILE, "\t.word L$%04d-L$%04d\n", VALUE, REL);              \
1830
  else                                                                  \
1831
    fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1832
 
1833
/* This is how to output an assembler line that says to advance the
1834
   location counter to a multiple of 2**LOG bytes.  */
1835
 
1836
#define ASM_OUTPUT_ALIGN(FILE,LOG)      \
1837
    fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1838
 
1839
#define ASM_OUTPUT_SKIP(FILE,SIZE)  \
1840
  fprintf (FILE, "\t.blockz "HOST_WIDE_INT_PRINT_UNSIGNED"\n",          \
1841
           (unsigned HOST_WIDE_INT)(SIZE))
1842
 
1843
/* This says how to output an assembler line to define an uninitialized
1844
   global variable with size SIZE (in bytes) and alignment ALIGN (in bits).
1845
   This macro exists to properly support languages like C++ which do not
1846
   have common data.  */
1847
 
1848
#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN)           \
1849
  pa_asm_output_aligned_bss (FILE, NAME, SIZE, ALIGN)
1850
 
1851
/* This says how to output an assembler line to define a global common symbol
1852
   with size SIZE (in bytes) and alignment ALIGN (in bits).  */
1853
 
1854
#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN)              \
1855
  pa_asm_output_aligned_common (FILE, NAME, SIZE, ALIGN)
1856
 
1857
/* This says how to output an assembler line to define a local common symbol
1858
   with size SIZE (in bytes) and alignment ALIGN (in bits).  This macro
1859
   controls how the assembler definitions of uninitialized static variables
1860
   are output.  */
1861
 
1862
#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN)               \
1863
  pa_asm_output_aligned_local (FILE, NAME, SIZE, ALIGN)
1864
 
1865
 
1866
#define ASM_PN_FORMAT "%s___%lu"
1867
 
1868
/* All HP assemblers use "!" to separate logical lines.  */
1869
#define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
1870
 
1871
#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1872
  ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1873
 
1874
/* Print operand X (an rtx) in assembler syntax to file FILE.
1875
   CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1876
   For `%' followed by punctuation, CODE is the punctuation and X is null.
1877
 
1878
   On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1879
   and an immediate zero should be represented as `r0'.
1880
 
1881
   Several % codes are defined:
1882
   O an operation
1883
   C compare conditions
1884
   N extract conditions
1885
   M modifier to handle preincrement addressing for memory refs.
1886
   F modifier to handle preincrement addressing for fp memory refs */
1887
 
1888
#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1889
 
1890
 
1891
/* Print a memory address as an operand to reference that memory location.  */
1892
 
1893
#define PRINT_OPERAND_ADDRESS(FILE, ADDR)  \
1894
{ rtx addr = ADDR;                                                      \
1895
  switch (GET_CODE (addr))                                              \
1896
    {                                                                   \
1897
    case REG:                                                           \
1898
      fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]);                \
1899
      break;                                                            \
1900
    case PLUS:                                                          \
1901
      gcc_assert (GET_CODE (XEXP (addr, 1)) == CONST_INT);              \
1902
      fprintf (FILE, "%d(%s)", (int)INTVAL (XEXP (addr, 1)),            \
1903
               reg_names [REGNO (XEXP (addr, 0))]);                      \
1904
      break;                                                            \
1905
    case LO_SUM:                                                        \
1906
      if (!symbolic_operand (XEXP (addr, 1), VOIDmode))                 \
1907
        fputs ("R'", FILE);                                             \
1908
      else if (flag_pic == 0)                                            \
1909
        fputs ("RR'", FILE);                                            \
1910
      else                                                              \
1911
        fputs ("RT'", FILE);                                            \
1912
      output_global_address (FILE, XEXP (addr, 1), 0);                   \
1913
      fputs ("(", FILE);                                                \
1914
      output_operand (XEXP (addr, 0), 0);                         \
1915
      fputs (")", FILE);                                                \
1916
      break;                                                            \
1917
    case CONST_INT:                                                     \
1918
      fprintf (FILE, HOST_WIDE_INT_PRINT_DEC "(%%r0)", INTVAL (addr));  \
1919
      break;                                                            \
1920
    default:                                                            \
1921
      output_addr_const (FILE, addr);                                   \
1922
    }}
1923
 
1924
 
1925
/* Find the return address associated with the frame given by
1926
   FRAMEADDR.  */
1927
#define RETURN_ADDR_RTX(COUNT, FRAMEADDR)                                \
1928
  (return_addr_rtx (COUNT, FRAMEADDR))
1929
 
1930
/* Used to mask out junk bits from the return address, such as
1931
   processor state, interrupt status, condition codes and the like.  */
1932
#define MASK_RETURN_ADDR                                                \
1933
  /* The privilege level is in the two low order bits, mask em out      \
1934
     of the return address.  */                                         \
1935
  (GEN_INT (-4))
1936
 
1937
/* The number of Pmode words for the setjmp buffer.  */
1938
#define JMP_BUF_SIZE 50
1939
 
1940
/* We need a libcall to canonicalize function pointers on TARGET_ELF32.  */
1941
#define CANONICALIZE_FUNCPTR_FOR_COMPARE_LIBCALL \
1942
  "__canonicalize_funcptr_for_compare"
1943
 
1944
#ifdef HAVE_AS_TLS
1945
#undef TARGET_HAVE_TLS
1946
#define TARGET_HAVE_TLS true
1947
#endif

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.