OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.2.2/] [gcc/] [config/] [sh/] [sh-modes.def] - Blame information for rev 199

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 38 julius
/* SH extra machine modes.
2
   Copyright (C) 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
3
 
4
This file is part of GCC.
5
 
6
GCC is free software; you can redistribute it and/or modify
7
it under the terms of the GNU General Public License as published by
8
the Free Software Foundation; either version 3, or (at your option)
9
any later version.
10
 
11
GCC is distributed in the hope that it will be useful,
12
but WITHOUT ANY WARRANTY; without even the implied warranty of
13
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
GNU General Public License for more details.
15
 
16
You should have received a copy of the GNU General Public License
17
along with GCC; see the file COPYING3.  If not see
18
.  */
19
 
20
/* The SH uses a partial integer mode to represent the FPSCR register.  */
21
PARTIAL_INT_MODE (SI);
22
/* PDI mode is used to represent a function address in a target register.  */
23
PARTIAL_INT_MODE (DI);
24
 
25
/* Vector modes.  */
26
VECTOR_MODE  (INT, QI, 2);    /*                 V2QI */
27
VECTOR_MODES (INT, 4);        /*            V4QI V2HI */
28
VECTOR_MODES (INT, 8);        /*       V8QI V4HI V2SI */
29
VECTOR_MODES (INT, 16);       /* V16QI V8HI V4SI V2DI */
30
VECTOR_MODES (FLOAT, 8);      /*            V4HF V2SF */
31
VECTOR_MODES (FLOAT, 16);     /*       V8HF V4SF V2DF */
32
VECTOR_MODE (INT, DI, 4);     /*                 V4DI */
33
VECTOR_MODE (INT, DI, 8);     /*                 V8DI */
34
VECTOR_MODE (FLOAT, SF, 16);  /*                V16SF */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.