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[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.2.2/] [gcc/] [config/] [sparc/] [sparc.opt] - Blame information for rev 154

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; Options for the SPARC port of the compiler
;
; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
; License for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3.  If not see
; .
 
mfpu
Target Report Mask(FPU)
Use hardware FP
 
mhard-float
Target RejectNegative Mask(FPU) MaskExists
Use hardware FP
 
msoft-float
Target RejectNegative InverseMask(FPU)
Do not use hardware FP
 
munaligned-doubles
Target Report Mask(UNALIGNED_DOUBLES)
Assume possible double misalignment
 
mimpure-text
Target Report
Pass -assert pure-text to linker
 
mapp-regs
Target Report Mask(APP_REGS)
Use ABI reserved registers
 
mhard-quad-float
Target Report RejectNegative Mask(HARD_QUAD)
Use hardware quad FP instructions
 
msoft-quad-float
Target Report RejectNegative InverseMask(HARD_QUAD)
Do not use hardware quad fp instructions
 
mv8plus
Target Report Mask(V8PLUS)
Compile for V8+ ABI
 
mvis
Target Report Mask(VIS)
Use UltraSPARC Visual Instruction Set extensions
 
mptr64
Target Report RejectNegative Mask(PTR64)
Pointers are 64-bit
 
mptr32
Target Report RejectNegative InverseMask(PTR64)
Pointers are 32-bit
 
m64
Target Report RejectNegative Mask(64BIT)
Use 64-bit ABI
 
m32
Target Report RejectNegative InverseMask(64BIT)
Use 32-bit ABI
 
mstack-bias
Target Report Mask(STACK_BIAS)
Use stack bias
 
mfaster-structs
Target Report Mask(FASTER_STRUCTS)
Use structs on stronger alignment for double-word copies
 
mrelax
Target
Optimize tail call instructions in assembler and linker
 
mcpu=
Target RejectNegative Joined
Use features of and schedule code for given CPU
 
mtune=
Target RejectNegative Joined
Schedule code for given CPU
 
mcmodel=
Target RejectNegative Joined Var(sparc_cmodel_string)
Use given SPARC-V9 code model
 
mstd-struct-return
Target Report RejectNegative Var(sparc_std_struct_return)
Enable strict 32-bit psABI struct return checking.
 
Mask(LITTLE_ENDIAN)
;; Generate code for little-endian
 
Mask(LONG_DOUBLE_128)
;; Use 128-bit long double
 
Mask(SPARCLITE)
;; Generate code for SPARClite
 
Mask(SPARCLET)
;; Generate code for SPARClet
 
Mask(V8)
;; Generate code for SPARC-V8
 
Mask(V9)
;; Generate code for SPARC-V9
 
Mask(DEPRECATED_V8_INSNS)
;; Generate code that uses the V8 instructions deprecated
;; in the V9 architecture.

Line No.	Rev	Author	Line
1	38	julius	`; Options for the SPARC port of the compiler`
2			`;`
3			`; Copyright (C) 2005, 2007 Free Software Foundation, Inc.`
4			`;`
5			`; This file is part of GCC.`
6			`;`
7			`; GCC is free software; you can redistribute it and/or modify it under`
8			`; the terms of the GNU General Public License as published by the Free`
9			`; Software Foundation; either version 3, or (at your option) any later`
10			`; version.`
11			`;`
12			`; GCC is distributed in the hope that it will be useful, but WITHOUT`
13			`; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY`
14			`; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public`
15			`; License for more details.`
16			`;`
17			`; You should have received a copy of the GNU General Public License`
18			`; along with GCC; see the file COPYING3. If not see`
19			`; .`
20
21			`mfpu`
22			`Target Report Mask(FPU)`
23			`Use hardware FP`
24
25			`mhard-float`
26			`Target RejectNegative Mask(FPU) MaskExists`
27			`Use hardware FP`
28
29			`msoft-float`
30			`Target RejectNegative InverseMask(FPU)`
31			`Do not use hardware FP`
32
33			`munaligned-doubles`
34			`Target Report Mask(UNALIGNED_DOUBLES)`
35			`Assume possible double misalignment`
36
37			`mimpure-text`
38			`Target Report`
39			`Pass -assert pure-text to linker`
40
41			`mapp-regs`
42			`Target Report Mask(APP_REGS)`
43			`Use ABI reserved registers`
44
45			`mhard-quad-float`
46			`Target Report RejectNegative Mask(HARD_QUAD)`
47			`Use hardware quad FP instructions`
48
49			`msoft-quad-float`
50			`Target Report RejectNegative InverseMask(HARD_QUAD)`
51			`Do not use hardware quad fp instructions`
52
53			`mv8plus`
54			`Target Report Mask(V8PLUS)`
55			`Compile for V8+ ABI`
56
57			`mvis`
58			`Target Report Mask(VIS)`
59			`Use UltraSPARC Visual Instruction Set extensions`
60
61			`mptr64`
62			`Target Report RejectNegative Mask(PTR64)`
63			`Pointers are 64-bit`
64
65			`mptr32`
66			`Target Report RejectNegative InverseMask(PTR64)`
67			`Pointers are 32-bit`
68
69			`m64`
70			`Target Report RejectNegative Mask(64BIT)`
71			`Use 64-bit ABI`
72
73			`m32`
74			`Target Report RejectNegative InverseMask(64BIT)`
75			`Use 32-bit ABI`
76
77			`mstack-bias`
78			`Target Report Mask(STACK_BIAS)`
79			`Use stack bias`
80
81			`mfaster-structs`
82			`Target Report Mask(FASTER_STRUCTS)`
83			`Use structs on stronger alignment for double-word copies`
84
85			`mrelax`
86			`Target`
87			`Optimize tail call instructions in assembler and linker`
88
89			`mcpu=`
90			`Target RejectNegative Joined`
91			`Use features of and schedule code for given CPU`
92
93			`mtune=`
94			`Target RejectNegative Joined`
95			`Schedule code for given CPU`
96
97			`mcmodel=`
98			`Target RejectNegative Joined Var(sparc_cmodel_string)`
99			`Use given SPARC-V9 code model`
100
101			`mstd-struct-return`
102			`Target Report RejectNegative Var(sparc_std_struct_return)`
103			`Enable strict 32-bit psABI struct return checking.`
104
105			`Mask(LITTLE_ENDIAN)`
106			`;; Generate code for little-endian`
107
108			`Mask(LONG_DOUBLE_128)`
109			`;; Use 128-bit long double`
110
111			`Mask(SPARCLITE)`
112			`;; Generate code for SPARClite`
113
114			`Mask(SPARCLET)`
115			`;; Generate code for SPARClet`
116
117			`Mask(V8)`
118			`;; Generate code for SPARC-V8`
119
120			`Mask(V9)`
121			`;; Generate code for SPARC-V9`
122
123			`Mask(DEPRECATED_V8_INSNS)`
124			`;; Generate code that uses the V8 instructions deprecated`
125			`;; in the V9 architecture.`

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Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.2.2/] [gcc/] [config/] [sparc/] [sparc.opt] - Blame information for rev 154