OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.2.2/] [gcc/] [testsuite/] [gcc.dg/] [20050321-2.c] - Blame information for rev 154

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 149 jeremybenn
/* This testcase could not assemble on ppc32, because the compiler assumed
2
   the huge ADDR_DIFF_VEC will be emitted into rodata section, yet because
3
   of some notes inserted between jump table's CODE_LABEL and the jump table
4
   it ended up in the .text section and thus shorten_branches couldn't
5
   figure out branch to lab is too far.  */
6
/* { dg-do link { target fpic } } */
7
/* { dg-options "-g1 -fpic" } */
8
/* { dg-bogus "\[Uu\]nresolved symbol .(_GLOBAL_OFFSET_TABLE_|\[_.A-Za-z\]\[_.0-9A-Za-z\]*@(PLT|GOT|GOTOFF))" "PIC unsupported" { xfail *-*-netware* } 0 } */
9
/* { dg-require-effective-target int32plus } */
10
 
11
#define A(n) \
12
  case n##1: return n##1 * 131 + 63;    \
13
  case n##3: return n##3 * 1231 + 182;  \
14
  case n##5: return n##5 * 351 + 1;     \
15
  case n##7: return n##7 * 312 + 61;    \
16
  case n##9: return n##9 * 17 - 1;
17
#define B(n) \
18
A(n##0) A(n##1) A(n##2) A(n##3) A(n##4) \
19
A(n##5) A(n##6) A(n##7) A(n##8) A(n##9)
20
#define C(n) \
21
B(n##0) B(n##1) B(n##2) B(n##3) B(n##4) \
22
B(n##5) B(n##6) B(n##7) B(n##8) B(n##9)
23
#define D(n) \
24
C(n##0) C(n##1) B(n##20) B(n##21) B(n##22)
25
 
26
int
27
foo (int x)
28
{
29
  {
30
lab:;
31
    int a = x;
32
    while (a < 60000)
33
      {
34
        int b = a;
35
        {
36
          int c = b;
37
          switch (c)
38
            {
39
              D(1)
40
              default: break;
41
            }
42
        }
43
        a += 10000;
44
        if (a == 4168)
45
          goto lab;
46
      }
47
  }
48
  return x;
49
}
50
 
51
int
52
main (void)
53
{
54
  foo (71);
55
  return 0;
56
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.