OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.2.2/] [gcc/] [testsuite/] [gcc.dg/] [pragma-isr2.c] - Blame information for rev 645

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 149 jeremybenn
/* { dg-do compile { target h8300-*-* sh-*-* sh[1234ble]*-*-*} } */
2
/* { dg-options "-O" } */
3
/* This test case will check whether rte is generated only for isr.  */
4
#pragma interrupt
5
void isr()
6
{
7
}
8
void delay(int a)
9
{
10
}
11
int main()
12
{
13
  return 0;
14
}
15
 
16
/* { dg-final { scan-assembler-times "rte" 1} } */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.