OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.2.2/] [gcc/] [testsuite/] [gcc.misc-tests/] [i386-prefetch.exp] - Blame information for rev 193

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 149 jeremybenn
#   Copyright (C) 2002, 2004, 2007 Free Software Foundation, Inc.
2
 
3
# This program is free software; you can redistribute it and/or modify
4
# it under the terms of the GNU General Public License as published by
5
# the Free Software Foundation; either version 3 of the License, or
6
# (at your option) any later version.
7
#
8
# This program is distributed in the hope that it will be useful,
9
# but WITHOUT ANY WARRANTY; without even the implied warranty of
10
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11
# GNU General Public License for more details.
12
#
13
# You should have received a copy of the GNU General Public License
14
# along with GCC; see the file COPYING3.  If not see
15
# .
16
 
17
# Test that the correct data prefetch instructions (SSE or 3DNow! variant,
18
# or none) are used for various i386 cpu-type and instruction set
19
# extension options for __builtin_prefetch.  When using -mtune, specify
20
# the minimum supported architecture in case the compiler was configured
21
# with a different default.
22
 
23
# Failure reports do not include the compile option that was used; that
24
# information can be seen in the compile line in the log file.
25
 
26
# Do not generate prefetch instructions for the following options.
27
 
28
set PREFETCH_NONE [list \
29
        { -march=i386 -mtune=i386 } \
30
        { -march=i386 -mtune=i486 } \
31
        { -march=i386 -mtune=i586 } \
32
        { -march=i386 -mtune=i686 } \
33
        { -march=i386 -mtune=pentium2 } \
34
        { -march=i386 -mtune=k6 } \
35
        { -march=i386 -mtune=k6-2 } \
36
        { -march=i386 -mtune=k6-3 } \
37
        { -march=i386 } \
38
        { -march=i486 } \
39
        { -march=i586 } \
40
        { -march=i686 } \
41
        { -march=pentium2 } \
42
        { -march=k6 } ]
43
 
44
# For options in PREFETCH_SSE, generate SSE prefetch instructions for
45
# __builtin_prefetch.  This includes -mtune for targets that treat prefetch
46
# instructions as nops.
47
 
48
set PREFETCH_SSE [list \
49
        { -march=i686 -mtune=pentium3 } \
50
        { -march=i686 -mtune=pentium3m } \
51
        { -march=i686 -mtune=pentium-m } \
52
        { -march=i686 -mtune=pentium4 } \
53
        { -march=i686 -mtune=pentium4m } \
54
        { -march=i686 -mtune=prescott } \
55
        { -march=i686 -mtune=athlon } \
56
        { -march=i686 -mtune=athlon-4 } \
57
        { -march=i686 -mtune=c3-2 } \
58
        { -march=pentium3 } \
59
        { -march=pentium3m } \
60
        { -march=pentium-m } \
61
        { -march=pentium4 } \
62
        { -march=pentium4m } \
63
        { -march=prescott } \
64
        { -march=c3-2 } ]
65
 
66
# Generate 3DNow! prefetch instructions for the following.
67
 
68
set PREFETCH_3DNOW [list \
69
        { -march=c3 } \
70
        { -march=k6-2 } \
71
        { -march=k6-3 } ]
72
 
73
# Athlon supports both 3DNow! and SSE prefetch instructions.  For
74
# __builtin_prefetch, generate the 3DNow! instruction for write
75
# prefetches but SSE prefetch instructions for read prefetches.
76
 
77
set PREFETCH_ATHLON [list \
78
        { -march=athlon } \
79
        { -march=athlon-4 } ]
80
 
81
if $tracelevel then {
82
    strace $tracelevel
83
}
84
 
85
# Load support procs.
86
load_lib gcc-dg.exp
87
 
88
# Initialize harness.
89
dg-init
90
 
91
# Save these.  They are needed if testsuite loops over multiple ABIs
92
set saved_torture_with_loops $torture_with_loops
93
set saved_torture_without_loops $torture_without_loops
94
 
95
set torture_with_loops $PREFETCH_NONE
96
set torture_without_loops $PREFETCH_NONE
97
gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/i386-pf-none-*.c]] ""
98
 
99
set torture_with_loops $PREFETCH_SSE
100
set torture_without_loops $PREFETCH_SSE
101
gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/i386-pf-sse-*.c]] ""
102
 
103
set torture_with_loops $PREFETCH_3DNOW
104
set torture_without_loops $PREFETCH_3DNOW
105
gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/i386-pf-3dnow-*.c]] ""
106
 
107
set torture_with_loops $PREFETCH_ATHLON
108
set torture_without_loops $PREFETCH_ATHLON
109
gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/i386-pf-athlon-*.c]] ""
110
 
111
set torture_with_loops $saved_torture_with_loops
112
set torture_without_loops $saved_torture_without_loops
113
 
114
dg-finish
115
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.