Subversion Repositories openrisc_me

/* Save and restore call-clobbered registers which are live across a call.

   Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000,

   2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010

   Free Software Foundation, Inc.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify it under

the terms of the GNU General Public License as published by the Free

Software Foundation; either version 3, or (at your option) any later

version.

GCC is distributed in the hope that it will be useful, but WITHOUT ANY

WARRANTY; without even the implied warranty of MERCHANTABILITY or

FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

for more details.

You should have received a copy of the GNU General Public License

along with GCC; see the file COPYING3.  If not see

<http://www.gnu.org/licenses/>.  */

#include "config.h"

#include "system.h"

#include "coretypes.h"

#include "tm.h"

#include "rtl.h"

#include "regs.h"

#include "insn-config.h"

#include "flags.h"

#include "hard-reg-set.h"

#include "recog.h"

#include "basic-block.h"

#include "reload.h"

#include "function.h"

#include "expr.h"

#include "toplev.h"

#include "tm_p.h"

#include "addresses.h"

#include "output.h"

#include "df.h"

#include "ggc.h"

/* True if caller-save has been initialized.  */

bool caller_save_initialized_p;

/* Call used hard registers which can not be saved because there is no

   insn for this.  */

HARD_REG_SET no_caller_save_reg_set;

#ifndef MAX_MOVE_MAX

#define MAX_MOVE_MAX MOVE_MAX

#endif

#ifndef MIN_UNITS_PER_WORD

#define MIN_UNITS_PER_WORD UNITS_PER_WORD

#endif

#define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)

/* Modes for each hard register that we can save.  The smallest mode is wide

   enough to save the entire contents of the register.  When saving the

   register because it is live we first try to save in multi-register modes.

   If that is not possible the save is done one register at a time.  */

static enum machine_mode

  regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];

/* For each hard register, a place on the stack where it can be saved,

   if needed.  */

static rtx

  regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];

/* The number of elements in the subsequent array.  */

static int save_slots_num;

/* Allocated slots so far.  */

static rtx save_slots[FIRST_PSEUDO_REGISTER];

/* We will only make a register eligible for caller-save if it can be

   saved in its widest mode with a simple SET insn as long as the memory

   address is valid.  We record the INSN_CODE is those insns here since

   when we emit them, the addresses might not be valid, so they might not

   be recognized.  */

static int

  cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];

static int

  cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];

/* Set of hard regs currently residing in save area (during insn scan).  */

static HARD_REG_SET hard_regs_saved;

/* Number of registers currently in hard_regs_saved.  */

static int n_regs_saved;

/* Computed by mark_referenced_regs, all regs referenced in a given

   insn.  */

static HARD_REG_SET referenced_regs;

typedef void refmarker_fn (rtx *loc, enum machine_mode mode, int hardregno,

                           void *mark_arg);

static int reg_save_code (int, enum machine_mode);

static int reg_restore_code (int, enum machine_mode);

struct saved_hard_reg;

static void initiate_saved_hard_regs (void);

static struct saved_hard_reg *new_saved_hard_reg (int, int);

static void finish_saved_hard_regs (void);

static int saved_hard_reg_compare_func (const void *, const void *);

static void mark_set_regs (rtx, const_rtx, void *);

static void mark_referenced_regs (rtx *, refmarker_fn *mark, void *mark_arg);

static refmarker_fn mark_reg_as_referenced;

static refmarker_fn replace_reg_with_saved_mem;

static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,

                        enum machine_mode *);

static int insert_restore (struct insn_chain *, int, int, int,

                           enum machine_mode *);

static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,

                                           rtx);

static void add_stored_regs (rtx, const_rtx, void *);

static GTY(()) rtx savepat;

static GTY(()) rtx restpat;

static GTY(()) rtx test_reg;

static GTY(()) rtx test_mem;

static GTY(()) rtx saveinsn;

static GTY(()) rtx restinsn;

/* Return the INSN_CODE used to save register REG in mode MODE.  */

static int

reg_save_code (int reg, enum machine_mode mode)

{

  bool ok;

  if (cached_reg_save_code[reg][mode])

     return cached_reg_save_code[reg][mode];

  if (!HARD_REGNO_MODE_OK (reg, mode))

     {

       cached_reg_save_code[reg][mode] = -1;

       cached_reg_restore_code[reg][mode] = -1;

       return -1;

     }

  /* Update the register number and modes of the register

     and memory operand.  */

  SET_REGNO (test_reg, reg);

  PUT_MODE (test_reg, mode);

  PUT_MODE (test_mem, mode);

  /* Force re-recognition of the modified insns.  */

  INSN_CODE (saveinsn) = -1;

  INSN_CODE (restinsn) = -1;

  cached_reg_save_code[reg][mode] = recog_memoized (saveinsn);

  cached_reg_restore_code[reg][mode] = recog_memoized (restinsn);

  /* Now extract both insns and see if we can meet their

     constraints.  */

  ok = (cached_reg_save_code[reg][mode] != -1

        && cached_reg_restore_code[reg][mode] != -1);

  if (ok)

    {

      extract_insn (saveinsn);

      ok = constrain_operands (1);

      extract_insn (restinsn);

      ok &= constrain_operands (1);

    }

  if (! ok)

    {

      cached_reg_save_code[reg][mode] = -1;

      cached_reg_restore_code[reg][mode] = -1;

    }

  gcc_assert (cached_reg_save_code[reg][mode]);

  return cached_reg_save_code[reg][mode];

}

/* Return the INSN_CODE used to restore register REG in mode MODE.  */

static int

reg_restore_code (int reg, enum machine_mode mode)

{

  if (cached_reg_restore_code[reg][mode])

     return cached_reg_restore_code[reg][mode];

  /* Populate our cache.  */

  reg_save_code (reg, mode);

  return cached_reg_restore_code[reg][mode];

}

/* Initialize for caller-save.

   Look at all the hard registers that are used by a call and for which

   reginfo.c has not already excluded from being used across a call.

   Ensure that we can find a mode to save the register and that there is a

   simple insn to save and restore the register.  This latter check avoids

   problems that would occur if we tried to save the MQ register of some

   machines directly into memory.  */

void

init_caller_save (void)

{

  rtx addr_reg;

  int offset;

  rtx address;

  int i, j;

  if (caller_save_initialized_p)

    return;

  caller_save_initialized_p = true;

  CLEAR_HARD_REG_SET (no_caller_save_reg_set);

  /* First find all the registers that we need to deal with and all

     the modes that they can have.  If we can't find a mode to use,

     we can't have the register live over calls.  */

  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)

    {

      if (call_used_regs[i]

          && !TEST_HARD_REG_BIT (call_fixed_reg_set, i))

        {

          for (j = 1; j <= MOVE_MAX_WORDS; j++)

            {

              regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,

                                                                   VOIDmode);

              if (regno_save_mode[i][j] == VOIDmode && j == 1)

                {

                  SET_HARD_REG_BIT (call_fixed_reg_set, i);

                }

            }

        }

      else

        regno_save_mode[i][1] = VOIDmode;

    }

  /* The following code tries to approximate the conditions under which

     we can easily save and restore a register without scratch registers or

     other complexities.  It will usually work, except under conditions where

     the validity of an insn operand is dependent on the address offset.

     No such cases are currently known.

     We first find a typical offset from some BASE_REG_CLASS register.

     This address is chosen by finding the first register in the class

     and by finding the smallest power of two that is a valid offset from

     that register in every mode we will use to save registers.  */

  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)

    if (TEST_HARD_REG_BIT

        (reg_class_contents

         [(int) base_reg_class (regno_save_mode[i][1], PLUS, CONST_INT)], i))

      break;

  gcc_assert (i < FIRST_PSEUDO_REGISTER);

  addr_reg = gen_rtx_REG (Pmode, i);

  for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)

    {

      address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));

      for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)

        if (regno_save_mode[i][1] != VOIDmode

          && ! strict_memory_address_p (regno_save_mode[i][1], address))

          break;

      if (i == FIRST_PSEUDO_REGISTER)

        break;

    }

  /* If we didn't find a valid address, we must use register indirect.  */

  if (offset == 0)

    address = addr_reg;

  /* Next we try to form an insn to save and restore the register.  We

     see if such an insn is recognized and meets its constraints.

     To avoid lots of unnecessary RTL allocation, we construct all the RTL

     once, then modify the memory and register operands in-place.  */

  test_reg = gen_rtx_REG (VOIDmode, 0);

  test_mem = gen_rtx_MEM (VOIDmode, address);

  savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);

  restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);

  saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, savepat, -1, 0);

  restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, restpat, -1, 0);

  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)

    for (j = 1; j <= MOVE_MAX_WORDS; j++)

      if (reg_save_code (i,regno_save_mode[i][j]) == -1)

        {

          regno_save_mode[i][j] = VOIDmode;

          if (j == 1)

            {

              SET_HARD_REG_BIT (call_fixed_reg_set, i);

              if (call_used_regs[i])

                SET_HARD_REG_BIT (no_caller_save_reg_set, i);

            }

        }

}

/* Initialize save areas by showing that we haven't allocated any yet.  */

void

init_save_areas (void)

{

  int i, j;

  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)

    for (j = 1; j <= MOVE_MAX_WORDS; j++)

      regno_save_mem[i][j] = 0;

  save_slots_num = 0;

}

/* The structure represents a hard register which should be saved

   through the call.  It is used when the integrated register

   allocator (IRA) is used and sharing save slots is on.  */

struct saved_hard_reg

{

  /* Order number starting with 0.  */

  int num;

  /* The hard regno.  */

  int hard_regno;

  /* Execution frequency of all calls through which given hard

     register should be saved.  */

  int call_freq;

  /* Stack slot reserved to save the hard register through calls.  */

  rtx slot;

  /* True if it is first hard register in the chain of hard registers

     sharing the same stack slot.  */

  int first_p;

  /* Order number of the next hard register structure with the same

     slot in the chain.  -1 represents end of the chain.  */

  int next;

};

/* Map: hard register number to the corresponding structure.  */

static struct saved_hard_reg *hard_reg_map[FIRST_PSEUDO_REGISTER];

/* The number of all structures representing hard registers should be

   saved, in order words, the number of used elements in the following

   array.  */

static int saved_regs_num;

/* Pointers to all the structures.  Index is the order number of the

   corresponding structure.  */

static struct saved_hard_reg *all_saved_regs[FIRST_PSEUDO_REGISTER];

/* First called function for work with saved hard registers.  */

static void

initiate_saved_hard_regs (void)

{

  int i;

  saved_regs_num = 0;

  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)

    hard_reg_map[i] = NULL;

}

/* Allocate and return new saved hard register with given REGNO and

   CALL_FREQ.  */

static struct saved_hard_reg *

new_saved_hard_reg (int regno, int call_freq)

{

  struct saved_hard_reg *saved_reg;

  saved_reg

    = (struct saved_hard_reg *) xmalloc (sizeof (struct saved_hard_reg));

  hard_reg_map[regno] = all_saved_regs[saved_regs_num] = saved_reg;

  saved_reg->num = saved_regs_num++;

  saved_reg->hard_regno = regno;

  saved_reg->call_freq = call_freq;

  saved_reg->first_p = FALSE;

  saved_reg->next = -1;

  return saved_reg;

}

/* Free memory allocated for the saved hard registers.  */

static void

finish_saved_hard_regs (void)

{

  int i;

  for (i = 0; i < saved_regs_num; i++)

    free (all_saved_regs[i]);

}

/* The function is used to sort the saved hard register structures

   according their frequency.  */

static int

saved_hard_reg_compare_func (const void *v1p, const void *v2p)

{

  const struct saved_hard_reg *p1 = *(struct saved_hard_reg * const *) v1p;

  const struct saved_hard_reg *p2 = *(struct saved_hard_reg * const *) v2p;

  if (flag_omit_frame_pointer)

    {

      if (p1->call_freq - p2->call_freq != 0)

        return p1->call_freq - p2->call_freq;

    }

  else if (p2->call_freq - p1->call_freq != 0)

    return p2->call_freq - p1->call_freq;

  return p1->num - p2->num;

}

/* Allocate save areas for any hard registers that might need saving.

   We take a conservative approach here and look for call-clobbered hard

   registers that are assigned to pseudos that cross calls.  This may

   overestimate slightly (especially if some of these registers are later

   used as spill registers), but it should not be significant.

   For IRA we use priority coloring to decrease stack slots needed for

   saving hard registers through calls.  We build conflicts for them

   to do coloring.

   Future work:

     In the fallback case we should iterate backwards across all possible

     modes for the save, choosing the largest available one instead of

     falling back to the smallest mode immediately.  (eg TF -> DF -> SF).

     We do not try to use "move multiple" instructions that exist

     on some machines (such as the 68k moveml).  It could be a win to try

     and use them when possible.  The hard part is doing it in a way that is

     machine independent since they might be saving non-consecutive

     registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */

void

setup_save_areas (void)

{

  int i, j, k;

  unsigned int r;

  HARD_REG_SET hard_regs_used;

  /* Allocate space in the save area for the largest multi-register

     pseudos first, then work backwards to single register

     pseudos.  */

  /* Find and record all call-used hard-registers in this function.  */

  CLEAR_HARD_REG_SET (hard_regs_used);

  for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)

    if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)

      {

        unsigned int regno = reg_renumber[i];

        unsigned int endregno

          = end_hard_regno (GET_MODE (regno_reg_rtx[i]), regno);

        for (r = regno; r < endregno; r++)

          if (call_used_regs[r])

            SET_HARD_REG_BIT (hard_regs_used, r);

      }

  if (optimize && flag_ira_share_save_slots)

    {

      rtx insn, slot;

      struct insn_chain *chain, *next;

      char *saved_reg_conflicts;

      unsigned int regno;

      int next_k, freq;

      struct saved_hard_reg *saved_reg, *saved_reg2, *saved_reg3;

      int call_saved_regs_num;

      struct saved_hard_reg *call_saved_regs[FIRST_PSEUDO_REGISTER];

      HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets;

      reg_set_iterator rsi;

      int best_slot_num;

      int prev_save_slots_num;

      rtx prev_save_slots[FIRST_PSEUDO_REGISTER];

      initiate_saved_hard_regs ();

      /* Create hard reg saved regs.  */

      for (chain = reload_insn_chain; chain != 0; chain = next)

        {

          insn = chain->insn;

          next = chain->next;

          if (!CALL_P (insn)

              || find_reg_note (insn, REG_NORETURN, NULL))

            continue;

          freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn));

          REG_SET_TO_HARD_REG_SET (hard_regs_to_save,

                                   &chain->live_throughout);

          COPY_HARD_REG_SET (used_regs, call_used_reg_set);

          /* Record all registers set in this call insn.  These don't

             need to be saved.  N.B. the call insn might set a subreg

             of a multi-hard-reg pseudo; then the pseudo is considered

             live during the call, but the subreg that is set

             isn't.  */

          CLEAR_HARD_REG_SET (this_insn_sets);

          note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);

          /* Sibcalls are considered to set the return value.  */

          if (SIBLING_CALL_P (insn) && crtl->return_rtx)

            mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);

          AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);

          AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);

          AND_HARD_REG_SET (hard_regs_to_save, used_regs);

          for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)

            if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))

              {

                if (hard_reg_map[regno] != NULL)

                  hard_reg_map[regno]->call_freq += freq;

                else

                  saved_reg = new_saved_hard_reg (regno, freq);

              }

          /* Look through all live pseudos, mark their hard registers.  */

          EXECUTE_IF_SET_IN_REG_SET

            (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)

            {

              int r = reg_renumber[regno];

              int bound;

              if (r < 0)

                continue;

              bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];

              for (; r < bound; r++)

                if (TEST_HARD_REG_BIT (used_regs, r))

                  {

                    if (hard_reg_map[r] != NULL)

                      hard_reg_map[r]->call_freq += freq;

                    else

                      saved_reg = new_saved_hard_reg (r, freq);

                    SET_HARD_REG_BIT (hard_regs_to_save, r);

                  }

            }

        }

      /* Find saved hard register conflicts.  */

      saved_reg_conflicts = (char *) xmalloc (saved_regs_num * saved_regs_num);

      memset (saved_reg_conflicts, 0, saved_regs_num * saved_regs_num);

      for (chain = reload_insn_chain; chain != 0; chain = next)

        {

          call_saved_regs_num = 0;

          insn = chain->insn;

          next = chain->next;

          if (!CALL_P (insn)

              || find_reg_note (insn, REG_NORETURN, NULL))

            continue;

          REG_SET_TO_HARD_REG_SET (hard_regs_to_save,

                                   &chain->live_throughout);

          COPY_HARD_REG_SET (used_regs, call_used_reg_set);

          /* Record all registers set in this call insn.  These don't

             need to be saved.  N.B. the call insn might set a subreg

             of a multi-hard-reg pseudo; then the pseudo is considered

             live during the call, but the subreg that is set

             isn't.  */

          CLEAR_HARD_REG_SET (this_insn_sets);

          note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);

          /* Sibcalls are considered to set the return value,

             compare df-scan.c:df_get_call_refs.  */

          if (SIBLING_CALL_P (insn) && crtl->return_rtx)

            mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);

          AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);

          AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);

          AND_HARD_REG_SET (hard_regs_to_save, used_regs);

          for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)

            if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))

              {

                gcc_assert (hard_reg_map[regno] != NULL);

                call_saved_regs[call_saved_regs_num++] = hard_reg_map[regno];

              }

          /* Look through all live pseudos, mark their hard registers.  */

          EXECUTE_IF_SET_IN_REG_SET

            (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)

            {

              int r = reg_renumber[regno];

              int bound;

              if (r < 0)

                continue;

              bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];

              for (; r < bound; r++)

                if (TEST_HARD_REG_BIT (used_regs, r))

                  call_saved_regs[call_saved_regs_num++] = hard_reg_map[r];

            }

          for (i = 0; i < call_saved_regs_num; i++)

            {

              saved_reg = call_saved_regs[i];

              for (j = 0; j < call_saved_regs_num; j++)

                if (i != j)

                  {

                    saved_reg2 = call_saved_regs[j];

                    saved_reg_conflicts[saved_reg->num * saved_regs_num

                                        + saved_reg2->num]

                      = saved_reg_conflicts[saved_reg2->num * saved_regs_num

                                            + saved_reg->num]

                      = TRUE;

                  }

            }

        }

      /* Sort saved hard regs.  */

      qsort (all_saved_regs, saved_regs_num, sizeof (struct saved_hard_reg *),

             saved_hard_reg_compare_func);

      /* Initiate slots available from the previous reload

         iteration.  */

      prev_save_slots_num = save_slots_num;

      memcpy (prev_save_slots, save_slots, save_slots_num * sizeof (rtx));

      save_slots_num = 0;

      /* Allocate stack slots for the saved hard registers.  */

      for (i = 0; i < saved_regs_num; i++)

        {

          saved_reg = all_saved_regs[i];

          regno = saved_reg->hard_regno;

          for (j = 0; j < i; j++)

            {

              saved_reg2 = all_saved_regs[j];

              if (! saved_reg2->first_p)

                continue;

              slot = saved_reg2->slot;

              for (k = j; k >= 0; k = next_k)

                {

                  saved_reg3 = all_saved_regs[k];

                  next_k = saved_reg3->next;

                  if (saved_reg_conflicts[saved_reg->num * saved_regs_num

                                          + saved_reg3->num])

                    break;

                }

              if (k < 0

                  && (GET_MODE_SIZE (regno_save_mode[regno][1])

                      <= GET_MODE_SIZE (regno_save_mode

                                        [saved_reg2->hard_regno][1])))

                {

                  saved_reg->slot

                    = adjust_address_nv

                      (slot, regno_save_mode[saved_reg->hard_regno][1], 0);

                  regno_save_mem[regno][1] = saved_reg->slot;

                  saved_reg->next = saved_reg2->next;

                  saved_reg2->next = i;

                  if (dump_file != NULL)

                    fprintf (dump_file, "%d uses slot of %d\n",

                             regno, saved_reg2->hard_regno);

                  break;

                }

            }

          if (j == i)

            {

              saved_reg->first_p = TRUE;

              for (best_slot_num = -1, j = 0; j < prev_save_slots_num; j++)

                {

                  slot = prev_save_slots[j];

                  if (slot == NULL_RTX)

                    continue;

                  if (GET_MODE_SIZE (regno_save_mode[regno][1])

                      <= GET_MODE_SIZE (GET_MODE (slot))

                      && best_slot_num < 0)

                    best_slot_num = j;

                  if (GET_MODE (slot) == regno_save_mode[regno][1])

                    break;

                }

              if (best_slot_num >= 0)

                {

                  saved_reg->slot = prev_save_slots[best_slot_num];

                  saved_reg->slot

                    = adjust_address_nv

                      (saved_reg->slot,

                       regno_save_mode[saved_reg->hard_regno][1], 0);

                  if (dump_file != NULL)

                    fprintf (dump_file,

                             "%d uses a slot from prev iteration\n", regno);